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Improved Z80-DMA debug logging. (no whatsnew)

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This commit is contained in:
Curt Coder 2010-09-19 17:49:00 +00:00
parent 7a4744d31d
commit 5c0e08dce2
1 changed files with 31 additions and 24 deletions
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55
src/emu/machine/z80dma.c
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@ -12,6 +12,7 @@
- Only memory to memory is tested! - Only memory to memory is tested!
TODO: TODO:
- reset command (C3) is handled improperly
- rewrite to match documentation - rewrite to match documentation
- implement missing features - implement missing features
- implement more asserts - implement more asserts
@ -434,7 +435,7 @@ void z80dma_device::do_read()
else else
m_latch = devcb_call_read8(&m_in_iorq_func, m_addressA); m_latch = devcb_call_read8(&m_in_iorq_func, m_addressA);
if (LOG) logerror("A src: %04x %s -> data: %02x\n",m_addressA, PORTA_MEMORY ? "mem" : "i/o", m_latch); if (LOG) logerror("Z80DMA '%s' A src: %04x %s -> data: %02x\n", tag(), m_addressA, PORTA_MEMORY ? "mem" : "i/o", m_latch);
m_addressA += PORTA_FIXED ? 0 : PORTA_INC ? PORTA_STEP : -PORTA_STEP; m_addressA += PORTA_FIXED ? 0 : PORTA_INC ? PORTA_STEP : -PORTA_STEP;
} }
else else
@ -444,7 +445,7 @@ void z80dma_device::do_read()
else else
m_latch = devcb_call_read8(&m_in_iorq_func, m_addressB); m_latch = devcb_call_read8(&m_in_iorq_func, m_addressB);
if (LOG) logerror("B src: %04x %s -> data: %02x\n",m_addressB, PORTB_MEMORY ? "mem" : "i/o", m_latch); if (LOG) logerror("Z80DMA '%s' B src: %04x %s -> data: %02x\n", tag(), m_addressB, PORTB_MEMORY ? "mem" : "i/o", m_latch);
m_addressB += PORTB_FIXED ? 0 : PORTB_INC ? PORTB_STEP : -PORTB_STEP; m_addressB += PORTB_FIXED ? 0 : PORTB_INC ? PORTB_STEP : -PORTB_STEP;
} }
break; break;
@ -481,7 +482,7 @@ int z80dma_device::do_write()
else else
devcb_call_write8(&m_out_iorq_func, m_addressB, m_latch); devcb_call_write8(&m_out_iorq_func, m_addressB, m_latch);
if (LOG) logerror("B dst: %04x %s\n",m_addressB, PORTB_MEMORY ? "mem" : "i/o"); if (LOG) logerror("Z80DMA '%s' B dst: %04x %s\n", tag(), m_addressB, PORTB_MEMORY ? "mem" : "i/o");
m_addressB += PORTB_FIXED ? 0 : PORTB_INC ? PORTB_STEP : -PORTB_STEP; m_addressB += PORTB_FIXED ? 0 : PORTB_INC ? PORTB_STEP : -PORTB_STEP;
} }
else else
@ -491,7 +492,7 @@ int z80dma_device::do_write()
else else
devcb_call_write8(&m_out_iorq_func, m_addressA, m_latch); devcb_call_write8(&m_out_iorq_func, m_addressA, m_latch);
if (LOG) logerror("A dst: %04x %s\n",m_addressA, PORTA_MEMORY ? "mem" : "i/o"); if (LOG) logerror("Z80DMA '%s' A dst: %04x %s\n", tag(), m_addressA, PORTA_MEMORY ? "mem" : "i/o");
m_addressA += PORTA_FIXED ? 0 : PORTA_INC ? PORTA_STEP : -PORTA_STEP; m_addressA += PORTA_FIXED ? 0 : PORTA_INC ? PORTA_STEP : -PORTA_STEP;
} }
m_count--; m_count--;
@ -638,6 +639,8 @@ UINT8 z80dma_device::read()
if(m_read_cur_follow >= m_read_num_follow) if(m_read_cur_follow >= m_read_num_follow)
m_read_cur_follow = 0; m_read_cur_follow = 0;
if (LOG) logerror("Z80DMA '%s' Read %02x\n", tag(), res);
return res; return res;
} }
@ -648,6 +651,8 @@ UINT8 z80dma_device::read()
void z80dma_device::write(UINT8 data) void z80dma_device::write(UINT8 data)
{ {
if (LOG) logerror("Z80DMA '%s' Write %02x\n", tag(), data);
if (m_num_follow == 0) if (m_num_follow == 0)
{ {
if ((data & 0x87) == 0) // WR2 if ((data & 0x87) == 0) // WR2
@ -702,14 +707,13 @@ void z80dma_device::write(UINT8 data)
WR6 = data; WR6 = data;
switch (data) switch (data)
{ {
case COMMAND_ENABLE_AFTER_RETI: case COMMAND_ENABLE_AFTER_RETI:
fatalerror("Unimplemented WR6 command %02x", data); fatalerror("Z80DMA '%s' Unimplemented WR6 command %02x", tag(), data);
break; break;
case COMMAND_READ_STATUS_BYTE: case COMMAND_READ_STATUS_BYTE:
if (LOG) logerror("CMD Read status Byte\n"); if (LOG) logerror("Z80DMA '%s' CMD Read status Byte\n", tag());
READ_MASK = 0; READ_MASK = 0;
break; break;
case COMMAND_RESET_AND_DISABLE_INTERRUPTS: case COMMAND_RESET_AND_DISABLE_INTERRUPTS:
@ -720,7 +724,7 @@ void z80dma_device::write(UINT8 data)
m_status |= 0x08; m_status |= 0x08;
break; break;
case COMMAND_INITIATE_READ_SEQUENCE: case COMMAND_INITIATE_READ_SEQUENCE:
if (LOG) logerror("Initiate Read Sequence\n"); if (LOG) logerror("Z80DMA '%s' Initiate Read Sequence\n", tag());
m_read_cur_follow = m_read_num_follow = 0; m_read_cur_follow = m_read_num_follow = 0;
if(READ_MASK & 0x01) { m_read_regs_follow[m_read_num_follow++] = m_status; } if(READ_MASK & 0x01) { m_read_regs_follow[m_read_num_follow++] = m_status; }
if(READ_MASK & 0x02) { m_read_regs_follow[m_read_num_follow++] = BLOCKLEN_L; } //byte counter (low) if(READ_MASK & 0x02) { m_read_regs_follow[m_read_num_follow++] = BLOCKLEN_L; } //byte counter (low)
@ -731,9 +735,12 @@ void z80dma_device::write(UINT8 data)
if(READ_MASK & 0x40) { m_read_regs_follow[m_read_num_follow++] = PORTB_ADDRESS_H; } //port B address (high) if(READ_MASK & 0x40) { m_read_regs_follow[m_read_num_follow++] = PORTB_ADDRESS_H; } //port B address (high)
break; break;
case COMMAND_RESET: case COMMAND_RESET:
if (LOG) logerror("Reset\n"); if (LOG) logerror("Z80DMA '%s' Reset\n", tag());
m_dma_enabled = 0; m_dma_enabled = 0;
m_force_ready = 0; m_force_ready = 0;
m_ip = 0;
m_ius = 0;
interrupt_check();
// Needs six reset commands to reset the DMA // Needs six reset commands to reset the DMA
{ {
UINT8 WRi; UINT8 WRi;
@ -752,63 +759,63 @@ void z80dma_device::write(UINT8 data)
m_addressB = PORTB_ADDRESS; m_addressB = PORTB_ADDRESS;
m_count = BLOCKLEN; m_count = BLOCKLEN;
m_status |= 0x30; m_status |= 0x30;
if (LOG) logerror("Load A: %x B: %x N: %x\n", m_addressA, m_addressB, m_count); if (LOG) logerror("Z80DMA '%s' Load A: %x B: %x N: %x\n", tag(), m_addressA, m_addressB, m_count);
break; break;
case COMMAND_DISABLE_DMA: case COMMAND_DISABLE_DMA:
if (LOG) logerror("Disable DMA\n"); if (LOG) logerror("Z80DMA '%s' Disable DMA\n", tag());
m_dma_enabled = 0; m_dma_enabled = 0;
break; break;
case COMMAND_ENABLE_DMA: case COMMAND_ENABLE_DMA:
if (LOG) logerror("Enable DMA\n"); if (LOG) logerror("Z80DMA '%s' Enable DMA\n", tag());
m_dma_enabled = 1; m_dma_enabled = 1;
update_status(); update_status();
break; break;
case COMMAND_READ_MASK_FOLLOWS: case COMMAND_READ_MASK_FOLLOWS:
if (LOG) logerror("Set Read Mask\n"); if (LOG) logerror("Z80DMA '%s' Set Read Mask\n", tag());
m_regs_follow[m_num_follow++] = GET_REGNUM(READ_MASK); m_regs_follow[m_num_follow++] = GET_REGNUM(READ_MASK);
break; break;
case COMMAND_CONTINUE: case COMMAND_CONTINUE:
if (LOG) logerror("Continue\n"); if (LOG) logerror("Z80DMA '%s' Continue\n", tag());
m_count = BLOCKLEN; m_count = BLOCKLEN;
m_dma_enabled = 1; m_dma_enabled = 1;
//"match not found" & "end of block" status flags zeroed here //"match not found" & "end of block" status flags zeroed here
m_status |= 0x30; m_status |= 0x30;
break; break;
case COMMAND_RESET_PORT_A_TIMING: case COMMAND_RESET_PORT_A_TIMING:
if (LOG) logerror("Reset Port A Timing\n"); if (LOG) logerror("Z80DMA '%s' Reset Port A Timing\n", tag());
PORTA_TIMING = 0; PORTA_TIMING = 0;
break; break;
case COMMAND_RESET_PORT_B_TIMING: case COMMAND_RESET_PORT_B_TIMING:
if (LOG) logerror("Reset Port B Timing\n"); if (LOG) logerror("Z80DMA '%s' Reset Port B Timing\n", tag());
PORTB_TIMING = 0; PORTB_TIMING = 0;
break; break;
case COMMAND_FORCE_READY: case COMMAND_FORCE_READY:
if (LOG) logerror("Force ready\n"); if (LOG) logerror("Z80DMA '%s' Force Ready\n", tag());
m_force_ready = 1; m_force_ready = 1;
update_status(); update_status();
break; break;
case COMMAND_ENABLE_INTERRUPTS: case COMMAND_ENABLE_INTERRUPTS:
if (LOG) logerror("Enable IRQ\n"); if (LOG) logerror("Z80DMA '%s' Enable IRQ\n", tag());
WR3 |= 0x20; WR3 |= 0x20;
break; break;
case COMMAND_DISABLE_INTERRUPTS: case COMMAND_DISABLE_INTERRUPTS:
if (LOG) logerror("Disable IRQ\n"); if (LOG) logerror("Z80DMA '%s' Disable IRQ\n", tag());
WR3 &= ~0x20; WR3 &= ~0x20;
break; break;
case COMMAND_REINITIALIZE_STATUS_BYTE: case COMMAND_REINITIALIZE_STATUS_BYTE:
if (LOG) logerror("Reinitialize status byte\n"); if (LOG) logerror("Z80DMA '%s' Reinitialize status byte\n", tag());
m_status |= 0x30; m_status |= 0x30;
m_ip = 0; m_ip = 0;
break; break;
case 0xFB: case 0xFB:
if (LOG) logerror("Z80DMA undocumented command triggered 0x%02X!\n",data); if (LOG) logerror("Z80DMA '%s' undocumented command triggered 0x%02X!\n", tag(), data);
break; break;
default: default:
fatalerror("Unknown WR6 command %02x", data); fatalerror("Z80DMA '%s' Unknown WR6 command %02x", tag(), data);
} }
} }
else else
fatalerror("Unknown base register %02x", data); fatalerror("Z80DMA '%s' Unknown base register %02x", tag(), data);
m_cur_follow = 0; m_cur_follow = 0;
} }
else else
@ -856,7 +863,7 @@ void z80dma_device::rdy_write_callback(int state)
void z80dma_device::rdy_w(int state) void z80dma_device::rdy_w(int state)
{ {
if (LOG) logerror("RDY: %d Active High: %d\n", state, READY_ACTIVE_HIGH); if (LOG) logerror("Z80DMA '%s' RDY: %d Active High: %d\n", tag(), state, READY_ACTIVE_HIGH);
timer_call_after_resynch(&m_machine, (void *)this, state, static_rdy_write_callback); timer_call_after_resynch(&m_machine, (void *)this, state, static_rdy_write_callback);
} }