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assume portb high bit is read-only

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This commit is contained in:
Michaël Banaan Ananas 2014-04-09 18:31:16 +00:00
parent a3774a2b9e
commit 5c4460701e
2 changed files with 30 additions and 30 deletions
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26
src/mame/drivers/namcos12.c
View File

@ -1077,8 +1077,8 @@ public:
int m_ttt_cnt;
UINT32 m_ttt_val[2];
int m_s12_porta;
int m_s12_lastpB;
UINT8 m_sub_porta;
UINT8 m_sub_portb;
DECLARE_WRITE16_MEMBER(sharedram_w);
DECLARE_READ16_MEMBER(sharedram_r);
@ -1235,7 +1235,7 @@ void namcos12_state::namcos12_sub_irq( screen_device &screen, bool vblank_state
{
m_sub->set_input_line(1, vblank_state ? ASSERT_LINE : CLEAR_LINE);
m_adc->adtrg_w(vblank_state);
m_s12_lastpB = (m_s12_lastpB & 0x7f) | (vblank_state << 7);
m_sub_portb = (m_sub_portb & 0x7f) | (vblank_state << 7);
}
static ADDRESS_MAP_START( namcos12_map, AS_PROGRAM, 32, namcos12_state )
@ -1473,27 +1473,27 @@ READ16_MEMBER(namcos12_state::s12_mcu_p8_r)
READ16_MEMBER(namcos12_state::s12_mcu_pa_r)
{
return m_s12_porta;
return m_sub_porta;
}
WRITE16_MEMBER(namcos12_state::s12_mcu_pa_w)
{
logerror("pa_w %02x\n", data);
m_s12_porta = data;
m_rtc->ce_w((m_s12_lastpB & 0x20) && (m_s12_porta & 1));
m_settings->ce_w((m_s12_lastpB & 0x20) && !(m_s12_porta & 1));
m_sub_porta = data;
m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
}
READ16_MEMBER(namcos12_state::s12_mcu_portB_r)
{
return m_s12_lastpB;
return m_sub_portb;
}
WRITE16_MEMBER(namcos12_state::s12_mcu_portB_w)
{
m_s12_lastpB = data;
m_rtc->ce_w((m_s12_lastpB & 0x20) && (m_s12_porta & 1));
m_settings->ce_w((m_s12_lastpB & 0x20) && !(m_s12_porta & 1));
m_sub_portb = (m_sub_portb & 0x80) | (data & 0x7f);
m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
}
static ADDRESS_MAP_START( s12h8iomap, AS_IO, 16, namcos12_state )
@ -1537,8 +1537,8 @@ DRIVER_INIT_MEMBER(namcos12_state,namcos12)
{
membank("bank1")->configure_entries(0, memregion( "user2" )->bytes() / 0x200000, memregion( "user2" )->base(), 0x200000 );
m_s12_porta = 0;
m_s12_lastpB = 0x50;
m_sub_porta = 0;
m_sub_portb = 0x50;
m_n_tektagdmaoffset = 0;
m_n_dmaoffset = 0;

34
src/mame/drivers/namcos23.c
View File

@ -1447,8 +1447,8 @@ public:
UINT16 m_c435_buffer[256];
int m_c435_buffer_pos;
int m_porta;
int m_lastpb;
UINT8 m_sub_porta;
UINT8 m_sub_portb;
UINT8 m_tssio_port_4;
void update_main_interrupts(UINT32 cause);
@ -1508,7 +1508,7 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(interrupt);
TIMER_CALLBACK_MEMBER(c361_timer_cb);
void sub_irq(screen_device &screen, bool state);
void sub_irq(screen_device &screen, bool vblank_state);
UINT8 nthbyte(const UINT32 *pSource, int offs);
UINT16 nthword(const UINT32 *pSource, int offs);
inline INT32 u32_to_s24(UINT32 v);
@ -2255,11 +2255,11 @@ INTERRUPT_GEN_MEMBER(namcos23_state::interrupt)
m_render.count[m_render.cur] = 0;
}
void namcos23_state::sub_irq(screen_device &screen, bool state)
void namcos23_state::sub_irq(screen_device &screen, bool vblank_state)
{
m_subcpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE);
m_adc->adtrg_w(state);
m_lastpb = (m_lastpb & 0x7f) | (state << 7);
m_subcpu->set_input_line(1, vblank_state ? ASSERT_LINE : CLEAR_LINE);
m_adc->adtrg_w(vblank_state);
m_sub_portb = (m_sub_portb & 0x7f) | (vblank_state << 7);
}
@ -2861,15 +2861,15 @@ WRITE16_MEMBER(namcos23_state::mcu_p8_w)
READ16_MEMBER(namcos23_state::mcu_pa_r)
{
return m_porta;
return m_sub_porta;
}
WRITE16_MEMBER(namcos23_state::mcu_pa_w)
{
m_rtc->ce_w(data & 1);
m_porta = data;
m_rtc->ce_w((m_lastpb & 0x20) && (m_porta & 1));
m_settings->ce_w((m_lastpb & 0x20) && !(m_porta & 1));
m_sub_porta = data;
m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
}
@ -2878,14 +2878,14 @@ WRITE16_MEMBER(namcos23_state::mcu_pa_w)
READ16_MEMBER(namcos23_state::mcu_pb_r)
{
return m_lastpb;
return m_sub_portb;
}
WRITE16_MEMBER(namcos23_state::mcu_pb_w)
{
m_lastpb = data;
m_rtc->ce_w((m_lastpb & 0x20) && (m_porta & 1));
m_settings->ce_w((m_lastpb & 0x20) && !(m_porta & 1));
m_sub_portb = (m_sub_portb & 0x80) | (data & 0x7f);
m_rtc->ce_w((m_sub_portb & 0x20) && (m_sub_porta & 1));
m_settings->ce_w((m_sub_portb & 0x20) && !(m_sub_porta & 1));
}
@ -3256,9 +3256,9 @@ DRIVER_INIT_MEMBER(namcos23_state,s23)
m_jvssense = 1;
m_main_irqcause = 0;
m_ctl_vbl_active = false;
m_lastpb = 0x50;
m_sub_portb = 0x50;
m_tssio_port_4 = 0;
m_porta = 0;
m_sub_porta = 0;
m_subcpu_running = false;
m_render.count[0] = m_render.count[1] = 0;
m_render.cur = 0;