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sinclair/tsconf.cpp: finalize regs delayed updates; fix graphic pages padding (#11248)
- finalize regs delayed updates; fix graphic pages padding - fix spectrum page switch
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@ -27,17 +27,6 @@ TsConf: https://github.com/tslabs/zx-evo/blob/master/pentevo/docs/TSconf/tsconf_
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FAQ-RUS: https://forum.tslabs.info/viewtopic.php?f=35&t=157
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ROM: https://github.com/tslabs/zx-evo/blob/master/pentevo/rom/bin/ts-bios.rom (validated on: 2021-12-14)
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HowTo:
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# Create SD image "wc.img"
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# Copy WC files from archive https://github.com/tslabs/zx-evo/blob/master/pentevo/soft/WC/wc.zip
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# Tech Demos (currently *.spg only): http://prods.tslabs.info/index.php?t=4
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$ chdman createhd -i wc.img -o wc.chd -c none
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$ mame tsconf -hard wc.chd
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# BIOS Setup loads on fresh setup (return to BIOS: RShift+F3)
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# Change "Reset To: BD boot.$c"
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# Reset (F3)
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# Enable keyboard: MAME Setup (Tab) > Keyboard Mode > AT Keyboard: Enabled
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TODO:
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- Ram cache
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- VDos
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@ -56,7 +45,7 @@ TODO:
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TILE_GET_INFO_MEMBER(tsconf_state::get_tile_info_txt)
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{
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u8 *m_row_location = &m_ram->pointer()[(m_regs[V_PAGE] << 14) + (tile_index / tilemap.cols() * 256)];
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u8 *m_row_location = &m_ram->pointer()[get_vpage_offset() + (tile_index / tilemap.cols() * 256)];
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u8 col = tile_index % tilemap.cols();
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u8 symbol = m_row_location[col];
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tileinfo.set(TM_TS_CHAR, symbol, 0, 0);
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@ -150,6 +150,7 @@ private:
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TILE_GET_INFO_MEMBER(get_tile_info_16c);
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u8 get_border_color(u16 hpos = ~0, u16 vpos = ~0) override;
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u32 get_vpage_offset();
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rectangle get_screen_area() override;
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void spectrum_update_screen(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) override;
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void tsconf_UpdateZxScreenBitmap(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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@ -164,10 +165,10 @@ private:
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void tsconf_ula_w(offs_t offset, u8 data);
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u8 tsconf_port_xxaf_r(offs_t reg);
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void tsconf_port_xxaf_w(offs_t reg, u8 data);
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u8 tsconf_port_77_zctr_r(offs_t reg);
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void tsconf_port_77_zctr_w(offs_t reg, u8 data);
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u8 tsconf_port_57_zctr_r(offs_t reg);
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void tsconf_port_57_zctr_w(offs_t reg, u8 data);
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u8 tsconf_port_77_zctr_r();
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void tsconf_port_77_zctr_w(u8 data);
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u8 tsconf_port_57_zctr_r();
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void tsconf_port_57_zctr_w(u8 data);
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void tsconf_spi_miso_w(u8 data);
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u8 tsconf_port_f7_r(offs_t offset);
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void tsconf_port_f7_w(offs_t offset, u8 data);
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@ -107,6 +107,11 @@ u8 tsconf_state::get_border_color(u16 hpos, u16 vpos)
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return m_regs[BORDER];
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}
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u32 tsconf_state::get_vpage_offset()
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{
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return PAGE4K(m_regs[V_PAGE] & ((VM == VM_16C) ? 0xf8 : 0xf0));
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}
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/*
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Layered as:
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+ Border - already updated with screen_update_spectrum()
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@ -158,7 +163,7 @@ void tsconf_state::tsconf_UpdateZxScreenBitmap(screen_device &screen, bitmap_ind
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{
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u8 pal_offset = m_regs[PAL_SEL] << 4;
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u8 *screen_location = m_ram->pointer() + PAGE4K(m_regs[V_PAGE]);
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u8 *attrs_location = m_ram->pointer() + PAGE4K(m_regs[V_PAGE]) + 0x1800;
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u8 *attrs_location = screen_location + 0x1800;
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bool invert_attrs = u64(screen.frame_number() / m_frame_invert_count) & 1;
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for (u16 vpos = cliprect.top(); vpos <= cliprect.bottom(); vpos++)
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{
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@ -215,7 +220,7 @@ void tsconf_state::tsconf_UpdateGfxBitmap(bitmap_ind16 &bitmap, const rectangle
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{
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u16 y_offset = (OFFS_512(G_Y_OFFS_L) + m_gfx_y_frame_offset + vpos) & 0x1ff;
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u16 x_offset = (OFFS_512(G_X_OFFS_L) + (cliprect.left() - get_screen_area().left())) & 0x1ff;
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u8 *video_location = m_ram->pointer() + PAGE4K(m_regs[V_PAGE]) + ((y_offset * 512 + x_offset) >> (2 - VM));
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u8 *video_location = m_ram->pointer() + get_vpage_offset() + ((y_offset * 512 + x_offset) >> (2 - VM));
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u16 *bm = &(bitmap.pix(vpos, cliprect.left()));
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s16 width = cliprect.width();
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if (VM == VM_16C)
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@ -347,20 +352,20 @@ void tsconf_state::ram_page_write(u8 page, offs_t offset, u8 data)
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}
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else
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{
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if (ram_addr >= PAGE4K(m_regs[T0_G_PAGE]) && ram_addr < PAGE4K(m_regs[T0_G_PAGE] + 8))
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if (ram_addr >= PAGE4K(m_regs[T0_G_PAGE] & 0xf8) && ram_addr < PAGE4K((m_regs[T0_G_PAGE] & 0xf8) + 8))
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m_gfxdecode->gfx(TM_TILES0)->mark_all_dirty();
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if (ram_addr >= PAGE4K(m_regs[T1_G_PAGE]) && ram_addr < PAGE4K(m_regs[T1_G_PAGE] + 8))
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if (ram_addr >= PAGE4K(m_regs[T1_G_PAGE] & 0xf8) && ram_addr < PAGE4K((m_regs[T1_G_PAGE] & 0xf8) + 8))
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m_gfxdecode->gfx(TM_TILES1)->mark_all_dirty();
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}
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if (ram_addr >= PAGE4K(m_regs[V_PAGE]) && ram_addr < PAGE4K(m_regs[V_PAGE] + 1))
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if (ram_addr >= get_vpage_offset() && ram_addr < get_vpage_offset() + PAGE4K((VM == VM_16C) ? 8 : 16))
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m_ts_tilemap[TM_TS_CHAR]->mark_all_dirty();
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if (ram_addr >= PAGE4K(m_regs[m_regs[V_PAGE] ^ 0x01]) && ram_addr < PAGE4K(m_regs[m_regs[V_PAGE] ^ 0x01] + 1))
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m_gfxdecode->gfx(TM_TS_CHAR)->mark_all_dirty();
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if (ram_addr >= PAGE4K(m_regs[SG_PAGE]) && ram_addr < PAGE4K(m_regs[SG_PAGE] + 8))
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if (ram_addr >= PAGE4K(m_regs[SG_PAGE] & 0xf8) && ram_addr < PAGE4K((m_regs[SG_PAGE] & 0xf8) + 8))
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m_gfxdecode->gfx(TM_SPRITES)->mark_all_dirty();
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m_ram->write(ram_addr, data);
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@ -379,7 +384,8 @@ void tsconf_state::ram_write16(offs_t offset, u16 data)
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u16 tsconf_state::spi_read16()
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{
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return (tsconf_port_57_zctr_r(0) << 8) | tsconf_port_57_zctr_r(0);
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const u16 data_hi = tsconf_port_57_zctr_r() << 8;
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return data_hi | tsconf_port_57_zctr_r();
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}
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void tsconf_state::cram_write(u16 offset, u8 data)
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@ -475,11 +481,19 @@ void tsconf_state::tsconf_port_xxaf_w(offs_t port, u8 data)
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bool delay_update = true;
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switch (nreg)
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{
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// more registers which marked as *1 in the xls, but rest need to be tested
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case V_CONFIG:
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case V_PAGE:
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case G_X_OFFS_L:
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case G_X_OFFS_H:
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case G_Y_OFFS_L:
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case G_Y_OFFS_H:
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case PAL_SEL:
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case T0_G_PAGE:
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case T1_G_PAGE:
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case T0_X_OFFSET_L:
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case T0_X_OFFSET_H:
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case T1_X_OFFSET_L:
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case T1_X_OFFSET_H:
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m_scanline_delayed_regs_update[static_cast<tsconf_regs>(nreg)] = data;
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break;
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@ -575,46 +589,23 @@ void tsconf_state::tsconf_port_xxaf_w(offs_t port, u8 data)
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switch (nreg)
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{
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case V_CONFIG:
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case V_PAGE:
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tsconf_update_video_mode();
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break;
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case T_MAP_PAGE:
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m_ts_tilemap[TM_TILES0]->mark_all_dirty();
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m_ts_tilemap[TM_TILES1]->mark_all_dirty();
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break;
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case T0_G_PAGE:
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m_gfxdecode->gfx(TM_TILES0)->set_source(m_ram->pointer() + PAGE4K(data));
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break;
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case T0_X_OFFSET_L:
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case T0_X_OFFSET_H:
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m_ts_tilemap[TM_TILES0]->set_scrollx(OFFS_512(T0_X_OFFSET_L));
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break;
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case T0_Y_OFFSET_L:
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case T0_Y_OFFSET_H:
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m_ts_tilemap[TM_TILES0]->set_scrolly(OFFS_512(T0_Y_OFFSET_L));
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break;
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case T1_G_PAGE:
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m_gfxdecode->gfx(TM_TILES1)->set_source(m_ram->pointer() + PAGE4K(data));
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break;
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case T1_X_OFFSET_L:
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case T1_X_OFFSET_H:
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m_ts_tilemap[TM_TILES1]->set_scrollx(OFFS_512(T1_X_OFFSET_L));
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break;
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case T1_Y_OFFSET_L:
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case T1_Y_OFFSET_H:
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m_ts_tilemap[TM_TILES1]->set_scrolly(OFFS_512(T1_Y_OFFSET_L));
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break;
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case SG_PAGE:
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m_gfxdecode->gfx(TM_SPRITES)->set_source(m_ram->pointer() + PAGE4K(data));
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m_gfxdecode->gfx(TM_SPRITES)->set_source(m_ram->pointer() + PAGE4K(data & 0xf8));
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break;
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case SYS_CONFIG:
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@ -630,7 +621,6 @@ void tsconf_state::tsconf_port_xxaf_w(offs_t port, u8 data)
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break;
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case FMAPS:
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case PAL_SEL:
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case TS_CONFIG:
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case INT_MASK:
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// TODO
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@ -709,38 +699,38 @@ void tsconf_state::tsconf_port_f7_w(offs_t offset, u8 data)
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}
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}
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void tsconf_state::tsconf_port_77_zctr_w(offs_t port, u8 data)
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void tsconf_state::tsconf_port_77_zctr_w(u8 data)
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{
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m_sdcard->spi_ss_w(BIT(data, 0));
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m_zctl_cs = BIT(data, 1);
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}
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u8 tsconf_state::tsconf_port_77_zctr_r(offs_t port)
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u8 tsconf_state::tsconf_port_77_zctr_r()
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{
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return 0x02 | (m_sdcard->get_card_present() ? 0x00 : 0x01);
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}
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void tsconf_state::tsconf_port_57_zctr_w(offs_t port, u8 data)
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void tsconf_state::tsconf_port_57_zctr_w(u8 data)
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{
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if (!m_zctl_cs)
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{
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for (u8 m = 0x80; m; m >>= 1)
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{
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m_sdcard->spi_clock_w(CLEAR_LINE); // 0-S R
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m_sdcard->spi_mosi_w(data & m ? 1 : 0);
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m_sdcard->spi_clock_w(CLEAR_LINE); // 0-S R
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m_sdcard->spi_clock_w(ASSERT_LINE); // 1-L W
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}
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}
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}
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u8 tsconf_state::tsconf_port_57_zctr_r(offs_t port)
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u8 tsconf_state::tsconf_port_57_zctr_r()
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{
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if (m_zctl_cs)
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return 0xff;
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u8 data = m_zctl_di;
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if (!machine().side_effects_disabled())
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tsconf_port_57_zctr_w(0, 0xff);
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tsconf_port_57_zctr_w(0xff);
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return data;
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}
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@ -844,12 +834,18 @@ TIMER_CALLBACK_MEMBER(tsconf_state::irq_scanline)
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u16 screen_vpos = m_screen->vpos();
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m_scanline_irq_timer->adjust(m_screen->time_until_pos(screen_vpos + 1));
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m_screen->update_now();
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if (!m_scanline_delayed_regs_update.empty())
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m_screen->update_now();
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for (const auto &[reg, val] : m_scanline_delayed_regs_update)
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{
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m_regs[reg] = val;
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switch (reg)
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{
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case V_CONFIG:
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case V_PAGE:
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tsconf_update_video_mode();
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break;
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case G_Y_OFFS_L:
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case G_Y_OFFS_H:
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m_gfx_y_frame_offset = screen_vpos < get_screen_area().top()
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@ -857,6 +853,27 @@ TIMER_CALLBACK_MEMBER(tsconf_state::irq_scanline)
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: -screen_vpos;
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break;
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case T0_G_PAGE:
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m_gfxdecode->gfx(TM_TILES0)->set_source(m_ram->pointer() + PAGE4K(val & 0xf8));
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break;
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case T1_G_PAGE:
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m_gfxdecode->gfx(TM_TILES1)->set_source(m_ram->pointer() + PAGE4K(val & 0xf8));
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break;
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case T0_X_OFFSET_L:
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case T0_X_OFFSET_H:
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m_ts_tilemap[TM_TILES0]->set_scrollx(OFFS_512(T0_X_OFFSET_L));
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break;
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case T1_X_OFFSET_L:
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case T1_X_OFFSET_H:
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m_ts_tilemap[TM_TILES1]->set_scrollx(OFFS_512(T1_X_OFFSET_L));
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break;
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case G_X_OFFS_L:
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case G_X_OFFS_H:
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case PAL_SEL:
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default:
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break;
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}
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@ -22,6 +22,8 @@ tsconfdma_device::tsconfdma_device(const machine_config &mconfig, const char *ta
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void tsconfdma_device::device_start()
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{
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m_dma_clock = timer_alloc(FUNC(tsconfdma_device::dma_clock), this);
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m_in_mreq_cb.resolve_safe(0);
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m_out_mreq_cb.resolve_safe();
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m_in_mspi_cb.resolve_safe(0);
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@ -37,10 +39,14 @@ void tsconfdma_device::device_start()
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save_item(NAME(m_align_s));
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save_item(NAME(m_align_d));
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save_item(NAME(m_align));
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save_item(NAME(m_asz));
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save_item(NAME(m_task));
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}
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void tsconfdma_device::device_reset()
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{
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m_dma_clock->adjust(attotime::never);
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m_block_num = 0;
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m_ready = ASSERT_LINE;
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}
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@ -52,32 +58,32 @@ int tsconfdma_device::is_ready()
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void tsconfdma_device::set_saddr_l(u8 addr_l)
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{
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m_address_s = (m_address_s & 0xffffff00) | (addr_l & 0xfe);
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m_address_s = (m_address_s & 0x3fff00) | (addr_l & 0xfe);
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}
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void tsconfdma_device::set_saddr_h(u8 addr_h)
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{
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m_address_s = (m_address_s & 0xffffc0ff) | ((addr_h & 0x3f) << 8);
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m_address_s = (m_address_s & 0x3fc0ff) | ((addr_h & 0x3f) << 8);
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}
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void tsconfdma_device::set_saddr_x(u8 addr_x)
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{
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m_address_s = (m_address_s & 0x0003fff) | (addr_x << 14);
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m_address_s = (m_address_s & 0x003fff) | (addr_x << 14);
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}
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void tsconfdma_device::set_daddr_l(u8 addr_l)
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{
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m_address_d = (m_address_d & 0xffffff00) | (addr_l & 0xfe);
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m_address_d = (m_address_d & 0x3fff00) | (addr_l & 0xfe);
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}
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void tsconfdma_device::set_daddr_h(u8 addr_h)
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{
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m_address_d = (m_address_d & 0xffffc0ff) | ((addr_h & 0x3f) << 8);
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m_address_d = (m_address_d & 0x3fc0ff) | ((addr_h & 0x3f) << 8);
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}
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void tsconfdma_device::set_daddr_x(u8 addr_x)
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{
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m_address_d = (m_address_d & 0x0003fff) | (addr_x << 14);
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m_address_d = (m_address_d & 0x003fff) | (addr_x << 14);
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}
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void tsconfdma_device::set_block_len(u8 len)
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@ -99,11 +105,20 @@ void tsconfdma_device::set_block_num_h(u8 num_h)
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void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_opt)
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{
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m_task = dev;
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m_align_s = s_align;
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m_align_d = d_align;
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m_asz = align_opt;
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m_align = m_asz ? 512 : 256;
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m_ready = CLEAR_LINE;
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m_align = align_opt ? 512 : 256;
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// TODO Transfers 2 byte/cycle at 7MHz
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switch (dev)
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m_dma_clock->adjust(attotime::from_ticks(m_block_num + 1, 7_MHz_XTAL));
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}
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TIMER_CALLBACK_MEMBER(tsconfdma_device::dma_clock)
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{
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switch (m_task)
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{
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case 0b0001: // Mem -> Mem
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for (u16 block = 0; block <= m_block_num; block++)
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@ -113,11 +128,11 @@ void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_o
|
||||
for (u16 len = 0; len <= m_block_len; len++)
|
||||
{
|
||||
m_out_mreq_cb(d_addr, m_in_mreq_cb(s_addr));
|
||||
s_addr += 2;
|
||||
d_addr += 2;
|
||||
s_addr = (s_addr + 2) & 0x3fffff;
|
||||
d_addr = (d_addr + 2) & 0x3fffff;
|
||||
}
|
||||
m_address_s = s_align ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = d_align ? (m_address_d + m_align) : d_addr;
|
||||
m_address_s = m_align_s ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = m_align_d ? (m_address_d + m_align) : d_addr;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -127,10 +142,12 @@ void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_o
|
||||
auto d_addr = m_address_d;
|
||||
for (u16 len = 0; len <= m_block_len; len++)
|
||||
{
|
||||
if (d_addr == 3801154)
|
||||
printf("!");
|
||||
m_out_mreq_cb(d_addr, m_in_mspi_cb());
|
||||
d_addr += 2;
|
||||
d_addr = (d_addr + 2) & 0x3fffff;
|
||||
}
|
||||
m_address_d = d_align ? (m_address_d + m_align) : d_addr;
|
||||
m_address_d = m_align_d ? (m_address_d + m_align) : d_addr;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -142,9 +159,9 @@ void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_o
|
||||
for (u16 len = 0; len <= m_block_len; len++)
|
||||
{
|
||||
m_out_mreq_cb(d_addr, data);
|
||||
d_addr += 2;
|
||||
d_addr = (d_addr + 2) & 0x3fffff;
|
||||
}
|
||||
m_address_d = d_align ? (m_address_d + m_align) : d_addr;
|
||||
m_address_d = m_align_d ? (m_address_d + m_align) : d_addr;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -157,7 +174,7 @@ void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_o
|
||||
{
|
||||
u16 d_val = m_in_mreq_cb(d_addr);
|
||||
u16 s_val = m_in_mreq_cb(s_addr);
|
||||
if (align_opt)
|
||||
if (m_asz)
|
||||
{
|
||||
d_val = (d_val & 0xff00) | (((s_val & 0x00ff) ? s_val : d_val) & 0x00ff);
|
||||
d_val = (d_val & 0x00ff) | (((s_val & 0xff00) ? s_val : d_val) & 0xff00);
|
||||
@ -170,11 +187,11 @@ void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_o
|
||||
d_val = (d_val & 0x0fff) | (((s_val & 0xf000) ? s_val : d_val) & 0xf000);
|
||||
}
|
||||
m_out_mreq_cb(d_addr, d_val);
|
||||
s_addr += 2;
|
||||
d_addr += 2;
|
||||
s_addr = (s_addr + 2) & 0x3fffff;
|
||||
d_addr = (d_addr + 2) & 0x3fffff;
|
||||
}
|
||||
m_address_s = s_align ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = d_align ? (m_address_d + m_align) : d_addr;
|
||||
m_address_s = m_align_s ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = m_align_d ? (m_address_d + m_align) : d_addr;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -186,11 +203,11 @@ void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_o
|
||||
for (u16 len = 0; len <= m_block_len; len++)
|
||||
{
|
||||
m_out_cram_cb(d_addr, m_in_mreq_cb(s_addr));
|
||||
s_addr += 2;
|
||||
d_addr += 2;
|
||||
s_addr = (s_addr + 2) & 0x3fffff;
|
||||
d_addr = (d_addr + 2) & 0x3fffff;
|
||||
}
|
||||
m_address_s = s_align ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = d_align ? (m_address_d + m_align) : d_addr;
|
||||
m_address_s = m_align_s ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = m_align_d ? (m_address_d + m_align) : d_addr;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -202,19 +219,20 @@ void tsconfdma_device::start_tx(u8 dev, bool s_align, bool d_align, bool align_o
|
||||
for (u16 len = 0; len <= m_block_len; len++)
|
||||
{
|
||||
m_out_sfile_cb(d_addr, m_in_mreq_cb(s_addr));
|
||||
s_addr += 2;
|
||||
d_addr += 2;
|
||||
s_addr = (s_addr + 2) & 0x3fffff;
|
||||
d_addr = (d_addr + 2) & 0x3fffff;
|
||||
}
|
||||
m_address_s = s_align ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = d_align ? (m_address_d + m_align) : d_addr;
|
||||
m_address_s = m_align_s ? (m_address_s + m_align) : s_addr;
|
||||
m_address_d = m_align_d ? (m_address_d + m_align) : d_addr;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
logerror("'tsdma': TX %02X: %06X (%02X:%04X) -> %06X\n", dev, m_address_s, m_block_len, m_block_num, m_address_d);
|
||||
logerror("'tsdma': TX %02X: %06X (%02X:%04X) -> %06X\n", m_task, m_address_s, m_block_len, m_block_num, m_address_d);
|
||||
break;
|
||||
}
|
||||
|
||||
m_dma_clock->adjust(attotime::never);
|
||||
m_ready = ASSERT_LINE;
|
||||
m_on_ready_cb(0);
|
||||
}
|
||||
|
||||
@ -36,7 +36,7 @@ public:
|
||||
void set_block_num_h(uint8_t num_h);
|
||||
void start_tx(uint8_t dev, bool s_align, bool d_align, bool blitting_opt);
|
||||
|
||||
private:
|
||||
protected:
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
@ -47,14 +47,21 @@ private:
|
||||
devcb_write16 m_out_sfile_cb;
|
||||
devcb_write_line m_on_ready_cb;
|
||||
|
||||
private:
|
||||
TIMER_CALLBACK_MEMBER(dma_clock);
|
||||
|
||||
u8 m_ready;
|
||||
|
||||
offs_t m_address_s;
|
||||
offs_t m_address_d;
|
||||
u8 m_block_len;
|
||||
u16 m_block_num;
|
||||
|
||||
emu_timer *m_dma_clock;
|
||||
u8 m_task;
|
||||
bool m_align_s;
|
||||
bool m_align_d;
|
||||
bool m_asz;
|
||||
u16 m_align;
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user