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nforcepc.cpp: bios is stored in a sst49lf020 flash chip (nw)

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This commit is contained in:
yz70s 2019-04-26 19:01:07 +02:00
parent 609f01b540
commit 5cd463e076
2 changed files with 16 additions and 6 deletions
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16
src/mame/drivers/nforcepc.cpp
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@ -25,6 +25,7 @@
#include "cpu/i386/i386.h" #include "cpu/i386/i386.h"
#include "machine/pci.h" #include "machine/pci.h"
#include "machine/pci-ide.h" #include "machine/pci-ide.h"
#include "machine/intelfsh.h"
#include "includes/xbox_pci.h" #include "includes/xbox_pci.h"
#include "includes/nforcepc.h" #include "includes/nforcepc.h"
@ -70,6 +71,7 @@ void crush11_host_device::config_map(address_map &map)
crush11_host_device::crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) crush11_host_device::crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pci_host_device(mconfig, CRUSH11, tag, owner, clock) : pci_host_device(mconfig, CRUSH11, tag, owner, clock)
, cpu(*this, finder_base::DUMMY_TAG) , cpu(*this, finder_base::DUMMY_TAG)
, biosrom(*this, finder_base::DUMMY_TAG)
, ram_size(0) , ram_size(0)
{ {
} }
@ -103,10 +105,13 @@ void crush11_host_device::map_extra(uint64_t memory_window_start, uint64_t memor
uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
{ {
io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map); io_space->install_device(0, 0xffff, *static_cast<pci_host_device *>(this), &pci_host_device::io_configuration_access_map);
memory_space->install_device(0, 0xffffffff, *this, &crush11_host_device::bios_map);
}
uint32_t mask = m_region->bytes() - 1; void crush11_host_device::bios_map(address_map &map)
memory_space->install_rom(0x000c0000, 0x000fffff, m_region->base() + (0x000c0000 & mask)); {
memory_space->install_rom(0xfffc0000, 0xffffffff, m_region->base() + (0x000c0000 & mask)); map(0x000c0000, 0x000fffff).rw(biosrom, FUNC(intelfsh8_device::read), FUNC(intelfsh8_device::write));
map(0xfffc0000, 0xffffffff).rw(biosrom, FUNC(intelfsh8_device::read), FUNC(intelfsh8_device::write));
} }
READ8_MEMBER(crush11_host_device::unknown_r) READ8_MEMBER(crush11_host_device::unknown_r)
@ -701,7 +706,7 @@ void nforcepc_state::nforcepc(machine_config &config)
//maincpu.smiact().set("pci:01.0", FUNC(i82439hx_host_device::smi_act_w)); //maincpu.smiact().set("pci:01.0", FUNC(i82439hx_host_device::smi_act_w));
PCI_ROOT(config, ":pci", 0); PCI_ROOT(config, ":pci", 0);
CRUSH11(config, ":pci:00.0", 0, "maincpu"); // 10de:01a4 NVIDIA Corporation nForce CPU bridge CRUSH11(config, ":pci:00.0", 0, "maincpu", "bios"); // 10de:01a4 NVIDIA Corporation nForce CPU bridge
CRUSH11_MEMORY(config, ":pci:00.1", 0, 2); /* 10de:01ac NVIDIA Corporation nForce 220/420 Memory Controller CRUSH11_MEMORY(config, ":pci:00.1", 0, 2); /* 10de:01ac NVIDIA Corporation nForce 220/420 Memory Controller
10de:01ad NVIDIA Corporation nForce 220/420 Memory Controller 10de:01ad NVIDIA Corporation nForce 220/420 Memory Controller
10de:01ab NVIDIA Corporation nForce 420 Memory Controller (DDR)*/ 10de:01ab NVIDIA Corporation nForce 420 Memory Controller (DDR)*/
@ -720,6 +725,7 @@ void nforcepc_state::nforcepc(machine_config &config)
AS99127F(config, ":pci:01.1:12d", 0); AS99127F(config, ":pci:01.1:12d", 0);
AS99127F_SENSOR2(config, ":pci:01.1:148", 0); AS99127F_SENSOR2(config, ":pci:01.1:148", 0);
AS99127F_SENSOR3(config, ":pci:01.1:149", 0); AS99127F_SENSOR3(config, ":pci:01.1:149", 0);
SST_49LF020(config, "bios", 0);
/*10de:01c2 NVIDIA Corporation nForce USB Controller /*10de:01c2 NVIDIA Corporation nForce USB Controller
10de:01c2 NVIDIA Corporation nForce USB Controller 10de:01c2 NVIDIA Corporation nForce USB Controller
10de:01b0 NVIDIA Corporation nForce Audio Processing Unit 10de:01b0 NVIDIA Corporation nForce Audio Processing Unit
@ -736,7 +742,7 @@ void nforcepc_state::nforcepc(machine_config &config)
} }
ROM_START(nforcepc) ROM_START(nforcepc)
ROM_REGION32_LE(0x40000, ":pci:00.0", 0) /* PC bios */ ROM_REGION32_LE(0x40000, "bios", 0) /* PC bios */
ROM_SYSTEM_BIOS(0, "a7n266c", "a7n266c") // Motherboard dump. Chip: SST49LF020 Package: PLCC32 Label had 3 lines of text: "A7NC3" "1001.D" "GSQ98" ROM_SYSTEM_BIOS(0, "a7n266c", "a7n266c") // Motherboard dump. Chip: SST49LF020 Package: PLCC32 Label had 3 lines of text: "A7NC3" "1001.D" "GSQ98"
ROMX_LOAD("a7n266c.bin", 0, 0x40000, CRC(f4f0e4fc) SHA1(87f11545db178914623e41fb51e328da479a2efc), ROM_BIOS(0)) ROMX_LOAD("a7n266c.bin", 0, 0x40000, CRC(f4f0e4fc) SHA1(87f11545db178914623e41fb51e328da479a2efc), ROM_BIOS(0))
ROM_SYSTEM_BIOS(1, "a7n266c1001d", "a7n266c1001d") // bios version 1001.D downloaded from Asus website ROM_SYSTEM_BIOS(1, "a7n266c1001d", "a7n266c1001d") // bios version 1001.D downloaded from Asus website

6
src/mame/includes/nforcepc.h
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@ -11,11 +11,12 @@
class crush11_host_device : public pci_host_device { class crush11_host_device : public pci_host_device {
public: public:
template <typename T> template <typename T>
crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag) crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, const char *bios_device_tag)
: crush11_host_device(mconfig, tag, owner, clock) : crush11_host_device(mconfig, tag, owner, clock)
{ {
set_ids_host(0x10de01a4, 0x01, 0x10430c11); set_ids_host(0x10de01a4, 0x01, 0x10430c11);
set_cpu_tag(std::forward<T>(cpu_tag)); set_cpu_tag(std::forward<T>(cpu_tag));
biosrom.set_tag(bios_device_tag);
} }
crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); crush11_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -24,6 +25,8 @@ public:
void set_ram_size(uint32_t size) { ram_size = size; } void set_ram_size(uint32_t size) { ram_size = size; }
address_space *get_cpu_space(int spacenum) { return &cpu->space(spacenum); } address_space *get_cpu_space(int spacenum) { return &cpu->space(spacenum); }
void bios_map(address_map &map);
protected: protected:
virtual void device_start() override; virtual void device_start() override;
virtual void device_reset() override; virtual void device_reset() override;
@ -37,6 +40,7 @@ protected:
private: private:
required_device<device_memory_interface> cpu; required_device<device_memory_interface> cpu;
required_device<intelfsh8_device> biosrom;
uint32_t ram_size; uint32_t ram_size;
DECLARE_READ8_MEMBER(unknown_r); DECLARE_READ8_MEMBER(unknown_r);