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https://github.com/holub/mame
synced 2025-06-05 12:26:35 +03:00
(MESS) svga_s3: implemented background and foreground mix registers.
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26841430f8
commit
5d078922fd
@ -214,9 +214,15 @@ static struct
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UINT16 rect_height;
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UINT32 fgcolour;
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UINT32 bgcolour;
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UINT16 fgmix;
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UINT16 bgmix;
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UINT32 pixel_xfer;
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INT16 wait_rect_x;
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INT16 wait_rect_y;
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INT16 scissors_left;
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INT16 scissors_right;
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INT16 scissors_top;
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INT16 scissors_bottom;
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UINT8 bus_size;
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UINT8 multifunc_sel;
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UINT8 write_count;
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@ -2724,6 +2730,158 @@ WRITE8_HANDLER(s3_port_03d0_w)
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}
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/* accelerated ports, TBD ... */
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static void s3_write_fg(UINT32 offset)
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{
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UINT8 dst = vga.memory[offset];
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UINT8 src;
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// determine source
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switch(s3.fgmix & 0x0060)
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{
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case 0x0000:
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src = s3.bgcolour;
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break;
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case 0x0020:
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src = s3.fgcolour;
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break;
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case 0x0040:
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src = s3.pixel_xfer;
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break;
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case 0x0060:
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// TODO: Bitmap data;
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break;
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}
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// write the data
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switch(s3.fgmix & 0x000f)
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{
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case 0x0000:
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vga.memory[offset] = !dst;
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break;
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case 0x0001:
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// TODO: false
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break;
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case 0x0002:
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// TODO: true
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break;
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case 0x0003:
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// change nothing, pixel is unchanged
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break;
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case 0x0004:
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vga.memory[offset] = !src;
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break;
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case 0x0005:
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vga.memory[offset] = src ^ dst;
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break;
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case 0x0006:
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vga.memory[offset] = !(src ^ dst);
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break;
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case 0x0007:
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vga.memory[offset] = src;
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break;
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case 0x0008:
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vga.memory[offset] = !(src & dst);
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break;
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case 0x0009:
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vga.memory[offset] = (!src) | dst;
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break;
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case 0x000a:
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vga.memory[offset] = src | (!dst);
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break;
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case 0x000b:
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vga.memory[offset] = src | dst;
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break;
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case 0x000c:
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vga.memory[offset] = src & dst;
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break;
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case 0x000d:
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vga.memory[offset] = src & (!dst);
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break;
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case 0x000e:
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vga.memory[offset] = (!src) & dst;
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break;
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case 0x000f:
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vga.memory[offset] = !(src | dst);
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break;
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}
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}
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static void s3_write_bg(UINT32 offset)
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{
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UINT8 dst = vga.memory[offset];
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UINT8 src;
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// determine source
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switch(s3.bgmix & 0x0060)
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{
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case 0x0000:
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src = s3.bgcolour;
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break;
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case 0x0020:
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src = s3.fgcolour;
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break;
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case 0x0040:
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src = s3.pixel_xfer;
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break;
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case 0x0060:
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// TODO: Bitmap data;
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break;
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}
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// write the data
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switch(s3.bgmix & 0x000f)
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{
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case 0x0000:
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vga.memory[offset] = !dst;
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break;
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case 0x0001:
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// TODO: false
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break;
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case 0x0002:
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// TODO: true
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break;
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case 0x0003:
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// change nothing, pixel is unchanged
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break;
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case 0x0004:
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vga.memory[offset] = !src;
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break;
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case 0x0005:
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vga.memory[offset] = src ^ dst;
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break;
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case 0x0006:
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vga.memory[offset] = !(src ^ dst);
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break;
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case 0x0007:
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vga.memory[offset] = src;
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break;
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case 0x0008:
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vga.memory[offset] = !(src & dst);
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break;
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case 0x0009:
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vga.memory[offset] = (!src) | dst;
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break;
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case 0x000a:
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vga.memory[offset] = src | (!dst);
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break;
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case 0x000b:
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vga.memory[offset] = src | dst;
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break;
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case 0x000c:
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vga.memory[offset] = src & dst;
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break;
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case 0x000d:
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vga.memory[offset] = src & (!dst);
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break;
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case 0x000e:
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vga.memory[offset] = (!src) & dst;
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break;
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case 0x000f:
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vga.memory[offset] = !(src | dst);
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break;
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}
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}
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/*
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9AE8h W(R): Graphics Processor Status Register (GP_STAT)
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bit 0-7 Queue State.
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@ -2881,15 +3039,14 @@ WRITE16_HANDLER(s3_cmd_w)
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offset += (VGA_LINE_LENGTH * s3.curr_y);
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offset += s3.curr_x;
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if(data & 0x0020)
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dir_x = 2;
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dir_x = 1;
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else
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dir_x -= 2;
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dir_x -= 1;
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for(y=0;y<=s3.rect_height;y++)
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{
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for(x=0;x<=s3.rect_width;x+=dir_x)
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{
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vga.memory[(offset+x) % vga.svga_intf.vram_size] = s3.fgcolour & 0x000000ff;
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vga.memory[(offset+x+1) % vga.svga_intf.vram_size] = (s3.fgcolour & 0x0000ff00) >> 8;
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s3_write_fg((offset+x) % vga.svga_intf.vram_size);
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}
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if(data & 0x0080)
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offset += VGA_LINE_LENGTH;
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@ -3084,6 +3241,14 @@ READ16_HANDLER( s3_multifunc_r )
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{
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case 0:
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return s3.rect_height;
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case 1:
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return s3.scissors_top;
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case 2:
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return s3.scissors_left;
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case 3:
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return s3.scissors_bottom;
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case 4:
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return s3.scissors_right;
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// TODO: remaining functions
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default:
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logerror("S3: Unimplemented multifunction register %i selected\n",s3.multifunc_sel);
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@ -3106,6 +3271,43 @@ bit 0-10 (911/924) Rectangle Height. Height of BITBLT or rectangle command.
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logerror("S3: Minor Axis Pixel Count / Rectangle Height write %04x\n",data);
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break;
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/*
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BEE8h index 01h W(R/W): Top Scissors Register (SCISSORS_T).
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bit 0-10 (911/924) Clipping Top Limit. Defines the upper bound of the
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Clipping Rectangle (Lowest Y coordinate).
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0-11 (80x +) Clipping Top Limit. See above
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BEE8h index 02h W(R/W): Left Scissors Registers (SCISSORS_L).
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bit 0-10 (911,924) Clipping Left Limit. Defines the left bound of the
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Clipping Rectangle (Lowest X coordinate).
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0-11 (80x +) Clipping Left Limit. See above.
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BEE8h index 03h W(R/W): Bottom Scissors Register (SCISSORS_B).
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bit 0-10 (911,924) Clipping Bottom Limit. Defines the bottom bound of the
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Clipping Rectangle (Highest Y coordinate).
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0-11 (80x +) Clipping Bottom Limit. See above.
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BEE8h index 04h W(R/W): Right Scissors Register (SCISSORS_R).
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bit 0-10 (911,924) Clipping Right Limit. Defines the right bound of the
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Clipping Rectangle (Highest X coordinate).
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0-11 (80x +) Clipping Bottom Limit. See above.
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*/
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case 0x1000:
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s3.scissors_top = data & 0x0fff;
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logerror("S3: Scissors Top write %04x\n",data);
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break;
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case 0x2000:
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s3.scissors_left = data & 0x0fff;
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logerror("S3: Scissors Left write %04x\n",data);
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break;
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case 0x3000:
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s3.scissors_bottom = data & 0x0fff;
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logerror("S3: Scissors Bottom write %04x\n",data);
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break;
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case 0x4000:
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s3.scissors_right = data & 0x0fff;
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logerror("S3: Scissors Right write %04x\n",data);
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break;
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/*
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BEE8h index 0Fh W(W): Read Register Select Register (READ_SEL) (801/5,928)
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bit 0-2 (911-928) READ-REG-SEL. Read Register Select. Selects the register
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that is actually read when a read of BEE8h happens. Each read of
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@ -3147,17 +3349,23 @@ static void s3_wait_draw()
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off += s3.wait_rect_x;
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for(x=0;x<data_size;x++)
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{
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if(s3.wait_rect_x >= 0 || s3.wait_rect_y >= 0)
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if(s3.wait_rect_x >= 0 && s3.wait_rect_y >= 0)
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{
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if(s3.current_cmd & 0x1000)
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// check clipping rectangle
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if(s3.wait_rect_x >= s3.scissors_left && s3.wait_rect_x <= s3.scissors_right && s3.wait_rect_y >= s3.scissors_top && s3.wait_rect_y <= s3.scissors_bottom)
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{
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xfer = ((s3.pixel_xfer & 0x000000ff) << 8) | ((s3.pixel_xfer & 0x0000ff00) >> 8)
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| ((s3.pixel_xfer & 0x00ff0000) << 8) | ((s3.pixel_xfer & 0xff000000) >> 8);
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if(s3.current_cmd & 0x1000)
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{
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xfer = ((s3.pixel_xfer & 0x000000ff) << 8) | ((s3.pixel_xfer & 0x0000ff00) >> 8)
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| ((s3.pixel_xfer & 0x00ff0000) << 8) | ((s3.pixel_xfer & 0xff000000) >> 8);
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}
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else
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xfer = s3.pixel_xfer;
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if((xfer & ((1<<(data_size-1))>>x)) != 0)
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s3_write_fg(off % vga.svga_intf.vram_size);
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else
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s3_write_bg(off % vga.svga_intf.vram_size);
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}
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else
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xfer = s3.pixel_xfer;
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if((xfer & ((1<<(data_size-1))>>x)) != 0)
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vga.memory[off] = s3.fgcolour & 0x00ff;
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}
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off++;
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s3.wait_rect_x++;
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@ -3172,7 +3380,53 @@ static void s3_wait_draw()
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}
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}
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}
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logerror("S3: Wait Draw data = %08x\n",s3.pixel_xfer);
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}
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/*
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B6E8h W(R/W): Background Mix Register (BKGD_MIX)
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bit 0-3 Background MIX (BACKMIX).
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00 not DST
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01 0 (false)
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02 1 (true)
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03 2 DST
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04 not SRC
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05 SRC xor DST
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06 not (SRC xor DST)
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07 SRC
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08 not (SRC and DST)
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09 (not SRC) or DST
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0A SRC or (not DST)
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0B SRC or DST
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0C SRC and DST
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0D SRC and (not DST)
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0E (not SRC) and DST
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0F not (SRC or DST)
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DST is always the destination bitmap, bit SRC has four
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possible sources selected by the BSS bits.
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5-6 Background Source Select (BSS)
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0 BSS is Background Color
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1 BSS is Foreground Color
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2 BSS is Pixel Data from the PIX_TRANS register (E2E8h)
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3 BSS is Bitmap Data (Source data from display buffer).
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*/
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READ16_HANDLER(s3_backmix_r)
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{
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return s3.bgmix;
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}
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WRITE16_HANDLER(s3_backmix_w)
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{
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s3.bgmix = data;
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}
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READ16_HANDLER(s3_foremix_r)
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{
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return s3.fgmix;
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}
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WRITE16_HANDLER(s3_foremix_w)
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{
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s3.fgmix = data;
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}
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READ16_HANDLER(s3_pixel_xfer_r)
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@ -82,6 +82,10 @@ READ16_HANDLER(s3_fgcolour_r);
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WRITE16_HANDLER(s3_fgcolour_w);
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READ16_HANDLER(s3_bgcolour_r);
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WRITE16_HANDLER(s3_bgcolour_w);
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READ16_HANDLER(s3_backmix_r);
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WRITE16_HANDLER(s3_backmix_w);
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READ16_HANDLER(s3_foremix_r);
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WRITE16_HANDLER(s3_foremix_w);
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READ16_HANDLER(s3_pixel_xfer_r);
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WRITE16_HANDLER(s3_pixel_xfer_w);
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READ8_HANDLER(s3_mem_r);
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@ -86,6 +86,8 @@ void isa16_svga_s3_device::device_start()
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m_isa->install16_device(0x9ae8, 0x9aeb, 0, 0, FUNC(s3_gpstatus_r), FUNC(s3_cmd_w));
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m_isa->install16_device(0xa2e8, 0xa2eb, 0, 0, FUNC(s3_bgcolour_r), FUNC(s3_bgcolour_w));
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m_isa->install16_device(0xa6e8, 0xa6eb, 0, 0, FUNC(s3_fgcolour_r), FUNC(s3_fgcolour_w));
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m_isa->install16_device(0xb6e8, 0xb6eb, 0, 0, FUNC(s3_backmix_r), FUNC(s3_backmix_w));
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m_isa->install16_device(0xbae8, 0xbaeb, 0, 0, FUNC(s3_foremix_r), FUNC(s3_foremix_w));
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m_isa->install16_device(0xbee8, 0xbeeb, 0, 0, FUNC(s3_multifunc_r), FUNC(s3_multifunc_w));
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m_isa->install16_device(0xe2e8, 0xe2eb, 0, 0, FUNC(s3_pixel_xfer_r), FUNC(s3_pixel_xfer_w));
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