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r9751: Add dip switches to PDC for HDD and FDD
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@ -70,13 +70,74 @@ static ADDRESS_MAP_START( pdc_io, AS_IO, 8, pdc_device )
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AM_RANGE(0x21, 0x2F) AM_READWRITE(fdd_68k_r,fdd_68k_w) AM_MIRROR(0xFF00)
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AM_RANGE(0x38, 0x38) AM_READ(p38_r) AM_MIRROR(0xFF00) // Possibly UPD765 interrupt
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AM_RANGE(0x39, 0x39) AM_READ(p39_r) AM_MIRROR(0xFF00) // HDD related
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AM_RANGE(0x3c, 0x3d) AM_READ(ds_r) AM_MIRROR(0xFF00) // Dipswitches??
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AM_RANGE(0x3c, 0x3c) AM_READ_PORT("SW2") AM_MIRROR(0xFF00) /* FDC Dipswitch */
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AM_RANGE(0x3d, 0x3d) AM_READ_PORT("SW1") AM_MIRROR(0xFF00) /* HDC Dipswitch */
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AM_RANGE(0x40, 0x41) AM_DEVREADWRITE(HDC_TAG, hdc9224_device,read,write) AM_MIRROR(0xFF00)
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AM_RANGE(0x42, 0x43) AM_DEVICE(FDC_TAG, upd765a_device, map) AM_MIRROR(0xFF00)
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AM_RANGE(0x50, 0x5f) AM_WRITE(p50_5f_w) AM_MIRROR(0xFF00)
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AM_RANGE(0x60, 0x6f) AM_DEVREADWRITE(FDCDMA_TAG,am9517a_device,read,write) AM_MIRROR(0xFF00)
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ADDRESS_MAP_END
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//-------------------------------------------------
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// INPUT_PORTS_START( pdc )
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//-------------------------------------------------
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static INPUT_PORTS_START( pdc_ports )
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/* Hard Disk Controller SW1 */
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PORT_START("SW1")
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PORT_DIPNAME( 0x80, 0x80, "SW1-1") PORT_DIPLOCATION("SW1:1")
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "SW1-2") PORT_DIPLOCATION("SW1:2")
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "SW1-3") PORT_DIPLOCATION("SW1:3")
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "SW1-4") PORT_DIPLOCATION("SW1:4")
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "SW1-5") PORT_DIPLOCATION("SW1:5")
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "SW1-6") PORT_DIPLOCATION("SW1:6")
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "SW1-7") PORT_DIPLOCATION("SW1:7")
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x01, 0x01, "SW1-8") PORT_DIPLOCATION("SW1:8")
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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/* Floppy Disk Controller SW2 */
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PORT_START("SW2")
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PORT_DIPNAME( 0x80, 0x80, "SW2-1") PORT_DIPLOCATION("SW2:1")
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, "SW2-2") PORT_DIPLOCATION("SW2:2")
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, "SW2-3") PORT_DIPLOCATION("SW2:3")
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, "SW2-4") PORT_DIPLOCATION("SW2:4")
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, "SW2-5") PORT_DIPLOCATION("SW2:5")
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, "SW2-6") PORT_DIPLOCATION("SW2:6")
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, "SW2-7") PORT_DIPLOCATION("SW2:7")
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x01, 0x00, "SW2-8") PORT_DIPLOCATION("SW2:8")
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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//-------------------------------------------------
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// SLOT_INTERFACE( pdc_floppies )
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//-------------------------------------------------
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@ -151,6 +212,11 @@ machine_config_constructor pdc_device::device_mconfig_additions() const
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return MACHINE_CONFIG_NAME( pdc );
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}
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ioport_constructor pdc_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME( pdc_ports );
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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@ -442,20 +508,3 @@ WRITE8_MEMBER(pdc_device::p50_5f_w)
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if(TRACE_PDC_FDC) logerror("PDC: Port %02x WRITE: %x\n", address, data);
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}
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}
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READ8_MEMBER(pdc_device::ds_r)
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{
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switch(offset)
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{
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case 0x00:
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logerror("PDC: Dipswitch %02X READ\n", offset);
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return 0xFE;
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break;
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case 0x01:
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logerror("PDC: Dipswitch %02X READ\n", offset);
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return 0x0;
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break;
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default:
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return 0;
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}
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}
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@ -39,6 +39,7 @@ public:
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/* Optional information overrides */
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virtual machine_config_constructor device_mconfig_additions() const;
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virtual ioport_constructor device_input_ports() const; //override;
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virtual const rom_entry *device_rom_region() const;
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/* Callbacks */
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@ -64,7 +65,6 @@ public:
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DECLARE_READ8_MEMBER(p39_r);
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DECLARE_WRITE8_MEMBER(p50_5f_w);
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DECLARE_READ8_MEMBER(ds_r); // Dip switches???
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DECLARE_READ8_MEMBER(m68k_dma_r);
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DECLARE_WRITE8_MEMBER(m68k_dma_w);
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