mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
rainbow: Correct some clocks and add extra modem control (nw)
This commit is contained in:
AJR
parent
1de9b7f871
commit
5db5cb8a70
@ -512,6 +512,7 @@ public:
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m_mpsc(*this, "upd7201"),
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m_dbrg_A(*this, "com8116_a"),
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m_dbrg_B(*this, "com8116_b"),
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m_comm_port(*this, "comm"),
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m_kbd8251(*this, "kbdser"),
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m_lk201(*this, LK201_TAG),
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@ -672,6 +673,7 @@ private:
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required_device<upd7201_new_device> m_mpsc;
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required_device<com8116_device> m_dbrg_A;
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required_device<com8116_device> m_dbrg_B;
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required_device<rs232_port_device> m_comm_port;
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required_device<i8251_device> m_kbd8251;
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required_device<lk201_device> m_lk201;
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@ -876,8 +878,9 @@ void rainbow_state::machine_start()
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m_SCREEN_BLANK = false;
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cpu_device *maincpu = machine().device<cpu_device>("maincpu");
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maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(rainbow_state::irq_callback), this));
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auto *printer_port = subdevice<rs232_port_device>("printer");
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printer_port->write_dtr(0);
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printer_port->write_rts(0);
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save_item(NAME(m_z80_private));
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save_item(NAME(m_z80_mailbox));
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@ -1140,7 +1143,7 @@ void rainbow_state::machine_reset()
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popmessage("Reset");
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// Configure RAM
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address_space &program = machine().device<cpu_device>("maincpu")->space(AS_PROGRAM);
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address_space &program = m_i8088->space(AS_PROGRAM);
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uint32_t unmap_start = m_inp8->read();
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// Verify RAM size matches hardware (DIP switches)
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@ -1197,7 +1200,7 @@ void rainbow_state::machine_reset()
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m_rtc->chip_reset(); // * Reset RTC to a defined state *
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// *********** HARD DISK CONTROLLERS...
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address_space &io = machine().device<cpu_device>("maincpu")->space(AS_IO);
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address_space &io = m_i8088->space(AS_IO);
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if (m_inp5->read() == 0x01) // ...PRESENT?
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{
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// Install 8088 read / write handler
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@ -1670,7 +1673,7 @@ hard_disk_file *(rainbow_state::rainbow_hdc_file(int drv))
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return nullptr;
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harddisk_image_device *img = nullptr;
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img = dynamic_cast<harddisk_image_device *>(machine().device(subtag("decharddisk1").c_str()));
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img = dynamic_cast<harddisk_image_device *>(subdevice("decharddisk1"));
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if (!img)
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return nullptr;
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@ -2176,13 +2179,12 @@ READ8_MEMBER(rainbow_state::system_parameter_r)
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// [02] COMMUNICATIONS STATUS REGISTER - PAGE 154 (**** READ **** )
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// Used to read status of SERIAL port, IRQ line of each CPU, and MHFU logic enable signal.
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// ******* TODO: 5 status bits * MISSING * ********************************************************
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// 0 COMM RI (reflects status of RI line at COMM port)
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// 1 COMM SI / SCF(reflects status of speed indicator line or
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// the secondary receive line signal detect at COMM port)
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// 2 COMM DSR (reflects status of DSR at COMM)
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// 3 COMM CTS (reflects status of CTS at COMM)
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// 4 COMM RLSD (receive line signal detect at COMM)
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// 4 COMM RLSD (receive line signal detect at COMM; also connected to DCDA on MPSC)
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READ8_MEMBER(rainbow_state::comm_control_r)
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{
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bool is_mhfu_enabled = false;
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@ -2190,6 +2192,11 @@ READ8_MEMBER(rainbow_state::comm_control_r)
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is_mhfu_enabled = m_crtc->MHFU(MHFU_IS_ENABLED);
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return (
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(m_comm_port->ri_r() ? 0x01 : 0x00) |
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(m_comm_port->si_r() ? 0x02 : 0x00) |
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(m_comm_port->dsr_r() ? 0x04 : 0x00) |
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(m_comm_port->cts_r() ? 0x08 : 0x00) |
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(m_comm_port->dcd_r() ? 0x10 : 0x00) |
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(is_mhfu_enabled ? 0x00 : 0x20) | // (L) status of MHFU flag => bit pos.5
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((INT88) ? 0x00 : 0x40) | // (L)
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((INTZ80) ? 0x00 : 0x80) // (L)
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@ -2197,7 +2204,6 @@ READ8_MEMBER(rainbow_state::comm_control_r)
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}
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// ******* TODO: 4 control bits * MISSING * ********************************************************
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// Communication control register of -COMM- port (when written):
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// (these 4 bits talk DIRECTLY to the COMM port according to schematics):
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// 0 COMM SPD SEL H (controls speed select line of COMM port)
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@ -2208,6 +2214,11 @@ WRITE8_MEMBER(rainbow_state::comm_control_w)
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{
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logerror("%02x to COMM.CONTROL REGISTER ", data);
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m_comm_port->write_spds(BIT(data, 0));
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// SRTS not currently emulated
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m_comm_port->write_dtr(BIT(data, 2));
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m_comm_port->write_rts(BIT(data, 3));
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/* 8088 LEDs:
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5 7 6 4 <- BIT POSITION
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D6 -D5-D4-D3 <- INTERNAL LED NUMBER (DEC PDF)
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@ -2420,7 +2431,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w)
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floppy_connector *con = nullptr;
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if (drive < MAX_FLOPPIES)
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con = machine().device<floppy_connector>(names[drive]);
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con = subdevice<floppy_connector>(names[drive]);
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if (con)
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{
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@ -2479,7 +2490,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w)
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// Assume the other one is switched off -
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for (int f_num = 0; f_num < MAX_FLOPPIES; f_num++)
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{
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floppy_connector *con = machine().device<floppy_connector>(names[f_num]);
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floppy_connector *con = subdevice<floppy_connector>(names[f_num]);
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floppy_image_device *tmp_floppy = con->get_device();
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tmp_floppy->mon_w(ASSERT_LINE);
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@ -2744,7 +2755,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
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printf("\nWARNING: UNEMULATED DIAG LOOPBACK (directs RX50 and DC12 output to printer port) **** ");
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}
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address_space &io = machine().device<cpu_device>("maincpu")->space(AS_IO);
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address_space &io = m_i8088->space(AS_IO);
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if (data & 32)
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{
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/* BIT 5: PORT LOOPBACK (1 enables loopback for COMM, PRINTER, KEYBOARD ports)
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@ -2975,7 +2986,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
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if(last_message != 1)
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{
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popmessage("\nCOLOR GRAPHICS ADAPTER INVOKED. PLEASE TURN ON THE APPROPRIATE DIP SWITCH, THEN REBOOT.\n");
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printf("OFFSET: %x (PC=%x)\n", 0x50 +offset , machine().device("maincpu")->safe_pc());
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printf("OFFSET: %x (PC=%x)\n", 0x50 +offset , m_i8088->pc());
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last_message = 1;
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}
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return;
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@ -3195,6 +3206,7 @@ MCFG_DEFAULT_LAYOUT(layout_rainbow)
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MCFG_CPU_ADD("maincpu", I8088, XTAL(24'073'400) / 5)
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MCFG_CPU_PROGRAM_MAP(rainbow8088_map)
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MCFG_CPU_IO_MAP(rainbow8088_io)
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MCFG_CPU_IRQ_ACKNOWLEDGE_DRIVER(rainbow_state, irq_callback)
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MCFG_CPU_ADD("subcpu", Z80, XTAL(24'073'400) / 6)
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MCFG_CPU_PROGRAM_MAP(rainbowz80_mem)
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@ -3290,36 +3302,30 @@ MCFG_DEVICE_ADD("com8116_b", COM8116, XTAL(5'068'800)) // Baud rate generator B
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MCFG_COM8116_FR_HANDLER(WRITELINE(rainbow_state, com8116_b_fr_w))
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MCFG_COM8116_FT_HANDLER(WRITELINE(rainbow_state, com8116_b_ft_w))
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MCFG_DEVICE_ADD("upd7201", UPD7201_NEW, XTAL(2'500'000)) // 2.5 Mhz from schematics
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MCFG_DEVICE_ADD("upd7201", UPD7201_NEW, XTAL(24'073'400) / 5 / 2) // 2.4073 MHz (nominally 2.5 MHz)
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MCFG_Z80SIO_OUT_INT_CB(WRITELINE(rainbow_state, mpsc_irq))
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MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("comm", rs232_port_device, write_txd))
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MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("printer", rs232_port_device, write_txd))
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// RTS and DTR outputs are not connected
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MCFG_Z80SIO_OUT_TXDA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_txd))
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MCFG_Z80SIO_OUT_DTRA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_dtr))
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MCFG_Z80SIO_OUT_RTSA_CB(DEVWRITELINE("rs232_a", rs232_port_device, write_rts))
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MCFG_Z80SIO_OUT_TXDB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_txd))
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MCFG_Z80SIO_OUT_DTRB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_dtr))
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MCFG_Z80SIO_OUT_RTSB_CB(DEVWRITELINE("rs232_b", rs232_port_device, write_rts))
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MCFG_RS232_PORT_ADD("rs232_a", default_rs232_devices, nullptr)
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MCFG_RS232_PORT_ADD("comm", default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER(DEVWRITELINE("upd7201", upd7201_new_device, rxa_w))
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MCFG_RS232_CTS_HANDLER(DEVWRITELINE("upd7201", upd7201_new_device, ctsa_w))
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MCFG_RS232_DCD_HANDLER(DEVWRITELINE("upd7201", upd7201_new_device, dcda_w))
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MCFG_RS232_PORT_ADD("rs232_b", default_rs232_devices, nullptr)
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MCFG_RS232_PORT_ADD("printer", default_rs232_devices, nullptr)
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MCFG_RS232_RXD_HANDLER(DEVWRITELINE("upd7201", upd7201_new_device, rxb_w))
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MCFG_RS232_CTS_HANDLER(DEVWRITELINE("upd7201", upd7201_new_device, ctsb_w))
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MCFG_RS232_DCD_HANDLER(DEVWRITELINE("upd7201", upd7201_new_device, dcdb_w))
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MCFG_RS232_DCD_HANDLER(DEVWRITELINE("upd7201", upd7201_new_device, ctsb_w)) // actually DTR
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MCFG_DEVICE_MODIFY("rs232_a")
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MCFG_DEVICE_MODIFY("comm")
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MCFG_SLOT_OPTION_ADD("microsoft_mouse", MSFT_SERIAL_MOUSE)
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MCFG_SLOT_OPTION_ADD("mouse_systems_mouse", MSYSTEM_SERIAL_MOUSE)
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MCFG_SLOT_DEFAULT_OPTION("microsoft_mouse")
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MCFG_DEVICE_MODIFY("rs232_b")
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MCFG_DEVICE_MODIFY("printer")
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MCFG_SLOT_DEFAULT_OPTION("printer")
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MCFG_DEVICE_ADD("kbdser", I8251, 0)
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MCFG_DEVICE_ADD("kbdser", I8251, XTAL(24'073'400) / 5 / 2)
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MCFG_I8251_TXD_HANDLER(WRITELINE(rainbow_state, kbd_tx))
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MCFG_I8251_DTR_HANDLER(WRITELINE(rainbow_state, irq_hi_w))
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MCFG_I8251_RXRDY_HANDLER(WRITELINE(rainbow_state, kbd_rxready_w))
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