mcs51: update savestates,

micro3d: reverse throttle control
This commit is contained in:
hap 2025-01-10 17:24:42 +01:00
parent 69b8bf52e4
commit 5e18e07b59
3 changed files with 104 additions and 88 deletions

View File

@ -2330,28 +2330,34 @@ void mcs51_cpu_device::device_start()
/* Save states */
save_item(NAME(m_ppc));
save_item(NAME(m_pc));
save_item(NAME(m_rwm));
save_item(NAME(m_recalc_parity));
save_item(NAME(m_last_line_state));
save_item(NAME(m_t0_cnt));
save_item(NAME(m_t1_cnt));
save_item(NAME(m_t2_cnt));
save_item(NAME(m_t2ex_cnt));
save_item(NAME(m_cur_irq_prio));
save_item(NAME(m_irq_active));
save_item(NAME(m_irq_prio));
save_item(NAME(m_last_op));
save_item(NAME(m_last_bit));
save_item(NAME(m_rwm) );
save_item(NAME(m_cur_irq_prio) );
save_item(NAME(m_last_line_state) );
save_item(NAME(m_t0_cnt) );
save_item(NAME(m_t1_cnt) );
save_item(NAME(m_t2_cnt) );
save_item(NAME(m_t2ex_cnt) );
save_item(NAME(m_recalc_parity) );
save_item(NAME(m_irq_prio) );
save_item(NAME(m_irq_active) );
save_item(NAME(m_ds5002fp.previous_ta) );
save_item(NAME(m_ds5002fp.ta_window) );
save_item(NAME(m_ds5002fp.rnr_delay) );
save_item(NAME(m_ds5002fp.range) );
save_item(NAME(m_uart.data_out));
save_item(NAME(m_uart.data_in));
save_item(NAME(m_uart.txbit));
save_item(NAME(m_uart.txd));
save_item(NAME(m_uart.rxbit));
save_item(NAME(m_uart.rxb8));
save_item(NAME(m_uart.smod_div));
save_item(NAME(m_uart.rx_clk));
save_item(NAME(m_uart.tx_clk));
save_item(NAME(m_ds5002fp.previous_ta));
save_item(NAME(m_ds5002fp.ta_window));
save_item(NAME(m_ds5002fp.range));
save_item(NAME(m_ds5002fp.rnr_delay));
state_add( MCS51_PC, "PC", m_pc).formatstr("%04X");
state_add( MCS51_SP, "SP", SP).formatstr("%02X");
state_add( MCS51_PSW, "PSW", PSW).formatstr("%02X");
@ -2383,8 +2389,8 @@ void mcs51_cpu_device::device_start()
state_add( MCS51_TL1, "TL1", TL1).formatstr("%02X");
state_add( MCS51_TH1, "TH1", TH1).formatstr("%02X");
state_add( STATE_GENPC, "GENPC", m_pc ).noshow();
state_add( STATE_GENPCBASE, "CURPC", m_pc ).noshow();
state_add( STATE_GENPC, "GENPC", m_pc).noshow();
state_add( STATE_GENPCBASE, "CURPC", m_pc).noshow();
state_add( STATE_GENFLAGS, "GENFLAGS", m_rtemp).formatstr("%8s").noshow();
set_icountptr(m_icount);

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@ -24,6 +24,7 @@
* - internal memory maps
* - addition of new processor types
* - full emulation of 8xCx2 processors
*
*****************************************************************************/
#ifndef MAME_CPU_MCS51_MCS51_H
@ -42,14 +43,14 @@ enum
enum
{
MCS51_INT0_LINE = 0, /* P3.2: External Interrupt 0 */
MCS51_INT1_LINE, /* P3.3: External Interrupt 1 */
MCS51_T0_LINE, /* P3.4: Timer 0 External Input */
MCS51_T1_LINE, /* P3.5: Timer 1 External Input */
MCS51_T2_LINE, /* P1.0: Timer 2 External Input */
MCS51_T2EX_LINE, /* P1.1: Timer 2 Capture Reload Trigger */
MCS51_INT0_LINE = 0, // P3.2: External Interrupt 0
MCS51_INT1_LINE, // P3.3: External Interrupt 1
MCS51_T0_LINE, // P3.4: Timer 0 External Input
MCS51_T1_LINE, // P3.5: Timer 1 External Input
MCS51_T2_LINE, // P1.0: Timer 2 External Input
MCS51_T2EX_LINE, // P1.1: Timer 2 Capture Reload Trigger
DS5002FP_PFI_LINE /* DS5002FP Power fail interrupt */
DS5002FP_PFI_LINE // DS5002FP Power fail interrupt
};
@ -97,59 +98,59 @@ protected:
address_space_config m_data_config;
address_space_config m_io_config;
//Internal stuff
uint16_t m_ppc; //previous pc
uint16_t m_pc; //current pc
uint16_t m_features; //features of this cpu
uint8_t m_rwm; //Signals that the current instruction is a read/write/modify instruction
// Internal stuff
uint16_t m_ppc; // previous pc
uint16_t m_pc; // current pc
uint16_t m_features; // features of this cpu
uint8_t m_rwm; // Signals that the current instruction is a read/write/modify instruction
int m_inst_cycles; /* cycles for the current instruction */
const uint32_t m_rom_size; /* size (in bytes) of internal program ROM/EPROM */
int m_ram_mask; /* second ram bank for indirect access available ? */
int m_num_interrupts; /* number of interrupts supported */
int m_recalc_parity; /* recalculate parity before next instruction */
uint32_t m_last_line_state; /* last state of input lines line */
int m_t0_cnt; /* number of 0->1 transitions on T0 line */
int m_t1_cnt; /* number of 0->1 transitions on T1 line */
int m_t2_cnt; /* number of 0->1 transitions on T2 line */
int m_t2ex_cnt; /* number of 0->1 transitions on T2EX line */
int m_cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
uint8_t m_irq_active; /* mask which irq levels are serviced */
uint8_t m_irq_prio[8]; /* interrupt priority */
int m_inst_cycles; // cycles for the current instruction
const uint32_t m_rom_size; // size (in bytes) of internal program ROM/EPROM
int m_ram_mask; // second ram bank for indirect access available ?
int m_num_interrupts; // number of interrupts supported
int m_recalc_parity; // recalculate parity before next instruction
uint32_t m_last_line_state; // last state of input lines line
int m_t0_cnt; // number of 0->1 transitions on T0 line
int m_t1_cnt; // number of 0->1 transitions on T1 line
int m_t2_cnt; // number of 0->1 transitions on T2 line
int m_t2ex_cnt; // number of 0->1 transitions on T2EX line
int m_cur_irq_prio; // Holds value of the current IRQ Priority Level; -1 if no irq
uint8_t m_irq_active; // mask which irq levels are serviced
uint8_t m_irq_prio[8]; // interrupt priority
uint8_t m_forced_inputs[4]; /* allow read even if configured as output */
uint8_t m_forced_inputs[4]; // allow read even if configured as output
// JB-related hacks
uint8_t m_last_op;
uint8_t m_last_bit;
uint8_t m_last_op;
uint8_t m_last_bit;
int m_icount;
int m_icount;
struct mcs51_uart
{
uint8_t data_out; //Data to send out
uint8_t data_in;
uint8_t txbit;
uint8_t txd;
uint8_t rxbit;
uint8_t rxb8;
uint8_t data_out; // data to send out
uint8_t data_in;
uint8_t txbit;
uint8_t txd;
uint8_t rxbit;
uint8_t rxb8;
int smod_div; /* signal divided by 2^SMOD */
int rx_clk; /* rx clock */
int tx_clk; /* tx clock */
} m_uart; /* internal uart */
int smod_div; // signal divided by 2^SMOD
int rx_clk; // rx clock
int tx_clk; // tx clock
} m_uart; // internal uart
/* Internal Ram */
required_shared_ptr<uint8_t> m_sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */
required_shared_ptr<uint8_t> m_scratchpad; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
// Internal Ram
required_shared_ptr<uint8_t> m_sfr_ram; // 128 SFR - these are in 0x80 - 0xFF
required_shared_ptr<uint8_t> m_scratchpad; // 128 RAM (8031/51) + 128 RAM in second bank (8032/52)
/* SFR Callbacks */
// SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data);
virtual uint8_t sfr_read(size_t offset);
void transmit(int state);
/* Memory spaces */
// Memory spaces
memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_program;
memory_access< 9, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
memory_access<17, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
@ -157,16 +158,17 @@ protected:
devcb_read8::array<4> m_port_in_cb;
devcb_write8::array<4> m_port_out_cb;
/* DS5002FP */
// DS5002FP
struct {
uint8_t previous_ta; /* Previous Timed Access value */
uint8_t ta_window; /* Limed Access window */
uint8_t range; /* Memory Range */
/* Bootstrap Configuration */
uint8_t mcon; /* bootstrap loader MCON register */
uint8_t rpctl; /* bootstrap loader RPCTL register */
uint8_t crc; /* bootstrap loader CRC register */
int32_t rnr_delay; /* delay before new random number available */
uint8_t previous_ta; // Previous Timed Access value
uint8_t ta_window; // Limed Access window
uint8_t range; // Memory Range
// Bootstrap Configuration
uint8_t mcon; // bootstrap loader MCON register
uint8_t rpctl; // bootstrap loader RPCTL register
uint8_t crc; // bootstrap loader CRC register
int32_t rnr_delay; // delay before new random number available
} m_ds5002fp;
// for the debugger
@ -315,19 +317,24 @@ protected:
};
/* variants with no internal rom and 128 byte internal memory */
// variants with no internal rom and 128 byte internal memory
DECLARE_DEVICE_TYPE(I8031, i8031_device)
/* variants with no internal rom and 256 byte internal memory */
// variants with no internal rom and 256 byte internal memory
DECLARE_DEVICE_TYPE(I8032, i8032_device)
/* variants 4k internal rom and 128 byte internal memory */
// variants 4k internal rom and 128 byte internal memory
DECLARE_DEVICE_TYPE(I8051, i8051_device)
DECLARE_DEVICE_TYPE(I8751, i8751_device)
/* variants 8k internal rom and 128 byte internal memory (no 8052 features) */
// variants 8k internal rom and 128 byte internal memory (no 8052 features)
DECLARE_DEVICE_TYPE(AM8753, am8753_device)
/* variants 8k internal rom and 256 byte internal memory and more registers */
// variants 8k internal rom and 256 byte internal memory and more registers
DECLARE_DEVICE_TYPE(I8052, i8052_device)
DECLARE_DEVICE_TYPE(I8752, i8752_device)
/* cmos variants */
// cmos variants
DECLARE_DEVICE_TYPE(I80C31, i80c31_device)
DECLARE_DEVICE_TYPE(I80C51, i80c51_device)
DECLARE_DEVICE_TYPE(I87C51, i87c51_device)
@ -343,7 +350,8 @@ DECLARE_DEVICE_TYPE(SAB80C535, sab80c535_device)
DECLARE_DEVICE_TYPE(P80C552, p80c552_device)
DECLARE_DEVICE_TYPE(P87C552, p87c552_device)
DECLARE_DEVICE_TYPE(P80C562, p80c562_device)
/* 4k internal perom and 128 internal ram and 2 analog comparators */
// 4k internal perom and 128 internal ram and 2 analog comparators
DECLARE_DEVICE_TYPE(AT89C4051, at89c4051_device)
DECLARE_DEVICE_TYPE(I8344, i8344_device)
@ -392,7 +400,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
/* SFR Callbacks */
// SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data) override;
virtual uint8_t sfr_read(size_t offset) override;
};
@ -453,7 +461,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
/* SFR Callbacks */
// SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data) override;
virtual uint8_t sfr_read(size_t offset) override;
};
@ -603,7 +611,7 @@ protected:
* Internal ram 128k and security features
*/
/* these allow the default state of RAM to be set from a region */
// these allow the default state of RAM to be set from a region
#define DS5002FP_SET_MON( _mcon) \
ROM_FILL( 0xc6, 1, _mcon)
@ -632,7 +640,7 @@ public:
protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
/* SFR Callbacks */
// SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data) override;
virtual uint8_t sfr_read(size_t offset) override;

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@ -27,6 +27,7 @@
#include "emu.h"
#include "micro3d.h"
#include "micro3d_a.h"
#include "cpu/am29000/am29000.h"
#include "cpu/m68000/m68000.h"
#include "cpu/mcs51/mcs51.h"
@ -80,7 +81,7 @@ static INPUT_PORTS_START( micro3d )
PORT_DIPSETTING( 0x0000, DEF_STR(On) )
PORT_START("SOUND_SW")
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Sound PCB Test SW") PORT_CODE(KEYCODE_F1)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Sound PCB Test SW") PORT_CODE(KEYCODE_F1)
PORT_START("VOLUME")
PORT_ADJUSTER(100, "Volume")
@ -108,10 +109,10 @@ static INPUT_PORTS_START( f15se )
PORT_BIT( 0xfff, 0x000, IPT_AD_STICK_X ) PORT_MINMAX(0xf5a, 0x0a6) PORT_SENSITIVITY(25) PORT_KEYDELTA(50) PORT_REVERSE
PORT_START("JOYSTICK_Y")
PORT_BIT(0xfff, 0x000, IPT_AD_STICK_Y ) PORT_MINMAX(0xf5a, 0x0a6) PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
PORT_BIT( 0xfff, 0x000, IPT_AD_STICK_Y ) PORT_MINMAX(0xf5a, 0x0a6) PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
PORT_START("THROTTLE")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_NAME("Throttle")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_NAME("Throttle")
INPUT_PORTS_END
static INPUT_PORTS_START( botss )
@ -135,10 +136,10 @@ static INPUT_PORTS_START( botss )
PORT_BIT( 0xfff, 0x000, IPT_AD_STICK_X ) PORT_MINMAX(0xf5a, 0x0a6) PORT_SENSITIVITY(25) PORT_KEYDELTA(50) PORT_REVERSE
PORT_START("JOYSTICK_Y")
PORT_BIT(0xfff, 0x000, IPT_AD_STICK_Y ) PORT_MINMAX(0xf5a, 0x0a6) PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
PORT_BIT( 0xfff, 0x000, IPT_AD_STICK_Y ) PORT_MINMAX(0xf5a, 0x0a6) PORT_SENSITIVITY(25) PORT_KEYDELTA(50)
PORT_START("THROTTLE")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_NAME("Throttle")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE PORT_NAME("Throttle")
INPUT_PORTS_END
static INPUT_PORTS_START( botss11 )
@ -154,8 +155,8 @@ static INPUT_PORTS_START( botss11 )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
PORT_START("INPUTS_C_D")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Throttle up")
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Throttle down")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Throttle Up")
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Throttle Down")
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Trigger")
@ -215,7 +216,7 @@ void micro3d_state::hostmem(address_map &map)
map(0x960000, 0x960001).w(FUNC(micro3d_state::reset_w));
map(0x980001, 0x980001).rw("adc", FUNC(adc0844_device::read), FUNC(adc0844_device::write));
map(0x9a0000, 0x9a0007).rw(m_vgb, FUNC(tms34010_device::host_r), FUNC(tms34010_device::host_w));
map(0x9c0000, 0x9c0001).noprw(); // Lamps
map(0x9c0000, 0x9c0001).noprw(); // Lamps
map(0x9e0000, 0x9e002f).rw("mfp", FUNC(mc68901_device::read), FUNC(mc68901_device::write)).umask16(0xff00);
map(0xa00000, 0xa0003f).rw(m_duart, FUNC(mc68681_device::read), FUNC(mc68681_device::write)).umask16(0xff00);
map(0xa20000, 0xa20001).r(FUNC(micro3d_state::encoder_h_r));
@ -272,6 +273,7 @@ void micro3d_state::drmath_data(address_map &map)
map(0x03fffff0, 0x03ffffff).rw("scc", FUNC(z80scc_device::ab_dc_r), FUNC(z80scc_device::ab_dc_w)).umask32(0x000000ff);
}
/*************************************
*
* Sound memory map