mirror of
https://github.com/holub/mame
synced 2025-04-21 07:52:35 +03:00
Merged some memory maps.
This commit is contained in:
Aaron Giles
parent
2f823ff24f
commit
5e3116fd87
@ -629,8 +629,7 @@ static void print_game_chips(FILE *out, const game_driver *game, const machine_c
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{
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fprintf(out, "\t\t<chip");
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fprintf(out, " type=\"cpu\"");
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if (config->cpu[chipnum].tag != NULL)
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fprintf(out, " tag=\"%s\"", xml_normalize_string(config->cpu[chipnum].tag));
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fprintf(out, " tag=\"%s\"", xml_normalize_string(config->cpu[chipnum].tag));
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fprintf(out, " name=\"%s\"", xml_normalize_string(cputype_name(config->cpu[chipnum].type)));
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fprintf(out, " clock=\"%d\"", config->cpu[chipnum].clock);
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fprintf(out, "/>\n");
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@ -48,50 +48,34 @@ static WRITE8_HANDLER( battlnts_bankswitch_w )
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/* other bits unknown */
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}
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static ADDRESS_MAP_START( battlnts_readmem, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x1fff) AM_READ(K007342_r) /* Color RAM + Video RAM */
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AM_RANGE(0x2000, 0x21ff) AM_READ(K007420_r) /* Sprite RAM */
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AM_RANGE(0x2200, 0x23ff) AM_READ(K007342_scroll_r) /* Scroll RAM */
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AM_RANGE(0x2400, 0x24ff) AM_READ(SMH_RAM) /* Palette */
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AM_RANGE(0x2e00, 0x2e00) AM_READ(input_port_0_r) /* DIPSW #1 */
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AM_RANGE(0x2e01, 0x2e01) AM_READ(input_port_4_r) /* 2P controls */
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AM_RANGE(0x2e02, 0x2e02) AM_READ(input_port_3_r) /* 1P controls */
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AM_RANGE(0x2e03, 0x2e03) AM_READ(input_port_2_r) /* coinsw, testsw, startsw */
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AM_RANGE(0x2e04, 0x2e04) AM_READ(input_port_1_r) /* DISPW #2 */
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AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1) /* banked ROM */
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AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM) /* ROM 777e02.bin */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( battlnts_writemem, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x1fff) AM_WRITE(K007342_w) /* Color RAM + Video RAM */
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AM_RANGE(0x2000, 0x21ff) AM_WRITE(K007420_w) /* Sprite RAM */
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AM_RANGE(0x2200, 0x23ff) AM_WRITE(K007342_scroll_w) /* Scroll RAM */
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AM_RANGE(0x2400, 0x24ff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)/* palette */
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AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w) /* Video Registers */
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static ADDRESS_MAP_START( battlnts_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x1fff) AM_READWRITE(K007342_r, K007342_w) /* Color RAM + Video RAM */
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AM_RANGE(0x2000, 0x21ff) AM_READWRITE(K007420_r, K007420_w) /* Sprite RAM */
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AM_RANGE(0x2200, 0x23ff) AM_READWRITE(K007342_scroll_r, K007342_scroll_w) /* Scroll RAM */
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AM_RANGE(0x2400, 0x24ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)/* palette */
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AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w) /* Video Registers */
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AM_RANGE(0x2e00, 0x2e00) AM_READ(input_port_0_r) /* DIPSW #1 */
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AM_RANGE(0x2e01, 0x2e01) AM_READ(input_port_4_r) /* 2P controls */
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AM_RANGE(0x2e02, 0x2e02) AM_READ(input_port_3_r) /* 1P controls */
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AM_RANGE(0x2e03, 0x2e03) AM_READ(input_port_2_r) /* coinsw, testsw, startsw */
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AM_RANGE(0x2e04, 0x2e04) AM_READ(input_port_1_r) /* DISPW #2 */
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AM_RANGE(0x2e08, 0x2e08) AM_WRITE(battlnts_bankswitch_w) /* bankswitch control */
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AM_RANGE(0x2e0c, 0x2e0c) AM_WRITE(battlnts_spritebank_w) /* sprite bank select */
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AM_RANGE(0x2e10, 0x2e10) AM_WRITE(watchdog_reset_w) /* watchdog reset */
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AM_RANGE(0x2e14, 0x2e14) AM_WRITE(soundlatch_w) /* sound code # */
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AM_RANGE(0x2e18, 0x2e18) AM_WRITE(battlnts_sh_irqtrigger_w)/* cause interrupt on audio CPU */
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AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM) /* banked ROM */
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AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM) /* ROM 777e02.bin */
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AM_RANGE(0x2e10, 0x2e10) AM_WRITE(watchdog_reset_w) /* watchdog reset */
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AM_RANGE(0x2e14, 0x2e14) AM_WRITE(soundlatch_w) /* sound code # */
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AM_RANGE(0x2e18, 0x2e18) AM_WRITE(battlnts_sh_irqtrigger_w) /* cause interrupt on audio CPU */
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AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1) /* banked ROM */
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AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM 777e02.bin */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( battlnts_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM) /* ROM 777c01.rom */
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AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* RAM */
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AM_RANGE(0xa000, 0xa000) AM_READ(YM3812_status_port_0_r) /* YM3812 (chip 1) */
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AM_RANGE(0xc000, 0xc000) AM_READ(YM3812_status_port_1_r) /* YM3812 (chip 2) */
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AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r) /* soundlatch_r */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( battlnts_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM) /* ROM 777c01.rom */
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AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* RAM */
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AM_RANGE(0xa000, 0xa000) AM_WRITE(YM3812_control_port_0_w) /* YM3812 (chip 1) */
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static ADDRESS_MAP_START( battlnts_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM 777c01.rom */
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AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
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AM_RANGE(0xa000, 0xa000) AM_READWRITE(YM3812_status_port_0_r, YM3812_control_port_0_w) /* YM3812 (chip 1) */
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AM_RANGE(0xa001, 0xa001) AM_WRITE(YM3812_write_port_0_w) /* YM3812 (chip 1) */
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AM_RANGE(0xc000, 0xc000) AM_WRITE(YM3812_control_port_1_w) /* YM3812 (chip 2) */
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AM_RANGE(0xc000, 0xc000) AM_READWRITE(YM3812_status_port_1_r, YM3812_control_port_1_w) /* YM3812 (chip 2) */
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AM_RANGE(0xc001, 0xc001) AM_WRITE(YM3812_write_port_1_w) /* YM3812 (chip 2) */
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AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r) /* soundlatch_r */
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ADDRESS_MAP_END
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/***************************************************************************
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@ -262,11 +246,11 @@ static MACHINE_DRIVER_START( battlnts )
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/* basic machine hardware */
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MDRV_CPU_ADD("main", HD6309, 3000000*4) /* ? */
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MDRV_CPU_PROGRAM_MAP(battlnts_readmem,battlnts_writemem)
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MDRV_CPU_PROGRAM_MAP(battlnts_map,0)
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MDRV_CPU_VBLANK_INT("main", battlnts_interrupt)
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MDRV_CPU_ADD("audio", Z80, 3579545)
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MDRV_CPU_PROGRAM_MAP(battlnts_readmem_sound,battlnts_writemem_sound)
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MDRV_CPU_PROGRAM_MAP(battlnts_sound_map,0)
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/* video hardware */
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MDRV_SCREEN_ADD("main", RASTER)
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@ -306,113 +306,72 @@ static READ16_HANDLER( mechatt_gun_r )
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/*******************************************************************************/
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static ADDRESS_MAP_START( bbuster_readmem, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
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AM_RANGE(0x080000, 0x08ffff) AM_READ(SMH_RAM)
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AM_RANGE(0x090000, 0x090fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0a0000, 0x0a0fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0a8000, 0x0a8fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0b0000, 0x0b1fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0b2000, 0x0b3fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0d0000, 0x0d0fff) AM_READ(SMH_RAM)
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static ADDRESS_MAP_START( bbuster_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x080000, 0x08ffff) AM_RAM AM_BASE(&bbuster_ram)
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AM_RANGE(0x090000, 0x090fff) AM_RAM_WRITE(bbuster_video_w) AM_BASE(&videoram16)
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AM_RANGE(0x0a0000, 0x0a0fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
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AM_RANGE(0x0a8000, 0x0a8fff) AM_RAM AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
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AM_RANGE(0x0b0000, 0x0b1fff) AM_RAM_WRITE(bbuster_pf1_w) AM_BASE(&bbuster_pf1_data)
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AM_RANGE(0x0b2000, 0x0b3fff) AM_RAM_WRITE(bbuster_pf2_w) AM_BASE(&bbuster_pf2_data)
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AM_RANGE(0x0b8000, 0x0b8003) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf1_scroll_data)
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AM_RANGE(0x0b8008, 0x0b800b) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf2_scroll_data)
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AM_RANGE(0x0d0000, 0x0d0fff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
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AM_RANGE(0x0e0000, 0x0e0001) AM_READ_PORT("COINS") /* Coins */
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AM_RANGE(0x0e0002, 0x0e0003) AM_READ_PORT("IN0") /* Player 1 & 2 */
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AM_RANGE(0x0e0004, 0x0e0005) AM_READ_PORT("IN1") /* Player 3 */
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AM_RANGE(0x0e0008, 0x0e0009) AM_READ_PORT("DSW1") /* Dip 1 */
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AM_RANGE(0x0e000a, 0x0e000b) AM_READ_PORT("DSW2") /* Dip 2 */
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AM_RANGE(0x0e0018, 0x0e0019) AM_READ(sound_cpu_r)
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AM_RANGE(0x0e8000, 0x0e8001) AM_READ(kludge_r)
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AM_RANGE(0x0e8000, 0x0e8001) AM_READWRITE(kludge_r, gun_select_w)
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AM_RANGE(0x0e8002, 0x0e8003) AM_READ(control_3_r)
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AM_RANGE(0x0f8000, 0x0f80ff) AM_READ(eprom_r) /* Eeprom */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( bbuster_writemem, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
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AM_RANGE(0x080000, 0x08ffff) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_ram)
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AM_RANGE(0x090000, 0x090fff) AM_WRITE(bbuster_video_w) AM_BASE(&videoram16)
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AM_RANGE(0x0a0000, 0x0a0fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
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AM_RANGE(0x0a8000, 0x0a8fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
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AM_RANGE(0x0b0000, 0x0b1fff) AM_WRITE(bbuster_pf1_w) AM_BASE(&bbuster_pf1_data)
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AM_RANGE(0x0b2000, 0x0b3fff) AM_WRITE(bbuster_pf2_w) AM_BASE(&bbuster_pf2_data)
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AM_RANGE(0x0b8000, 0x0b8003) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf1_scroll_data)
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AM_RANGE(0x0b8008, 0x0b800b) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf2_scroll_data)
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AM_RANGE(0x0d0000, 0x0d0fff) AM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
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AM_RANGE(0x0e8000, 0x0e8001) AM_WRITE(gun_select_w)
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AM_RANGE(0x0f0008, 0x0f0009) AM_WRITE(SMH_NOP)
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AM_RANGE(0x0f0018, 0x0f0019) AM_WRITE(sound_cpu_w)
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AM_RANGE(0x0f8000, 0x0f80ff) AM_WRITE(SMH_RAM) AM_BASE(&eprom_data) /* Eeprom */
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AM_RANGE(0x0f8000, 0x0f80ff) AM_READWRITE(eprom_r, SMH_RAM) AM_BASE(&eprom_data) /* Eeprom */
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ADDRESS_MAP_END
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/*******************************************************************************/
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static ADDRESS_MAP_START( mechatt_readmem, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x06ffff) AM_READ(SMH_ROM)
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AM_RANGE(0x070000, 0x07ffff) AM_READ(SMH_RAM)
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AM_RANGE(0x090000, 0x090fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0a0000, 0x0a0fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0b0000, 0x0b3fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM)
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AM_RANGE(0x0d0000, 0x0d07ff) AM_READ(SMH_RAM)
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static ADDRESS_MAP_START( mechatt_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x06ffff) AM_ROM
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AM_RANGE(0x070000, 0x07ffff) AM_RAM AM_BASE(&bbuster_ram)
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AM_RANGE(0x090000, 0x090fff) AM_RAM_WRITE(bbuster_video_w) AM_BASE(&videoram16)
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AM_RANGE(0x0a0000, 0x0a0fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
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AM_RANGE(0x0a1000, 0x0a7fff) AM_WRITENOP
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AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(bbuster_pf1_w) AM_BASE(&bbuster_pf1_data)
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AM_RANGE(0x0b8000, 0x0b8003) AM_WRITEONLY AM_BASE(&bbuster_pf1_scroll_data)
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AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM_WRITE(bbuster_pf2_w) AM_BASE(&bbuster_pf2_data)
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AM_RANGE(0x0c8000, 0x0c8003) AM_WRITEONLY AM_BASE(&bbuster_pf2_scroll_data)
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AM_RANGE(0x0d0000, 0x0d07ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
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AM_RANGE(0x0e0000, 0x0e0001) AM_READ_PORT("IN0")
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AM_RANGE(0x0e0002, 0x0e0003) AM_READ_PORT("DSW1")
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AM_RANGE(0x0e0004, 0x0e0007) AM_READ(mechatt_gun_r)
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AM_RANGE(0x0e8000, 0x0e8001) AM_READ(sound_cpu_r)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( mechatt_writemem, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x000000, 0x06ffff) AM_WRITE(SMH_ROM)
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AM_RANGE(0x070000, 0x07ffff) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_ram)
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AM_RANGE(0x090000, 0x090fff) AM_WRITE(bbuster_video_w) AM_BASE(&videoram16)
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AM_RANGE(0x0a0000, 0x0a0fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
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AM_RANGE(0x0a1000, 0x0a7fff) AM_WRITE(SMH_NOP)
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AM_RANGE(0x0b0000, 0x0b3fff) AM_WRITE(bbuster_pf1_w) AM_BASE(&bbuster_pf1_data)
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AM_RANGE(0x0b8000, 0x0b8003) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf1_scroll_data)
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AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(bbuster_pf2_w) AM_BASE(&bbuster_pf2_data)
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AM_RANGE(0x0c8000, 0x0c8003) AM_WRITE(SMH_RAM) AM_BASE(&bbuster_pf2_scroll_data)
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AM_RANGE(0x0d0000, 0x0d07ff) AM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
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AM_RANGE(0x0e4002, 0x0e4003) AM_WRITE(SMH_NOP) /* Gun force feedback? */
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AM_RANGE(0x0e8000, 0x0e8001) AM_WRITE(sound_cpu_w)
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AM_RANGE(0x0e8000, 0x0e8001) AM_READWRITE(sound_cpu_r, sound_cpu_w)
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ADDRESS_MAP_END
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/******************************************************************************/
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static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
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AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
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static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0xefff) AM_ROM
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AM_RANGE(0xf000, 0xf7ff) AM_RAM
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AM_RANGE(0xf800, 0xf800) AM_READ(soundlatch_r)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
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AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( sound_readport, ADDRESS_SPACE_IO, 8 )
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static ADDRESS_MAP_START( sound_portmap, ADDRESS_SPACE_IO, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x00, 0x00) AM_READ(YM2610_status_port_0_A_r)
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AM_RANGE(0x02, 0x02) AM_READ(YM2610_status_port_0_B_r)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( sound_writeport, ADDRESS_SPACE_IO, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0x00, 0x00) AM_WRITE(YM2610_control_port_0_A_w)
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AM_RANGE(0x00, 0x00) AM_READWRITE(YM2610_status_port_0_A_r, YM2610_control_port_0_A_w)
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AM_RANGE(0x01, 0x01) AM_WRITE(YM2610_data_port_0_A_w)
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AM_RANGE(0x02, 0x02) AM_WRITE(YM2610_control_port_0_B_w)
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AM_RANGE(0x02, 0x02) AM_READWRITE(YM2610_status_port_0_B_r, YM2610_control_port_0_B_w)
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AM_RANGE(0x03, 0x03) AM_WRITE(YM2610_data_port_0_B_w)
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AM_RANGE(0xc0, 0xc1) AM_WRITE(SMH_NOP) /* -> Main CPU */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( sounda_readport, ADDRESS_SPACE_IO, 8 )
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static ADDRESS_MAP_START( sounda_portmap, ADDRESS_SPACE_IO, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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||||
AM_RANGE(0x00, 0x00) AM_READ(YM2608_status_port_0_A_r)
|
||||
AM_RANGE(0x02, 0x02) AM_READ(YM2608_status_port_0_B_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sounda_writeport, ADDRESS_SPACE_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_WRITE(YM2608_control_port_0_A_w)
|
||||
AM_RANGE(0x00, 0x00) AM_READWRITE(YM2608_status_port_0_A_r, YM2608_control_port_0_A_w)
|
||||
AM_RANGE(0x01, 0x01) AM_WRITE(YM2608_data_port_0_A_w)
|
||||
AM_RANGE(0x02, 0x02) AM_WRITE(YM2608_control_port_0_B_w)
|
||||
AM_RANGE(0x02, 0x02) AM_READWRITE(YM2608_status_port_0_B_r, YM2608_control_port_0_B_w)
|
||||
AM_RANGE(0x03, 0x03) AM_WRITE(YM2608_data_port_0_B_w)
|
||||
AM_RANGE(0xc0, 0xc1) AM_WRITE(SMH_NOP) /* -> Main CPU */
|
||||
ADDRESS_MAP_END
|
||||
@ -728,12 +687,12 @@ static MACHINE_DRIVER_START( bbusters )
|
||||
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("main", M68000, 12000000)
|
||||
MDRV_CPU_PROGRAM_MAP(bbuster_readmem,bbuster_writemem)
|
||||
MDRV_CPU_PROGRAM_MAP(bbuster_map,0)
|
||||
MDRV_CPU_VBLANK_INT_HACK(bbuster,4)
|
||||
|
||||
MDRV_CPU_ADD("audio", Z80,4000000) /* Accurate */
|
||||
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
|
||||
MDRV_CPU_IO_MAP(sound_readport,sound_writeport)
|
||||
MDRV_CPU_PROGRAM_MAP(sound_map,0)
|
||||
MDRV_CPU_IO_MAP(sound_portmap,0)
|
||||
|
||||
#if BBUSTERS_HACK
|
||||
MDRV_MACHINE_RESET(bbusters)
|
||||
@ -771,12 +730,12 @@ static MACHINE_DRIVER_START( mechatt )
|
||||
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("main", M68000, 12000000)
|
||||
MDRV_CPU_PROGRAM_MAP(mechatt_readmem,mechatt_writemem)
|
||||
MDRV_CPU_PROGRAM_MAP(mechatt_map,0)
|
||||
MDRV_CPU_VBLANK_INT("main", irq4_line_hold)
|
||||
|
||||
MDRV_CPU_ADD("audio", Z80,4000000) /* Accurate */
|
||||
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
|
||||
MDRV_CPU_IO_MAP(sounda_readport,sounda_writeport)
|
||||
MDRV_CPU_PROGRAM_MAP(sound_map,0)
|
||||
MDRV_CPU_IO_MAP(sounda_portmap,0)
|
||||
|
||||
#if MECHATT_HACK
|
||||
MDRV_MACHINE_RESET(mechatt)
|
||||
|
||||
@ -65,7 +65,6 @@ J1100072A
|
||||
static UINT8 port_select; /* for muxed controls */
|
||||
|
||||
static UINT32 beg_bank=0;
|
||||
static UINT8 *beg_sharedram;
|
||||
|
||||
static int sound_nmi_enable=0,pending_nmi=0;
|
||||
static UINT8 for_sound = 0;
|
||||
@ -192,16 +191,6 @@ static READ8_HANDLER( beg_status_r )
|
||||
}
|
||||
|
||||
|
||||
static READ8_HANDLER( beg_sharedram_r )
|
||||
{
|
||||
return beg_sharedram[offset];
|
||||
}
|
||||
static WRITE8_HANDLER( beg_sharedram_w )
|
||||
{
|
||||
beg_sharedram[offset] = data;
|
||||
}
|
||||
|
||||
|
||||
static READ8_HANDLER( beg_trackball_x_r )
|
||||
{
|
||||
static const char *const portx_name[2] = { "P1X", "P2X" };
|
||||
@ -303,27 +292,18 @@ INPUT_PORTS_END
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Main CPU */
|
||||
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
|
||||
AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_BANK1)
|
||||
AM_RANGE(0xd800, 0xdbff) AM_READ(beg_sharedram_r) /* only half of the RAM is accessible, line a10 of IC73 (6116) is GNDed */
|
||||
AM_RANGE(0xf000, 0xf0ff) AM_READ(bigevglf_vidram_r) /* 41464 (64kB * 8 chips), addressed using ports 1 and 5 */
|
||||
AM_RANGE(0xf840, 0xf8ff) AM_READ(SMH_RAM)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0xd000, 0xd7ff) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0xd800, 0xdbff) AM_WRITE(beg_sharedram_w) AM_BASE(&beg_sharedram)
|
||||
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xcfff) AM_RAM
|
||||
AM_RANGE(0xd000, 0xd7ff) AM_ROMBANK(1)
|
||||
AM_RANGE(0xd800, 0xdbff) AM_RAM AM_SHARE(1) /* only half of the RAM is accessible, line a10 of IC73 (6116) is GNDed */
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_WRITE(bigevglf_palette_w) AM_BASE(&paletteram)
|
||||
AM_RANGE(0xe800, 0xefff) AM_WRITE(SMH_RAM) AM_BASE(&bigevglf_spriteram1) /* sprite 'templates' */
|
||||
AM_RANGE(0xf000, 0xf0ff) AM_WRITE(bigevglf_vidram_w)
|
||||
AM_RANGE(0xf840, 0xf8ff) AM_WRITE(SMH_RAM) AM_BASE(&bigevglf_spriteram2) /* spriteram (x,y,offset in spriteram1,palette) */
|
||||
AM_RANGE(0xe800, 0xefff) AM_WRITEONLY AM_BASE(&bigevglf_spriteram1) /* sprite 'templates' */
|
||||
AM_RANGE(0xf000, 0xf0ff) AM_READWRITE(bigevglf_vidram_r, bigevglf_vidram_w) /* 41464 (64kB * 8 chips), addressed using ports 1 and 5 */
|
||||
AM_RANGE(0xf840, 0xf8ff) AM_RAM AM_BASE(&bigevglf_spriteram2) /* spriteram (x,y,offset in spriteram1,palette) */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( bigevglf_writeport, ADDRESS_SPACE_IO, 8 )
|
||||
static ADDRESS_MAP_START( bigevglf_portmap, ADDRESS_SPACE_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_WRITE(SMH_NOP) /* video ram enable ???*/
|
||||
AM_RANGE(0x01, 0x01) AM_WRITE(bigevglf_gfxcontrol_w) /* plane select */
|
||||
@ -331,10 +311,6 @@ static ADDRESS_MAP_START( bigevglf_writeport, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0x03, 0x03) AM_WRITE(beg13A_set_w)
|
||||
AM_RANGE(0x04, 0x04) AM_WRITE(beg13B_clr_w)
|
||||
AM_RANGE(0x05, 0x05) AM_WRITE(bigevglf_vidram_addr_w) /* video banking (256 banks) for f000-f0ff area */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( bigevglf_readport, ADDRESS_SPACE_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x06, 0x06) AM_READ(beg_status_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -342,30 +318,12 @@ ADDRESS_MAP_END
|
||||
/*********************************************************************************/
|
||||
/* Sub CPU */
|
||||
|
||||
static ADDRESS_MAP_START( readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
|
||||
AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0x8000, 0x83ff) AM_READ(beg_sharedram_r) /* shared with main CPU */
|
||||
static ADDRESS_MAP_START( sub_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_ROM
|
||||
AM_RANGE(0x4000, 0x47ff) AM_RAM
|
||||
AM_RANGE(0x8000, 0x83ff) AM_RAM AM_SHARE(1) /* shared with main CPU */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0x8000, 0x83ff) AM_WRITE(beg_sharedram_w) /* shared with main CPU */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( bigevglf_sub_writeport, ADDRESS_SPACE_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x08, 0x08) AM_WRITE(beg_port08_w) /* muxed port select + other unknown stuff */
|
||||
AM_RANGE(0x0c, 0x0c) AM_WRITE(bigevglf_mcu_w)
|
||||
AM_RANGE(0x0e, 0x0e) AM_WRITE(SMH_NOP) /* 0-enable MCU, 1-keep reset line ASSERTED; D0 goes to the input of ls74 and the /Q of this ls74 goes to reset line on 68705 */
|
||||
AM_RANGE(0x10, 0x17) AM_WRITE(beg13A_clr_w)
|
||||
AM_RANGE(0x18, 0x1f) AM_WRITE(beg13B_set_w)
|
||||
AM_RANGE(0x20, 0x20) AM_WRITE(sound_command_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
||||
static READ8_HANDLER( sub_cpu_mcu_coin_port_r )
|
||||
{
|
||||
@ -380,7 +338,7 @@ static READ8_HANDLER( sub_cpu_mcu_coin_port_r )
|
||||
return bigevglf_mcu_status_r(machine,0) | (input_port_read(machine, "PORT04") & 3) | bit5; /* bit 0 and bit 1 - coin inputs */
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( bigevglf_sub_readport, ADDRESS_SPACE_IO, 8 )
|
||||
static ADDRESS_MAP_START( bigevglf_sub_portmap, ADDRESS_SPACE_IO, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_READ_PORT("PORT00")
|
||||
AM_RANGE(0x01, 0x01) AM_READ(SMH_NOP)
|
||||
@ -390,60 +348,51 @@ static ADDRESS_MAP_START( bigevglf_sub_readport, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0x05, 0x05) AM_READ_PORT("DSW1")
|
||||
AM_RANGE(0x06, 0x06) AM_READ_PORT("DSW2")
|
||||
AM_RANGE(0x07, 0x07) AM_READ(SMH_NOP)
|
||||
AM_RANGE(0x08, 0x08) AM_WRITE(beg_port08_w) /* muxed port select + other unknown stuff */
|
||||
AM_RANGE(0x0b, 0x0b) AM_READ(bigevglf_mcu_r)
|
||||
AM_RANGE(0x20, 0x20) AM_READ(beg_fromsound_r)
|
||||
AM_RANGE(0x0c, 0x0c) AM_WRITE(bigevglf_mcu_w)
|
||||
AM_RANGE(0x0e, 0x0e) AM_WRITE(SMH_NOP) /* 0-enable MCU, 1-keep reset line ASSERTED; D0 goes to the input of ls74 and the /Q of this ls74 goes to reset line on 68705 */
|
||||
AM_RANGE(0x10, 0x17) AM_WRITE(beg13A_clr_w)
|
||||
AM_RANGE(0x18, 0x1f) AM_WRITE(beg13B_set_w)
|
||||
AM_RANGE(0x20, 0x20) AM_READWRITE(beg_fromsound_r, sound_command_w)
|
||||
AM_RANGE(0x21, 0x21) AM_READ(beg_soundstate_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
||||
|
||||
/*********************************************************************************/
|
||||
/* Sound CPU */
|
||||
|
||||
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
|
||||
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0xda00, 0xda00) AM_READ(soundstate_r)
|
||||
AM_RANGE(0xd800, 0xd800) AM_READ(sound_command_r) /* read from D800 sets bit 0 in status */
|
||||
AM_RANGE(0xe000, 0xefff) AM_READ(SMH_NOP) /* space for diagnostics ROM */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
|
||||
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xc7ff) AM_RAM
|
||||
AM_RANGE(0xc800, 0xc800) AM_WRITE(AY8910_control_port_0_w)
|
||||
AM_RANGE(0xc801, 0xc801) AM_WRITE(AY8910_write_port_0_w)
|
||||
AM_RANGE(0xca00, 0xca0d) AM_WRITE(MSM5232_0_w)
|
||||
AM_RANGE(0xcc00, 0xcc00) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0xce00, 0xce00) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0xd800, 0xd800) AM_WRITE(beg_fromsound_w) /* write to D800 sets bit 1 in status */
|
||||
AM_RANGE(0xda00, 0xda00) AM_WRITE(nmi_enable_w)
|
||||
AM_RANGE(0xd800, 0xd800) AM_READWRITE(sound_command_r, beg_fromsound_w) /* write to D800 sets bit 1 in status */
|
||||
AM_RANGE(0xda00, 0xda00) AM_READWRITE(soundstate_r, nmi_enable_w)
|
||||
AM_RANGE(0xdc00, 0xdc00) AM_WRITE(nmi_disable_w)
|
||||
AM_RANGE(0xde00, 0xde00) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0xde00, 0xde00) AM_WRITENOP
|
||||
AM_RANGE(0xe000, 0xefff) AM_READNOP /* space for diagnostics ROM */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
/*********************************************************************************/
|
||||
/* MCU */
|
||||
|
||||
static ADDRESS_MAP_START( m68705_readmem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
static ADDRESS_MAP_START( m68705_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
|
||||
AM_RANGE(0x0000, 0x0000) AM_READ(bigevglf_68705_portA_r)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READ(bigevglf_68705_portB_r)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READ(bigevglf_68705_portC_r)
|
||||
AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
|
||||
AM_RANGE(0x0000, 0x0000) AM_WRITE(bigevglf_68705_portA_w)
|
||||
AM_RANGE(0x0001, 0x0001) AM_WRITE(bigevglf_68705_portB_w)
|
||||
AM_RANGE(0x0002, 0x0002) AM_WRITE(bigevglf_68705_portC_w)
|
||||
AM_RANGE(0x0000, 0x0000) AM_READWRITE(bigevglf_68705_portA_r, bigevglf_68705_portA_w)
|
||||
AM_RANGE(0x0001, 0x0001) AM_READWRITE(bigevglf_68705_portB_r, bigevglf_68705_portB_w)
|
||||
AM_RANGE(0x0002, 0x0002) AM_READWRITE(bigevglf_68705_portC_r, bigevglf_68705_portC_w)
|
||||
AM_RANGE(0x0004, 0x0004) AM_WRITE(bigevglf_68705_ddrA_w)
|
||||
AM_RANGE(0x0005, 0x0005) AM_WRITE(bigevglf_68705_ddrB_w)
|
||||
AM_RANGE(0x0006, 0x0006) AM_WRITE(bigevglf_68705_ddrC_w)
|
||||
AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0x0010, 0x007f) AM_RAM
|
||||
AM_RANGE(0x0080, 0x07ff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -475,25 +424,26 @@ static const struct MSM5232interface msm5232_interface =
|
||||
};
|
||||
|
||||
static MACHINE_DRIVER_START( bigevglf )
|
||||
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("main", Z80,10000000/2) /* 5 MHz ? */
|
||||
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
|
||||
MDRV_CPU_IO_MAP(bigevglf_readport,bigevglf_writeport)
|
||||
MDRV_CPU_PROGRAM_MAP(main_map,0)
|
||||
MDRV_CPU_IO_MAP(bigevglf_portmap,0)
|
||||
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) /* vblank */
|
||||
|
||||
MDRV_CPU_ADD("sub", Z80,10000000/2) /* 5 MHz ? */
|
||||
MDRV_CPU_PROGRAM_MAP(readmem_sub,writemem_sub)
|
||||
MDRV_CPU_IO_MAP(bigevglf_sub_readport,bigevglf_sub_writeport)
|
||||
MDRV_CPU_PROGRAM_MAP(sub_map,0)
|
||||
MDRV_CPU_IO_MAP(bigevglf_sub_portmap,0)
|
||||
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) /* vblank */
|
||||
|
||||
MDRV_CPU_ADD("audio", Z80,8000000/2) /* 4 MHz ? */
|
||||
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
|
||||
MDRV_CPU_PROGRAM_MAP(sound_map,0)
|
||||
MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2) /* IRQ generated by ???;
|
||||
2 irqs/frame give good music tempo but also SOUND ERROR in test mode,
|
||||
4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */
|
||||
|
||||
MDRV_CPU_ADD("mcu", M68705,2000000) /* ??? */
|
||||
MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
|
||||
MDRV_CPU_PROGRAM_MAP(m68705_map,0)
|
||||
|
||||
MDRV_INTERLEAVE(10) /* 10 CPU slices per frame - interleaving is forced on the fly */
|
||||
|
||||
|
||||
@ -43,67 +43,49 @@ VIDEO_UPDATE(bigstrkb);
|
||||
|
||||
/* some regions might be too large */
|
||||
|
||||
static ADDRESS_MAP_START( bigstrkb_readmem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
|
||||
/* most region sizes are unknown */
|
||||
// AM_RANGE(0x0c0000, 0x0cffff) AM_READ(megasys1_vregs_C_r)
|
||||
AM_RANGE(0x0D0000, 0x0dffff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0x0E0000, 0x0E3fff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0x0e8000, 0x0ebfff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0x0ec000, 0x0effff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0x1f0000, 0x1fffff) AM_READ(SMH_RAM)
|
||||
static ADDRESS_MAP_START( bigstrkb_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
// AM_RANGE(0x0c0000, 0x0cffff) AM_READWRITE(megasys1_vregs_C_r, megasys1_vregs_C_w) AM_BASE(&megasys1_vregs)
|
||||
|
||||
AM_RANGE(0x0C2004, 0x0C2005) AM_WRITENOP
|
||||
AM_RANGE(0x0C200C, 0x0C200d) AM_WRITENOP
|
||||
AM_RANGE(0x0C2104, 0x0C2105) AM_WRITENOP
|
||||
AM_RANGE(0x0C2108, 0x0C2109) AM_WRITENOP
|
||||
AM_RANGE(0x0C2200, 0x0C2201) AM_WRITENOP
|
||||
AM_RANGE(0x0C2208, 0x0C2209) AM_WRITENOP
|
||||
AM_RANGE(0x0c2308, 0x0c2309) AM_WRITENOP // bit 0 of DSW1 (flip screen) - use vregs
|
||||
|
||||
AM_RANGE(0x0D0000, 0x0dffff) AM_RAM // 0xd2000 - 0xd3fff? 0xd8000?
|
||||
|
||||
AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM_WRITE(bsb_videoram2_w) AM_BASE(&bsb_videoram2)
|
||||
AM_RANGE(0x0e8000, 0x0ebfff) AM_RAM_WRITE(bsb_videoram3_w) AM_BASE(&bsb_videoram3)
|
||||
AM_RANGE(0x0ec000, 0x0effff) AM_RAM_WRITE(bsb_videoram_w) AM_BASE(&bsb_videoram)
|
||||
|
||||
AM_RANGE(0x0f0000, 0x0f7fff) AM_RAM
|
||||
AM_RANGE(0x0f8000, 0x0f87ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0x0f8800, 0x0fffff) AM_RAM
|
||||
|
||||
AM_RANGE(0x1f0000, 0x1f7fff) AM_RAM
|
||||
AM_RANGE(0x1f8000, 0x1f87ff) AM_RAM AM_BASE(&bigstrkb_spriteram)
|
||||
AM_RANGE(0x1f8800, 0x1fffff) AM_RAM
|
||||
|
||||
AM_RANGE(0x700000, 0x700001) AM_READ(input_port_0_word_r) /* Dip 1 */
|
||||
AM_RANGE(0x700002, 0x700003) AM_READ(input_port_1_word_r) /* Dip 2 */
|
||||
AM_RANGE(0x700004, 0x700005) AM_READ(input_port_2_word_r) /* System */
|
||||
AM_RANGE(0x70000a, 0x70000b) AM_READ(input_port_4_word_r) /* Player 1 */
|
||||
AM_RANGE(0x70000c, 0x70000d) AM_READ(input_port_3_word_r) /* Player 2 */
|
||||
AM_RANGE(0x700020, 0x700027) AM_WRITEONLY AM_BASE(&bsb_vidreg1)
|
||||
AM_RANGE(0x700030, 0x700037) AM_WRITEONLY AM_BASE(&bsb_vidreg2)
|
||||
|
||||
AM_RANGE(0xE00000, 0xE00001) AM_READ(OKIM6295_status_0_lsb_r)
|
||||
AM_RANGE(0xE00002, 0xE00003) AM_READ(OKIM6295_status_1_lsb_r)
|
||||
AM_RANGE(0xB00000, 0xB00001) AM_WRITENOP
|
||||
|
||||
AM_RANGE(0xF00000, 0xFFFFFF) AM_READ(SMH_RAM) // main RAM
|
||||
ADDRESS_MAP_END
|
||||
AM_RANGE(0xE00000, 0xE00001) AM_READWRITE(OKIM6295_status_0_lsb_r, OKIM6295_data_0_lsb_w)
|
||||
AM_RANGE(0xE00002, 0xE00003) AM_READWRITE(OKIM6295_status_1_lsb_r, OKIM6295_data_1_lsb_w)
|
||||
|
||||
AM_RANGE(0xE00008, 0xE00009) AM_WRITENOP
|
||||
AM_RANGE(0xE0000c, 0xE0000d) AM_WRITENOP
|
||||
|
||||
static ADDRESS_MAP_START( bigstrkb_writemem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
|
||||
// AM_RANGE(0x0c0000, 0x0cffff) AM_WRITE(megasys1_vregs_C_w) AM_BASE(&megasys1_vregs)
|
||||
|
||||
AM_RANGE(0x0C2004, 0x0C2005) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0x0C200C, 0x0C200d) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0x0C2104, 0x0C2105) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0x0C2108, 0x0C2109) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0x0C2200, 0x0C2201) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0x0C2208, 0x0C2209) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0x0c2308, 0x0c2309) AM_WRITE(SMH_NOP) // bit 0 of DSW1 (flip screen) - use vregs
|
||||
|
||||
AM_RANGE(0x0D0000, 0x0dffff) AM_WRITE(SMH_RAM) // 0xd2000 - 0xd3fff? 0xd8000?
|
||||
|
||||
AM_RANGE(0x0e0000, 0x0e3fff) AM_WRITE(bsb_videoram2_w) AM_BASE(&bsb_videoram2)
|
||||
AM_RANGE(0x0e8000, 0x0ebfff) AM_WRITE(bsb_videoram3_w) AM_BASE(&bsb_videoram3)
|
||||
AM_RANGE(0x0ec000, 0x0effff) AM_WRITE(bsb_videoram_w) AM_BASE(&bsb_videoram)
|
||||
|
||||
AM_RANGE(0x0f0000, 0x0f7fff) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0x0f8000, 0x0f87ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0x0f8800, 0x0fffff) AM_WRITE(SMH_RAM)
|
||||
|
||||
AM_RANGE(0x1f0000, 0x1f7fff) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0x1f8000, 0x1f87ff) AM_WRITE(SMH_RAM) AM_BASE(&bigstrkb_spriteram)
|
||||
AM_RANGE(0x1f8800, 0x1fffff) AM_WRITE(SMH_RAM)
|
||||
|
||||
AM_RANGE(0x700020, 0x700027) AM_WRITE(SMH_RAM) AM_BASE(&bsb_vidreg1)
|
||||
AM_RANGE(0x700030, 0x700037) AM_WRITE(SMH_RAM) AM_BASE(&bsb_vidreg2)
|
||||
|
||||
AM_RANGE(0xB00000, 0xB00001) AM_WRITE(SMH_NOP)
|
||||
|
||||
AM_RANGE(0xE00000, 0xE00001) AM_WRITE(OKIM6295_data_0_lsb_w)
|
||||
AM_RANGE(0xE00002, 0xE00003) AM_WRITE(OKIM6295_data_1_lsb_w)
|
||||
|
||||
AM_RANGE(0xE00008, 0xE00009) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0xE0000c, 0xE0000d) AM_WRITE(SMH_NOP)
|
||||
|
||||
AM_RANGE(0xF00000, 0xFFFFFF) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0xF00000, 0xFFFFFF) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
#define BIGSTRKB_PLAYER_INPUT( player, start ) \
|
||||
@ -223,7 +205,7 @@ GFXDECODE_END
|
||||
|
||||
static MACHINE_DRIVER_START( bigstrkb )
|
||||
MDRV_CPU_ADD("main", M68000, 12000000)
|
||||
MDRV_CPU_PROGRAM_MAP(bigstrkb_readmem,bigstrkb_writemem)
|
||||
MDRV_CPU_PROGRAM_MAP(bigstrkb_map,0)
|
||||
MDRV_CPU_VBLANK_INT("main", irq6_line_hold)
|
||||
|
||||
MDRV_GFXDECODE(bigstrkb)
|
||||
|
||||
@ -144,52 +144,32 @@ static INTERRUPT_GEN( bionicc_interrupt )
|
||||
cpunum_set_input_line(machine, 0, 4, HOLD_LINE);
|
||||
}
|
||||
|
||||
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) /* 68000 ROM */
|
||||
AM_RANGE(0xfe0000, 0xfe07ff) AM_READ(SMH_RAM) /* RAM? */
|
||||
AM_RANGE(0xfe0800, 0xfe0cff) AM_READ(SMH_RAM) /* sprites */
|
||||
AM_RANGE(0xfe0d00, 0xfe3fff) AM_READ(SMH_RAM) /* RAM? */
|
||||
static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0xfe0000, 0xfe07ff) AM_RAM /* RAM? */
|
||||
AM_RANGE(0xfe0800, 0xfe0cff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
|
||||
AM_RANGE(0xfe0d00, 0xfe3fff) AM_RAM /* RAM? */
|
||||
AM_RANGE(0xfe4000, 0xfe4001) AM_WRITE(bionicc_gfxctrl_w) /* + coin counters */
|
||||
AM_RANGE(0xfe4000, 0xfe4001) AM_READ(input_port_0_word_r)
|
||||
AM_RANGE(0xfe4002, 0xfe4003) AM_READ(input_port_1_word_r)
|
||||
AM_RANGE(0xfec000, 0xfecfff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0xff0000, 0xff3fff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0xff4000, 0xff7fff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0xff8000, 0xff87ff) AM_READ(SMH_RAM)
|
||||
AM_RANGE(0xffc000, 0xfffff7) AM_READ(SMH_RAM) /* working RAM */
|
||||
AM_RANGE(0xfffff8, 0xfffff9) AM_READ(hacked_soundcommand_r) /* hack */
|
||||
AM_RANGE(0xfffffa, 0xffffff) AM_READ(hacked_controls_r) /* hack */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
|
||||
AM_RANGE(0xfe0000, 0xfe07ff) AM_WRITE(SMH_RAM) /* RAM? */
|
||||
AM_RANGE(0xfe0800, 0xfe0cff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
|
||||
AM_RANGE(0xfe0d00, 0xfe3fff) AM_WRITE(SMH_RAM) /* RAM? */
|
||||
AM_RANGE(0xfe4000, 0xfe4001) AM_WRITE(bionicc_gfxctrl_w) /* + coin counters */
|
||||
AM_RANGE(0xfe8010, 0xfe8017) AM_WRITE(bionicc_scroll_w)
|
||||
AM_RANGE(0xfe801a, 0xfe801b) AM_WRITE(bionicc_mpu_trigger_w) /* ??? not sure, but looks like it */
|
||||
AM_RANGE(0xfec000, 0xfecfff) AM_WRITE(bionicc_txvideoram_w) AM_BASE(&bionicc_txvideoram)
|
||||
AM_RANGE(0xff0000, 0xff3fff) AM_WRITE(bionicc_fgvideoram_w) AM_BASE(&bionicc_fgvideoram)
|
||||
AM_RANGE(0xff4000, 0xff7fff) AM_WRITE(bionicc_bgvideoram_w) AM_BASE(&bionicc_bgvideoram)
|
||||
AM_RANGE(0xff8000, 0xff87ff) AM_WRITE(bionicc_paletteram_w) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0xffc000, 0xfffff7) AM_WRITE(SMH_RAM) /* working RAM */
|
||||
AM_RANGE(0xfffff8, 0xfffff9) AM_WRITE(hacked_soundcommand_w) /* hack */
|
||||
AM_RANGE(0xfffffa, 0xffffff) AM_WRITE(hacked_controls_w) /* hack */
|
||||
AM_RANGE(0xfec000, 0xfecfff) AM_RAM_WRITE(bionicc_txvideoram_w) AM_BASE(&bionicc_txvideoram)
|
||||
AM_RANGE(0xff0000, 0xff3fff) AM_RAM_WRITE(bionicc_fgvideoram_w) AM_BASE(&bionicc_fgvideoram)
|
||||
AM_RANGE(0xff4000, 0xff7fff) AM_RAM_WRITE(bionicc_bgvideoram_w) AM_BASE(&bionicc_bgvideoram)
|
||||
AM_RANGE(0xff8000, 0xff87ff) AM_RAM_WRITE(bionicc_paletteram_w) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0xffc000, 0xfffff7) AM_RAM /* working RAM */
|
||||
AM_RANGE(0xfffff8, 0xfffff9) AM_READWRITE(hacked_soundcommand_r, hacked_soundcommand_w) /* hack */
|
||||
AM_RANGE(0xfffffa, 0xffffff) AM_READWRITE(hacked_controls_r, hacked_controls_w) /* hack */
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
|
||||
AM_RANGE(0x8001, 0x8001) AM_READ(YM2151_status_port_0_r)
|
||||
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
|
||||
AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
|
||||
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x8000) AM_WRITE(YM2151_register_port_0_w)
|
||||
AM_RANGE(0x8001, 0x8001) AM_WRITE(YM2151_data_port_0_w)
|
||||
AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
|
||||
AM_RANGE(0x8001, 0x8001) AM_READWRITE(YM2151_status_port_0_r, YM2151_data_port_0_w)
|
||||
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
|
||||
AM_RANGE(0xc000, 0xc7ff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -347,12 +327,11 @@ static MACHINE_DRIVER_START( bionicc )
|
||||
|
||||
/* basic machine hardware */
|
||||
MDRV_CPU_ADD("main", M68000, MASTER_CLOCK / 2) /* 12 MHz - verified in schematics */
|
||||
MDRV_CPU_PROGRAM_MAP(readmem,writemem)
|
||||
MDRV_CPU_PROGRAM_MAP(main_map,0)
|
||||
MDRV_CPU_VBLANK_INT_HACK(bionicc_interrupt,8)
|
||||
|
||||
/* audio CPU */
|
||||
MDRV_CPU_ADD("audio", Z80, EXO3_F0_CLK / 4) /* EXO3 C,B=GND, A=5V ==> Divisor 2^2 */
|
||||
MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
|
||||
MDRV_CPU_PROGRAM_MAP(sound_map,0)
|
||||
/* FIXME: interrupt timing
|
||||
* schematics indicate that nmi_line is set on M680000 access with AB1=1
|
||||
* and IOCS=0 (active low), see pages A-1/10, A-4/10 in schematics
|
||||
|
||||
Loading…
Reference in New Issue
Block a user