Removed memory context switch. Let the fun begin.
This commit is contained in:
Aaron Giles
parent
c631cfbab0
commit
5e980fa67b
@ -169,7 +169,6 @@ INLINE void pc_stack_pop(adsp2100_state *adsp)
|
||||
adsp->sstat |= PC_EMPTY;
|
||||
}
|
||||
adsp->pc = adsp->pc_stack[adsp->pc_sp];
|
||||
CHANGEPC(adsp);
|
||||
}
|
||||
|
||||
INLINE UINT32 pc_stack_pop_val(adsp2100_state *adsp)
|
||||
|
||||
@ -329,8 +329,6 @@ INLINE void WWORD_PGM(adsp2100_state *adsp, UINT32 addr, UINT32 data)
|
||||
|
||||
#define ROPCODE(a) memory_decrypted_read_dword((a)->program, (a)->pc << 2)
|
||||
|
||||
#define CHANGEPC(a) change_pc((a)->pc << 2)
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
IMPORT CORE UTILITIES
|
||||
@ -359,7 +357,6 @@ INLINE int adsp2100_generate_irq(adsp2100_state *adsp, int which)
|
||||
|
||||
/* vector to location & stop idling */
|
||||
adsp->pc = which;
|
||||
CHANGEPC(adsp);
|
||||
adsp->idle = 0;
|
||||
|
||||
/* mask other interrupts based on the nesting bit */
|
||||
@ -385,7 +382,6 @@ INLINE int adsp2101_generate_irq(adsp2100_state *adsp, int which, int indx)
|
||||
|
||||
/* vector to location & stop idling */
|
||||
adsp->pc = 0x04 + indx * 4;
|
||||
CHANGEPC(adsp);
|
||||
adsp->idle = 0;
|
||||
|
||||
/* mask other interrupts based on the nesting bit */
|
||||
@ -411,7 +407,6 @@ INLINE int adsp2181_generate_irq(adsp2100_state *adsp, int which, int indx)
|
||||
|
||||
/* vector to location & stop idling */
|
||||
adsp->pc = 0x04 + indx * 4;
|
||||
CHANGEPC(adsp);
|
||||
adsp->idle = 0;
|
||||
|
||||
/* mask other interrupts based on the nesting bit */
|
||||
@ -750,7 +745,6 @@ static CPU_RESET( adsp21xx )
|
||||
adsp->chip_type = CHIP_TYPE_ADSP2100;
|
||||
break;
|
||||
}
|
||||
CHANGEPC(adsp);
|
||||
|
||||
adsp->ppc = -1;
|
||||
adsp->loop = 0xffff;
|
||||
@ -917,7 +911,6 @@ static CPU_EXECUTE( adsp21xx )
|
||||
int check_debugger = ((device->machine->debug_flags & DEBUG_FLAG_ENABLED) != 0);
|
||||
adsp2100_state *adsp = device->token;
|
||||
|
||||
CHANGEPC(adsp);
|
||||
check_irqs(adsp);
|
||||
|
||||
/* reset the core */
|
||||
@ -1017,7 +1010,6 @@ static CPU_EXECUTE( adsp21xx )
|
||||
if (op & 0x000001)
|
||||
pc_stack_push(adsp);
|
||||
adsp->pc = ((op >> 4) & 0x0fff) | ((op << 10) & 0x3000);
|
||||
CHANGEPC(adsp);
|
||||
}
|
||||
}
|
||||
else
|
||||
@ -1027,7 +1019,6 @@ static CPU_EXECUTE( adsp21xx )
|
||||
if (op & 0x000001)
|
||||
pc_stack_push(adsp);
|
||||
adsp->pc = ((op >> 4) & 0x0fff) | ((op << 10) & 0x3000);
|
||||
CHANGEPC(adsp);
|
||||
}
|
||||
}
|
||||
break;
|
||||
@ -1112,7 +1103,6 @@ static CPU_EXECUTE( adsp21xx )
|
||||
if (op & 0x000010)
|
||||
pc_stack_push(adsp);
|
||||
adsp->pc = adsp->i[4 + ((op >> 6) & 3)] & 0x3fff;
|
||||
CHANGEPC(adsp);
|
||||
}
|
||||
break;
|
||||
case 0x0c:
|
||||
@ -1197,7 +1187,6 @@ static CPU_EXECUTE( adsp21xx )
|
||||
if (CONDITION(adsp, op & 15))
|
||||
{
|
||||
adsp->pc = (op >> 4) & 0x3fff;
|
||||
CHANGEPC(adsp);
|
||||
/* check for a busy loop */
|
||||
if (adsp->pc == adsp->ppc)
|
||||
adsp->icount = 0;
|
||||
@ -1209,7 +1198,6 @@ static CPU_EXECUTE( adsp21xx )
|
||||
{
|
||||
pc_stack_push(adsp);
|
||||
adsp->pc = (op >> 4) & 0x3fff;
|
||||
CHANGEPC(adsp);
|
||||
}
|
||||
break;
|
||||
case 0x20: case 0x21:
|
||||
|
||||
@ -286,7 +286,6 @@ INLINE void M_JMP(UINT8 dat)
|
||||
PCL = dat;
|
||||
/* update pc page */
|
||||
R.pc.b.h = R.ix0.b.h = R.ix1.b.h = R.ix2.b.h = R.mb & 3;
|
||||
change_pc(PC);
|
||||
}
|
||||
|
||||
INLINE void M_UNDEFINED(void)
|
||||
@ -844,7 +843,6 @@ static void set_irq_line(int irqline, int state)
|
||||
{
|
||||
R.halt = (state==ASSERT_LINE) ? 1 : 0;
|
||||
/* mame_printf_debug("ALPHA8201 HALT %d\n",R.halt); */
|
||||
change_pc(PC);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -179,6 +179,7 @@ enum
|
||||
struct _drcbe_state
|
||||
{
|
||||
const device_config * device; /* CPU device we are associated with */
|
||||
const address_space * space[ADDRESS_SPACES]; /* pointers to CPU's address space */
|
||||
drcuml_state * drcuml; /* pointer back to our owner */
|
||||
drccache * cache; /* pointer to the cache */
|
||||
drcuml_machine_state state; /* state of the machine */
|
||||
@ -307,6 +308,8 @@ const drcbe_interface drcbe_c_be_interface =
|
||||
|
||||
static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, const device_config *device, UINT32 flags, int modes, int addrbits, int ignorebits)
|
||||
{
|
||||
int spacenum;
|
||||
|
||||
/* allocate space in the cache for our state */
|
||||
drcbe_state *drcbe = drccache_memory_alloc(cache, sizeof(*drcbe));
|
||||
if (drcbe == NULL)
|
||||
@ -315,6 +318,8 @@ static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, const de
|
||||
|
||||
/* remember our pointers */
|
||||
drcbe->device = device;
|
||||
for (spacenum = 0; spacenum < ARRAY_LENGTH(drcbe->space); spacenum++)
|
||||
drcbe->space[spacenum] = memory_find_address_space(device, spacenum);
|
||||
drcbe->drcuml = drcuml;
|
||||
drcbe->cache = cache;
|
||||
|
||||
@ -756,43 +761,43 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READ1, 4, 0): /* READ dst,src1,space_BYTE */
|
||||
PARAM0 = memory_read_byte(active_address_space[PARAM2 / 16], PARAM1);
|
||||
PARAM0 = memory_read_byte(drcbe->space[PARAM2 / 16], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READ2, 4, 0): /* READ dst,src1,space_WORD */
|
||||
PARAM0 = memory_read_word(active_address_space[PARAM2 / 16], PARAM1);
|
||||
PARAM0 = memory_read_word(drcbe->space[PARAM2 / 16], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READ4, 4, 0): /* READ dst,src1,space_DWORD */
|
||||
PARAM0 = memory_read_dword(active_address_space[PARAM2 / 16], PARAM1);
|
||||
PARAM0 = memory_read_dword(drcbe->space[PARAM2 / 16], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READM2, 4, 0): /* READM dst,src1,mask,space_WORD */
|
||||
PARAM0 = memory_read_word_masked(active_address_space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
PARAM0 = memory_read_word_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READM4, 4, 0): /* READM dst,src1,mask,space_DWORD */
|
||||
PARAM0 = memory_read_dword_masked(active_address_space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
PARAM0 = memory_read_dword_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE1, 4, 0): /* WRITE dst,src1,space_BYTE */
|
||||
memory_write_byte(active_address_space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
memory_write_byte(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE2, 4, 0): /* WRITE dst,src1,space_WORD */
|
||||
memory_write_word(active_address_space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
memory_write_word(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE4, 4, 0): /* WRITE dst,src1,space_DWORD */
|
||||
memory_write_dword(active_address_space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
memory_write_dword(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM2, 4, 0): /* WRITEM dst,src1,mask,space_WORD */
|
||||
memory_write_word_masked(active_address_space[PARAM3 / 16], PARAM0, PARAM1, PARAM2);
|
||||
memory_write_word_masked(drcbe->space[PARAM3 / 16], PARAM0, PARAM1, PARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM4, 4, 0): /* WRITEM dst,src1,mask,space_DWORD */
|
||||
memory_write_dword_masked(active_address_space[PARAM3 / 16], PARAM0, PARAM1, PARAM2);
|
||||
memory_write_dword_masked(drcbe->space[PARAM3 / 16], PARAM0, PARAM1, PARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_CARRY, 4, 1): /* CARRY src,bitnum */
|
||||
@ -1187,59 +1192,59 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READ1, 8, 0): /* DREAD dst,src1,space_BYTE */
|
||||
DPARAM0 = memory_read_byte(active_address_space[PARAM2 / 16], PARAM1);
|
||||
DPARAM0 = memory_read_byte(drcbe->space[PARAM2 / 16], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READ2, 8, 0): /* DREAD dst,src1,space_WORD */
|
||||
DPARAM0 = memory_read_word(active_address_space[PARAM2 / 16], PARAM1);
|
||||
DPARAM0 = memory_read_word(drcbe->space[PARAM2 / 16], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READ4, 8, 0): /* DREAD dst,src1,space_DWORD */
|
||||
DPARAM0 = memory_read_dword(active_address_space[PARAM2 / 16], PARAM1);
|
||||
DPARAM0 = memory_read_dword(drcbe->space[PARAM2 / 16], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READ8, 8, 0): /* DREAD dst,src1,space_QOWRD */
|
||||
DPARAM0 = memory_read_qword(active_address_space[PARAM2 / 16], PARAM1);
|
||||
DPARAM0 = memory_read_qword(drcbe->space[PARAM2 / 16], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READM2, 8, 0): /* DREADM dst,src1,mask,space_WORD */
|
||||
DPARAM0 = memory_read_word_masked(active_address_space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
DPARAM0 = memory_read_word_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READM4, 8, 0): /* DREADM dst,src1,mask,space_DWORD */
|
||||
DPARAM0 = memory_read_dword_masked(active_address_space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
DPARAM0 = memory_read_dword_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_READM8, 8, 0): /* DREADM dst,src1,mask,space_QWORD */
|
||||
DPARAM0 = memory_read_qword_masked(active_address_space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
DPARAM0 = memory_read_qword_masked(drcbe->space[PARAM3 / 16], PARAM1, PARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE1, 8, 0): /* DWRITE dst,src1,space_BYTE */
|
||||
memory_write_byte(active_address_space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
memory_write_byte(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE2, 8, 0): /* DWRITE dst,src1,space_WORD */
|
||||
memory_write_word(active_address_space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
memory_write_word(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE4, 8, 0): /* DWRITE dst,src1,space_DWORD */
|
||||
memory_write_dword(active_address_space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
memory_write_dword(drcbe->space[PARAM2 / 16], PARAM0, PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITE8, 8, 0): /* DWRITE dst,src1,space_QWORD */
|
||||
memory_write_qword(active_address_space[PARAM2 / 16], PARAM0, DPARAM1);
|
||||
memory_write_qword(drcbe->space[PARAM2 / 16], PARAM0, DPARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM2, 8, 0): /* DWRITEM dst,src1,mask,space_WORD */
|
||||
memory_write_word_masked(active_address_space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
|
||||
memory_write_word_masked(drcbe->space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM4, 8, 0): /* DWRITEM dst,src1,mask,space_DWORD */
|
||||
memory_write_dword_masked(active_address_space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
|
||||
memory_write_dword_masked(drcbe->space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_WRITEM8, 8, 0): /* DWRITEM dst,src1,mask,space_QWORD */
|
||||
memory_write_qword_masked(active_address_space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
|
||||
memory_write_qword_masked(drcbe->space[PARAM3 / 16], PARAM0, DPARAM1, DPARAM2);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_CARRY, 8, 0): /* DCARRY src,bitnum */
|
||||
@ -1600,11 +1605,11 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_FREAD, 4, 0): /* FSREAD dst,src1,space */
|
||||
PARAM0 = memory_read_dword(active_address_space[PARAM2], PARAM1);
|
||||
PARAM0 = memory_read_dword(drcbe->space[PARAM2], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_FWRITE, 4, 0): /* FSWRITE dst,src1,space */
|
||||
memory_write_dword(active_address_space[PARAM2], PARAM0, PARAM1);
|
||||
memory_write_dword(drcbe->space[PARAM2], PARAM0, PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_FMOV, 4, 1): /* FSMOV dst,src[,c] */
|
||||
@ -1735,11 +1740,11 @@ static int drcbec_execute(drcbe_state *drcbe, drcuml_codehandle *entry)
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_FREAD, 8, 0): /* FDREAD dst,src1,space */
|
||||
DPARAM0 = memory_read_qword(active_address_space[PARAM2], PARAM1);
|
||||
DPARAM0 = memory_read_qword(drcbe->space[PARAM2], PARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_FWRITE, 8, 0): /* FDWRITE dst,src1,space */
|
||||
memory_write_qword(active_address_space[PARAM2], PARAM0, DPARAM1);
|
||||
memory_write_qword(drcbe->space[PARAM2], PARAM0, DPARAM1);
|
||||
break;
|
||||
|
||||
case MAKE_OPCODE_SHORT(DRCUML_OP_FMOV, 8, 1): /* FDMOV dst,src[,c] */
|
||||
|
||||
@ -712,11 +712,11 @@ static drcbe_state *drcbex64_alloc(drcuml_state *drcuml, drccache *cache, const
|
||||
|
||||
/* get address spaces and accessors */
|
||||
for (spacenum = 0; spacenum < ADDRESS_SPACES; spacenum++)
|
||||
if (active_address_space[spacenum] != NULL)
|
||||
{
|
||||
drcbe->accessors[spacenum] = active_address_space[spacenum]->accessors;
|
||||
drcbe->space[spacenum] = active_address_space[spacenum];
|
||||
}
|
||||
{
|
||||
drcbe->space[spacenum] = memory_find_address_space(device, spacenum);
|
||||
if (drcbe->space[spacenum] != NULL)
|
||||
drcbe->accessors[spacenum] = drcbe->space[spacenum]->accessors;
|
||||
}
|
||||
|
||||
/* build up necessary arrays */
|
||||
memcpy(drcbe->ssecontrol, sse_control, sizeof(drcbe->ssecontrol));
|
||||
|
||||
@ -552,7 +552,7 @@ static drcbe_state *drcbex86_alloc(drcuml_state *drcuml, drccache *cache, const
|
||||
|
||||
/* get address spaces */
|
||||
for (spacenum = 0; spacenum < ADDRESS_SPACES; spacenum++)
|
||||
drcbe->space[spacenum] = active_address_space[spacenum];
|
||||
drcbe->space[spacenum] = memory_find_address_space(device, spacenum);
|
||||
|
||||
/* allocate hash tables */
|
||||
drcbe->hash = drchash_alloc(cache, modes, addrbits, ignorebits);
|
||||
|
||||
@ -1405,6 +1405,7 @@ static CPU_RESET( i8085 )
|
||||
I.sid_callback = save_sidcallback;
|
||||
I.device = device;
|
||||
I.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
|
||||
I.io = memory_find_address_space(device, ADDRESS_SPACE_IO);
|
||||
change_pc(I.PC.d);
|
||||
|
||||
I.cputype = cputype_bak;
|
||||
|
||||
@ -98,7 +98,7 @@ void pic16c5x_config(int data);
|
||||
* that use different encoding mechanisms for opcodes and opcode arguments
|
||||
*/
|
||||
|
||||
#define PIC16C5x_RDOP_ARG(A) (program_raw_read_word(R.program, (A)<<1))
|
||||
#define PIC16C5x_RDOP_ARG(A) (memory_raw_read_word(R.program, (A)<<1))
|
||||
|
||||
|
||||
|
||||
|
||||
@ -30,5 +30,3 @@ enum
|
||||
// SC61860_NMI_STATE,
|
||||
// SC61860_IRQ_STATE
|
||||
};
|
||||
|
||||
#define PEEK_OP(pc) program_decrypted_read_byte(pc)
|
||||
|
||||
@ -28,7 +28,7 @@
|
||||
/*****************************************************************************
|
||||
Changes
|
||||
20051129 Mariusz Wojcieszek
|
||||
- introduced program_decrypted_read_word() for opcode fetching
|
||||
- introduced memory_decrypted_read_word() for opcode fetching
|
||||
|
||||
20050813 Mariusz Wojcieszek
|
||||
- fixed 64 bit / 32 bit division in division unit
|
||||
|
||||
@ -980,7 +980,6 @@ INLINE void set_cpu_context(const device_config *oldcpu, const device_config *ne
|
||||
|
||||
/* set the memory context and swap in the new */
|
||||
classheader = newcpu->classtoken;
|
||||
memory_set_context(newcpu->machine, classheader->index);
|
||||
(*classheader->set_context)(newcpu->token);
|
||||
}
|
||||
else
|
||||
@ -1150,7 +1149,6 @@ void cpu_init(const device_config *device, int index, int clock, cpu_irq_callbac
|
||||
classheader->space[ADDRESS_SPACE_DATA] = memory_find_address_space(device, ADDRESS_SPACE_DATA);
|
||||
classheader->space[ADDRESS_SPACE_IO] = memory_find_address_space(device, ADDRESS_SPACE_IO);
|
||||
|
||||
memory_set_context(device->machine, index);
|
||||
device->machine->activecpu = device;
|
||||
|
||||
(*classheader->init)(device, index, clock, irqcallback);
|
||||
|
||||
2299
src/emu/memory.c
2299
src/emu/memory.c
File diff suppressed because it is too large
Load Diff
419
src/emu/memory.h
419
src/emu/memory.h
@ -497,58 +497,13 @@ union _addrmap64_token
|
||||
|
||||
|
||||
/* bank switching for CPU cores */
|
||||
#define change_pc(byteaddress) do { /*memory_set_direct_region(active_address_space[ADDRESS_SPACE_PROGRAM], byteaddress)*/ } while (0)
|
||||
#define change_pc(byteaddress) do {} while (0)
|
||||
|
||||
|
||||
/* opcode range safety check */
|
||||
#define address_is_unsafe(S,A) ((UNEXPECTED((A) < (S)->direct.min) || UNEXPECTED((A) > (S)->direct.max)))
|
||||
|
||||
|
||||
/* temporary shortcuts for accessing the active address space */
|
||||
#ifndef NO_LEGACY_MEMORY_HANDLERS
|
||||
#define program_read_byte(_addr) memory_read_byte(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_read_word(_addr) memory_read_word(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_read_dword(_addr) memory_read_dword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_read_qword(_addr) memory_read_qword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
|
||||
#define program_write_byte(_addr,_data) memory_write_byte(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr), (_data))
|
||||
#define program_write_word(_addr,_data) memory_write_word(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr), (_data))
|
||||
#define program_write_dword(_addr,_data) memory_write_dword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr), (_data))
|
||||
#define program_write_qword(_addr,_data) memory_write_qword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr), (_data))
|
||||
|
||||
#define program_decrypted_read_ptr(_addr) memory_decrypted_read_ptr(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_decrypted_read_byte(_addr) memory_decrypted_read_byte(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_decrypted_read_word(_addr) memory_decrypted_read_word(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_decrypted_read_dword(_addr) memory_decrypted_read_dword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_decrypted_read_qword(_addr) memory_decrypted_read_qword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
|
||||
#define program_raw_read_ptr(_addr) memory_raw_read_ptr(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_raw_read_byte(_addr) memory_raw_read_byte(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_raw_read_word(_addr) memory_raw_read_word(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_raw_read_dword(_addr) memory_raw_read_dword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
#define program_raw_read_qword(_addr) memory_raw_read_qword(active_address_space[ADDRESS_SPACE_PROGRAM], (_addr))
|
||||
|
||||
#define data_read_byte(_addr) memory_read_byte(active_address_space[ADDRESS_SPACE_DATA], (_addr))
|
||||
#define data_read_word(_addr) memory_read_word(active_address_space[ADDRESS_SPACE_DATA], (_addr))
|
||||
#define data_read_dword(_addr) memory_read_dword(active_address_space[ADDRESS_SPACE_DATA], (_addr))
|
||||
#define data_read_qword(_addr) memory_read_qword(active_address_space[ADDRESS_SPACE_DATA], (_addr))
|
||||
|
||||
#define data_write_byte(_addr,_data) memory_write_byte(active_address_space[ADDRESS_SPACE_DATA], (_addr), (_data))
|
||||
#define data_write_word(_addr,_data) memory_write_word(active_address_space[ADDRESS_SPACE_DATA], (_addr), (_data))
|
||||
#define data_write_dword(_addr,_data) memory_write_dword(active_address_space[ADDRESS_SPACE_DATA], (_addr), (_data))
|
||||
#define data_write_qword(_addr,_data) memory_write_qword(active_address_space[ADDRESS_SPACE_DATA], (_addr), (_data))
|
||||
|
||||
#define io_read_byte(_addr) memory_read_byte(active_address_space[ADDRESS_SPACE_IO], (_addr))
|
||||
#define io_read_word(_addr) memory_read_word(active_address_space[ADDRESS_SPACE_IO], (_addr))
|
||||
#define io_read_dword(_addr) memory_read_dword(active_address_space[ADDRESS_SPACE_IO], (_addr))
|
||||
#define io_read_qword(_addr) memory_read_qword(active_address_space[ADDRESS_SPACE_IO], (_addr))
|
||||
|
||||
#define io_write_byte(_addr,_data) memory_write_byte(active_address_space[ADDRESS_SPACE_IO], (_addr), (_data))
|
||||
#define io_write_word(_addr,_data) memory_write_word(active_address_space[ADDRESS_SPACE_IO], (_addr), (_data))
|
||||
#define io_write_dword(_addr,_data) memory_write_dword(active_address_space[ADDRESS_SPACE_IO], (_addr), (_data))
|
||||
#define io_write_qword(_addr,_data) memory_write_qword(active_address_space[ADDRESS_SPACE_IO], (_addr), (_data))
|
||||
#endif
|
||||
|
||||
/* wrappers for dynamic read handler installation */
|
||||
#define memory_install_read_handler(space, start, end, mask, mirror, rhandler) \
|
||||
_memory_install_handler(space, start, end, mask, mirror, rhandler, (FPTR)NULL, #rhandler, NULL)
|
||||
@ -883,8 +838,6 @@ union _addrmap64_token
|
||||
GLOBAL VARIABLES
|
||||
***************************************************************************/
|
||||
|
||||
extern const address_space * active_address_space[]; /* address spaces */
|
||||
|
||||
extern const char *const address_space_names[ADDRESS_SPACES];
|
||||
|
||||
|
||||
@ -902,9 +855,6 @@ void memory_init(running_machine *machine);
|
||||
/* find an address space in our internal list; for faster access use cpu_get_address_space() */
|
||||
const address_space *memory_find_address_space(const device_config *cpu, int spacenum);
|
||||
|
||||
/* set the current memory context - soon to be deprecated */
|
||||
void memory_set_context(running_machine *machine, int activecpu);
|
||||
|
||||
|
||||
|
||||
/* ----- address maps ----- */
|
||||
@ -1312,371 +1262,4 @@ void memory_write_dword_masked_64be(const address_space *space, offs_t address,
|
||||
void memory_write_qword_64be(const address_space *space, offs_t address, UINT64 data);
|
||||
void memory_write_qword_masked_64be(const address_space *space, offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
#ifndef NO_LEGACY_MEMORY_HANDLERS
|
||||
/* declare program address space handlers */
|
||||
UINT8 program_read_byte_8le(offs_t address);
|
||||
UINT16 program_read_word_8le(offs_t address);
|
||||
UINT16 program_read_word_masked_8le(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_8le(offs_t address);
|
||||
UINT32 program_read_dword_masked_8le(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_8le(offs_t address);
|
||||
UINT64 program_read_qword_masked_8le(offs_t address, UINT64 mask);
|
||||
void program_write_byte_8le(offs_t address, UINT8 data);
|
||||
void program_write_word_8le(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_8le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_8le(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_8le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_8le(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_8le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 program_read_byte_8be(offs_t address);
|
||||
UINT16 program_read_word_8be(offs_t address);
|
||||
UINT16 program_read_word_masked_8be(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_8be(offs_t address);
|
||||
UINT32 program_read_dword_masked_8be(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_8be(offs_t address);
|
||||
UINT64 program_read_qword_masked_8be(offs_t address, UINT64 mask);
|
||||
void program_write_byte_8be(offs_t address, UINT8 data);
|
||||
void program_write_word_8be(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_8be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_8be(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_8be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_8be(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_8be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 program_read_byte_16le(offs_t address);
|
||||
UINT16 program_read_word_16le(offs_t address);
|
||||
UINT16 program_read_word_masked_16le(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_16le(offs_t address);
|
||||
UINT32 program_read_dword_masked_16le(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_16le(offs_t address);
|
||||
UINT64 program_read_qword_masked_16le(offs_t address, UINT64 mask);
|
||||
void program_write_byte_16le(offs_t address, UINT8 data);
|
||||
void program_write_word_16le(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_16le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_16le(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_16le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_16le(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_16le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 program_read_byte_16be(offs_t address);
|
||||
UINT16 program_read_word_16be(offs_t address);
|
||||
UINT16 program_read_word_masked_16be(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_16be(offs_t address);
|
||||
UINT32 program_read_dword_masked_16be(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_16be(offs_t address);
|
||||
UINT64 program_read_qword_masked_16be(offs_t address, UINT64 mask);
|
||||
void program_write_byte_16be(offs_t address, UINT8 data);
|
||||
void program_write_word_16be(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_16be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_16be(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_16be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_16be(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_16be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 program_read_byte_32le(offs_t address);
|
||||
UINT16 program_read_word_32le(offs_t address);
|
||||
UINT16 program_read_word_masked_32le(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_32le(offs_t address);
|
||||
UINT32 program_read_dword_masked_32le(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_32le(offs_t address);
|
||||
UINT64 program_read_qword_masked_32le(offs_t address, UINT64 mask);
|
||||
void program_write_byte_32le(offs_t address, UINT8 data);
|
||||
void program_write_word_32le(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_32le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_32le(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_32le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_32le(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_32le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 program_read_byte_32be(offs_t address);
|
||||
UINT16 program_read_word_32be(offs_t address);
|
||||
UINT16 program_read_word_masked_32be(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_32be(offs_t address);
|
||||
UINT32 program_read_dword_masked_32be(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_32be(offs_t address);
|
||||
UINT64 program_read_qword_masked_32be(offs_t address, UINT64 mask);
|
||||
void program_write_byte_32be(offs_t address, UINT8 data);
|
||||
void program_write_word_32be(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_32be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_32be(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_32be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_32be(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_32be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 program_read_byte_64le(offs_t address);
|
||||
UINT16 program_read_word_64le(offs_t address);
|
||||
UINT16 program_read_word_masked_64le(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_64le(offs_t address);
|
||||
UINT32 program_read_dword_masked_64le(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_64le(offs_t address);
|
||||
UINT64 program_read_qword_masked_64le(offs_t address, UINT64 mask);
|
||||
void program_write_byte_64le(offs_t address, UINT8 data);
|
||||
void program_write_word_64le(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_64le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_64le(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_64le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_64le(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_64le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 program_read_byte_64be(offs_t address);
|
||||
UINT16 program_read_word_64be(offs_t address);
|
||||
UINT16 program_read_word_masked_64be(offs_t address, UINT16 mask);
|
||||
UINT32 program_read_dword_64be(offs_t address);
|
||||
UINT32 program_read_dword_masked_64be(offs_t address, UINT32 mask);
|
||||
UINT64 program_read_qword_64be(offs_t address);
|
||||
UINT64 program_read_qword_masked_64be(offs_t address, UINT64 mask);
|
||||
void program_write_byte_64be(offs_t address, UINT8 data);
|
||||
void program_write_word_64be(offs_t address, UINT16 data);
|
||||
void program_write_word_masked_64be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void program_write_dword_64be(offs_t address, UINT32 data);
|
||||
void program_write_dword_masked_64be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void program_write_qword_64be(offs_t address, UINT64 data);
|
||||
void program_write_qword_masked_64be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
|
||||
/* declare data address space handlers */
|
||||
UINT8 data_read_byte_8le(offs_t address);
|
||||
UINT16 data_read_word_8le(offs_t address);
|
||||
UINT16 data_read_word_masked_8le(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_8le(offs_t address);
|
||||
UINT32 data_read_dword_masked_8le(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_8le(offs_t address);
|
||||
UINT64 data_read_qword_masked_8le(offs_t address, UINT64 mask);
|
||||
void data_write_byte_8le(offs_t address, UINT8 data);
|
||||
void data_write_word_8le(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_8le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_8le(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_8le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_8le(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_8le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 data_read_byte_8be(offs_t address);
|
||||
UINT16 data_read_word_8be(offs_t address);
|
||||
UINT16 data_read_word_masked_8be(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_8be(offs_t address);
|
||||
UINT32 data_read_dword_masked_8be(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_8be(offs_t address);
|
||||
UINT64 data_read_qword_masked_8be(offs_t address, UINT64 mask);
|
||||
void data_write_byte_8be(offs_t address, UINT8 data);
|
||||
void data_write_word_8be(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_8be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_8be(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_8be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_8be(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_8be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 data_read_byte_16le(offs_t address);
|
||||
UINT16 data_read_word_16le(offs_t address);
|
||||
UINT16 data_read_word_masked_16le(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_16le(offs_t address);
|
||||
UINT32 data_read_dword_masked_16le(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_16le(offs_t address);
|
||||
UINT64 data_read_qword_masked_16le(offs_t address, UINT64 mask);
|
||||
void data_write_byte_16le(offs_t address, UINT8 data);
|
||||
void data_write_word_16le(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_16le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_16le(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_16le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_16le(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_16le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 data_read_byte_16be(offs_t address);
|
||||
UINT16 data_read_word_16be(offs_t address);
|
||||
UINT16 data_read_word_masked_16be(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_16be(offs_t address);
|
||||
UINT32 data_read_dword_masked_16be(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_16be(offs_t address);
|
||||
UINT64 data_read_qword_masked_16be(offs_t address, UINT64 mask);
|
||||
void data_write_byte_16be(offs_t address, UINT8 data);
|
||||
void data_write_word_16be(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_16be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_16be(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_16be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_16be(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_16be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 data_read_byte_32le(offs_t address);
|
||||
UINT16 data_read_word_32le(offs_t address);
|
||||
UINT16 data_read_word_masked_32le(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_32le(offs_t address);
|
||||
UINT32 data_read_dword_masked_32le(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_32le(offs_t address);
|
||||
UINT64 data_read_qword_masked_32le(offs_t address, UINT64 mask);
|
||||
void data_write_byte_32le(offs_t address, UINT8 data);
|
||||
void data_write_word_32le(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_32le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_32le(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_32le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_32le(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_32le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 data_read_byte_32be(offs_t address);
|
||||
UINT16 data_read_word_32be(offs_t address);
|
||||
UINT16 data_read_word_masked_32be(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_32be(offs_t address);
|
||||
UINT32 data_read_dword_masked_32be(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_32be(offs_t address);
|
||||
UINT64 data_read_qword_masked_32be(offs_t address, UINT64 mask);
|
||||
void data_write_byte_32be(offs_t address, UINT8 data);
|
||||
void data_write_word_32be(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_32be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_32be(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_32be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_32be(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_32be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 data_read_byte_64le(offs_t address);
|
||||
UINT16 data_read_word_64le(offs_t address);
|
||||
UINT16 data_read_word_masked_64le(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_64le(offs_t address);
|
||||
UINT32 data_read_dword_masked_64le(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_64le(offs_t address);
|
||||
UINT64 data_read_qword_masked_64le(offs_t address, UINT64 mask);
|
||||
void data_write_byte_64le(offs_t address, UINT8 data);
|
||||
void data_write_word_64le(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_64le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_64le(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_64le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_64le(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_64le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 data_read_byte_64be(offs_t address);
|
||||
UINT16 data_read_word_64be(offs_t address);
|
||||
UINT16 data_read_word_masked_64be(offs_t address, UINT16 mask);
|
||||
UINT32 data_read_dword_64be(offs_t address);
|
||||
UINT32 data_read_dword_masked_64be(offs_t address, UINT32 mask);
|
||||
UINT64 data_read_qword_64be(offs_t address);
|
||||
UINT64 data_read_qword_masked_64be(offs_t address, UINT64 mask);
|
||||
void data_write_byte_64be(offs_t address, UINT8 data);
|
||||
void data_write_word_64be(offs_t address, UINT16 data);
|
||||
void data_write_word_masked_64be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void data_write_dword_64be(offs_t address, UINT32 data);
|
||||
void data_write_dword_masked_64be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void data_write_qword_64be(offs_t address, UINT64 data);
|
||||
void data_write_qword_masked_64be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
|
||||
/* declare io address space handlers */
|
||||
UINT8 io_read_byte_8le(offs_t address);
|
||||
UINT16 io_read_word_8le(offs_t address);
|
||||
UINT16 io_read_word_masked_8le(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_8le(offs_t address);
|
||||
UINT32 io_read_dword_masked_8le(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_8le(offs_t address);
|
||||
UINT64 io_read_qword_masked_8le(offs_t address, UINT64 mask);
|
||||
void io_write_byte_8le(offs_t address, UINT8 data);
|
||||
void io_write_word_8le(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_8le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_8le(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_8le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_8le(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_8le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 io_read_byte_8be(offs_t address);
|
||||
UINT16 io_read_word_8be(offs_t address);
|
||||
UINT16 io_read_word_masked_8be(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_8be(offs_t address);
|
||||
UINT32 io_read_dword_masked_8be(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_8be(offs_t address);
|
||||
UINT64 io_read_qword_masked_8be(offs_t address, UINT64 mask);
|
||||
void io_write_byte_8be(offs_t address, UINT8 data);
|
||||
void io_write_word_8be(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_8be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_8be(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_8be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_8be(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_8be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 io_read_byte_16le(offs_t address);
|
||||
UINT16 io_read_word_16le(offs_t address);
|
||||
UINT16 io_read_word_masked_16le(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_16le(offs_t address);
|
||||
UINT32 io_read_dword_masked_16le(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_16le(offs_t address);
|
||||
UINT64 io_read_qword_masked_16le(offs_t address, UINT64 mask);
|
||||
void io_write_byte_16le(offs_t address, UINT8 data);
|
||||
void io_write_word_16le(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_16le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_16le(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_16le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_16le(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_16le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 io_read_byte_16be(offs_t address);
|
||||
UINT16 io_read_word_16be(offs_t address);
|
||||
UINT16 io_read_word_masked_16be(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_16be(offs_t address);
|
||||
UINT32 io_read_dword_masked_16be(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_16be(offs_t address);
|
||||
UINT64 io_read_qword_masked_16be(offs_t address, UINT64 mask);
|
||||
void io_write_byte_16be(offs_t address, UINT8 data);
|
||||
void io_write_word_16be(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_16be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_16be(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_16be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_16be(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_16be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 io_read_byte_32le(offs_t address);
|
||||
UINT16 io_read_word_32le(offs_t address);
|
||||
UINT16 io_read_word_masked_32le(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_32le(offs_t address);
|
||||
UINT32 io_read_dword_masked_32le(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_32le(offs_t address);
|
||||
UINT64 io_read_qword_masked_32le(offs_t address, UINT64 mask);
|
||||
void io_write_byte_32le(offs_t address, UINT8 data);
|
||||
void io_write_word_32le(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_32le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_32le(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_32le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_32le(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_32le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 io_read_byte_32be(offs_t address);
|
||||
UINT16 io_read_word_32be(offs_t address);
|
||||
UINT16 io_read_word_masked_32be(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_32be(offs_t address);
|
||||
UINT32 io_read_dword_masked_32be(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_32be(offs_t address);
|
||||
UINT64 io_read_qword_masked_32be(offs_t address, UINT64 mask);
|
||||
void io_write_byte_32be(offs_t address, UINT8 data);
|
||||
void io_write_word_32be(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_32be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_32be(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_32be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_32be(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_32be(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 io_read_byte_64le(offs_t address);
|
||||
UINT16 io_read_word_64le(offs_t address);
|
||||
UINT16 io_read_word_masked_64le(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_64le(offs_t address);
|
||||
UINT32 io_read_dword_masked_64le(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_64le(offs_t address);
|
||||
UINT64 io_read_qword_masked_64le(offs_t address, UINT64 mask);
|
||||
void io_write_byte_64le(offs_t address, UINT8 data);
|
||||
void io_write_word_64le(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_64le(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_64le(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_64le(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_64le(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_64le(offs_t address, UINT64 data, UINT64 mask);
|
||||
|
||||
UINT8 io_read_byte_64be(offs_t address);
|
||||
UINT16 io_read_word_64be(offs_t address);
|
||||
UINT16 io_read_word_masked_64be(offs_t address, UINT16 mask);
|
||||
UINT32 io_read_dword_64be(offs_t address);
|
||||
UINT32 io_read_dword_masked_64be(offs_t address, UINT32 mask);
|
||||
UINT64 io_read_qword_64be(offs_t address);
|
||||
UINT64 io_read_qword_masked_64be(offs_t address, UINT64 mask);
|
||||
void io_write_byte_64be(offs_t address, UINT8 data);
|
||||
void io_write_word_64be(offs_t address, UINT16 data);
|
||||
void io_write_word_masked_64be(offs_t address, UINT16 data, UINT16 mask);
|
||||
void io_write_dword_64be(offs_t address, UINT32 data);
|
||||
void io_write_dword_masked_64be(offs_t address, UINT32 data, UINT32 mask);
|
||||
void io_write_qword_64be(offs_t address, UINT64 data);
|
||||
void io_write_qword_masked_64be(offs_t address, UINT64 data, UINT64 mask);
|
||||
#endif
|
||||
|
||||
#endif /* __MEMORY_H__ */
|
||||
|
||||
@ -315,7 +315,7 @@ static MACHINE_DRIVER_START( ataxx )
|
||||
MDRV_CPU_PROGRAM_MAP(slave_map_program,0)
|
||||
MDRV_CPU_IO_MAP(slave_map_io,0)
|
||||
|
||||
MDRV_CPU_ADD("sound", I80186, XTAL_16MHz)
|
||||
MDRV_CPU_ADD("audio", I80186, XTAL_16MHz)
|
||||
MDRV_CPU_PROGRAM_MAP(leland_80186_map_program,0)
|
||||
MDRV_CPU_IO_MAP(ataxx_80186_map_io,0)
|
||||
|
||||
@ -364,7 +364,7 @@ ROM_START( ataxx )
|
||||
ROM_LOAD( "e-302-31013-01.u112", 0x20000, 0x20000, CRC(7e7c3e2f) SHA1(a7e31e1f1b09414c40ab9ace5e9bffbdbaee8704) )
|
||||
ROM_LOAD( "e-302-31014-01.u113", 0x40000, 0x20000, CRC(8cf3e101) SHA1(672a3a0ca0f5334cf614bc49cbc1ae5ccea54cbe) )
|
||||
|
||||
ROM_REGION( 0x100000, "sound", 0 )
|
||||
ROM_REGION( 0x100000, "audio", 0 )
|
||||
ROM_LOAD16_BYTE( "e-302-31003-01.u15", 0x20001, 0x20000, CRC(8bb3233b) SHA1(5131ad78bdf904cde36534e99efa5576fcea25c0) )
|
||||
ROM_LOAD16_BYTE( "e-302-31001-01.u1", 0x20000, 0x20000, CRC(728d75f2) SHA1(d9e8e742cc2d536bd62370c1e474c7036e4392bb) )
|
||||
ROM_LOAD16_BYTE( "e-302-31004-01.u16", 0x60001, 0x20000, CRC(f2bdff48) SHA1(f34eb16ea180effffd81d637acc3d96bffaf81c9) )
|
||||
@ -395,7 +395,7 @@ ROM_START( ataxxa )
|
||||
ROM_LOAD( "e-302-31013-01.u112", 0x20000, 0x20000, CRC(7e7c3e2f) SHA1(a7e31e1f1b09414c40ab9ace5e9bffbdbaee8704) )
|
||||
ROM_LOAD( "e-302-31014-01.u113", 0x40000, 0x20000, CRC(8cf3e101) SHA1(672a3a0ca0f5334cf614bc49cbc1ae5ccea54cbe) )
|
||||
|
||||
ROM_REGION( 0x100000, "sound", 0 )
|
||||
ROM_REGION( 0x100000, "audio", 0 )
|
||||
ROM_LOAD16_BYTE( "e-302-31003-01.u15", 0x20001, 0x20000, CRC(8bb3233b) SHA1(5131ad78bdf904cde36534e99efa5576fcea25c0) )
|
||||
ROM_LOAD16_BYTE( "e-302-31001-01.u1", 0x20000, 0x20000, CRC(728d75f2) SHA1(d9e8e742cc2d536bd62370c1e474c7036e4392bb) )
|
||||
ROM_LOAD16_BYTE( "e-302-31004-01.u16", 0x60001, 0x20000, CRC(f2bdff48) SHA1(f34eb16ea180effffd81d637acc3d96bffaf81c9) )
|
||||
@ -426,7 +426,7 @@ ROM_START( ataxxj )
|
||||
ROM_LOAD( "e-302-31013-01.u112", 0x20000, 0x20000, CRC(7e7c3e2f) SHA1(a7e31e1f1b09414c40ab9ace5e9bffbdbaee8704) )
|
||||
ROM_LOAD( "e-302-31014-01.u113", 0x40000, 0x20000, CRC(8cf3e101) SHA1(672a3a0ca0f5334cf614bc49cbc1ae5ccea54cbe) )
|
||||
|
||||
ROM_REGION( 0x100000, "sound", 0 )
|
||||
ROM_REGION( 0x100000, "audio", 0 )
|
||||
ROM_LOAD16_BYTE( "ataxxj.u15", 0x20001, 0x20000, CRC(db266d3f) SHA1(31c9baf4548b23e1e1939069620a937ee98a7b09) )
|
||||
ROM_LOAD16_BYTE( "ataxxj.u1", 0x20000, 0x20000, CRC(d6db2724) SHA1(d3c7b45b165eb7c9a6369863b273ecac5c31ca65) )
|
||||
ROM_LOAD16_BYTE( "ataxxj.u16", 0x60001, 0x20000, CRC(2b127f56) SHA1(909fed387ad6bb1d83f9cee271e6dc851ac50525) )
|
||||
@ -463,7 +463,7 @@ ROM_START( wsf )
|
||||
ROM_LOAD( "30007-01.157", 0xc0000, 0x20000, CRC(451321ae) SHA1(da82f0bba4341b087136afa17767b64389a0f8f4) )
|
||||
ROM_LOAD( "30008-01.158", 0xe0000, 0x20000, CRC(4d23836f) SHA1(7b5b9419774e7537e69017c4c44a0601b6e93714) )
|
||||
|
||||
ROM_REGION( 0x100000, "sound", 0 )
|
||||
ROM_REGION( 0x100000, "audio", 0 )
|
||||
ROM_LOAD16_BYTE( "30017-01.u3", 0x20001, 0x20000, CRC(39ec13c1) SHA1(4067da05cbaf205ab7cc14a3370220ad98b394cd) )
|
||||
ROM_LOAD16_BYTE( "30020-01.u6", 0x20000, 0x20000, CRC(532c02bf) SHA1(a2070d57f1ce2a68a064872ea7b77ba418187cfe) )
|
||||
ROM_LOAD16_BYTE( "30018-01.u4", 0x60001, 0x20000, CRC(1ec16735) SHA1(86766742b50edd25cfeef6f808d2733c484eca4e) )
|
||||
@ -508,7 +508,7 @@ ROM_START( indyheat )
|
||||
ROM_LOAD( "u157_27c.010", 0xc0000, 0x20000, CRC(a6462adc) SHA1(bdc744e3c836715874d40b9e32f509f288ce00fd) )
|
||||
ROM_LOAD( "u158_27c.010", 0xe0000, 0x20000, CRC(d6ef27a3) SHA1(37fcf772ce564a9300f9dd437b9015a2d25b46b5) )
|
||||
|
||||
ROM_REGION( 0x100000, "sound", 0 )
|
||||
ROM_REGION( 0x100000, "audio", 0 )
|
||||
ROM_LOAD16_BYTE( "u3_27c.010", 0x20001, 0x20000, CRC(97413818) SHA1(64caa14e05dd9ec43ce13f5c738df1f39f5fa75c) )
|
||||
ROM_LOAD16_BYTE( "u6_27c.010", 0x20000, 0x20000, CRC(15a89962) SHA1(52f66e1ccde0ef3fb7959a207cc967237e37833e) )
|
||||
ROM_LOAD16_BYTE( "u4_27c.010", 0x60001, 0x20000, CRC(fa7bfa04) SHA1(0174f5372117d15bf0ecd48b72c9cca4cf8bb75f) )
|
||||
@ -554,7 +554,7 @@ ROM_START( brutforc )
|
||||
ROM_LOAD( "u157", 0xc0000, 0x20000, CRC(e42b3dba) SHA1(ed3707932507bcddd0191e36e2f5479b2ce2e642) )
|
||||
ROM_LOAD( "u158", 0xe0000, 0x20000, CRC(a0aa3220) SHA1(bd9bffa4fcf76e34a72a497d322c0430cbc7c81e) )
|
||||
|
||||
ROM_REGION( 0x100000, "sound", 0 )
|
||||
ROM_REGION( 0x100000, "audio", 0 )
|
||||
ROM_LOAD16_BYTE( "u3", 0x20001, 0x20000, CRC(9984906c) SHA1(66626ea32fb510a9bb1974e41806fee6a4afa1cf) )
|
||||
ROM_LOAD16_BYTE( "u6", 0x20000, 0x20000, CRC(c9c5a413) SHA1(5d4f8bc895b89267643b41ecad52b886fd88df97) )
|
||||
ROM_LOAD16_BYTE( "u4", 0x60001, 0x20000, CRC(ca8ab3a6) SHA1(2e7c7f50fbaed7e052a97ac7954b634bbc657226) )
|
||||
@ -608,7 +608,7 @@ ROM_START( asylum )
|
||||
ROM_CONTINUE( 0x1c0000, 0x20000 )
|
||||
ROM_LOAD( "asy-spe.158", 0xe0000, 0x20000, CRC(49d19520) SHA1(6f24221c976e9dacc1ce96dfc1d1e3df4e8a8255) )
|
||||
|
||||
ROM_REGION( 0x100000, "sound", 0 )
|
||||
ROM_REGION( 0x100000, "audio", 0 )
|
||||
ROM_LOAD16_BYTE( "asy-65.3", 0x20001, 0x20000, CRC(709bdc78) SHA1(ca235c2ab26fbb153ffe775a1a44b31695902d3f) )
|
||||
ROM_LOAD16_BYTE( "asy-65.6", 0x20000, 0x20000, CRC(d019fb2e) SHA1(9d16b0399f03067e7bf79043904a1045119937c6) )
|
||||
ROM_LOAD16_BYTE( "asy-65.4", 0x60001, 0x20000, CRC(1882c3b2) SHA1(71af49d1f59e257e5f8a0fc590d0533dda5bf82b) )
|
||||
|
||||
@ -149,7 +149,7 @@ static MACHINE_RESET( atetris )
|
||||
static READ8_HANDLER( atetris_slapstic_r )
|
||||
{
|
||||
int result = slapstic_base[0x2000 + offset];
|
||||
int new_bank = slapstic_tweak(space->machine, offset) & 1;
|
||||
int new_bank = slapstic_tweak(space, offset) & 1;
|
||||
|
||||
/* update for the new bank */
|
||||
if (new_bank != current_bank)
|
||||
|
||||
@ -786,7 +786,7 @@ static void cde_handle_reports(void)
|
||||
}
|
||||
}
|
||||
|
||||
static void cde_dma_transfer(int channel, int next)
|
||||
static void cde_dma_transfer(const address_space *space, int channel, int next)
|
||||
{
|
||||
UINT32 address;
|
||||
int length;
|
||||
@ -805,7 +805,7 @@ static void cde_dma_transfer(int channel, int next)
|
||||
|
||||
for (i=0; i < cde_dma[channel].next_length; i++)
|
||||
{
|
||||
program_write_byte_64be(address, 0xff); // TODO: do the real transfer...
|
||||
memory_write_byte(space, address, 0xff); // TODO: do the real transfer...
|
||||
address++;
|
||||
}
|
||||
}
|
||||
@ -943,13 +943,13 @@ static WRITE64_HANDLER(cde_w)
|
||||
{
|
||||
cde_dma[0].dma_done = 1;
|
||||
|
||||
cde_dma_transfer(0, 0);
|
||||
cde_dma_transfer(space, 0, 0);
|
||||
}
|
||||
if (d & 0x40)
|
||||
{
|
||||
cde_dma[0].dma_done = 1;
|
||||
|
||||
cde_dma_transfer(0, 1);
|
||||
cde_dma_transfer(space, 0, 1);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1857,66 +1857,6 @@ ROM_END
|
||||
*
|
||||
*************************************/
|
||||
|
||||
#if 0
|
||||
/*
|
||||
Copy this code into the init function and modify:
|
||||
{
|
||||
UINT8 *ram = memory_region(machine, "master");
|
||||
FILE *output;
|
||||
|
||||
output = fopen("indyheat.m", "w");
|
||||
dasm_chunk("Resident", &ram[0x00000], 0x0000, 0x2000, output);
|
||||
dasm_chunk("Bank 0x02000:", &ram[0x02000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x10000:", &ram[0x10000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x18000:", &ram[0x18000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x20000:", &ram[0x20000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x28000:", &ram[0x28000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x30000:", &ram[0x30000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x38000:", &ram[0x38000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x40000:", &ram[0x40000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x48000:", &ram[0x48000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x50000:", &ram[0x50000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x58000:", &ram[0x58000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x60000:", &ram[0x60000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x68000:", &ram[0x68000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x70000:", &ram[0x70000], 0x2000, 0x8000, output);
|
||||
dasm_chunk("Bank 0x78000:", &ram[0x78000], 0x2000, 0x8000, output);
|
||||
fclose(output);
|
||||
}
|
||||
*/
|
||||
|
||||
static void dasm_chunk(char *tag, UINT8 *base, UINT16 pc, UINT32 length, FILE *output)
|
||||
{
|
||||
extern unsigned DasmZ80(char *buffer, unsigned _pc);
|
||||
|
||||
UINT8 *old_rom = opbase->rom;
|
||||
UINT8 *old_ram = opbase->ram;
|
||||
char buffer[256];
|
||||
int count, offset, i;
|
||||
|
||||
fprintf(output, "\n\n\n%s:\n", tag);
|
||||
opbase->rom = opbase->ram = &base[-pc];
|
||||
for (offset = 0; offset < length; offset += count)
|
||||
{
|
||||
count = DasmZ80(buffer, pc);
|
||||
for (i = 0; i < 4; i++)
|
||||
if (i < count)
|
||||
fprintf(output, "%c", (program_decrypted_read_byte(pc + i) >= 32 && program_decrypted_read_byte(pc + i) < 127) ? program_decrypted_read_byte(pc + i) : ' ');
|
||||
else
|
||||
fprintf(output, " ");
|
||||
fprintf(output, " %04X: ", pc);
|
||||
for (i = 0; i < 4; i++)
|
||||
if (i < count)
|
||||
fprintf(output, "%02X ", program_decrypted_read_byte(pc++));
|
||||
else
|
||||
fprintf(output, " ");
|
||||
fprintf(output, "%s\n", buffer);
|
||||
}
|
||||
opbase->rom = old_rom;
|
||||
opbase->ram = old_ram;
|
||||
}
|
||||
#endif
|
||||
|
||||
static void init_master_ports(running_machine *machine, UINT8 mvram_base, UINT8 io_base)
|
||||
{
|
||||
/* set up the master CPU VRAM I/O */
|
||||
|
||||
@ -510,9 +510,9 @@ static MACHINE_RESET( missile )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
INLINE int get_madsel(running_machine *machine)
|
||||
INLINE int get_madsel(const address_space *space)
|
||||
{
|
||||
UINT16 pc = cpu_get_previouspc(machine->activecpu);
|
||||
UINT16 pc = cpu_get_previouspc(space->cpu);
|
||||
|
||||
/* if we're at a different instruction than last time, reset our delay counter */
|
||||
if (pc != madsel_lastpc)
|
||||
@ -521,7 +521,7 @@ INLINE int get_madsel(running_machine *machine)
|
||||
/* MADSEL signal disables standard address decoding and routes
|
||||
writes to video RAM; it is enabled if the IRQ signal is clear
|
||||
and the low 5 bits of the fetched opcode are 0x01 */
|
||||
if (!irq_state && (program_decrypted_read_byte(pc) & 0x1f) == 0x01)
|
||||
if (!irq_state && (memory_decrypted_read_byte(space, pc) & 0x1f) == 0x01)
|
||||
{
|
||||
/* the MADSEL signal goes high 5 cycles after the opcode is identified;
|
||||
this effectively skips the indirect memory read. Since this is difficult
|
||||
@ -663,7 +663,7 @@ static VIDEO_UPDATE( missile )
|
||||
static WRITE8_HANDLER( missile_w )
|
||||
{
|
||||
/* if we're in MADSEL mode, write to video RAM */
|
||||
if (get_madsel(space->machine))
|
||||
if (get_madsel(space))
|
||||
{
|
||||
write_vram(space->machine, offset, data);
|
||||
return;
|
||||
@ -721,7 +721,7 @@ static READ8_HANDLER( missile_r )
|
||||
UINT8 result = 0xff;
|
||||
|
||||
/* if we're in MADSEL mode, read from video RAM */
|
||||
if (get_madsel(space->machine))
|
||||
if (get_madsel(space))
|
||||
return read_vram(space->machine, offset);
|
||||
|
||||
/* otherwise, strip A15 and handle manually */
|
||||
|
||||
@ -3839,7 +3839,7 @@ static WRITE16_HANDLER( f1en_comms_echo_w )
|
||||
{
|
||||
// pretend that slave is following master op, enables attract mode video with sound
|
||||
if (ACCESSING_BITS_0_7)
|
||||
program_write_byte( 0x810049, data );
|
||||
memory_write_byte( space, 0x810049, data );
|
||||
}
|
||||
|
||||
static DRIVER_INIT( f1en )
|
||||
|
||||
@ -92,9 +92,9 @@ static WRITE8_HANDLER( irq_ack_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static void esb_slapstic_tweak(running_machine *machine, offs_t offset)
|
||||
static void esb_slapstic_tweak(const address_space *space, offs_t offset)
|
||||
{
|
||||
int new_bank = slapstic_tweak(machine, offset);
|
||||
int new_bank = slapstic_tweak(space, offset);
|
||||
|
||||
/* update for the new bank */
|
||||
if (new_bank != slapstic_current_bank)
|
||||
@ -108,14 +108,14 @@ static void esb_slapstic_tweak(running_machine *machine, offs_t offset)
|
||||
static READ8_HANDLER( esb_slapstic_r )
|
||||
{
|
||||
int result = slapstic_base[offset];
|
||||
esb_slapstic_tweak(space->machine, offset);
|
||||
esb_slapstic_tweak(space, offset);
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
static WRITE8_HANDLER( esb_slapstic_w )
|
||||
{
|
||||
esb_slapstic_tweak(space->machine, offset);
|
||||
esb_slapstic_tweak(space, offset);
|
||||
}
|
||||
|
||||
|
||||
@ -142,7 +142,7 @@ static DIRECT_UPDATE_HANDLER( esb_setdirect )
|
||||
{
|
||||
slapstic_last_pc = pc;
|
||||
slapstic_last_address = address;
|
||||
esb_slapstic_tweak(space->machine, address & 0x1fff);
|
||||
esb_slapstic_tweak(space, address & 0x1fff);
|
||||
}
|
||||
return ~0;
|
||||
}
|
||||
|
||||
@ -904,7 +904,7 @@ MACHINE_DRIVER_END
|
||||
static READ32_HANDLER( bios_skip_r )
|
||||
{
|
||||
#if BIOS_SKIP
|
||||
if ((cpu_get_pc(space->cpu)==0x6f8) || (cpu_get_pc(space->cpu)==0x6fa)) program_write_byte(0x06000029,1);
|
||||
if ((cpu_get_pc(space->cpu)==0x6f8) || (cpu_get_pc(space->cpu)==0x6fa)) memory_write_byte(space, 0x06000029,1);
|
||||
#endif
|
||||
return skns_main_ram[0x00028/4];
|
||||
}
|
||||
|
||||
@ -15,4 +15,4 @@ void slapstic_init(running_machine *machine, int chip);
|
||||
void slapstic_reset(void);
|
||||
|
||||
int slapstic_bank(void);
|
||||
int slapstic_tweak(running_machine *machine, offs_t offset);
|
||||
int slapstic_tweak(const address_space *space, offs_t offset);
|
||||
|
||||
@ -318,7 +318,7 @@ static void amiga_m68k_reset(const device_config *device)
|
||||
/* set the overlay bit */
|
||||
if ( IS_AGA(amiga_intf) )
|
||||
{
|
||||
program_write_byte( 0xbfa001, 1 );
|
||||
memory_write_byte( space, 0xbfa001, 1 );
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
@ -588,7 +588,7 @@ void atarigen_slapstic_reset(void)
|
||||
|
||||
WRITE16_HANDLER( atarigen_slapstic_w )
|
||||
{
|
||||
update_bank(slapstic_tweak(space->machine, offset));
|
||||
update_bank(slapstic_tweak(space, offset));
|
||||
}
|
||||
|
||||
|
||||
@ -603,7 +603,7 @@ READ16_HANDLER( atarigen_slapstic_r )
|
||||
int result = atarigen_slapstic[offset & 0xfff];
|
||||
|
||||
/* then determine the new one */
|
||||
update_bank(slapstic_tweak(space->machine, offset));
|
||||
update_bank(slapstic_tweak(space, offset));
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
@ -1200,7 +1200,7 @@ READ16_HANDLER( hd68k_ds3_gdata_r )
|
||||
logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", cpu_get_previouspc(space->cpu), ds3_gdata);
|
||||
|
||||
/* attempt to optimize the transfer if conditions are right */
|
||||
if (cpunum_get_active() == 0 && pc == hdds3_transfer_pc &&
|
||||
if (space->machine->activecpu == space->machine->cpu[0] && pc == hdds3_transfer_pc &&
|
||||
!(!ds3_g68flag && ds3_g68irqs) && !(ds3_gflag && ds3_gfirqs))
|
||||
{
|
||||
UINT32 destaddr = cpu_get_reg(space->cpu, M68K_A1);
|
||||
@ -1214,7 +1214,7 @@ READ16_HANDLER( hd68k_ds3_gdata_r )
|
||||
|
||||
while (count68k > 0 && hdadsp_data_memory[0x16e6] > 0)
|
||||
{
|
||||
program_write_word(destaddr, ds3_gdata);
|
||||
memory_write_word(space, destaddr, ds3_gdata);
|
||||
{
|
||||
hdadsp_data_memory[0x16e6]--;
|
||||
ds3_gdata = hdadsp_pgm_memory[i6] >> 8;
|
||||
@ -1616,13 +1616,13 @@ WRITE16_HANDLER( hddspcom_control_w )
|
||||
|
||||
WRITE16_HANDLER( rd68k_slapstic_w )
|
||||
{
|
||||
slapstic_tweak(space->machine, offset & 0x3fff);
|
||||
slapstic_tweak(space, offset & 0x3fff);
|
||||
}
|
||||
|
||||
|
||||
READ16_HANDLER( rd68k_slapstic_r )
|
||||
{
|
||||
int bank = slapstic_tweak(space->machine, offset & 0x3fff) * 0x4000;
|
||||
int bank = slapstic_tweak(space, offset & 0x3fff) * 0x4000;
|
||||
return hd68k_slapstic_base[bank + (offset & 0x3fff)];
|
||||
}
|
||||
|
||||
|
||||
@ -862,7 +862,7 @@ int slapstic_bank(void)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static int alt2_kludge(running_machine *machine, offs_t offset)
|
||||
static int alt2_kludge(const address_space *space, offs_t offset)
|
||||
{
|
||||
/* Of the 3 alternate addresses, only the middle one needs to actually hit
|
||||
in the slapstic region; the first and third ones can be anywhere in the
|
||||
@ -874,15 +874,15 @@ static int alt2_kludge(running_machine *machine, offs_t offset)
|
||||
if (access_68k)
|
||||
{
|
||||
/* first verify that the prefetched PC matches the first alternate */
|
||||
if (MATCHES_MASK_VALUE(cpu_get_pc(machine->activecpu) >> 1, slapstic.alt1))
|
||||
if (MATCHES_MASK_VALUE(cpu_get_pc(space->cpu) >> 1, slapstic.alt1))
|
||||
{
|
||||
/* now look for a move.w (An),(An) or cmpm.w (An)+,(An)+ */
|
||||
UINT16 opcode = program_decrypted_read_word(cpu_get_previouspc(machine->activecpu) & 0xffffff);
|
||||
UINT16 opcode = memory_decrypted_read_word(space, cpu_get_previouspc(space->cpu) & 0xffffff);
|
||||
if ((opcode & 0xf1f8) == 0x3090 || (opcode & 0xf1f8) == 0xb148)
|
||||
{
|
||||
/* fetch the value of the register for the second operand, and see */
|
||||
/* if it matches the third alternate */
|
||||
UINT32 regval = cpu_get_reg(machine->activecpu, M68K_A0 + ((opcode >> 9) & 7)) >> 1;
|
||||
UINT32 regval = cpu_get_reg(space->cpu, M68K_A0 + ((opcode >> 9) & 7)) >> 1;
|
||||
if (MATCHES_MASK_VALUE(regval, slapstic.alt3))
|
||||
{
|
||||
alt_bank = (regval >> slapstic.altshift) & 3;
|
||||
@ -909,7 +909,7 @@ static int alt2_kludge(running_machine *machine, offs_t offset)
|
||||
*
|
||||
*************************************/
|
||||
|
||||
int slapstic_tweak(running_machine *machine, offs_t offset)
|
||||
int slapstic_tweak(const address_space *space, offs_t offset)
|
||||
{
|
||||
/* reset is universal */
|
||||
if (offset == 0x0000)
|
||||
@ -951,7 +951,7 @@ int slapstic_tweak(running_machine *machine, offs_t offset)
|
||||
/* the first one was missed (since it's usually an opcode fetch) */
|
||||
else if (MATCHES_MASK_VALUE(offset, slapstic.alt2))
|
||||
{
|
||||
state = alt2_kludge(machine, offset);
|
||||
state = alt2_kludge(space, offset);
|
||||
}
|
||||
|
||||
/* check for standard bankswitches */
|
||||
@ -1119,7 +1119,7 @@ int slapstic_tweak(running_machine *machine, offs_t offset)
|
||||
|
||||
/* log this access */
|
||||
if (LOG_SLAPSTIC)
|
||||
slapstic_log(machine, offset);
|
||||
slapstic_log(space->machine, offset);
|
||||
|
||||
/* return the active bank */
|
||||
return current_bank;
|
||||
|
||||
@ -254,20 +254,20 @@ WRITE16_HANDLER( atarisy2_paletteram_w )
|
||||
READ16_HANDLER( atarisy2_slapstic_r )
|
||||
{
|
||||
int result = atarisy2_slapstic[offset];
|
||||
slapstic_tweak(space->machine, offset);
|
||||
slapstic_tweak(space, offset);
|
||||
|
||||
/* an extra tweak for the next opcode fetch */
|
||||
videobank = slapstic_tweak(space->machine, 0x1234) * 0x1000;
|
||||
videobank = slapstic_tweak(space, 0x1234) * 0x1000;
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
WRITE16_HANDLER( atarisy2_slapstic_w )
|
||||
{
|
||||
slapstic_tweak(space->machine, offset);
|
||||
slapstic_tweak(space, offset);
|
||||
|
||||
/* an extra tweak for the next opcode fetch */
|
||||
videobank = slapstic_tweak(space->machine, 0x1234) * 0x1000;
|
||||
videobank = slapstic_tweak(space, 0x1234) * 0x1000;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -626,7 +626,7 @@ INLINE void blit_pixel(const address_space *space, int offset, int srcdata, int
|
||||
/* note that we have to allow blits to non-video RAM (e.g. tileram) because those */
|
||||
/* are not blocked by the window enable */
|
||||
if (!williams_blitter_window_enable || offset < williams_blitter_clip_address || offset >= 0xc000)
|
||||
program_write_byte(offset, pix);
|
||||
memory_write_byte(space, offset, pix);
|
||||
}
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user