From 5f187d283d7c5b4582f11d1d5c350d78789edb35 Mon Sep 17 00:00:00 2001 From: AJR Date: Tue, 14 May 2019 11:32:34 -0400 Subject: [PATCH] m6510: Add 6508 variant (nw) --- src/devices/cpu/m6502/m6510.cpp | 126 ++++++++++++++++++++++++++++++-- src/devices/cpu/m6502/m6510.h | 32 ++++++++ src/mame/drivers/c900.cpp | 14 ++++ 3 files changed, 164 insertions(+), 8 deletions(-) diff --git a/src/devices/cpu/m6502/m6510.cpp b/src/devices/cpu/m6502/m6510.cpp index 92ec15dbc25..b045d4423f5 100644 --- a/src/devices/cpu/m6502/m6510.cpp +++ b/src/devices/cpu/m6502/m6510.cpp @@ -6,6 +6,9 @@ 6502 with 6 i/o pins, also known as 8500 + 6508 is 6510 plus 256 bytes of internal RAM, mirrored across pages 0 + and 1. + ***************************************************************************/ #include "emu.h" @@ -13,6 +16,7 @@ #include "m6510d.h" DEFINE_DEVICE_TYPE(M6510, m6510_device, "m6510", "MOS Technology M6510") +DEFINE_DEVICE_TYPE(M6508, m6508_device, "m6508", "MOS Technology M6508") m6510_device::m6510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : m6510_device(mconfig, M6510, tag, owner, clock) @@ -39,18 +43,11 @@ std::unique_ptr m6510_device::create_disassembler() return std::make_unique(); } -void m6510_device::device_start() +void m6510_device::init_port() { read_port.resolve_safe(0); write_port.resolve_safe(); - if(cache_disabled) - mintf = std::make_unique(this); - else - mintf = std::make_unique(this); - - init(); - save_item(NAME(pullup)); save_item(NAME(floating)); save_item(NAME(dir)); @@ -58,6 +55,17 @@ void m6510_device::device_start() save_item(NAME(drive)); } +void m6510_device::device_start() +{ + if(cache_disabled) + mintf = std::make_unique(this); + else + mintf = std::make_unique(this); + + init(); + init_port(); +} + void m6510_device::device_reset() { m6502_device::device_reset(); @@ -169,4 +177,106 @@ uint8_t m6510_device::mi_6510_nd::read_arg(uint16_t adr) return res; } + +m6508_device::m6508_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + m6510_device(mconfig, M6508, tag, owner, clock) +{ +} + +void m6508_device::device_start() +{ + if(cache_disabled) + mintf = std::make_unique(this); + else + mintf = std::make_unique(this); + + init(); + init_port(); + + ram_page = make_unique_clear(256); + save_pointer(NAME(ram_page), 256); +} + + +m6508_device::mi_6508_normal::mi_6508_normal(m6508_device *_base) +{ + base = _base; +} + +uint8_t m6508_device::mi_6508_normal::read(uint16_t adr) +{ + uint8_t res = program->read_byte(adr); + if(adr == 0x0000) + res = base->dir_r(); + else if(adr == 0x0001) + res = base->port_r(); + else if(adr < 0x0200) + res = base->ram_page[adr & 0x00ff]; + return res; +} + +uint8_t m6508_device::mi_6508_normal::read_sync(uint16_t adr) +{ + uint8_t res = scache->read_byte(adr); + if(adr == 0x0000) + res = base->dir_r(); + else if(adr == 0x0001) + res = base->port_r(); + else if(adr < 0x0200) + res = base->ram_page[adr & 0x00ff]; + return res; +} + +uint8_t m6508_device::mi_6508_normal::read_arg(uint16_t adr) +{ + uint8_t res = cache->read_byte(adr); + if(adr == 0x0000) + res = base->dir_r(); + else if(adr == 0x0001) + res = base->port_r(); + else if(adr < 0x0200) + res = base->ram_page[adr & 0x00ff]; + return res; +} + +void m6508_device::mi_6508_normal::write(uint16_t adr, uint8_t val) +{ + program->write_byte(adr, val); + if(adr == 0x0000) + base->dir_w(val); + else if(adr == 0x0001) + base->port_w(val); + else if(adr < 0x0200) + base->ram_page[adr & 0x00ff] = val; +} + +m6508_device::mi_6508_nd::mi_6508_nd(m6508_device *_base) : mi_6508_normal(_base) +{ +} + +uint8_t m6508_device::mi_6508_nd::read_sync(uint16_t adr) +{ + uint8_t res = sprogram->read_byte(adr); + if(adr == 0x0000) + res = base->dir_r(); + else if(adr == 0x0001) + res = base->port_r(); + else if(adr < 0x0200) + res = base->ram_page[adr & 0x00ff]; + return res; +} + +uint8_t m6508_device::mi_6508_nd::read_arg(uint16_t adr) +{ + uint8_t res = program->read_byte(adr); + if(adr == 0x0000) + res = base->dir_r(); + else if(adr == 0x0001) + res = base->port_r(); + else if(adr < 0x0200) + res = base->ram_page[adr & 0x00ff]; + return res; +} + + #include "cpu/m6502/m6510.hxx" diff --git a/src/devices/cpu/m6502/m6510.h b/src/devices/cpu/m6502/m6510.h index 28c9ab2443a..773acee9294 100644 --- a/src/devices/cpu/m6502/m6510.h +++ b/src/devices/cpu/m6502/m6510.h @@ -64,6 +64,7 @@ protected: uint8_t port_r(); void port_w(uint8_t data); + void init_port(); void update_port(); #define O(o) void o ## _full(); void o ## _partial() @@ -80,11 +81,42 @@ protected: #undef O }; +class m6508_device : public m6510_device { +public: + m6508_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override; + + class mi_6508_normal : public memory_interface { + public: + m6508_device *base; + + mi_6508_normal(m6508_device *base); + virtual ~mi_6508_normal() {} + virtual uint8_t read(uint16_t adr) override; + virtual uint8_t read_sync(uint16_t adr) override; + virtual uint8_t read_arg(uint16_t adr) override; + virtual void write(uint16_t adr, uint8_t val) override; + }; + + class mi_6508_nd : public mi_6508_normal { + public: + mi_6508_nd(m6508_device *base); + virtual ~mi_6508_nd() {} + virtual uint8_t read_sync(uint16_t adr) override; + virtual uint8_t read_arg(uint16_t adr) override; + }; + + std::unique_ptr ram_page; +}; + enum { M6510_IRQ_LINE = m6502_device::IRQ_LINE, M6510_NMI_LINE = m6502_device::NMI_LINE }; DECLARE_DEVICE_TYPE(M6510, m6510_device) +DECLARE_DEVICE_TYPE(M6508, m6508_device) #endif // MAME_CPU_M6502_M6510_H diff --git a/src/mame/drivers/c900.cpp b/src/mame/drivers/c900.cpp index d2073d1efe6..c7d95650768 100644 --- a/src/mame/drivers/c900.cpp +++ b/src/mame/drivers/c900.cpp @@ -32,6 +32,7 @@ To Do: #include "emu.h" #include "cpu/z8000/z8000.h" +#include "cpu/m6502/m6510.h" #include "machine/z80scc.h" #include "bus/rs232/rs232.h" #include "machine/z8536.h" @@ -46,6 +47,7 @@ public: c900_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_fdcpu(*this, "fdcpu") , m_spkrdev(*this, "speaker") { } @@ -58,7 +60,10 @@ private: void io_map(address_map &map); void special_io_map(address_map &map); void mem_map(address_map &map); + void fdc_map(address_map &map); + required_device m_maincpu; + required_device m_fdcpu; required_device m_spkrdev; }; @@ -90,6 +95,12 @@ void c900_state::special_io_map(address_map &map) // TODO: Z8010 MMU } +void c900_state::fdc_map(address_map &map) +{ + map(0x0000, 0x01ff).noprw(); // internal + map(0xe000, 0xffff).rom().region("fdc", 0); +} + static INPUT_PORTS_START( c900 ) INPUT_PORTS_END @@ -120,6 +131,9 @@ void c900_state::c900(machine_config &config) m_maincpu->set_addrmap(AS_IO, &c900_state::io_map); m_maincpu->set_addrmap(z8001_device::AS_SIO, &c900_state::special_io_map); + M6508(config, m_fdcpu, 12_MHz_XTAL / 8); // PH1/PH2 = 1.5 MHz + m_fdcpu->set_addrmap(AS_PROGRAM, &c900_state::fdc_map); + GFXDECODE(config, "gfxdecode", "palette", gfx_c900); PALETTE(config, "palette", palette_device::MONOCHROME);