mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
some TRUE/FALSE cleanup (nw)
This commit is contained in:
parent
346a42383e
commit
5f3d4fb33d
@ -279,11 +279,11 @@ inline bool nes_exrom_device::in_split()
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if (tile < 34)
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{
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if (!m_split_rev && tile < m_split_ctrl)
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return TRUE;
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return true;
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if (m_split_rev && tile >= m_split_ctrl)
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return TRUE;
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return true;
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}
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return FALSE;
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return false;
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}
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READ8_MEMBER(nes_exrom_device::nt_r)
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@ -292,7 +292,7 @@ struct I386_CALL_GATE
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inline uint32_t i386_translate(int segment, uint32_t ip, int rwn);
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inline vtlb_entry get_permissions(uint32_t pte, int wp);
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bool i386_translate_address(int intention, offs_t *address, vtlb_entry *entry);
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inline int translate_address(int pl, int type, uint32_t *address, uint32_t *error);
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inline bool translate_address(int pl, int type, uint32_t *address, uint32_t *error);
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inline void CHANGE_PC(uint32_t pc);
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inline void NEAR_BRANCH(int32_t offs);
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inline uint8_t FETCH();
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@ -1249,7 +1249,7 @@ struct I386_CALL_GATE
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inline void WRITE80(uint32_t ea, floatx80 t);
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inline void x87_set_stack_top(int top);
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inline void x87_set_tag(int reg, int tag);
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void x87_write_stack(int i, floatx80 value, int update_tag);
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void x87_write_stack(int i, floatx80 value, bool update_tag);
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inline void x87_set_stack_underflow();
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inline void x87_set_stack_overflow();
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int x87_inc_stack();
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@ -2085,7 +2085,7 @@ static char *hexstringpc(uint64_t pc)
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return hexstring((uint32_t)pc, 0);
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}
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static char *shexstring(uint32_t value, int digits, int always)
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static char *shexstring(uint32_t value, int digits, bool always)
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{
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static char buffer[20];
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if (value >= 0x80000000)
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@ -2151,17 +2151,17 @@ static void handle_modrm(char* s)
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s = handle_sib_byte( s, mod );
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else if ((rm & 7) == 5 && mod == 0) {
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disp32 = FETCHD32();
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s += sprintf( s, "rip%s", shexstring(disp32, 0, TRUE) );
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s += sprintf( s, "rip%s", shexstring(disp32, 0, true) );
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} else
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s += sprintf( s, "%s", i386_reg[2][rm]);
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if( mod == 1 ) {
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disp8 = FETCHD();
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if (disp8 != 0)
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s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
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s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, true) );
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} else if( mod == 2 ) {
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disp32 = FETCHD32();
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if (disp32 != 0)
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s += sprintf( s, "%s", shexstring(disp32, 0, TRUE) );
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s += sprintf( s, "%s", shexstring(disp32, 0, true) );
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}
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} else if (address_size == 1) {
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if ((rm & 7) == 4)
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@ -2169,7 +2169,7 @@ static void handle_modrm(char* s)
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else if ((rm & 7) == 5 && mod == 0) {
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disp32 = FETCHD32();
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if (curmode == 64)
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s += sprintf( s, "eip%s", shexstring(disp32, 0, TRUE) );
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s += sprintf( s, "eip%s", shexstring(disp32, 0, true) );
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else
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s += sprintf( s, "%s", hexstring(disp32, 0) );
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} else
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@ -2177,11 +2177,11 @@ static void handle_modrm(char* s)
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if( mod == 1 ) {
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disp8 = FETCHD();
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if (disp8 != 0)
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s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
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s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, true) );
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} else if( mod == 2 ) {
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disp32 = FETCHD32();
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if (disp32 != 0)
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s += sprintf( s, "%s", shexstring(disp32, 0, TRUE) );
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s += sprintf( s, "%s", shexstring(disp32, 0, true) );
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}
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} else {
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switch( rm )
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@ -2205,11 +2205,11 @@ static void handle_modrm(char* s)
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if( mod == 1 ) {
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disp8 = FETCHD();
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if (disp8 != 0)
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s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
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s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, true) );
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} else if( mod == 2 ) {
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disp16 = FETCHD16();
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if (disp16 != 0)
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s += sprintf( s, "%s", shexstring((int32_t)disp16, 0, TRUE) );
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s += sprintf( s, "%s", shexstring((int32_t)disp16, 0, true) );
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}
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}
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s += sprintf( s, "]" );
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@ -2378,22 +2378,22 @@ static char* handle_param(char* s, uint32_t param)
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case PARAM_I8:
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i8 = FETCHD();
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s += sprintf( s, "%s", shexstring((int8_t)i8, 0, FALSE) );
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s += sprintf( s, "%s", shexstring((int8_t)i8, 0, false) );
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break;
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case PARAM_I16:
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i16 = FETCHD16();
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s += sprintf( s, "%s", shexstring((int16_t)i16, 0, FALSE) );
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s += sprintf( s, "%s", shexstring((int16_t)i16, 0, false) );
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break;
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case PARAM_UI8:
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i8 = FETCHD();
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s += sprintf( s, "%s", shexstring((uint8_t)i8, 0, FALSE) );
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s += sprintf( s, "%s", shexstring((uint8_t)i8, 0, false) );
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break;
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case PARAM_UI16:
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i16 = FETCHD16();
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s += sprintf( s, "%s", shexstring((uint16_t)i16, 0, FALSE) );
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s += sprintf( s, "%s", shexstring((uint16_t)i16, 0, false) );
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break;
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case PARAM_IMM64:
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@ -481,10 +481,10 @@ bool i386_device::i386_translate_address(int intention, offs_t *address, vtlb_en
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//#define TEST_TLB
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int i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t *error)
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bool i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t *error)
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{
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if(!(m_cr[0] & 0x80000000)) // Some (very few) old OS's won't work with this
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return TRUE;
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return true;
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const vtlb_entry *table = vtlb_table();
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uint32_t index = *address >> 12;
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@ -504,15 +504,15 @@ int i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t
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*error = ((type & TRANSLATE_WRITE) ? 2 : 0) | ((m_CPL == 3) ? 4 : 0);
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if(entry)
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*error |= 1;
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return FALSE;
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return false;
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}
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vtlb_dynload(index, *address, entry);
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return TRUE;
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return true;
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}
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if(!(entry & (1 << type)))
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{
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*error = ((type & TRANSLATE_WRITE) ? 2 : 0) | ((m_CPL == 3) ? 4 : 0) | 1;
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return FALSE;
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return false;
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}
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*address = (entry & 0xfffff000) | (*address & 0xfff);
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#ifdef TEST_TLB
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@ -520,7 +520,7 @@ int i386_device::translate_address(int pl, int type, uint32_t *address, uint32_t
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if(!test_ret || (test_addr != *address))
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logerror("TLB-PTE mismatch! %06X %06X %06x\n", *address, test_addr, m_pc);
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#endif
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return TRUE;
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return true;
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}
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void i386_device::CHANGE_PC(uint32_t pc)
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@ -199,7 +199,7 @@ void i386_device::x87_set_tag(int reg, int tag)
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m_x87_tw |= (tag << shift);
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}
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void i386_device::x87_write_stack(int i, floatx80 value, int update_tag)
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void i386_device::x87_write_stack(int i, floatx80 value, bool update_tag)
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{
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ST(i) = value;
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@ -511,7 +511,7 @@ void i386_device::x87_fadd_m32real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -546,7 +546,7 @@ void i386_device::x87_fadd_m64real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -579,7 +579,7 @@ void i386_device::x87_fadd_st_sti(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -612,7 +612,7 @@ void i386_device::x87_fadd_sti_st(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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CYCLES(8);
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}
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@ -646,7 +646,7 @@ void i386_device::x87_faddp(uint8_t modrm)
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if (x87_check_exceptions())
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{
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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x87_inc_stack();
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}
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@ -683,7 +683,7 @@ void i386_device::x87_fiadd_m32int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(19);
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}
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@ -718,7 +718,7 @@ void i386_device::x87_fiadd_m16int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(20);
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}
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@ -760,7 +760,7 @@ void i386_device::x87_fsub_m32real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -795,7 +795,7 @@ void i386_device::x87_fsub_m64real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -828,7 +828,7 @@ void i386_device::x87_fsub_st_sti(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -861,7 +861,7 @@ void i386_device::x87_fsub_sti_st(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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CYCLES(8);
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}
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@ -895,7 +895,7 @@ void i386_device::x87_fsubp(uint8_t modrm)
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if (x87_check_exceptions())
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{
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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x87_inc_stack();
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}
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@ -932,7 +932,7 @@ void i386_device::x87_fisub_m32int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(19);
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}
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@ -967,7 +967,7 @@ void i386_device::x87_fisub_m16int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(20);
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}
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@ -1009,7 +1009,7 @@ void i386_device::x87_fsubr_m32real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -1044,7 +1044,7 @@ void i386_device::x87_fsubr_m64real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -1077,7 +1077,7 @@ void i386_device::x87_fsubr_st_sti(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(8);
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}
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@ -1110,7 +1110,7 @@ void i386_device::x87_fsubr_sti_st(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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CYCLES(8);
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}
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@ -1144,7 +1144,7 @@ void i386_device::x87_fsubrp(uint8_t modrm)
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if (x87_check_exceptions())
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{
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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x87_inc_stack();
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}
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@ -1181,7 +1181,7 @@ void i386_device::x87_fisubr_m32int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(19);
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}
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@ -1216,7 +1216,7 @@ void i386_device::x87_fisubr_m16int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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CYCLES(20);
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}
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@ -1257,7 +1257,7 @@ void i386_device::x87_fdiv_m32real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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// 73, 62, 35
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CYCLES(73);
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@ -1292,7 +1292,7 @@ void i386_device::x87_fdiv_m64real(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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// 73, 62, 35
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CYCLES(73);
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@ -1326,7 +1326,7 @@ void i386_device::x87_fdiv_st_sti(uint8_t modrm)
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if (x87_check_exceptions())
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{
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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}
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// 73, 62, 35
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@ -1361,7 +1361,7 @@ void i386_device::x87_fdiv_sti_st(uint8_t modrm)
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if (x87_check_exceptions())
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{
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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}
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// 73, 62, 35
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@ -1396,7 +1396,7 @@ void i386_device::x87_fdivp(uint8_t modrm)
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if (x87_check_exceptions())
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{
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x87_write_stack(i, result, TRUE);
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x87_write_stack(i, result, true);
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x87_inc_stack();
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}
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@ -1433,7 +1433,7 @@ void i386_device::x87_fidiv_m32int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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// 73, 62, 35
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CYCLES(73);
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@ -1468,7 +1468,7 @@ void i386_device::x87_fidiv_m16int(uint8_t modrm)
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}
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if (x87_check_exceptions())
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x87_write_stack(0, result, TRUE);
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x87_write_stack(0, result, true);
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|
||||
// 73, 62, 35
|
||||
CYCLES(73);
|
||||
@ -1510,7 +1510,7 @@ void i386_device::x87_fdivr_m32real(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
// 73, 62, 35
|
||||
CYCLES(73);
|
||||
@ -1545,7 +1545,7 @@ void i386_device::x87_fdivr_m64real(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
// 73, 62, 35
|
||||
CYCLES(73);
|
||||
@ -1579,7 +1579,7 @@ void i386_device::x87_fdivr_st_sti(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
}
|
||||
|
||||
// 73, 62, 35
|
||||
@ -1614,7 +1614,7 @@ void i386_device::x87_fdivr_sti_st(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(i, result, TRUE);
|
||||
x87_write_stack(i, result, true);
|
||||
}
|
||||
|
||||
// 73, 62, 35
|
||||
@ -1649,7 +1649,7 @@ void i386_device::x87_fdivrp(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(i, result, TRUE);
|
||||
x87_write_stack(i, result, true);
|
||||
x87_inc_stack();
|
||||
}
|
||||
|
||||
@ -1687,7 +1687,7 @@ void i386_device::x87_fidivr_m32int(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
// 73, 62, 35
|
||||
CYCLES(73);
|
||||
@ -1722,7 +1722,7 @@ void i386_device::x87_fidivr_m16int(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
// 73, 62, 35
|
||||
CYCLES(73);
|
||||
@ -1764,7 +1764,7 @@ void i386_device::x87_fmul_m32real(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(11);
|
||||
}
|
||||
@ -1798,7 +1798,7 @@ void i386_device::x87_fmul_m64real(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(14);
|
||||
}
|
||||
@ -1830,7 +1830,7 @@ void i386_device::x87_fmul_st_sti(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(16);
|
||||
}
|
||||
@ -1862,7 +1862,7 @@ void i386_device::x87_fmul_sti_st(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(i, result, TRUE);
|
||||
x87_write_stack(i, result, true);
|
||||
|
||||
CYCLES(16);
|
||||
}
|
||||
@ -1895,7 +1895,7 @@ void i386_device::x87_fmulp(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(i, result, TRUE);
|
||||
x87_write_stack(i, result, true);
|
||||
x87_inc_stack();
|
||||
}
|
||||
|
||||
@ -1931,7 +1931,7 @@ void i386_device::x87_fimul_m32int(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(22);
|
||||
}
|
||||
@ -1965,7 +1965,7 @@ void i386_device::x87_fimul_m16int(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(22);
|
||||
}
|
||||
@ -2223,7 +2223,7 @@ void i386_device::x87_fprem(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(84);
|
||||
}
|
||||
@ -2249,7 +2249,7 @@ void i386_device::x87_fprem1(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(94);
|
||||
}
|
||||
@ -2280,7 +2280,7 @@ void i386_device::x87_fsqrt(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(8);
|
||||
}
|
||||
@ -2310,7 +2310,7 @@ void i386_device::x87_f2xm1(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
}
|
||||
|
||||
CYCLES(242);
|
||||
@ -2346,7 +2346,7 @@ void i386_device::x87_fyl2x(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(1, result, TRUE);
|
||||
x87_write_stack(1, result, true);
|
||||
x87_inc_stack();
|
||||
}
|
||||
|
||||
@ -2375,7 +2375,7 @@ void i386_device::x87_fyl2xp1(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(1, result, TRUE);
|
||||
x87_write_stack(1, result, true);
|
||||
x87_inc_stack();
|
||||
}
|
||||
|
||||
@ -2419,9 +2419,9 @@ void i386_device::x87_fptan(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(0, result1, TRUE);
|
||||
x87_write_stack(0, result1, true);
|
||||
x87_dec_stack();
|
||||
x87_write_stack(0, result2, TRUE);
|
||||
x87_write_stack(0, result2, true);
|
||||
}
|
||||
|
||||
CYCLES(244);
|
||||
@ -2445,7 +2445,7 @@ void i386_device::x87_fpatan(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(1, result, TRUE);
|
||||
x87_write_stack(1, result, true);
|
||||
x87_inc_stack();
|
||||
}
|
||||
|
||||
@ -2480,7 +2480,7 @@ void i386_device::x87_fsin(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(241);
|
||||
}
|
||||
@ -2513,7 +2513,7 @@ void i386_device::x87_fcos(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, result, TRUE);
|
||||
x87_write_stack(0, result, true);
|
||||
|
||||
CYCLES(241);
|
||||
}
|
||||
@ -2558,9 +2558,9 @@ void i386_device::x87_fsincos(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(0, s_result, TRUE);
|
||||
x87_write_stack(0, s_result, true);
|
||||
x87_dec_stack();
|
||||
x87_write_stack(0, c_result, TRUE);
|
||||
x87_write_stack(0, c_result, true);
|
||||
}
|
||||
|
||||
CYCLES(291);
|
||||
@ -2598,7 +2598,7 @@ void i386_device::x87_fld_m32real(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(3);
|
||||
}
|
||||
@ -2628,7 +2628,7 @@ void i386_device::x87_fld_m64real(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(3);
|
||||
}
|
||||
@ -2649,7 +2649,7 @@ void i386_device::x87_fld_m80real(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(6);
|
||||
}
|
||||
@ -2669,7 +2669,7 @@ void i386_device::x87_fld_sti(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(4);
|
||||
}
|
||||
@ -2692,7 +2692,7 @@ void i386_device::x87_fild_m16int(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(13);
|
||||
}
|
||||
@ -2715,7 +2715,7 @@ void i386_device::x87_fild_m32int(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(9);
|
||||
}
|
||||
@ -2738,7 +2738,7 @@ void i386_device::x87_fild_m64int(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(10);
|
||||
}
|
||||
@ -2776,7 +2776,7 @@ void i386_device::x87_fbld(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(75);
|
||||
}
|
||||
@ -2855,7 +2855,7 @@ void i386_device::x87_fst_sti(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(i, value, TRUE);
|
||||
x87_write_stack(i, value, true);
|
||||
|
||||
CYCLES(3);
|
||||
}
|
||||
@ -2956,7 +2956,7 @@ void i386_device::x87_fstp_sti(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(i, value, TRUE);
|
||||
x87_write_stack(i, value, true);
|
||||
x87_inc_stack();
|
||||
}
|
||||
|
||||
@ -3193,7 +3193,7 @@ void i386_device::x87_fld1(uint8_t modrm)
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_set_tag(ST_TO_PHYS(0), tag);
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
}
|
||||
|
||||
CYCLES(4);
|
||||
@ -3225,7 +3225,7 @@ void i386_device::x87_fldl2t(uint8_t modrm)
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_set_tag(ST_TO_PHYS(0), tag);
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
}
|
||||
|
||||
CYCLES(8);
|
||||
@ -3258,7 +3258,7 @@ void i386_device::x87_fldl2e(uint8_t modrm)
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_set_tag(ST_TO_PHYS(0), tag);
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
}
|
||||
|
||||
CYCLES(8);
|
||||
@ -3291,7 +3291,7 @@ void i386_device::x87_fldpi(uint8_t modrm)
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_set_tag(ST_TO_PHYS(0), tag);
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
}
|
||||
|
||||
CYCLES(8);
|
||||
@ -3324,7 +3324,7 @@ void i386_device::x87_fldlg2(uint8_t modrm)
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_set_tag(ST_TO_PHYS(0), tag);
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
}
|
||||
|
||||
CYCLES(8);
|
||||
@ -3357,7 +3357,7 @@ void i386_device::x87_fldln2(uint8_t modrm)
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_set_tag(ST_TO_PHYS(0), tag);
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
}
|
||||
|
||||
CYCLES(8);
|
||||
@ -3383,7 +3383,7 @@ void i386_device::x87_fldz(uint8_t modrm)
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_set_tag(ST_TO_PHYS(0), tag);
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
}
|
||||
|
||||
CYCLES(4);
|
||||
@ -3419,7 +3419,7 @@ void i386_device::x87_fchs(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
|
||||
CYCLES(6);
|
||||
}
|
||||
@ -3442,7 +3442,7 @@ void i386_device::x87_fabs(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
|
||||
CYCLES(6);
|
||||
}
|
||||
@ -3483,7 +3483,7 @@ void i386_device::x87_fscale(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, FALSE);
|
||||
x87_write_stack(0, value, false);
|
||||
|
||||
CYCLES(31);
|
||||
}
|
||||
@ -3505,7 +3505,7 @@ void i386_device::x87_frndint(uint8_t modrm)
|
||||
}
|
||||
|
||||
if (x87_check_exceptions())
|
||||
x87_write_stack(0, value, TRUE);
|
||||
x87_write_stack(0, value, true);
|
||||
|
||||
CYCLES(21);
|
||||
}
|
||||
@ -3549,9 +3549,9 @@ void i386_device::x87_fxtract(uint8_t modrm)
|
||||
|
||||
if (x87_check_exceptions())
|
||||
{
|
||||
x87_write_stack(0, exp80, TRUE);
|
||||
x87_write_stack(0, exp80, true);
|
||||
x87_dec_stack();
|
||||
x87_write_stack(0, sig80, TRUE);
|
||||
x87_write_stack(0, sig80, true);
|
||||
}
|
||||
|
||||
CYCLES(21);
|
||||
@ -4603,7 +4603,7 @@ void i386_device::x87_frstor(uint8_t modrm)
|
||||
}
|
||||
|
||||
for (int i = 0; i < 8; ++i)
|
||||
x87_write_stack(i, READ80(ea + i*10), FALSE);
|
||||
x87_write_stack(i, READ80(ea + i*10), false);
|
||||
|
||||
CYCLES((m_cr[0] & 1) ? 34 : 44);
|
||||
}
|
||||
|
@ -926,7 +926,7 @@ static char *hexstring(uint32_t value, int digits)
|
||||
return (buffer[1] >= '0' && buffer[1] <= '9') ? &buffer[1] : &buffer[0];
|
||||
}
|
||||
|
||||
static char *shexstring(uint32_t value, int digits, int always)
|
||||
static char *shexstring(uint32_t value, int digits, bool always)
|
||||
{
|
||||
static char buffer[20];
|
||||
if (value >= 0x80000000)
|
||||
@ -980,10 +980,10 @@ static void handle_modrm(char* s)
|
||||
}
|
||||
if( mod == 1 ) {
|
||||
disp8 = FETCHD();
|
||||
s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, TRUE) );
|
||||
s += sprintf( s, "%s", shexstring((int32_t)disp8, 0, true) );
|
||||
} else if( mod == 2 ) {
|
||||
disp16 = FETCHD16();
|
||||
s += sprintf( s, "%s", shexstring((int32_t)disp16, 0, TRUE) );
|
||||
s += sprintf( s, "%s", shexstring((int32_t)disp16, 0, true) );
|
||||
}
|
||||
s += sprintf( s, "]" );
|
||||
}
|
||||
@ -1049,17 +1049,17 @@ static char* handle_param(char* s, uint32_t param)
|
||||
|
||||
case PARAM_I8:
|
||||
i8 = FETCHD();
|
||||
s += sprintf( s, "%s", shexstring((int8_t)i8, 0, FALSE) );
|
||||
s += sprintf( s, "%s", shexstring((int8_t)i8, 0, false) );
|
||||
break;
|
||||
|
||||
case PARAM_I16:
|
||||
i16 = FETCHD16();
|
||||
s += sprintf( s, "%s", shexstring((int16_t)i16, 0, FALSE) );
|
||||
s += sprintf( s, "%s", shexstring((int16_t)i16, 0, false) );
|
||||
break;
|
||||
|
||||
case PARAM_UI8:
|
||||
i8 = FETCHD();
|
||||
s += sprintf( s, "%s", shexstring((uint8_t)i8, 0, FALSE) );
|
||||
s += sprintf( s, "%s", shexstring((uint8_t)i8, 0, false) );
|
||||
break;
|
||||
|
||||
case PARAM_IMM:
|
||||
|
@ -76,7 +76,7 @@ OP( 0x22, i_and_r8b ) { DEF_r8b; ANDB; RegByte(ModRM)=dst; CLKM(2,2
|
||||
OP( 0x23, i_and_r16w ) { DEF_r16w; ANDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); }
|
||||
OP( 0x24, i_and_ald8 ) { DEF_ald8; ANDB; Breg(AL)=dst; CLKS(4,4,2); }
|
||||
OP( 0x25, i_and_axd16) { DEF_axd16; ANDW; Wreg(AW)=dst; CLKS(4,4,2); }
|
||||
OP( 0x26, i_es ) { m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=FALSE; }
|
||||
OP( 0x26, i_es ) { m_seg_prefix=true; m_prefix_base=Sreg(DS1)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=false; }
|
||||
OP( 0x27, i_daa ) { ADJ4(6,0x60); CLKS(3,3,2); }
|
||||
|
||||
OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
|
||||
@ -85,7 +85,7 @@ OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(2,2
|
||||
OP( 0x2b, i_sub_r16w ) { DEF_r16w; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); }
|
||||
OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; Breg(AL)=dst; CLKS(4,4,2); }
|
||||
OP( 0x2d, i_sub_axd16) { DEF_axd16; SUBW; Wreg(AW)=dst; CLKS(4,4,2); }
|
||||
OP( 0x2e, i_cs ) { m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=FALSE; }
|
||||
OP( 0x2e, i_cs ) { m_seg_prefix=true; m_prefix_base=Sreg(PS)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=false; }
|
||||
OP( 0x2f, i_das ) { ADJ4(-6,-0x60); CLKS(3,3,2); }
|
||||
|
||||
OP( 0x30, i_xor_br8 ) { DEF_br8; XORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
|
||||
@ -94,7 +94,7 @@ OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(2,2
|
||||
OP( 0x33, i_xor_r16w ) { DEF_r16w; XORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,m_EA); }
|
||||
OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; Breg(AL)=dst; CLKS(4,4,2); }
|
||||
OP( 0x35, i_xor_axd16) { DEF_axd16; XORW; Wreg(AW)=dst; CLKS(4,4,2); }
|
||||
OP( 0x36, i_ss ) { m_seg_prefix=TRUE; m_prefix_base=Sreg(SS)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=FALSE; }
|
||||
OP( 0x36, i_ss ) { m_seg_prefix=true; m_prefix_base=Sreg(SS)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=false; }
|
||||
OP( 0x37, i_aaa ) { ADJB(6, (Breg(AL) > 0xf9) ? 2 : 1); CLKS(7,7,4); }
|
||||
|
||||
OP( 0x38, i_cmp_br8 ) { DEF_br8; SUBB; CLKM(2,2,2,11,11,6); }
|
||||
@ -103,7 +103,7 @@ OP( 0x3a, i_cmp_r8b ) { DEF_r8b; SUBB; CLKM(2,2,2,11,11,6);
|
||||
OP( 0x3b, i_cmp_r16w ) { DEF_r16w; SUBW; CLKR(15,15,8,15,11,6,2,m_EA); }
|
||||
OP( 0x3c, i_cmp_ald8 ) { DEF_ald8; SUBB; CLKS(4,4,2); }
|
||||
OP( 0x3d, i_cmp_axd16) { DEF_axd16; SUBW; CLKS(4,4,2); }
|
||||
OP( 0x3e, i_ds ) { m_seg_prefix=TRUE; m_prefix_base=Sreg(DS0)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=FALSE; }
|
||||
OP( 0x3e, i_ds ) { m_seg_prefix=true; m_prefix_base=Sreg(DS0)<<4; CLK(2); (this->*s_nec_instruction[fetchop()])(); m_seg_prefix=false; }
|
||||
OP( 0x3f, i_aas ) { ADJB(-6, (Breg(AL) < 6) ? -2 : -1); CLKS(7,7,4); }
|
||||
|
||||
OP( 0x40, i_inc_ax ) { IncWordReg(AW); CLK(2); }
|
||||
@ -180,10 +180,10 @@ OP( 0x62, i_chkind ) {
|
||||
}
|
||||
OP( 0x64, i_repnc ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
switch(next) { /* Segments */
|
||||
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=TRUE; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x26: m_seg_prefix=true; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=true; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=true; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=true; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
}
|
||||
|
||||
switch(next) {
|
||||
@ -203,15 +203,15 @@ OP( 0x64, i_repnc ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
|
||||
default: logerror("%06x: REPNC invalid\n",PC()); (this->*s_nec_instruction[next])();
|
||||
}
|
||||
m_seg_prefix=FALSE;
|
||||
m_seg_prefix=false;
|
||||
}
|
||||
|
||||
OP( 0x65, i_repc ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
switch(next) { /* Segments */
|
||||
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=TRUE; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x26: m_seg_prefix=true; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=true; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=true; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=true; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
}
|
||||
|
||||
switch(next) {
|
||||
@ -231,7 +231,7 @@ OP( 0x65, i_repc ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && CF); Wreg(CW)=c; break;
|
||||
default: logerror("%06x: REPC invalid\n",PC()); (this->*s_nec_instruction[next])();
|
||||
}
|
||||
m_seg_prefix=FALSE;
|
||||
m_seg_prefix=false;
|
||||
}
|
||||
|
||||
OP( 0x68, i_push_d16 ) { uint32_t tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
|
||||
@ -558,10 +558,10 @@ OP( 0xef, i_outdxax ) { write_port_word(Wreg(DW), Wreg(AW)); CLKW(12,12,5,12,8,
|
||||
OP( 0xf0, i_lock ) { logerror("%06x: Warning - BUSLOCK\n",PC()); m_no_interrupt=1; CLK(2); }
|
||||
OP( 0xf2, i_repne ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
switch(next) { /* Segments */
|
||||
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=TRUE; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x26: m_seg_prefix=true; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=true; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=true; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=true; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
}
|
||||
|
||||
switch(next) {
|
||||
@ -581,14 +581,14 @@ OP( 0xf2, i_repne ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && !ZF); Wreg(CW)=c; break;
|
||||
default: logerror("%06x: REPNE invalid\n",PC()); (this->*s_nec_instruction[next])();
|
||||
}
|
||||
m_seg_prefix=FALSE;
|
||||
m_seg_prefix=false;
|
||||
}
|
||||
OP( 0xf3, i_repe ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
switch(next) { /* Segments */
|
||||
case 0x26: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=TRUE; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=TRUE; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=TRUE; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x26: m_seg_prefix=true; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x2e: m_seg_prefix=true; m_prefix_base=Sreg(PS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x36: m_seg_prefix=true; m_prefix_base=Sreg(SS)<<4; next = fetchop(); CLK(2); break;
|
||||
case 0x3e: m_seg_prefix=true; m_prefix_base=Sreg(DS0)<<4; next = fetchop(); CLK(2); break;
|
||||
}
|
||||
|
||||
switch(next) {
|
||||
@ -608,7 +608,7 @@ OP( 0xf3, i_repe ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
|
||||
case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && ZF); Wreg(CW)=c; break;
|
||||
default: logerror("%06x: REPE invalid\n",PC()); (this->*s_nec_instruction[next])();
|
||||
}
|
||||
m_seg_prefix=FALSE;
|
||||
m_seg_prefix=false;
|
||||
}
|
||||
OP( 0xf4, i_hlt ) { logerror("%06x: HALT\n",PC()); m_halted=1; m_icount=0; }
|
||||
OP( 0xf5, i_cmc ) { m_CarryVal = !CF; CLK(2); }
|
||||
|
@ -5,11 +5,6 @@
|
||||
#define V30_TYPE 8
|
||||
#define V20_TYPE 16
|
||||
|
||||
#ifndef FALSE
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
#endif
|
||||
|
||||
/* interrupt vectors */
|
||||
enum
|
||||
{
|
||||
|
@ -5,11 +5,6 @@
|
||||
#define V30_TYPE 8
|
||||
#define V20_TYPE 16
|
||||
|
||||
#ifndef FALSE
|
||||
#define FALSE 0
|
||||
#define TRUE 1
|
||||
#endif
|
||||
|
||||
/* interrupt vectors */
|
||||
enum
|
||||
{
|
||||
|
@ -260,7 +260,7 @@ int8 nesapu_device::apu_square(square_t *chan)
|
||||
** reg3: 0-2=high freq, 7-4=vbl length counter
|
||||
*/
|
||||
|
||||
if (FALSE == chan->enabled)
|
||||
if (false == chan->enabled)
|
||||
return 0;
|
||||
|
||||
/* enveloping */
|
||||
@ -332,15 +332,15 @@ int8 nesapu_device::apu_triangle(triangle_t *chan)
|
||||
** reg3: 7-3=length counter, 2-0=high 3 bits of frequency
|
||||
*/
|
||||
|
||||
if (FALSE == chan->enabled)
|
||||
if (false == chan->enabled)
|
||||
return 0;
|
||||
|
||||
if (FALSE == chan->counter_started && 0 == (chan->regs[0] & 0x80))
|
||||
if (false == chan->counter_started && 0 == (chan->regs[0] & 0x80))
|
||||
{
|
||||
if (chan->write_latency)
|
||||
chan->write_latency--;
|
||||
if (0 == chan->write_latency)
|
||||
chan->counter_started = TRUE;
|
||||
chan->counter_started = true;
|
||||
}
|
||||
|
||||
if (chan->counter_started)
|
||||
@ -392,7 +392,7 @@ int8 nesapu_device::apu_noise(noise_t *chan)
|
||||
** reg3: 7-4=vbl length counter
|
||||
*/
|
||||
|
||||
if (FALSE == chan->enabled)
|
||||
if (false == chan->enabled)
|
||||
return 0;
|
||||
|
||||
/* enveloping */
|
||||
@ -453,8 +453,8 @@ static inline void apu_dpcmreset(dpcm_t *chan)
|
||||
chan->address = 0xC000 + (uint16) (chan->regs[2] << 6);
|
||||
chan->length = (uint16) (chan->regs[3] << 4) + 1;
|
||||
chan->bits_left = chan->length << 3;
|
||||
chan->irq_occurred = FALSE;
|
||||
chan->enabled = TRUE; /* Fixed * Proper DPCM channel ENABLE/DISABLE flag behaviour*/
|
||||
chan->irq_occurred = false;
|
||||
chan->enabled = true; /* Fixed * Proper DPCM channel ENABLE/DISABLE flag behaviour*/
|
||||
chan->vol = 0; /* Fixed * DPCM DAC resets itself when restarted */
|
||||
}
|
||||
|
||||
@ -481,7 +481,7 @@ int8 nesapu_device::apu_dpcm(dpcm_t *chan)
|
||||
|
||||
if (0 == chan->length)
|
||||
{
|
||||
chan->enabled = FALSE; /* Fixed * Proper DPCM channel ENABLE/DISABLE flag behaviour*/
|
||||
chan->enabled = false; /* Fixed * Proper DPCM channel ENABLE/DISABLE flag behaviour*/
|
||||
chan->vol=0; /* Fixed * DPCM DAC resets itself when restarted */
|
||||
if (chan->regs[0] & 0x40)
|
||||
apu_dpcmreset(chan);
|
||||
@ -489,7 +489,7 @@ int8 nesapu_device::apu_dpcm(dpcm_t *chan)
|
||||
{
|
||||
if (chan->regs[0] & 0x80) /* IRQ Generator */
|
||||
{
|
||||
chan->irq_occurred = TRUE;
|
||||
chan->irq_occurred = true;
|
||||
downcast<n2a03_device &>(m_APU.dpcm.memory->device()).set_input_line(N2A03_APU_IRQ_LINE, ASSERT_LINE);
|
||||
}
|
||||
break;
|
||||
@ -567,7 +567,7 @@ inline void nesapu_device::apu_regwrite(int address, uint8 value)
|
||||
|
||||
if (m_APU.tri.enabled)
|
||||
{ /* ??? */
|
||||
if (FALSE == m_APU.tri.counter_started)
|
||||
if (false == m_APU.tri.counter_started)
|
||||
m_APU.tri.linear_length = m_sync_times2[value & 0x7F];
|
||||
}
|
||||
|
||||
@ -605,7 +605,7 @@ inline void nesapu_device::apu_regwrite(int address, uint8 value)
|
||||
|
||||
if (m_APU.tri.enabled)
|
||||
{
|
||||
m_APU.tri.counter_started = FALSE;
|
||||
m_APU.tri.counter_started = false;
|
||||
m_APU.tri.vbl_length = m_vbl_times[value >> 3];
|
||||
m_APU.tri.linear_length = m_sync_times2[m_APU.tri.regs[0] & 0x7F];
|
||||
}
|
||||
@ -641,7 +641,7 @@ inline void nesapu_device::apu_regwrite(int address, uint8 value)
|
||||
m_APU.dpcm.regs[0] = value;
|
||||
if (0 == (value & 0x80)) {
|
||||
downcast<n2a03_device &>(m_APU.dpcm.memory->device()).set_input_line(N2A03_APU_IRQ_LINE, CLEAR_LINE);
|
||||
m_APU.dpcm.irq_occurred = FALSE;
|
||||
m_APU.dpcm.irq_occurred = false;
|
||||
}
|
||||
break;
|
||||
|
||||
@ -669,53 +669,53 @@ inline void nesapu_device::apu_regwrite(int address, uint8 value)
|
||||
|
||||
case APU_SMASK:
|
||||
if (value & 0x01)
|
||||
m_APU.squ[0].enabled = TRUE;
|
||||
m_APU.squ[0].enabled = true;
|
||||
else
|
||||
{
|
||||
m_APU.squ[0].enabled = FALSE;
|
||||
m_APU.squ[0].enabled = false;
|
||||
m_APU.squ[0].vbl_length = 0;
|
||||
}
|
||||
|
||||
if (value & 0x02)
|
||||
m_APU.squ[1].enabled = TRUE;
|
||||
m_APU.squ[1].enabled = true;
|
||||
else
|
||||
{
|
||||
m_APU.squ[1].enabled = FALSE;
|
||||
m_APU.squ[1].enabled = false;
|
||||
m_APU.squ[1].vbl_length = 0;
|
||||
}
|
||||
|
||||
if (value & 0x04)
|
||||
m_APU.tri.enabled = TRUE;
|
||||
m_APU.tri.enabled = true;
|
||||
else
|
||||
{
|
||||
m_APU.tri.enabled = FALSE;
|
||||
m_APU.tri.enabled = false;
|
||||
m_APU.tri.vbl_length = 0;
|
||||
m_APU.tri.linear_length = 0;
|
||||
m_APU.tri.counter_started = FALSE;
|
||||
m_APU.tri.counter_started = false;
|
||||
m_APU.tri.write_latency = 0;
|
||||
}
|
||||
|
||||
if (value & 0x08)
|
||||
m_APU.noi.enabled = TRUE;
|
||||
m_APU.noi.enabled = true;
|
||||
else
|
||||
{
|
||||
m_APU.noi.enabled = FALSE;
|
||||
m_APU.noi.enabled = false;
|
||||
m_APU.noi.vbl_length = 0;
|
||||
}
|
||||
|
||||
if (value & 0x10)
|
||||
{
|
||||
/* only reset dpcm values if DMA is finished */
|
||||
if (FALSE == m_APU.dpcm.enabled)
|
||||
if (false == m_APU.dpcm.enabled)
|
||||
{
|
||||
m_APU.dpcm.enabled = TRUE;
|
||||
m_APU.dpcm.enabled = true;
|
||||
apu_dpcmreset(&m_APU.dpcm);
|
||||
}
|
||||
}
|
||||
else
|
||||
m_APU.dpcm.enabled = FALSE;
|
||||
m_APU.dpcm.enabled = false;
|
||||
|
||||
m_APU.dpcm.irq_occurred = FALSE;
|
||||
m_APU.dpcm.irq_occurred = false;
|
||||
|
||||
break;
|
||||
default:
|
||||
@ -746,10 +746,10 @@ inline uint8 nesapu_device::apu_read(int address)
|
||||
if (m_APU.noi.vbl_length > 0)
|
||||
readval |= 0x08;
|
||||
|
||||
if (m_APU.dpcm.enabled == TRUE)
|
||||
if (m_APU.dpcm.enabled == true)
|
||||
readval |= 0x10;
|
||||
|
||||
if (m_APU.dpcm.irq_occurred == TRUE)
|
||||
if (m_APU.dpcm.irq_occurred == true)
|
||||
readval |= 0x80;
|
||||
|
||||
return readval;
|
||||
|
@ -28,12 +28,6 @@
|
||||
#ifndef __NES_DEFS_H__
|
||||
#define __NES_DEFS_H__
|
||||
|
||||
/* BOOLEAN CONSTANTS */
|
||||
#ifndef TRUE
|
||||
#define TRUE 1
|
||||
#define FALSE 0
|
||||
#endif
|
||||
|
||||
/* REGULAR TYPE DEFINITIONS */
|
||||
typedef int8_t int8;
|
||||
typedef int16_t int16;
|
||||
@ -41,7 +35,6 @@ typedef int32_t int32;
|
||||
typedef uint8_t uint8;
|
||||
typedef uint16_t uint16;
|
||||
typedef uint32_t uint32;
|
||||
typedef uint8_t boolean;
|
||||
|
||||
|
||||
/* QUEUE TYPES */
|
||||
@ -118,7 +111,7 @@ struct square_t
|
||||
float sweep_phase;
|
||||
uint8 adder;
|
||||
uint8 env_vol;
|
||||
boolean enabled;
|
||||
bool enabled;
|
||||
};
|
||||
|
||||
/* Triangle Wave */
|
||||
@ -147,8 +140,8 @@ struct triangle_t
|
||||
float phaseacc;
|
||||
float output_vol;
|
||||
uint8 adder;
|
||||
boolean counter_started;
|
||||
boolean enabled;
|
||||
bool counter_started;
|
||||
bool enabled;
|
||||
};
|
||||
|
||||
/* Noise Wave */
|
||||
@ -176,7 +169,7 @@ struct noise_t
|
||||
float output_vol;
|
||||
float env_phase;
|
||||
uint8 env_vol;
|
||||
boolean enabled;
|
||||
bool enabled;
|
||||
};
|
||||
|
||||
/* DPCM Wave */
|
||||
@ -207,8 +200,8 @@ struct dpcm_t
|
||||
float phaseacc;
|
||||
float output_vol;
|
||||
uint8 cur_byte;
|
||||
boolean enabled;
|
||||
boolean irq_occurred;
|
||||
bool enabled;
|
||||
bool irq_occurred;
|
||||
address_space *memory;
|
||||
signed char vol;
|
||||
};
|
||||
|
Loading…
Reference in New Issue
Block a user