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https://github.com/holub/mame
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my1stddr - some ugly stuff to pave way for real improvements (proves it is running etc.) (nw) (#5104)
* my1stddr - some ugly stuff to pave way for real improvements (proves it is running etc.) * log stuff (nw) * log notes (nw) * there's a pointer to the spritelist in the regs, make a note of it (nw)
This commit is contained in:
David Haywood
R. Belmont
parent
d110ecf603
commit
5f62a4f113
@ -39,7 +39,8 @@ public:
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_screen(*this, "screen"),
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m_gfxdecode(*this, "gfxdecode")
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m_gfxdecode(*this, "gfxdecode"),
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m_mainram(*this, "mainram")
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{ }
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void trkfldch(machine_config &config);
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@ -55,6 +56,7 @@ private:
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required_device<cpu_device> m_maincpu;
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required_device<screen_device> m_screen;
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required_device<gfxdecode_device> m_gfxdecode;
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required_shared_ptr<uint8_t> m_mainram;
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uint32_t screen_update_trkfldch(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void trkfldch_map(address_map &map);
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@ -70,6 +72,9 @@ private:
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uint8_t m_unkregs[0x100];
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uint8_t m_unkdata[0x100000];
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int m_unkdata_addr;
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};
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void trkfldch_state::video_start()
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@ -78,6 +83,23 @@ void trkfldch_state::video_start()
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uint32_t trkfldch_state::screen_update_trkfldch(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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bitmap.fill(0, cliprect);
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// at 0x1189 in my1stddr
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// at 0xe9c (actually 0x0d0c when fully populated) in trkfldch
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// 7861 / 7860 point here most of the time in both games (so maybe DMA source, or just uses a direct pointer)
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for (int i = 0x1189; i < 0x1600; i += 5)
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{
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// printf("entry %02x %02x %02x %02x %02x\n", m_mainram[i + 0], m_mainram[i + 1], m_mainram[i + 2], m_mainram[i + 3], m_mainram[i + 4]);
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int y = m_mainram[i + 1];
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int x = m_mainram[i + 3];
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gfx_element *gfx = m_gfxdecode->gfx(0);
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gfx->transpen(bitmap,cliprect,0x1000,0,0,0,x,y,0);
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}
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return 0;
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}
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@ -86,7 +108,7 @@ uint32_t trkfldch_state::screen_update_trkfldch(screen_device &screen, bitmap_in
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void trkfldch_state::trkfldch_map(address_map &map)
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{
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map(0x000000, 0x003fff).ram();
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map(0x000000, 0x003fff).ram().share("mainram");
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map(0x006800, 0x006cff).ram();
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@ -172,6 +194,45 @@ TIMER_DEVICE_CALLBACK_MEMBER(trkfldch_state::scanline)
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static INPUT_PORTS_START( trkfldch )
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PORT_START("IN0")
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PORT_DIPNAME( 0x01, 0x01, "IN0" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("O") // selects / forward
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_16WAY
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_16WAY
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_16WAY
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_16WAY
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("X") // goes back
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("IN1")
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PORT_DIPNAME( 0x01, 0x01, "IN1" )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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// dummy, doesn't appear to be tile based
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@ -230,6 +291,15 @@ READ8_MEMBER(trkfldch_state::unkregs_r)
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//logerror("%s: unkregs_r (IRQ state?) %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x02: // ends up being read as a side effect of reading a 16-bit word at 0x1, but also directly too?
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x03: // ends up being read as a side effect of reading a 16-bit word at 0x2, any other purpose?
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x04:
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ret = 0xff;
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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@ -240,9 +310,86 @@ READ8_MEMBER(trkfldch_state::unkregs_r)
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x06:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x42:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x43:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x44:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x54:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x55:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x56: // side effect of reading 55
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x70: // read in irq (inputs?)
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ret = machine().rand();
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//logerror("%s: unkregs_r (IRQ state?) %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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ret = ioport("IN0")->read();
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x71:
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ret = ioport("IN1")->read();
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x73:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x74:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x75:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x76:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x77:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x7f:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0x80: // only read as a side-effect of reading 0x7f?
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0xb6:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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case 0xb7:
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//logerror("%s: unkregs_r %04x (returning %02x)\n", machine().describe_context(), offset, ret);
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break;
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@ -569,8 +716,15 @@ WRITE8_MEMBER(trkfldch_state::unkregs_w)
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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break;
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case 0xb6: // significant data transfer shortly after boot
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case 0xb6: // significant data transfer shortly after boot, seems to clock writes with 0073 writing d0 / c0? (then writes 2 bytes here)
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// values are coming from a structure in RAM
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// how does it reset?
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//logerror("%s: unkregs_w %04x %02x\n", machine().describe_context(), offset, data);
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m_unkdata[m_unkdata_addr] = data;
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m_unkdata_addr++;
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m_unkdata_addr &= 0xfffff;
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break;
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@ -590,6 +744,8 @@ WRITE8_MEMBER(trkfldch_state::unkregs_w)
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void trkfldch_state::machine_start()
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{
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save_item(NAME(m_unkdata_addr));
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save_item(NAME(m_unkdata));
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}
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void trkfldch_state::machine_reset()
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@ -598,6 +754,12 @@ void trkfldch_state::machine_reset()
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for (int i = 0; i < 0x100; i++)
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m_unkregs[i] = 0x00;
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for (int i = 0; i < 0x100000; i++)
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m_unkdata[i] = 0;
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m_unkdata_addr = 0;
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}
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void trkfldch_state::trkfldch(machine_config &config)
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