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vii/unsp cleanups for cowering (nw)
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982f36e328
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5fc6c22db6
@ -16,7 +16,7 @@ const device_type UNSP = &device_creator<unsp_device>;
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unsp_device::unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: cpu_device(mconfig, UNSP, "u'nSP", tag, owner, clock, "unsp", __FILE__)
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, m_program_config("program", ENDIANNESS_BIG, 16, 23, 0)
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, m_program_config("program", ENDIANNESS_BIG, 16, 23, -1)
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{
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}
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@ -100,19 +100,19 @@ offs_t unsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
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void unsp_device::unimplemented_opcode(UINT16 op)
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{
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fatalerror("UNSP: unknown opcode %04x at %04x\n", op, UNSP_LPC << 1);
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fatalerror("UNSP: unknown opcode %04x at %04x\n", op, UNSP_LPC);
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}
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/*****************************************************************************/
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UINT16 unsp_device::READ16(UINT32 address)
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{
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return m_program->read_word(address << 1);
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return m_program->read_word(address<<1);
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}
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void unsp_device::WRITE16(UINT32 address, UINT16 data)
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{
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m_program->write_word(address << 1, data);
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m_program->write_word(address<<1, data);
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}
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/*****************************************************************************/
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@ -152,11 +152,11 @@ void unsp_device::state_export(const device_state_entry &entry)
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switch (entry.index())
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{
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case UNSP_PC:
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m_debugger_temp = UNSP_LPC << 1;
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m_debugger_temp = UNSP_LPC;
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break;
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case STATE_GENPC:
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m_debugger_temp = UNSP_LPC << 1;
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m_debugger_temp = UNSP_LPC;
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break;
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}
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}
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@ -166,8 +166,8 @@ void unsp_device::state_import(const device_state_entry &entry)
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switch (entry.index())
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{
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case UNSP_PC:
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UNSP_REG(PC) = (m_debugger_temp & 0x0001fffe) >> 1;
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UNSP_REG(SR) = (UNSP_REG(SR) & 0xffc0) | ((m_debugger_temp & 0x007e0000) >> 17);
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UNSP_REG(PC) = m_debugger_temp & 0x0000ffff;
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UNSP_REG(SR) = (UNSP_REG(SR) & 0xffc0) | ((m_debugger_temp & 0x003f0000) >> 16);
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break;
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}
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}
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@ -230,8 +230,7 @@ void unsp_device::execute_run()
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while (m_icount > 0)
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{
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debugger_instruction_hook(this, UNSP_LPC<<1);
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debugger_instruction_hook(this, UNSP_LPC);
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op = READ16(UNSP_LPC);
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UNSP_REG(PC)++;
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@ -53,7 +53,7 @@ static const char *alu[] =
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/*****************************************************************************/
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#define UNSP_DASM_OK ((2 * (OP2X ? 2 : 1)) | DASMFLAG_SUPPORTED)
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#define UNSP_DASM_OK ((OP2X ? 2 : 1) | DASMFLAG_SUPPORTED)
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CPU_DISASSEMBLE( unsp )
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{
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@ -68,7 +68,7 @@ CPU_DISASSEMBLE( unsp )
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if(OP0 < 0xf && OPA == 0x7 && OP1 < 2)
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{
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print("%s %04x", jmp[OP0], OP1 ? (pc - OPIMM*2) : (pc + OPIMM*2));
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print("%s %04x", jmp[OP0], OP1 ? (pc - OPIMM + 1) : (pc + OPIMM + 1));
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return UNSP_DASM_OK;
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}
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@ -663,8 +663,6 @@ READ16_MEMBER( vii_state::io_r )
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static const char *const gpioregs[] = { "GPIO Data Port", "GPIO Buffer Port", "GPIO Direction Port", "GPIO Attribute Port", "GPIO IRQ/Latch Port" };
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static const char gpioports[] = { 'A', 'B', 'C' };
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offset -= 0x500;
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UINT16 val = m_io_regs[offset];
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switch(offset)
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@ -738,8 +736,6 @@ WRITE16_MEMBER( vii_state::io_w )
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UINT16 temp = 0;
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offset -= 0x500;
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switch(offset)
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{
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case 0x00: // GPIO special function select
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@ -901,14 +897,14 @@ READ16_MEMBER( vii_state::rom_r )
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}
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static ADDRESS_MAP_START( vii_mem, AS_PROGRAM, 16, vii_state )
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AM_RANGE( 0x000000, 0x004fff ) AM_RAM AM_SHARE("p_ram")
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AM_RANGE( 0x005000, 0x0051ff ) AM_READWRITE(video_r, video_w)
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AM_RANGE( 0x005200, 0x0055ff ) AM_RAM AM_SHARE("p_rowscroll")
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AM_RANGE( 0x005600, 0x0057ff ) AM_RAM AM_SHARE("p_palette")
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AM_RANGE( 0x005800, 0x005fff ) AM_RAM AM_SHARE("p_spriteram")
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AM_RANGE( 0x006000, 0x006fff ) AM_READWRITE(audio_r, audio_w)
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AM_RANGE( 0x007000, 0x007fff ) AM_READWRITE(io_r, io_w)
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AM_RANGE( 0x008000, 0x7fffff ) AM_READ(rom_r)
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AM_RANGE( 0x000000, 0x0027ff ) AM_RAM AM_SHARE("p_ram")
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AM_RANGE( 0x002800, 0x0028ff ) AM_READWRITE(video_r, video_w)
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AM_RANGE( 0x002900, 0x002aff ) AM_RAM AM_SHARE("p_rowscroll")
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AM_RANGE( 0x002b00, 0x002bff ) AM_RAM AM_SHARE("p_palette")
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AM_RANGE( 0x002c00, 0x002fff ) AM_RAM AM_SHARE("p_spriteram")
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AM_RANGE( 0x003000, 0x0037ff ) AM_READWRITE(audio_r, audio_w)
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AM_RANGE( 0x003d00, 0x003eff ) AM_READWRITE(io_r, io_w)
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AM_RANGE( 0x004000, 0x3fffff ) AM_READ(rom_r)
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ADDRESS_MAP_END
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static INPUT_PORTS_START( vii )
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