mirror of
https://github.com/holub/mame
synced 2025-10-05 08:41:31 +03:00
xbox: move at devices into mcpx_lpc pci device (nw)
More to come.
This commit is contained in:
parent
a445d1cc63
commit
6065a0f980
@ -1667,7 +1667,7 @@ void chihiro_state::baseboard_ide_event(int type, uint8_t *read_buffer, uint8_t
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// clear
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write_buffer[0] = write_buffer[1] = write_buffer[2] = write_buffer[3] = 0;
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// irq 10 active
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xbox_base_devs.pic8259_2->ir2_w(1);
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mcpxlpc->irq10(1);
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}
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uint8_t *chihiro_state::baseboard_ide_dimmboard(uint32_t lba)
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@ -1704,7 +1704,7 @@ WRITE32_MEMBER(chihiro_state::mediaboard_w)
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logerror("I/O port write %04x mask %08X value %08X\n", offset * 4 + 0x4000, mem_mask, data);
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// irq 10
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if ((offset == 0xe0/4) && ACCESSING_BITS_8_15)
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xbox_base_devs.pic8259_2->ir2_w(0);
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mcpxlpc->irq10(0);
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}
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void chihiro_state::chihiro_map(address_map &map)
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@ -17,7 +17,6 @@
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#include "cpu/i386/i386.h"
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#include "machine/atapicdr.h"
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#include "machine/idehd.h"
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#include "machine/pit8253.h"
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#include "debug/debugcmd.h"
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#include "debug/debugcon.h"
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@ -105,20 +105,18 @@ protected:
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uint32_t screen_update_callback(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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virtual void machine_start() override;
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DECLARE_WRITE_LINE_MEMBER(xbox_pic8259_1_set_int_line);
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DECLARE_WRITE_LINE_MEMBER(maincpu_interrupt);
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DECLARE_READ8_MEMBER(get_slave_ack);
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DECLARE_WRITE_LINE_MEMBER(xbox_pit8254_out0_changed);
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DECLARE_WRITE_LINE_MEMBER(xbox_pit8254_out2_changed);
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DECLARE_WRITE_LINE_MEMBER(xbox_ohci_usb_interrupt_changed);
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DECLARE_WRITE_LINE_MEMBER(xbox_smbus_interrupt_changed);
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DECLARE_WRITE_LINE_MEMBER(xbox_nv2a_interrupt_changed);
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DECLARE_WRITE_LINE_MEMBER(pit8254_out0_changed);
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DECLARE_WRITE_LINE_MEMBER(pit8254_out2_changed);
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DECLARE_WRITE_LINE_MEMBER(ohci_usb_interrupt_changed);
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DECLARE_WRITE_LINE_MEMBER(smbus_interrupt_changed);
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DECLARE_WRITE_LINE_MEMBER(ide_interrupt_changed);
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DECLARE_WRITE_LINE_MEMBER(nv2a_interrupt_changed);
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IRQ_CALLBACK_MEMBER(irq_callback);
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struct xbox_devices {
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pic8259_device *pic8259_1;
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pic8259_device *pic8259_2;
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bus_master_ide_controller_device *ide;
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} xbox_base_devs;
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mcpx_lpc_device *mcpxlpc;
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bus_master_ide_controller_device *ide;
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struct superio_state
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{
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bool configuration_mode;
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@ -5,6 +5,7 @@
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#pragma once
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#include "machine/pit8253.h"
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#include "xbox_nv2a.h"
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#include "xbox_usb.h"
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@ -61,15 +62,40 @@ class mcpx_lpc_device : public pci_device {
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public:
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mcpx_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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auto interrupt_output() { return m_interrupt_output.bind(); }
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uint32_t acknowledge();
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void debug_generate_irq(int irq, int state);
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DECLARE_READ32_MEMBER(lpc_r);
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DECLARE_WRITE32_MEMBER(lpc_w);
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DECLARE_WRITE_LINE_MEMBER(irq1);
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DECLARE_WRITE_LINE_MEMBER(irq3);
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DECLARE_WRITE_LINE_MEMBER(irq11);
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DECLARE_WRITE_LINE_MEMBER(irq10);
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DECLARE_WRITE_LINE_MEMBER(irq14);
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protected:
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_add_mconfig(machine_config &config) override;
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virtual void map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
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uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override;
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DECLARE_WRITE_LINE_MEMBER(interrupt_ouptut_changed);
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DECLARE_READ8_MEMBER(get_slave_ack);
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DECLARE_WRITE_LINE_MEMBER(pit8254_out0_changed);
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DECLARE_WRITE_LINE_MEMBER(pit8254_out2_changed);
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private:
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void internal_io_map(address_map &map);
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void lpc_io(address_map &map);
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devcb_write_line m_interrupt_output;
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required_device<pic8259_device> pic8259_1;
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required_device<pic8259_device> pic8259_2;
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required_device<pit8254_device> pit8254;
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};
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DECLARE_DEVICE_TYPE(MCPX_LPC, mcpx_lpc_device)
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@ -7,7 +7,6 @@
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#include "includes/xbox.h"
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#include "cpu/i386/i386.h"
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#include "machine/pit8253.h"
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#include "debug/debugcon.h"
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#include "debug/debugcmd.h"
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@ -523,54 +522,7 @@ void xbox_base_state::debug_generate_irq(int irq, bool active)
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debug_irq_active = false;
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state = 0;
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}
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switch (irq)
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{
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case 0:
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xbox_base_devs.pic8259_1->ir0_w(state);
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break;
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case 1:
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xbox_base_devs.pic8259_1->ir1_w(state);
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break;
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case 3:
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xbox_base_devs.pic8259_1->ir3_w(state);
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break;
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case 4:
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xbox_base_devs.pic8259_1->ir4_w(state);
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break;
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case 5:
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xbox_base_devs.pic8259_1->ir5_w(state);
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break;
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case 6:
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xbox_base_devs.pic8259_1->ir6_w(state);
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break;
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case 7:
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xbox_base_devs.pic8259_1->ir7_w(state);
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break;
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case 8:
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xbox_base_devs.pic8259_2->ir0_w(state);
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break;
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case 9:
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xbox_base_devs.pic8259_2->ir1_w(state);
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break;
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case 10:
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xbox_base_devs.pic8259_2->ir2_w(state);
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break;
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case 11:
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xbox_base_devs.pic8259_2->ir3_w(state);
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break;
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case 12:
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xbox_base_devs.pic8259_2->ir4_w(state);
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break;
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case 13:
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xbox_base_devs.pic8259_2->ir5_w(state);
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break;
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case 14:
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xbox_base_devs.pic8259_2->ir6_w(state);
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break;
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case 15:
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xbox_base_devs.pic8259_2->ir7_w(state);
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break;
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}
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mcpxlpc->debug_generate_irq(irq, state);
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}
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WRITE_LINE_MEMBER(xbox_base_state::vblank_callback)
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@ -587,54 +539,38 @@ uint32_t xbox_base_state::screen_update_callback(screen_device &screen, bitmap_r
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* PIC & PIT
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*/
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WRITE_LINE_MEMBER(xbox_base_state::xbox_pic8259_1_set_int_line)
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WRITE_LINE_MEMBER(xbox_base_state::maincpu_interrupt)
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{
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m_maincpu->set_input_line(0, state ? HOLD_LINE : CLEAR_LINE);
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}
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READ8_MEMBER(xbox_base_state::get_slave_ack)
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{
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if (offset == 2) { // IRQ = 2
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return xbox_base_devs.pic8259_2->acknowledge();
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}
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return 0x00;
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}
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IRQ_CALLBACK_MEMBER(xbox_base_state::irq_callback)
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{
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int r = 0;
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r = xbox_base_devs.pic8259_1->acknowledge();
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int r;
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r = mcpxlpc->acknowledge();
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if (debug_irq_active)
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debug_generate_irq(debug_irq_number, false);
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return r;
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}
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WRITE_LINE_MEMBER(xbox_base_state::xbox_pit8254_out0_changed)
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WRITE_LINE_MEMBER(xbox_base_state::ohci_usb_interrupt_changed)
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{
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if (xbox_base_devs.pic8259_1)
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{
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xbox_base_devs.pic8259_1->ir0_w(state);
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}
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mcpxlpc->irq1(state);
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}
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WRITE_LINE_MEMBER(xbox_base_state::xbox_pit8254_out2_changed)
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WRITE_LINE_MEMBER(xbox_base_state::nv2a_interrupt_changed)
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{
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//xbox_speaker_set_input( state ? 1 : 0 );
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mcpxlpc->irq3(state);
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}
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WRITE_LINE_MEMBER(xbox_base_state::xbox_ohci_usb_interrupt_changed)
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WRITE_LINE_MEMBER(xbox_base_state::smbus_interrupt_changed)
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{
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xbox_base_devs.pic8259_1->ir1_w(state);
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mcpxlpc->irq11(state);
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}
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WRITE_LINE_MEMBER(xbox_base_state::xbox_smbus_interrupt_changed)
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WRITE_LINE_MEMBER(xbox_base_state::ide_interrupt_changed)
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{
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xbox_base_devs.pic8259_2->ir3_w(state);
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}
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WRITE_LINE_MEMBER(xbox_base_state::xbox_nv2a_interrupt_changed)
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{
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xbox_base_devs.pic8259_1->ir3_w(state);
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mcpxlpc->irq14(state);
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}
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/*
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@ -846,9 +782,8 @@ void xbox_base_state::machine_start()
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{
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find_debug_params();
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nvidia_nv2a = subdevice<nv2a_gpu_device>("pci:1e.0:00.0")->debug_get_renderer();
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xbox_base_devs.pic8259_1 = subdevice<pic8259_device>("pic8259_1");
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xbox_base_devs.pic8259_2 = subdevice<pic8259_device>("pic8259_2");
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xbox_base_devs.ide = subdevice<bus_master_ide_controller_device>("ide");
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mcpxlpc = subdevice<mcpx_lpc_device>(":pci:01.0");
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ide = subdevice<bus_master_ide_controller_device>("ide");
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if (machine().debug_flags & DEBUG_FLAG_ENABLED)
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{
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using namespace std::placeholders;
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@ -869,7 +804,7 @@ void xbox_base_state::machine_start()
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memset(&superiost, 0, sizeof(superiost));
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superiost.configuration_mode = false;
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superiost.registers[0][0x26] = 0x2e; // Configuration port address byte 0
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// savestates
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// savestates
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save_item(NAME(debug_irq_active));
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save_item(NAME(debug_irq_number));
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}
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@ -890,10 +825,7 @@ void xbox_base_state::xbox_base_map(address_map &map)
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void xbox_base_state::xbox_base_map_io(address_map &map)
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{
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map(0x0020, 0x0023).rw("pic8259_1", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
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map(0x002e, 0x002f).rw(FUNC(xbox_base_state::superio_read), FUNC(xbox_base_state::superio_write));
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map(0x0040, 0x0043).rw("pit8254", FUNC(pit8254_device::read), FUNC(pit8254_device::write));
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map(0x00a0, 0x00a3).rw("pic8259_2", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
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map(0x01f0, 0x01f7).rw(":pci:09.0:ide", FUNC(bus_master_ide_controller_device::cs0_r), FUNC(bus_master_ide_controller_device::cs0_w));
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map(0x03f8, 0x03ff).rw(FUNC(xbox_base_state::superiors232_read), FUNC(xbox_base_state::superiors232_write));
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#if 0
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@ -917,40 +849,24 @@ MACHINE_CONFIG_START(xbox_base_state::xbox_base)
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MCFG_QUANTUM_TIME(attotime::from_hz(6000))
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PCI_ROOT(config, ":pci", 0);
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NV2A_HOST(config, ":pci:00.0", 0, m_maincpu);
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NV2A_RAM(config, ":pci:00.3", 0);
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MCPX_LPC(config, ":pci:01.0", 0);
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MCPX_SMBUS(config, ":pci:01.1", 0).interrupt_handler().set(FUNC(xbox_base_state::xbox_smbus_interrupt_changed));
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XBOX_PIC16LC(config, ":pci:01.1:10", 0);
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XBOX_CX25871(config, ":pci:01.1:45", 0);
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XBOX_EEPROM(config, ":pci:01.1:54", 0);
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MCPX_OHCI(config, ":pci:02.0", 0).interrupt_handler().set(FUNC(xbox_base_state::xbox_ohci_usb_interrupt_changed));
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MCPX_OHCI(config, ":pci:03.0", 0);
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MCPX_ETH(config, ":pci:04.0", 0);
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MCPX_APU(config, ":pci:05.0", 0, m_maincpu);
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PCI_ROOT(config, ":pci", 0);
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NV2A_HOST(config, ":pci:00.0", 0, m_maincpu);
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NV2A_RAM(config, ":pci:00.3", 0);
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MCPX_LPC(config, ":pci:01.0", 0).interrupt_output().set(FUNC(xbox_base_state::maincpu_interrupt));
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MCPX_SMBUS(config, ":pci:01.1", 0).interrupt_handler().set(FUNC(xbox_base_state::smbus_interrupt_changed));
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XBOX_PIC16LC(config, ":pci:01.1:10", 0);
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XBOX_CX25871(config, ":pci:01.1:45", 0);
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XBOX_EEPROM(config, ":pci:01.1:54", 0);
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MCPX_OHCI(config, ":pci:02.0", 0).interrupt_handler().set(FUNC(xbox_base_state::ohci_usb_interrupt_changed));
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MCPX_OHCI(config, ":pci:03.0", 0);
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MCPX_ETH(config, ":pci:04.0", 0);
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MCPX_APU(config, ":pci:05.0", 0, m_maincpu);
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MCPX_AC97_AUDIO(config, ":pci:06.0", 0);
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MCPX_AC97_MODEM(config, ":pci:06.1", 0);
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PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0);
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MCPX_IDE(config, ":pci:09.0", 0).interrupt_handler().set("pic8259_2", FUNC(pic8259_device::ir6_w));
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NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0);
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NV2A_GPU(config, ":pci:1e.0:00.0", 0, m_maincpu).interrupt_handler().set(FUNC(xbox_base_state::xbox_nv2a_interrupt_changed));
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pic8259_device &pic8259_1(PIC8259(config, "pic8259_1", 0));
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pic8259_1.out_int_callback().set(FUNC(xbox_base_state::xbox_pic8259_1_set_int_line));
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pic8259_1.in_sp_callback().set_constant(1);
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pic8259_1.read_slave_ack_callback().set(FUNC(xbox_base_state::get_slave_ack));
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pic8259_device &pic8259_2(PIC8259(config, "pic8259_2", 0));
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pic8259_2.out_int_callback().set("pic8259_1", FUNC(pic8259_device::ir2_w));
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pic8259_2.in_sp_callback().set_constant(0);
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pit8254_device &pit8254(PIT8254(config, "pit8254", 0));
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pit8254.set_clk<0>(1125000); /* heartbeat IRQ */
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pit8254.out_handler<0>().set(FUNC(xbox_base_state::xbox_pit8254_out0_changed));
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pit8254.set_clk<1>(1125000); /* (unused) dram refresh */
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pit8254.set_clk<2>(1125000); /* (unused) pio port c pin 4, and speaker polling enough */
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pit8254.out_handler<2>().set(FUNC(xbox_base_state::xbox_pit8254_out2_changed));
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PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0);
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MCPX_IDE(config, ":pci:09.0", 0).interrupt_handler().set(FUNC(xbox_base_state::ide_interrupt_changed));
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NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0);
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NV2A_GPU(config, ":pci:1e.0:00.0", 0, m_maincpu).interrupt_handler().set(FUNC(xbox_base_state::nv2a_interrupt_changed));
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -88,8 +88,25 @@ void mcpx_lpc_device::lpc_io(address_map &map)
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map(0x00000000, 0x000000ff).rw(FUNC(mcpx_lpc_device::lpc_r), FUNC(mcpx_lpc_device::lpc_w));
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}
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void mcpx_lpc_device::internal_io_map(address_map &map)
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{
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map(0x0020, 0x0023).rw("pic8259_1", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
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map(0x0040, 0x0043).rw("pit8254", FUNC(pit8254_device::read), FUNC(pit8254_device::write));
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map(0x00a0, 0x00a3).rw("pic8259_2", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
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}
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void mcpx_lpc_device::map_extra(uint64_t memory_window_start, uint64_t memory_window_end, uint64_t memory_offset, address_space *memory_space,
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uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space)
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{
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io_space->install_device(0, 0xffff, *this, &mcpx_lpc_device::internal_io_map);
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}
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mcpx_lpc_device::mcpx_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: pci_device(mconfig, MCPX_LPC, tag, owner, clock)
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: pci_device(mconfig, MCPX_LPC, tag, owner, clock),
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m_interrupt_output(*this),
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pic8259_1(*this, "pic8259_1"),
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pic8259_2(*this, "pic8259_2"),
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pit8254(*this, "pit8254")
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{
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set_ids(0x10de01b2, 0xb4, 0, 0); // revision id must be at least 0xb4, otherwise usb will require a hub
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}
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@ -97,6 +114,7 @@ mcpx_lpc_device::mcpx_lpc_device(const machine_config &mconfig, const char *tag,
|
||||
void mcpx_lpc_device::device_start()
|
||||
{
|
||||
pci_device::device_start();
|
||||
m_interrupt_output.resolve_safe();
|
||||
add_map(0x00000100, M_IO, FUNC(mcpx_lpc_device::lpc_io));
|
||||
bank_infos[0].adr = 0x8000;
|
||||
}
|
||||
@ -106,6 +124,32 @@ void mcpx_lpc_device::device_reset()
|
||||
pci_device::device_reset();
|
||||
}
|
||||
|
||||
void mcpx_lpc_device::device_add_mconfig(machine_config &config)
|
||||
{
|
||||
pic8259_device &pic8259_1(PIC8259(config, "pic8259_1", 0));
|
||||
pic8259_1.out_int_callback().set(FUNC(mcpx_lpc_device::interrupt_ouptut_changed));
|
||||
pic8259_1.in_sp_callback().set_constant(1);
|
||||
pic8259_1.read_slave_ack_callback().set(FUNC(mcpx_lpc_device::get_slave_ack));
|
||||
|
||||
pic8259_device &pic8259_2(PIC8259(config, "pic8259_2", 0));
|
||||
pic8259_2.out_int_callback().set("pic8259_1", FUNC(pic8259_device::ir2_w));
|
||||
pic8259_2.in_sp_callback().set_constant(0);
|
||||
|
||||
pit8254_device &pit8254(PIT8254(config, "pit8254", 0));
|
||||
pit8254.set_clk<0>(1125000); /* heartbeat IRQ */
|
||||
pit8254.out_handler<0>().set(FUNC(mcpx_lpc_device::pit8254_out0_changed));
|
||||
pit8254.set_clk<1>(1125000); /* (unused) dram refresh */
|
||||
pit8254.set_clk<2>(1125000); /* (unused) pio port c pin 4, and speaker polling enough */
|
||||
pit8254.out_handler<2>().set(FUNC(mcpx_lpc_device::pit8254_out2_changed));
|
||||
|
||||
/*
|
||||
More devices are needed:
|
||||
82093 compatible I/O APIC
|
||||
dual 8237 DMA controllers
|
||||
MC146818A/DS12887 compatible RTC with 256byte battery backed-up RAM
|
||||
*/
|
||||
}
|
||||
|
||||
READ32_MEMBER(mcpx_lpc_device::lpc_r)
|
||||
{
|
||||
return 0;
|
||||
@ -115,6 +159,110 @@ WRITE32_MEMBER(mcpx_lpc_device::lpc_w)
|
||||
{
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::interrupt_ouptut_changed)
|
||||
{
|
||||
m_interrupt_output(state);
|
||||
}
|
||||
|
||||
READ8_MEMBER(mcpx_lpc_device::get_slave_ack)
|
||||
{
|
||||
if (offset == 2) // IRQ = 2
|
||||
return pic8259_2->acknowledge();
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::pit8254_out0_changed)
|
||||
{
|
||||
pic8259_1->ir0_w(state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::pit8254_out2_changed)
|
||||
{
|
||||
//xbox_speaker_set_input( state ? 1 : 0 );
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::irq1)
|
||||
{
|
||||
pic8259_1->ir1_w(state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::irq3)
|
||||
{
|
||||
pic8259_1->ir3_w(state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::irq10)
|
||||
{
|
||||
pic8259_2->ir2_w(state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::irq11)
|
||||
{
|
||||
pic8259_2->ir3_w(state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(mcpx_lpc_device::irq14)
|
||||
{
|
||||
pic8259_2->ir6_w(state);
|
||||
}
|
||||
|
||||
uint32_t mcpx_lpc_device::acknowledge()
|
||||
{
|
||||
return pic8259_1->acknowledge();
|
||||
}
|
||||
|
||||
void mcpx_lpc_device::debug_generate_irq(int irq, int state)
|
||||
{
|
||||
switch (irq)
|
||||
{
|
||||
case 0:
|
||||
pic8259_1->ir0_w(state);
|
||||
break;
|
||||
case 1:
|
||||
pic8259_1->ir1_w(state);
|
||||
break;
|
||||
case 3:
|
||||
pic8259_1->ir3_w(state);
|
||||
break;
|
||||
case 4:
|
||||
pic8259_1->ir4_w(state);
|
||||
break;
|
||||
case 5:
|
||||
pic8259_1->ir5_w(state);
|
||||
break;
|
||||
case 6:
|
||||
pic8259_1->ir6_w(state);
|
||||
break;
|
||||
case 7:
|
||||
pic8259_1->ir7_w(state);
|
||||
break;
|
||||
case 8:
|
||||
pic8259_2->ir0_w(state);
|
||||
break;
|
||||
case 9:
|
||||
pic8259_2->ir1_w(state);
|
||||
break;
|
||||
case 10:
|
||||
pic8259_2->ir2_w(state);
|
||||
break;
|
||||
case 11:
|
||||
pic8259_2->ir3_w(state);
|
||||
break;
|
||||
case 12:
|
||||
pic8259_2->ir4_w(state);
|
||||
break;
|
||||
case 13:
|
||||
pic8259_2->ir5_w(state);
|
||||
break;
|
||||
case 14:
|
||||
pic8259_2->ir6_w(state);
|
||||
break;
|
||||
case 15:
|
||||
pic8259_2->ir7_w(state);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* SMBus
|
||||
*/
|
||||
|
Loading…
Reference in New Issue
Block a user