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https://github.com/holub/mame
synced 2025-07-06 02:18:09 +03:00
removed unused MCFG_PIC16C5x_T0_CB callbacks (nw)
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parent
88022b4545
commit
608d545a60
@ -82,7 +82,6 @@ public:
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required_shared_ptr<uint16_t> m_tilemapram;
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DECLARE_WRITE16_MEMBER(blackt96_c0000_w);
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DECLARE_WRITE16_MEMBER(blackt96_80000_w);
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DECLARE_READ_LINE_MEMBER(PIC16C5X_T0_clk_r);
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DECLARE_WRITE8_MEMBER(blackt96_soundio_port00_w);
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DECLARE_READ8_MEMBER(blackt96_soundio_port01_r);
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DECLARE_WRITE8_MEMBER(blackt96_soundio_port01_w);
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@ -300,11 +299,6 @@ static GFXDECODE_START( blackt96 )
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GFXDECODE_END
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READ_LINE_MEMBER(blackt96_state::PIC16C5X_T0_clk_r)
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{
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return 0;
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}
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WRITE8_MEMBER(blackt96_state::blackt96_soundio_port00_w)
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{
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}
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@ -355,7 +349,6 @@ static MACHINE_CONFIG_START( blackt96, blackt96_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(blackt96_state, blackt96_soundio_port01_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(blackt96_state, blackt96_soundio_port02_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(blackt96_state, blackt96_soundio_port02_w))
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MCFG_PIC16C5x_T0_CB(READLINE(blackt96_state, PIC16C5X_T0_clk_r))
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", blackt96)
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@ -176,12 +176,6 @@ WRITE8_MEMBER(drgnmst_state::drgnmst_snd_control_w)
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}
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READ_LINE_MEMBER(drgnmst_state::PIC16C5X_T0_clk_r)
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{
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return 0;
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}
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/***************************** 68000 Memory Map *****************************/
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static ADDRESS_MAP_START( drgnmst_main_map, AS_PROGRAM, 16, drgnmst_state )
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@ -389,7 +383,6 @@ static MACHINE_CONFIG_START( drgnmst, drgnmst_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(drgnmst_state, drgnmst_oki_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(drgnmst_state, drgnmst_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(drgnmst_state, drgnmst_snd_control_w))
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MCFG_PIC16C5x_T0_CB(READLINE(drgnmst_state, PIC16C5X_T0_clk_r))
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", drgnmst)
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@ -1139,15 +1139,8 @@ static MACHINE_CONFIG_DERIVED( mk4, midzeus )
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MCFG_MIDWAY_IOASIC_SHUFFLE_DEFAULT(1)
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MACHINE_CONFIG_END
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READ_LINE_MEMBER(midzeus_state::PIC16C5X_T0_clk_r)
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{
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return 0;
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}
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static MACHINE_CONFIG_DERIVED( invasn, midzeus )
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MCFG_CPU_ADD("pic", PIC16C57, 8000000) /* ? */
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MCFG_PIC16C5x_T0_CB(READLINE(midzeus_state, PIC16C5X_T0_clk_r))
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MCFG_DEVICE_MODIFY("ioasic")
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MCFG_MIDWAY_IOASIC_UPPER(468/* or 488 */)
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@ -259,12 +259,6 @@ WRITE8_MEMBER(playmark_state::hrdtimes_snd_control_w)
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}
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READ_LINE_MEMBER(playmark_state::PIC16C5X_T0_clk_r)
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{
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return 0;
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}
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/***************************** 68000 Memory Maps ****************************/
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static ADDRESS_MAP_START( bigtwin_main_map, AS_PROGRAM, 16, playmark_state )
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@ -1225,7 +1219,6 @@ static MACHINE_CONFIG_START( bigtwin, playmark_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, playmark_snd_control_w))
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MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
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MCFG_MACHINE_START_OVERRIDE(playmark_state,playmark)
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MCFG_MACHINE_RESET_OVERRIDE(playmark_state,playmark)
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@ -1266,7 +1259,6 @@ static MACHINE_CONFIG_START( bigtwinb, playmark_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, playmark_snd_control_w))
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MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
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MCFG_MACHINE_START_OVERRIDE(playmark_state,playmark)
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MCFG_MACHINE_RESET_OVERRIDE(playmark_state,playmark)
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@ -1308,7 +1300,6 @@ static MACHINE_CONFIG_START( wbeachvl, playmark_state )
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MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, playmark_snd_control_w))
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// MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w)) // probably closer to this, but this only supports 2 sample bank bits
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MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
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MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
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MCFG_EEPROM_SERIAL_DEFAULT_VALUE(0)
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@ -1352,7 +1343,6 @@ static MACHINE_CONFIG_START( excelsr, playmark_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, playmark_snd_control_w))
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MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
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MCFG_MACHINE_START_OVERRIDE(playmark_state,playmark)
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MCFG_MACHINE_RESET_OVERRIDE(playmark_state,playmark)
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@ -1393,7 +1383,6 @@ static MACHINE_CONFIG_START( hrdtimes, playmark_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w))
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MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
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MCFG_DEVICE_DISABLE() /* Internal code is not dumped yet */
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MCFG_MACHINE_START_OVERRIDE(playmark_state,playmark)
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@ -1435,7 +1424,6 @@ static MACHINE_CONFIG_START( hotmind, playmark_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w))
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MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
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MCFG_EEPROM_SERIAL_93C46_ADD("eeprom")
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MCFG_EEPROM_SERIAL_DEFAULT_VALUE(0)
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@ -1482,7 +1470,6 @@ static MACHINE_CONFIG_START( luckboomh, playmark_state )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(playmark_state, playmark_oki_w))
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MCFG_PIC16C5x_READ_C_CB(READ8(playmark_state, playmark_snd_flag_r))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(playmark_state, hrdtimes_snd_control_w))
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MCFG_PIC16C5x_T0_CB(READLINE(playmark_state, PIC16C5X_T0_clk_r))
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MCFG_NVRAM_ADD_0FILL("nvram")
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@ -16,8 +16,8 @@ public:
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m_rowscrollram(*this, "rowscrollram"),
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m_vidregs2(*this, "vidregs2"),
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m_spriteram(*this, "spriteram"),
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m_oki_1(*this, "oki1"),
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m_oki_2(*this, "oki2") ,
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m_oki_1(*this, "oki1"),
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m_oki_2(*this, "oki2") ,
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m_maincpu(*this, "maincpu"),
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m_audiocpu(*this, "audiocpu"),
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m_gfxdecode(*this, "gfxdecode"),
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@ -58,7 +58,6 @@ public:
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DECLARE_WRITE8_MEMBER(drgnmst_pcm_banksel_w);
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DECLARE_WRITE8_MEMBER(drgnmst_oki_w);
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DECLARE_WRITE8_MEMBER(drgnmst_snd_control_w);
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DECLARE_READ_LINE_MEMBER(PIC16C5X_T0_clk_r);
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DECLARE_WRITE16_MEMBER(drgnmst_fg_videoram_w);
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DECLARE_WRITE16_MEMBER(drgnmst_bg_videoram_w);
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DECLARE_WRITE16_MEMBER(drgnmst_md_videoram_w);
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@ -15,11 +15,11 @@ class midzeus_state : public driver_device
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public:
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midzeus_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_nvram(*this, "nvram"),
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m_ram_base(*this, "ram_base"),
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m_linkram(*this, "linkram"),
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m_tms32031_control(*this, "tms32031_ctl"),
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m_zeusbase(*this, "zeusbase") ,
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m_nvram(*this, "nvram"),
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m_ram_base(*this, "ram_base"),
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m_linkram(*this, "linkram"),
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m_tms32031_control(*this, "tms32031_ctl"),
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m_zeusbase(*this, "zeusbase") ,
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m_m48t35(*this, "m48t35"),
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m_maincpu(*this, "maincpu"),
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m_screen(*this, "screen"),
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@ -53,7 +53,6 @@ public:
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DECLARE_WRITE32_MEMBER(analog_w);
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DECLARE_WRITE32_MEMBER(invasn_gun_w);
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DECLARE_READ32_MEMBER(invasn_gun_r);
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DECLARE_READ_LINE_MEMBER(PIC16C5X_T0_clk_r);
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DECLARE_READ32_MEMBER(zeus_r);
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DECLARE_WRITE32_MEMBER(zeus_w);
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DECLARE_CUSTOM_INPUT_MEMBER(custom_49way_r);
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@ -71,7 +71,6 @@ public:
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DECLARE_WRITE8_MEMBER(playmark_oki_w);
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DECLARE_WRITE8_MEMBER(playmark_snd_control_w);
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DECLARE_WRITE8_MEMBER(hrdtimes_snd_control_w);
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DECLARE_READ_LINE_MEMBER(PIC16C5X_T0_clk_r);
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DECLARE_WRITE16_MEMBER(wbeachvl_txvideoram_w);
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DECLARE_WRITE16_MEMBER(wbeachvl_fgvideoram_w);
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DECLARE_WRITE16_MEMBER(wbeachvl_bgvideoram_w);
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@ -221,12 +221,6 @@ void midway_serial_pic_emu_device::device_start()
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}
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READ_LINE_MEMBER(midway_serial_pic_emu_device::PIC16C5X_T0_clk_r)
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{
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// printf("%s: PIC16C5X_T0_clk_r\n", machine().describe_context());
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return 0;
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}
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READ8_MEMBER(midway_serial_pic_emu_device::read_a)
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{
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// printf("%s: read_a\n", space.machine().describe_context());
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@ -269,7 +263,6 @@ static MACHINE_CONFIG_FRAGMENT( midway_pic )
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MCFG_PIC16C5x_WRITE_B_CB(WRITE8(midway_serial_pic_emu_device, write_b))
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MCFG_PIC16C5x_READ_C_CB(READ8(midway_serial_pic_emu_device, read_c))
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MCFG_PIC16C5x_WRITE_C_CB(WRITE8(midway_serial_pic_emu_device, write_c))
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MCFG_PIC16C5x_T0_CB(READLINE(midway_serial_pic_emu_device, PIC16C5X_T0_clk_r))
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MACHINE_CONFIG_END
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machine_config_constructor midway_serial_pic_emu_device::device_mconfig_additions() const
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@ -62,7 +62,6 @@ public:
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midway_serial_pic_emu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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midway_serial_pic_emu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
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DECLARE_READ_LINE_MEMBER(PIC16C5X_T0_clk_r);
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DECLARE_READ8_MEMBER(read_a);
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DECLARE_READ8_MEMBER(read_b);
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DECLARE_READ8_MEMBER(read_c);
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@ -70,9 +69,6 @@ public:
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DECLARE_WRITE8_MEMBER(write_b);
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DECLARE_WRITE8_MEMBER(write_c);
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protected:
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// device-level overrides
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virtual machine_config_constructor device_mconfig_additions() const override;
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