From 613ad8165dd2ad1104803dec9117163020c44db1 Mon Sep 17 00:00:00 2001
From: Ramiro Polla <ramiro.polla@gmail.com>
Date: Wed, 5 Nov 2014 15:10:40 +0100
Subject: [PATCH] upd7810: ECNT clear control happens after capture control

---
 src/emu/cpu/upd7810/upd7810.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/emu/cpu/upd7810/upd7810.c b/src/emu/cpu/upd7810/upd7810.c
index 0f9c77e5d0a..3790f6c981c 100644
--- a/src/emu/cpu/upd7810/upd7810.c
+++ b/src/emu/cpu/upd7810/upd7810.c
@@ -1313,22 +1313,6 @@ void upd7810_device::handle_timers(int cycles)
 				IRR |= INTFE0;
 			if (ETM1 == ECNT)
 				IRR |= INTFE1;
-			/* How and When ECNT is Cleared */
-			switch (ETMM & 0x0c)
-			{
-			case 0x00:              /* clear ECNT */
-				break;
-			case 0x04:              /* free running */
-				if (0 == ECNT)
-					ITF |= INTOV;   /* set overflow flag if counter wrapped */
-				break;
-			case 0x08:              /* reset at falling edge of CI or TO */
-				break;
-			case 0x0c:              /* reset if ECNT == ETM1 */
-				if (ETM1 == ECNT)
-					ECNT = 0;
-				break;
-			}
 			/* Conditions When ECNT Causes a CO0 Output Change */
 			if (((0x00 == (ETMM & 0x30)) && (ETM0 == ECNT)) || /* set CO0 if ECNT == ETM0 */
 			 /* ((0x10 == (ETMM & 0x30)) prohibited */
@@ -1367,6 +1351,22 @@ void upd7810_device::handle_timers(int cycles)
 					break;
 				}
 			}
+			/* How and When ECNT is Cleared */
+			switch (ETMM & 0x0c)
+			{
+			case 0x00:              /* clear ECNT */
+				break;
+			case 0x04:              /* free running */
+				if (0 == ECNT)
+					ITF |= INTOV;   /* set overflow flag if counter wrapped */
+				break;
+			case 0x08:              /* reset at falling edge of CI or TO */
+				break;
+			case 0x0c:              /* reset if ECNT == ETM1 */
+				if (ETM1 == ECNT)
+					ECNT = 0;
+				break;
+			}
 		}
 	}