Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-10-04 08:28:39 +03:00
Code Issues Actions 6 Packages Projects Releases Wiki Activity

Beatmania IIDX Twinkle hardware: The IDE DMA is now hooked up, but the sound board isn't running well enough yet for it to make a difference. Hooked up the FDC37665GT and HLE the XVD701 and the 68k sound board responses to get most of the games booting. There is no sound and the games all fail with a hdd error when you start a stage. Beatmania IIDX with DDR 2nd Club Version wants the GQ863 hard disk. [smf]

Browse Source
This commit is contained in:
smf- 2014-10-12 11:54:06 +00:00
parent ab592dea63
commit 616eeffd47
9 changed files with 509 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.gitattributes vendored
View File

@ -1488,6 +1488,8 @@ src/emu/bus/rs232/ser_mouse.c svneol=native#text/plain
src/emu/bus/rs232/ser_mouse.h svneol=native#text/plain
src/emu/bus/rs232/terminal.c svneol=native#text/plain
src/emu/bus/rs232/terminal.h svneol=native#text/plain
src/emu/bus/rs232/xvd701.c svneol=native#text/plain
src/emu/bus/rs232/xvd701.h svneol=native#text/plain
src/emu/bus/s100/dj2db.c svneol=native#text/plain
src/emu/bus/s100/dj2db.h svneol=native#text/plain
src/emu/bus/s100/djdma.c svneol=native#text/plain
@ -2794,6 +2796,8 @@ src/emu/machine/er2055.c svneol=native#text/plain
src/emu/machine/er2055.h svneol=native#text/plain
src/emu/machine/f3853.c svneol=native#text/plain
src/emu/machine/f3853.h svneol=native#text/plain
src/emu/machine/fdc37c665gt.c svneol=native#text/plain
src/emu/machine/fdc37c665gt.h svneol=native#text/plain
src/emu/machine/fdc_pll.c svneol=native#text/plain
src/emu/machine/fdc_pll.h svneol=native#text/plain
src/emu/machine/gayle.c svneol=native#text/plain

1
src/emu/bus/bus.mak
View File

@ -945,6 +945,7 @@ BUSOBJS += $(BUSOBJ)/rs232/printer.o
BUSOBJS += $(BUSOBJ)/rs232/rs232.o
BUSOBJS += $(BUSOBJ)/rs232/ser_mouse.o
BUSOBJS += $(BUSOBJ)/rs232/terminal.o
BUSOBJS += $(BUSOBJ)/rs232/xvd701.o
endif
#-------------------------------------------------

148
src/emu/bus/rs232/xvd701.c Normal file
View File

@ -0,0 +1,148 @@
#include "xvd701.h"
jvc_xvd701_device::jvc_xvd701_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, JVC_XVD701, "JVC XV-D701", tag, owner, clock, "xvd701", __FILE__),
device_serial_interface(mconfig, *this),
device_rs232_port_interface(mconfig, *this)
{
}
static MACHINE_CONFIG_FRAGMENT(xvd701)
MACHINE_CONFIG_END
machine_config_constructor jvc_xvd701_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(xvd701);
}
static INPUT_PORTS_START(xvd701)
INPUT_PORTS_END
ioport_constructor jvc_xvd701_device::device_input_ports() const
{
return INPUT_PORTS_NAME(xvd701);
}
void jvc_xvd701_device::device_start()
{
int startbits = 1;
int databits = 8;
parity_t parity = PARITY_ODD;
stop_bits_t stopbits = STOP_BITS_1;
set_data_frame(startbits, databits, parity, stopbits);
int txbaud = 9600;
set_tra_rate(txbaud);
int rxbaud = 9600;
set_rcv_rate(rxbaud);
output_rxd(1);
// TODO: make this configurable
output_dcd(0);
output_dsr(0);
output_ri(0);
output_cts(0);
m_timer_response = timer_alloc(TIMER_RESPONSE);
}
void jvc_xvd701_device::device_reset()
{
memset(m_command, 0, sizeof(m_command));
m_response_index = sizeof(m_response);
}
void jvc_xvd701_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_RESPONSE:
send_response();
break;
default:
device_serial_interface::device_timer(timer, id, param, ptr);
}
}
void jvc_xvd701_device::tra_callback()
{
output_rxd(transmit_register_get_data_bit());
}
void jvc_xvd701_device::tra_complete()
{
m_timer_response->adjust(attotime::from_msec(100));
}
unsigned char jvc_xvd701_device::sum(unsigned char *buffer, int length)
{
int sum = 0;
for (int i = 0; i < length; i++)
sum += buffer[i];
return sum & 0x7f;
}
void jvc_xvd701_device::send_response()
{
if (m_response_index < sizeof(m_response) && is_transmit_register_empty())
{
// printf("sending %02x\n", m_response[m_response_index]);
transmit_register_setup(m_response[m_response_index++]);
}
}
void jvc_xvd701_device::rcv_complete()
{
receive_register_extract();
for (int i = 0; i < sizeof(m_command) - 1; i++)
m_command[i] = m_command[i + 1];
m_command[sizeof(m_command) - 1] = get_received_char();
if (m_command[0] == 0xff &&
m_command[1] == 0xff &&
m_command[2] == 0x21 &&
sum(m_command, sizeof(m_command)) == 0)
{
// printf("xvd701");
//for (int i = 0; i < sizeof(m_command); i++)
// printf(" %02x", m_command[i]);
//printf("\n");
// FF FF 21 3E 40 70 00 00 00 00 73 DEVICE ON
// FF FF 21 3E 40 60 00 00 00 00 03 DEVICE OFF
// FF FF 21 0C 44 60 00 00 00 00 31 STOP
// FF FF 21 0C 43 75 00 00 00 00 1D PLAY
// FF FF 21 0C 43 6D 00 00 00 00 25 PAUSE
// FF FF 21 0C 50 20 00 00 00 00 63 SEEK TO SPECIFIC CHAPTER
// FF FF 21 0C 50 73 00 00 00 00 12 FF (SEEK TO NEXT CHAPTER)
// FF FF 21 0C 50 61 00 00 00 00 24 PREV (SEEK TO PREVIOUS CHAPTER)
m_response[0] = 0xff;
m_response[1] = 0xfe;
m_response[2] = 0x7f;
m_response[3] = 0x7e;
m_response[4] = 0x7d;
m_response[5] = 0x7c;
m_response[6] = 0x7b;
m_response[7] = 0x7a;
m_response[8] = 0x79;
m_response[9] = 0x78;
m_response[10] = 0x77;
m_response_index = 0;
m_timer_response->adjust(attotime::from_msec(100));
}
}
const device_type JVC_XVD701 = &device_creator<jvc_xvd701_device>;

42
src/emu/bus/rs232/xvd701.h Normal file
View File

@ -0,0 +1,42 @@
#ifndef JVC_XV701_H_
#define JVC_XV701_H_
#include "rs232.h"
class jvc_xvd701_device : public device_t,
public device_serial_interface,
public device_rs232_port_interface
{
public:
jvc_xvd701_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual machine_config_constructor device_mconfig_additions() const;
virtual WRITE_LINE_MEMBER( input_txd ) { device_serial_interface::rx_w(state); }
DECLARE_WRITE_LINE_MEMBER(update_serial);
protected:
virtual ioport_constructor device_input_ports() const;
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual void tra_callback();
virtual void tra_complete();
virtual void rcv_complete();
private:
static const int TIMER_RESPONSE = 1;
void send_response();
unsigned char sum(unsigned char *buffer, int length);
unsigned char m_command[11];
unsigned char m_response[11];
int m_response_index;
emu_timer *m_timer_response;
};
extern const device_type JVC_XVD701;
#endif

59
src/emu/machine/fdc37c665gt.c Normal file
View File

@ -0,0 +1,59 @@
#include "fdc37c665gt.h"
fdc37c665gt_device::fdc37c665gt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, FDC37C665GT, "FDC37C665GT", tag, owner, clock, "fdc37c665gt", __FILE__),
m_uart1(*this, "uart1"),
m_uart2(*this, "uart2")
{
}
READ8_MEMBER(fdc37c665gt_device::read)
{
UINT8 data = 0;
if ((offset & 0x3f8) == 0x3f8)
{
data = m_uart1->ins8250_r(space, offset & 7, mem_mask);
}
else if ((offset & 0x3f8) == 0x2f8)
{
data = m_uart2->ins8250_r(space, offset & 7, mem_mask);
}
else
{
printf("fdc37c665gt_device::read %04x %02x\n", offset, data);
}
return data;
}
WRITE8_MEMBER(fdc37c665gt_device::write)
{
if ((offset & 0x3f8) == 0x3f8)
{
m_uart1->ins8250_w(space, offset & 7, data, mem_mask);
}
else if ((offset & 0x3f8) == 0x2f8)
{
m_uart2->ins8250_w(space, offset & 7, data, mem_mask);
}
else
{
printf("fdc37c665gt_device::write %04x %02x\n", offset, data);
}
}
void fdc37c665gt_device::device_start()
{
}
static MACHINE_CONFIG_FRAGMENT(fdc37c665gt)
MCFG_DEVICE_ADD("uart1", NS16550, XTAL_24MHz/13)
MCFG_DEVICE_ADD("uart2", NS16550, XTAL_24MHz/13)
MACHINE_CONFIG_END
machine_config_constructor fdc37c665gt_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME(fdc37c665gt);
}
const device_type FDC37C665GT = &device_creator<fdc37c665gt_device>;

35
src/emu/machine/fdc37c665gt.h Normal file
View File

@ -0,0 +1,35 @@
/*
* fdc37c665gt.h
*
*/
#ifndef _FDC37C665GT_H_
#define _FDC37C665GT_H_
#pragma once
#include "ins8250.h"
class fdc37c665gt_device : public device_t
{
public:
// construction/destruction
fdc37c665gt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
protected:
// device-level overrides
virtual void device_start();
virtual machine_config_constructor device_mconfig_additions() const;
private:
required_device<ns16550_device> m_uart1;
required_device<ns16550_device> m_uart2;
};
// device type definition
extern const device_type FDC37C665GT;
#endif

8
src/emu/machine/machine.mak
View File

@ -1898,3 +1898,11 @@ ifneq ($(filter DIABLO_HD,$(MACHINES)),)
MACHINEOBJS += $(MACHINEOBJ)/diablo_hd.o
endif
#-------------------------------------------------
#
#@src/emu/machine/fdc37c665gt.h,MACHINES += FDC37C665GT
#-------------------------------------------------
ifneq ($(filter FDC37C665GT,$(MACHINES)),)
MACHINEOBJS += $(MACHINEOBJ)/fdc37c665gt.o
endif

230
src/mame/drivers/twinkle.c
View File

@ -6,13 +6,12 @@ driver by smf and R. Belmont
TODO:
sound (IDE DMA, finish comms)
dvd
hard drive
dvd check for bmiidx, bmiidxa, bmiidxc & bmiidxca
finish sound board emulation and remove response hle
emulate dvd player and video mixing
16seg led font
Konami Twinkle Hardware Overview
Konami 1999-2002
@ -232,11 +231,13 @@ Notes:
#include "video/psx.h"
#include "bus/scsi/scsi.h"
#include "bus/scsi/scsicd.h"
#include "bus/rs232/xvd701.h"
#include "machine/am53cf96.h"
#include "machine/rtc65271.h"
#include "machine/i2cmem.h"
#include "machine/x76f041.h"
#include "machine/ataintf.h"
#include "machine/fdc37c665gt.h"
#include "machine/i2cmem.h"
#include "machine/rtc65271.h"
#include "machine/x76f041.h"
#include "sound/spu.h"
#include "sound/cdda.h"
#include "sound/rf5c400.h"
@ -247,16 +248,25 @@ public:
twinkle_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_am53cf96(*this, "am53cf96"),
m_ata(*this, "ata"),
m_rfsnd(*this, "rfsnd"),
m_spu_ata_dma(0),
m_maincpu(*this, "maincpu"),
m_audiocpu(*this, "audiocpu")
{
m_spu_hle[0x200] = 0;
m_spu_hle[0x202] = 0;
}
required_device<am53cf96_device> m_am53cf96;
required_device<ata_interface_device> m_ata;
required_memory_region m_rfsnd;
UINT16 m_spu_ctrl; // SPU board control register
UINT8 m_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM
UINT32 m_unknown;
UINT8 m_spu_hle[0x400];
UINT32 m_spu_ata_dma;
int m_spu_ata_dmarq;
int m_io_offset;
int m_output_last[ 0x100 ];
@ -269,11 +279,14 @@ public:
DECLARE_WRITE8_MEMBER(shared_psx_w);
DECLARE_READ8_MEMBER(shared_psx_r);
DECLARE_WRITE16_MEMBER(twinkle_spu_ctrl_w);
DECLARE_WRITE16_MEMBER(spu_ata_dma_low_w);
DECLARE_WRITE16_MEMBER(spu_ata_dma_high_w);
DECLARE_READ16_MEMBER(twinkle_waveram_r);
DECLARE_WRITE16_MEMBER(twinkle_waveram_w);
DECLARE_READ16_MEMBER(shared_68k_r);
DECLARE_WRITE16_MEMBER(shared_68k_w);
DECLARE_WRITE_LINE_MEMBER(ide_interrupt);
DECLARE_WRITE_LINE_MEMBER(spu_ata_irq);
DECLARE_WRITE_LINE_MEMBER(spu_ata_dmarq);
required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_audiocpu;
@ -495,9 +508,11 @@ WRITE8_MEMBER(twinkle_state::twinkle_io_w)
break;
case 0x8f:
output_set_value( "neonlamp", ~data & 1 );
output_set_value( "neonlamp", ( ~data >> 0 ) & 1 );
output_set_value( "unknown1", ( ~data >> 1 ) & 1 );
output_set_value( "unknown2", ( ~data >> 2 ) & 1 );
if( ( data & 0xfe ) != 0xfe )
if( ( data & 0xf8 ) != 0xf8 )
{
printf("%02x = %02x\n", m_io_offset, data );
}
@ -656,17 +671,105 @@ WRITE16_MEMBER(twinkle_state::serial_w)
WRITE8_MEMBER(twinkle_state::shared_psx_w)
{
//printf("shared_psx_w: %04x, %04x, %04x\n", offset, data, mem_mask);
m_spu_shared[offset] = data;
// printf("shared_psx_w: %x to %x, mask %x (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
// HLE sound board
m_spu_hle[offset] = data;
if (offset == 0x03fe && data == 0xff)
{
//printf("spu command %02x %02x\n", m_spu_hle[1], m_spu_hle[3]);
for (int i = 0x200; i < 0x300; i++) m_spu_hle[i] = 0xea;
switch (m_spu_hle[1])
{
case 0x91: // hdd sum 1
m_spu_hle[0x200] = 0; // ?
m_spu_hle[0x202] = 0; // ?
break;
case 0x9a: // hdd sum 2
m_spu_hle[0x200] = 0; // ?
m_spu_hle[0x202] = 0; // ?
m_spu_hle[0x203] = 1; // Must be 1 to pass test
break;
case 0xa1: // version
m_spu_hle[0x200] = 0; // ?
m_spu_hle[0x202] = 0; // ?
if (strcmp(machine().system().name, "bmiidx") == 0 ||
strcmp(machine().system().name, "bmiidxa") == 0 ||
strcmp(machine().system().name, "bmiidxc") == 0 ||
strcmp(machine().system().name, "bmiidxca") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GQ863JA_A");
}
else if (strcmp(machine().system().name, "bmiidxs") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GC983JA_A");
}
else if (strcmp(machine().system().name, "bmiidxc2") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GC983JA_R");
}
else if (strcmp(machine().system().name, "bmiidx2") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GC985JA_A");
}
else if (strcmp(machine().system().name, "bmiidx3") == 0 ||
strcmp(machine().system().name, "bmiidx3a") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GC992JA_A");
}
else if (strcmp(machine().system().name, "bmiidx4") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GCA03JA_A");
}
else if (strcmp(machine().system().name, "bmiidx5") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GCA17JA_A");
}
else if (strcmp(machine().system().name, "bmiidx6") == 0 ||
strcmp(machine().system().name, "bmiidx6a") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GCB4UJA_A");
}
else if (strcmp(machine().system().name, "bmiidx7") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GCB44JA_A");
}
else if (strcmp(machine().system().name, "bmiidx8") == 0)
{
strcpy((char *)&m_spu_hle[0x204], "GCC44JA_A");
}
break;
case 0x30: // play sound [3]=sound code
case 0x51: // sound off
case 0x25: // spu rom error ([3]==0x0f)
case 0x26: // spu rom error ([3]==0x0f)
case 0x08: // spu rom error
case 0x40: // spu rom error ([3]==0x01 coin sound?)
case 0x2f: // spu rom error
case 0x52: // spu rom error
case 0x04: // spu rom error ([3]==?)
m_spu_hle[0x200] = 0;
m_spu_hle[0x202] = 0;
break;
}
}
}
READ8_MEMBER(twinkle_state::shared_psx_r)
{
UINT32 result = m_spu_shared[offset];
//UINT32 result = m_spu_shared[offset];
UINT32 result = m_spu_hle[offset];
// printf("shared_psx_r: @ %x, mask %x (PC=%x)\n", offset, mem_mask, result, space.device().safe_pc());
result = 0; // HACK to prevent the games from freezing while we sort out the rest of the 68k's boot sequence
//printf("shared_psx_r: %04x, %04x, %04x\n", offset, result, mem_mask);
return result;
}
@ -675,7 +778,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, twinkle_state )
AM_RANGE(0x1f000000, 0x1f0007ff) AM_READWRITE8(shared_psx_r, shared_psx_w, 0x00ff00ff)
AM_RANGE(0x1f200000, 0x1f20001f) AM_DEVREADWRITE8("am53cf96", am53cf96_device, read, write, 0x00ff00ff)
AM_RANGE(0x1f20a01c, 0x1f20a01f) AM_WRITENOP /* scsi? */
AM_RANGE(0x1f210400, 0x1f2107ff) AM_READNOP
AM_RANGE(0x1f210000, 0x1f2107ff) AM_DEVREADWRITE8("fdc37c665gt", fdc37c665gt_device, read, write, 0x00ff00ff)
AM_RANGE(0x1f218000, 0x1f218003) AM_WRITE8(watchdog_reset_w, 0x000000ff) /* LTC1232 */
AM_RANGE(0x1f220000, 0x1f220003) AM_WRITE8(twinkle_io_w, 0x00ff00ff)
AM_RANGE(0x1f220004, 0x1f220007) AM_READ8(twinkle_io_r, 0x00ff00ff)
@ -692,7 +795,7 @@ ADDRESS_MAP_END
/* SPU board */
WRITE_LINE_MEMBER(twinkle_state::ide_interrupt)
WRITE_LINE_MEMBER(twinkle_state::spu_ata_irq)
{
if ((state) && (m_spu_ctrl & 0x0400))
{
@ -715,48 +818,91 @@ WRITE16_MEMBER(twinkle_state::twinkle_spu_ctrl_w)
{
if ((!(data & 0x0080)) && (m_spu_ctrl & 0x0080))
{
space.device().execute().set_input_line(M68K_IRQ_1, CLEAR_LINE);
m_audiocpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
}
else if ((!(data & 0x0100)) && (m_spu_ctrl & 0x0100))
{
space.device().execute().set_input_line(M68K_IRQ_2, CLEAR_LINE);
m_audiocpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
}
else if ((!(data & 0x0200)) && (m_spu_ctrl & 0x0200))
{
space.device().execute().set_input_line(M68K_IRQ_4, CLEAR_LINE);
m_audiocpu->set_input_line(M68K_IRQ_4, CLEAR_LINE);
}
else if ((!(data & 0x0400)) && (m_spu_ctrl & 0x0400))
{
space.device().execute().set_input_line(M68K_IRQ_6, CLEAR_LINE);
m_audiocpu->set_input_line(M68K_IRQ_6, CLEAR_LINE);
}
m_spu_ctrl = data;
}
WRITE16_MEMBER(twinkle_state::spu_ata_dma_low_w)
{
m_spu_ata_dma = (m_spu_ata_dma & ~0xffff) | data;
//printf("dma_low %08x\n", m_spu_ata_dma * 2);
}
WRITE16_MEMBER(twinkle_state::spu_ata_dma_high_w)
{
m_spu_ata_dma = (m_spu_ata_dma & 0xffff) | (data << 16);
//printf("dma_high %08x\n", m_spu_ata_dma * 2);
}
WRITE_LINE_MEMBER(twinkle_state::spu_ata_dmarq)
{
if (m_spu_ata_dmarq != state)
{
m_spu_ata_dmarq = state;
if (m_spu_ata_dmarq)
{
UINT16 *waveram = (UINT16 *)m_rfsnd->base();
m_ata->write_dmack(ASSERT_LINE);
while (m_spu_ata_dmarq)
{
UINT16 data = m_ata->read_dma();
//printf("spu_ata_dmarq %08x %04x\n", m_spu_ata_dma * 2, data);
//waveram[m_spu_ata_dma++] = (data >> 8) | (data << 8);
// bp 4a0e ;bmiidx4 checksum
// bp 4d62 ;bmiidx4 dma
waveram[m_spu_ata_dma++] = data;
}
m_ata->write_dmack(CLEAR_LINE);
}
}
}
READ16_MEMBER(twinkle_state::twinkle_waveram_r)
{
UINT16 *waveram = (UINT16 *)memregion("rfsnd")->base();
UINT16 *waveram = (UINT16 *)m_rfsnd->base();
return waveram[offset];
}
WRITE16_MEMBER(twinkle_state::twinkle_waveram_w)
{
UINT16 *waveram = (UINT16 *)memregion("rfsnd")->base();
UINT16 *waveram = (UINT16 *)m_rfsnd->base();
COMBINE_DATA(&waveram[offset]);
}
READ16_MEMBER(twinkle_state::shared_68k_r)
{
// printf("shared_68k_r: @ %x, mask %x\n", offset, mem_mask);
UINT16 result = m_spu_shared[offset];
return m_spu_shared[offset];
//printf("shared_68k_r: %04x, %04x, %04x\n", offset, result, mem_mask);
return result;
}
WRITE16_MEMBER(twinkle_state::shared_68k_w)
{
// printf("shared_68k_w: %x to %x, mask %x\n", data, offset, mem_mask);
//printf("shared_68k_w: %04x, %04x, %04x\n", offset, data, mem_mask);
m_spu_shared[offset] = data & 0xff;
}
@ -766,8 +912,8 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, twinkle_state )
AM_RANGE(0x100000, 0x13ffff) AM_RAM
// 220000 = LEDs?
AM_RANGE(0x230000, 0x230003) AM_WRITE(twinkle_spu_ctrl_w)
// 240000 = top 16 bits of DMA address?
// 250000 = write to initiate DMA?
AM_RANGE(0x240000, 0x240003) AM_WRITE(spu_ata_dma_low_w)
AM_RANGE(0x250000, 0x250003) AM_WRITE(spu_ata_dma_high_w)
// 260000 = ???
AM_RANGE(0x280000, 0x280fff) AM_READWRITE(shared_68k_r, shared_68k_w)
AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE("ata", ata_interface_device, read_cs0, write_cs0)
@ -886,10 +1032,28 @@ static MACHINE_CONFIG_START( twinkle, twinkle_state )
MCFG_AM53CF96_IRQ_HANDLER(DEVWRITELINE("maincpu:irq", psxirq_device, intin10))
MCFG_ATA_INTERFACE_ADD("ata", ata_devices, "hdd", NULL, true)
MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(twinkle_state, ide_interrupt))
MCFG_ATA_INTERFACE_IRQ_HANDLER(WRITELINE(twinkle_state, spu_ata_irq))
MCFG_ATA_INTERFACE_DMARQ_HANDLER(WRITELINE(twinkle_state, spu_ata_dmarq))
MCFG_DEVICE_ADD("rtc", RTC65271, 0)
MCFG_DEVICE_ADD("fdc37c665gt", FDC37C665GT, XTAL_24MHz)
MCFG_DEVICE_ADD("rs232", RS232_PORT, 0)
MCFG_SLOT_OPTION_ADD("xvd701", JVC_XVD701)
// MCFG_SLOT_OPTION_ADD("xvs1100", JVC_XVS1100) // 8th mix only
MCFG_SLOT_DEFAULT_OPTION("xvd701")
MCFG_RS232_RXD_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, rx_w))
MCFG_RS232_DCD_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, dcd_w))
MCFG_RS232_DSR_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, dsr_w))
MCFG_RS232_RI_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, ri_w))
MCFG_RS232_CTS_HANDLER(DEVWRITELINE("fdc37c665gt:uart2", ins8250_uart_device, cts_w))
MCFG_DEVICE_MODIFY("fdc37c665gt:uart2")
MCFG_INS8250_OUT_TX_CB(DEVWRITELINE("^rs232", rs232_port_device, write_txd))
MCFG_INS8250_OUT_DTR_CB(DEVWRITELINE("^rs232", rs232_port_device, write_dtr))
MCFG_INS8250_OUT_RTS_CB(DEVWRITELINE("^rs232", rs232_port_device, write_rts))
/* video hardware */
MCFG_PSXGPU_ADD( "maincpu", "gpu", CXD8561Q, 0x200000, XTAL_53_693175MHz )
@ -973,7 +1137,7 @@ static INPUT_PORTS_START( twinklex )
PORT_BIT( 0x00000004, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("security", x76f041_device, write_cs)
PORT_MODIFY("INSEC")
PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_READ_LINE_DEVICE_MEMBER("security", x76f041_device, read_sda)
PORT_BIT( 0x00001000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("security", x76f041_device, read_sda)
INPUT_PORTS_END
static INPUT_PORTS_START( twinklei )
@ -1189,7 +1353,7 @@ ROM_START( bmiidxc )
DISK_IMAGE_READONLY( "896jaa04", 0, NO_DUMP )
DISK_REGION( "ata:0:hdd:image" )
DISK_IMAGE_READONLY( "896hdda01", 0, NO_DUMP )
DISK_IMAGE_READONLY( "863hdda01", 0, SHA1(0b8dbf1c9caf4abf965dbc6e1a8e6329d48b1c90) )
ROM_END
ROM_START( bmiidxca )
@ -1205,7 +1369,7 @@ ROM_START( bmiidxca )
DISK_IMAGE_READONLY( "896jaa04", 0, NO_DUMP )
DISK_REGION( "ata:0:hdd:image" )
DISK_IMAGE_READONLY( "896hdda01", 0, NO_DUMP )
DISK_IMAGE_READONLY( "863hdda01", 0, SHA1(0b8dbf1c9caf4abf965dbc6e1a8e6329d48b1c90) )
ROM_END
ROM_START( bmiidxs )

1
src/mame/mame.mak
View File

@ -556,6 +556,7 @@ MACHINES += Z80STI
MACHINES += Z8536
MACHINES += SECFLASH
MACHINES += PCCARD
MACHINES += FDC37C665GT
#MACHINES += SMC92X4
#MACHINES += TI99_HD
#MACHINES += STRATA