Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-25 09:50:04 +03:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

exzisus.c: added save state support, removed trampolines (nw)

Browse Source
This commit is contained in:
Ivan Vangelista 2015-02-14 08:27:47 +01:00
parent 20b68364f7
commit 619982dc06
3 changed files with 51 additions and 126 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

83
src/mame/drivers/exzisus.c
View File

@ -46,39 +46,35 @@ TODO:
***************************************************************************/
WRITE8_MEMBER(exzisus_state::exzisus_cpua_bankswitch_w)
WRITE8_MEMBER(exzisus_state::cpua_bankswitch_w)
{
UINT8 *RAM = memregion("cpua")->base();
if ( (data & 0x0f) != m_cpua_bank )
{
m_cpua_bank = data & 0x0f;
if (m_cpua_bank >= 2)
{
membank("bank2")->set_base(&RAM[ 0x10000 + ( (m_cpua_bank - 2) * 0x4000 ) ] );
membank("bank2")->set_entry(m_cpua_bank - 2);
}
}
flip_screen_set(data & 0x40);
}
WRITE8_MEMBER(exzisus_state::exzisus_cpub_bankswitch_w)
WRITE8_MEMBER(exzisus_state::cpub_bankswitch_w)
{
UINT8 *RAM = memregion("cpub")->base();
if ( (data & 0x0f) != m_cpub_bank )
{
m_cpub_bank = data & 0x0f;
if (m_cpub_bank >= 2)
{
membank("bank1")->set_base(&RAM[ 0x10000 + ( (m_cpub_bank - 2) * 0x4000 ) ] );
membank("bank1")->set_entry(m_cpub_bank - 2);
}
}
flip_screen_set(data & 0x40);
}
WRITE8_MEMBER(exzisus_state::exzisus_coincounter_w)
WRITE8_MEMBER(exzisus_state::coincounter_w)
{
coin_lockout_w(machine(), 0,~data & 0x01);
coin_lockout_w(machine(), 1,~data & 0x02);
@ -86,34 +82,14 @@ WRITE8_MEMBER(exzisus_state::exzisus_coincounter_w)
coin_counter_w(machine(), 1,data & 0x08);
}
READ8_MEMBER(exzisus_state::exzisus_sharedram_ab_r)
{
return m_sharedram_ab[offset];
}
READ8_MEMBER(exzisus_state::exzisus_sharedram_ac_r)
{
return m_sharedram_ac[offset];
}
WRITE8_MEMBER(exzisus_state::exzisus_sharedram_ab_w)
{
m_sharedram_ab[offset] = data;
}
WRITE8_MEMBER(exzisus_state::exzisus_sharedram_ac_w)
{
m_sharedram_ac[offset] = data;
}
// is it ok that cpub_reset refers to cpuc?
WRITE8_MEMBER(exzisus_state::exzisus_cpub_reset_w)
WRITE8_MEMBER(exzisus_state::cpub_reset_w)
{
m_cpuc->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
}
#if 0
// without exzisus_cpub_reset_w, the following patch would be needed for
// without cpub_reset_w, the following patch would be needed for
// the RAM check to work
DRIVER_INIT_MEMBER(exzisus_state,exzisus)
{
@ -137,38 +113,38 @@ DRIVER_INIT_MEMBER(exzisus_state,exzisus)
static ADDRESS_MAP_START( cpua_map, AS_PROGRAM, 8, exzisus_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank2")
AM_RANGE(0xc000, 0xc5ff) AM_READWRITE(exzisus_objectram_1_r, exzisus_objectram_1_w) AM_SHARE("objectram1")
AM_RANGE(0xc600, 0xdfff) AM_READWRITE(exzisus_videoram_1_r, exzisus_videoram_1_w) AM_SHARE("videoram1")
AM_RANGE(0xe000, 0xefff) AM_READWRITE(exzisus_sharedram_ac_r, exzisus_sharedram_ac_w) AM_SHARE("sharedram_ac")
AM_RANGE(0xf400, 0xf400) AM_WRITE(exzisus_cpua_bankswitch_w)
AM_RANGE(0xf404, 0xf404) AM_WRITE(exzisus_cpub_reset_w) // ??
AM_RANGE(0xf800, 0xffff) AM_READWRITE(exzisus_sharedram_ab_r, exzisus_sharedram_ab_w) AM_SHARE("sharedram_ab")
AM_RANGE(0xc000, 0xc5ff) AM_RAM AM_SHARE("objectram1")
AM_RANGE(0xc600, 0xdfff) AM_RAM AM_SHARE("videoram1")
AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE("sharedram_ac")
AM_RANGE(0xf400, 0xf400) AM_WRITE(cpua_bankswitch_w)
AM_RANGE(0xf404, 0xf404) AM_WRITE(cpub_reset_w) // ??
AM_RANGE(0xf800, 0xffff) AM_RAM AM_SHARE("sharedram_ab")
ADDRESS_MAP_END
static ADDRESS_MAP_START( cpub_map, AS_PROGRAM, 8, exzisus_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xc5ff) AM_READWRITE(exzisus_objectram_0_r, exzisus_objectram_0_w) AM_SHARE("objectram0")
AM_RANGE(0xc600, 0xdfff) AM_READWRITE(exzisus_videoram_0_r, exzisus_videoram_0_w) AM_SHARE("videoram0")
AM_RANGE(0xc000, 0xc5ff) AM_RAM AM_SHARE("objectram0")
AM_RANGE(0xc600, 0xdfff) AM_RAM AM_SHARE("videoram0")
AM_RANGE(0xe000, 0xefff) AM_RAM
AM_RANGE(0xf000, 0xf000) AM_READNOP AM_DEVWRITE("tc0140syt", tc0140syt_device, master_port_w)
AM_RANGE(0xf001, 0xf001) AM_DEVREADWRITE("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w)
AM_RANGE(0xf400, 0xf400) AM_READ_PORT("P1")
AM_RANGE(0xf400, 0xf400) AM_WRITE(exzisus_cpub_bankswitch_w)
AM_RANGE(0xf400, 0xf400) AM_WRITE(cpub_bankswitch_w)
AM_RANGE(0xf401, 0xf401) AM_READ_PORT("P2")
AM_RANGE(0xf402, 0xf402) AM_READ_PORT("SYSTEM")
AM_RANGE(0xf402, 0xf402) AM_WRITE(exzisus_coincounter_w)
AM_RANGE(0xf402, 0xf402) AM_WRITE(coincounter_w)
AM_RANGE(0xf404, 0xf404) AM_READ_PORT("DSWA")
AM_RANGE(0xf404, 0xf404) AM_WRITENOP // ??
AM_RANGE(0xf405, 0xf405) AM_READ_PORT("DSWB")
AM_RANGE(0xf800, 0xffff) AM_READWRITE(exzisus_sharedram_ab_r, exzisus_sharedram_ab_w)
AM_RANGE(0xf800, 0xffff) AM_RAM AM_SHARE("sharedram_ab")
ADDRESS_MAP_END
static ADDRESS_MAP_START( cpuc_map, AS_PROGRAM, 8, exzisus_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x85ff) AM_READWRITE(exzisus_objectram_1_r, exzisus_objectram_1_w)
AM_RANGE(0x8600, 0x9fff) AM_READWRITE(exzisus_videoram_1_r, exzisus_videoram_1_w)
AM_RANGE(0xa000, 0xafff) AM_READWRITE(exzisus_sharedram_ac_r, exzisus_sharedram_ac_w)
AM_RANGE(0x8000, 0x85ff) AM_RAM AM_SHARE("objectram1")
AM_RANGE(0x8600, 0x9fff) AM_RAM AM_SHARE("videoram1")
AM_RANGE(0xa000, 0xafff) AM_RAM AM_SHARE("sharedram_ac")
AM_RANGE(0xb000, 0xbfff) AM_RAM
ADDRESS_MAP_END
@ -234,6 +210,15 @@ INPUT_PORTS_END
***************************************************************************/
void exzisus_state::machine_start()
{
membank("bank1")->configure_entries(0, 16, memregion("cpub")->base() + 0x10000, 0x4000);
membank("bank2")->configure_entries(0, 16, memregion("cpua")->base() + 0x10000, 0x4000);
save_item(NAME(m_cpua_bank));
save_item(NAME(m_cpub_bank));
}
static const gfx_layout charlayout =
{
8, 8,
@ -279,7 +264,7 @@ static MACHINE_CONFIG_START( exzisus, exzisus_state )
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(32*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
MCFG_SCREEN_UPDATE_DRIVER(exzisus_state, screen_update_exzisus)
MCFG_SCREEN_UPDATE_DRIVER(exzisus_state, screen_update)
MCFG_SCREEN_PALETTE("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", exzisus)
@ -424,6 +409,6 @@ ROM_START( exzisust )
ROM_LOAD( "b23-05.16l", 0x00800, 0x00400, CRC(87f0f69a) SHA1(37df6fd56245fab9beaabfd86fd8f95d7c42c2a5) )
ROM_END
GAME( 1987, exzisus, 0, exzisus, exzisus, driver_device, 0, ROT0, "Taito Corporation", "Exzisus (Japan, dedicated)", 0 )
GAME( 1987, exzisusa, exzisus, exzisus, exzisus, driver_device, 0, ROT0, "Taito Corporation", "Exzisus (Japan, conversion)", 0 )
GAME( 1987, exzisust, exzisus, exzisus, exzisus, driver_device, 0, ROT0, "Taito Corporation (TAD license)", "Exzisus (TAD license)", 0 )
GAME( 1987, exzisus, 0, exzisus, exzisus, driver_device, 0, ROT0, "Taito Corporation", "Exzisus (Japan, dedicated)", GAME_SUPPORTS_SAVE )
GAME( 1987, exzisusa, exzisus, exzisus, exzisus, driver_device, 0, ROT0, "Taito Corporation", "Exzisus (Japan, conversion)", GAME_SUPPORTS_SAVE )
GAME( 1987, exzisust, exzisus, exzisus, exzisus, driver_device, 0, ROT0, "Taito Corporation (TAD license)", "Exzisus (TAD license)", GAME_SUPPORTS_SAVE )

40
src/mame/includes/exzisus.h
View File

@ -3,44 +3,36 @@ class exzisus_state : public driver_device
public:
exzisus_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_cpuc(*this, "cpuc"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_objectram1(*this, "objectram1"),
m_videoram1(*this, "videoram1"),
m_sharedram_ac(*this, "sharedram_ac"),
m_sharedram_ab(*this, "sharedram_ab"),
m_objectram0(*this, "objectram0"),
m_videoram0(*this, "videoram0"),
m_cpuc(*this, "cpuc"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette") { }
m_videoram0(*this, "videoram0") { }
required_device<cpu_device> m_cpuc;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
required_shared_ptr<UINT8> m_objectram1;
required_shared_ptr<UINT8> m_videoram1;
required_shared_ptr<UINT8> m_sharedram_ac;
required_shared_ptr<UINT8> m_sharedram_ab;
required_shared_ptr<UINT8> m_objectram0;
required_shared_ptr<UINT8> m_videoram0;
required_device<cpu_device> m_cpuc;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
int m_cpua_bank;
int m_cpub_bank;
DECLARE_WRITE8_MEMBER(exzisus_cpua_bankswitch_w);
DECLARE_WRITE8_MEMBER(exzisus_cpub_bankswitch_w);
DECLARE_WRITE8_MEMBER(exzisus_coincounter_w);
DECLARE_READ8_MEMBER(exzisus_sharedram_ab_r);
DECLARE_READ8_MEMBER(exzisus_sharedram_ac_r);
DECLARE_WRITE8_MEMBER(exzisus_sharedram_ab_w);
DECLARE_WRITE8_MEMBER(exzisus_sharedram_ac_w);
DECLARE_WRITE8_MEMBER(exzisus_cpub_reset_w);
DECLARE_READ8_MEMBER(exzisus_videoram_0_r);
DECLARE_READ8_MEMBER(exzisus_videoram_1_r);
DECLARE_READ8_MEMBER(exzisus_objectram_0_r);
DECLARE_READ8_MEMBER(exzisus_objectram_1_r);
DECLARE_WRITE8_MEMBER(exzisus_videoram_0_w);
DECLARE_WRITE8_MEMBER(exzisus_videoram_1_w);
DECLARE_WRITE8_MEMBER(exzisus_objectram_0_w);
DECLARE_WRITE8_MEMBER(exzisus_objectram_1_w);
UINT32 screen_update_exzisus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE8_MEMBER(cpua_bankswitch_w);
DECLARE_WRITE8_MEMBER(cpub_bankswitch_w);
DECLARE_WRITE8_MEMBER(coincounter_w);
DECLARE_WRITE8_MEMBER(cpub_reset_w);
virtual void machine_start();
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
};

54
src/mame/video/exzisus.c
View File

@ -12,63 +12,11 @@ Functions to emulate the video hardware of the machine.
#include "includes/exzisus.h"
/***************************************************************************
Memory handlers
***************************************************************************/
READ8_MEMBER(exzisus_state::exzisus_videoram_0_r)
{
return m_videoram0[offset];
}
READ8_MEMBER(exzisus_state::exzisus_videoram_1_r)
{
return m_videoram1[offset];
}
READ8_MEMBER(exzisus_state::exzisus_objectram_0_r)
{
return m_objectram0[offset];
}
READ8_MEMBER(exzisus_state::exzisus_objectram_1_r)
{
return m_objectram1[offset];
}
WRITE8_MEMBER(exzisus_state::exzisus_videoram_0_w)
{
m_videoram0[offset] = data;
}
WRITE8_MEMBER(exzisus_state::exzisus_videoram_1_w)
{
m_videoram1[offset] = data;
}
WRITE8_MEMBER(exzisus_state::exzisus_objectram_0_w)
{
m_objectram0[offset] = data;
}
WRITE8_MEMBER(exzisus_state::exzisus_objectram_1_w)
{
m_objectram1[offset] = data;
}
/***************************************************************************
Screen refresh
***************************************************************************/
UINT32 exzisus_state::screen_update_exzisus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
UINT32 exzisus_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
int offs;
int sx, sy, xc, yc;