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https://github.com/holub/mame
synced 2025-07-04 09:28:51 +03:00
Fixed ARMRST behaviour
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700f3be2db
commit
61b0af2103
@ -731,6 +731,12 @@ static void AICA_UpdateReg(aica_state *AICA, address_space &space, int reg)
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case 0x9:
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case 0x9:
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aica_midi_in(AICA->device, space, 0, AICA->udata.data[0x8/2]&0xff, 0xffff);
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aica_midi_in(AICA->device, space, 0, AICA->udata.data[0x8/2]&0xff, 0xffff);
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break;
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break;
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//case 0x0c:
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//case 0x0d:
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// printf("%04x\n",AICA->udata.data[0xc/2]);
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// break;
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case 0x12:
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case 0x12:
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case 0x13:
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case 0x13:
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case 0x14:
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case 0x14:
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@ -945,6 +951,7 @@ static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
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case 0x14: // CA (slot address)
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case 0x14: // CA (slot address)
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case 0x15:
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case 0x15:
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{
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{
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//AICA->stream->update();
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int slotnum = MSLC(AICA);
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int slotnum = MSLC(AICA);
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SLOT *slot=AICA->Slots+slotnum;
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SLOT *slot=AICA->Slots+slotnum;
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unsigned int CA = 0;
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unsigned int CA = 0;
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@ -958,6 +965,8 @@ static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
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CA = (slot->cur_addr>>SHIFT)&AICA->RAM_MASK;
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CA = (slot->cur_addr>>SHIFT)&AICA->RAM_MASK;
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}
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}
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//printf("%08x %08x\n",CA,slot->cur_addr&AICA->RAM_MASK16);
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AICA->udata.data[0x14/2] = CA;
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AICA->udata.data[0x14/2] = CA;
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}
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}
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break;
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break;
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@ -36,6 +36,7 @@ class dc_state : public driver_device
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UINT32 dc_sysctrl_regs[0x200/4];
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UINT32 dc_sysctrl_regs[0x200/4];
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UINT32 g1bus_regs[0x100/4]; // DC-only
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UINT32 g1bus_regs[0x100/4]; // DC-only
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UINT32 g2bus_regs[0x100/4];
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UINT32 g2bus_regs[0x100/4];
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UINT8 m_armrst;
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struct {
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struct {
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UINT32 aica_addr;
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UINT32 aica_addr;
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@ -666,6 +666,7 @@ void dc_state::machine_start()
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void dc_state::machine_reset()
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void dc_state::machine_reset()
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{
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{
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/* halt the ARM7 */
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/* halt the ARM7 */
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m_armrst = 1;
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m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
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memset(dc_sysctrl_regs, 0, sizeof(dc_sysctrl_regs));
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memset(dc_sysctrl_regs, 0, sizeof(dc_sysctrl_regs));
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@ -677,6 +678,9 @@ READ32_MEMBER(dc_state::dc_aica_reg_r)
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{
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{
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// mame_printf_verbose("AICA REG: [%08x] read %" I64FMT "x, mask %" I64FMT "x\n", 0x700000+reg*4, (UINT64)offset, mem_mask);
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// mame_printf_verbose("AICA REG: [%08x] read %" I64FMT "x, mask %" I64FMT "x\n", 0x700000+reg*4, (UINT64)offset, mem_mask);
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if(offset == 0x2c00/4)
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return m_armrst;
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return aica_r(machine().device("aica"), space, offset*2, 0xffff);
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return aica_r(machine().device("aica"), space, offset*2, 0xffff);
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}
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}
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@ -684,6 +688,10 @@ WRITE32_MEMBER(dc_state::dc_aica_reg_w)
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{
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{
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if (offset == (0x2c00/4))
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if (offset == (0x2c00/4))
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{
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{
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if(ACCESSING_BITS_0_7)
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{
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m_armrst = data & 1;
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if (data & 1)
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if (data & 1)
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{
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{
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/* halt the ARM7 */
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/* halt the ARM7 */
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@ -695,6 +703,7 @@ WRITE32_MEMBER(dc_state::dc_aica_reg_w)
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m_soundcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
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m_soundcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
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}
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}
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}
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}
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}
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aica_w(machine().device("aica"), space, offset*2, data, 0xffff);
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aica_w(machine().device("aica"), space, offset*2, data, 0xffff);
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@ -157,9 +157,9 @@
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ok
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ok
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S_Clock (03xx)
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S_Clock (03xx)
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50MSEC (0301)
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50MSEC (0301)
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NG
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NG -> ~0xa58 in 0x702814, must be > 0x889 and < 0x8b0
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25MSEC (0302)
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25MSEC (0302)
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NG
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NG -> ~0x372 in 0x702814, must be > 0x443 and < 0x45a
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Timer (04xx)
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Timer (04xx)
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Timer A (0401)
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Timer A (0401)
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NG
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NG
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