Fixed ARMRST behaviour

This commit is contained in:
Angelo Salese 2013-09-09 23:56:45 +00:00
parent 700f3be2db
commit 61b0af2103
4 changed files with 29 additions and 10 deletions

View File

@ -731,6 +731,12 @@ static void AICA_UpdateReg(aica_state *AICA, address_space &space, int reg)
case 0x9: case 0x9:
aica_midi_in(AICA->device, space, 0, AICA->udata.data[0x8/2]&0xff, 0xffff); aica_midi_in(AICA->device, space, 0, AICA->udata.data[0x8/2]&0xff, 0xffff);
break; break;
//case 0x0c:
//case 0x0d:
// printf("%04x\n",AICA->udata.data[0xc/2]);
// break;
case 0x12: case 0x12:
case 0x13: case 0x13:
case 0x14: case 0x14:
@ -945,6 +951,7 @@ static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
case 0x14: // CA (slot address) case 0x14: // CA (slot address)
case 0x15: case 0x15:
{ {
//AICA->stream->update();
int slotnum = MSLC(AICA); int slotnum = MSLC(AICA);
SLOT *slot=AICA->Slots+slotnum; SLOT *slot=AICA->Slots+slotnum;
unsigned int CA = 0; unsigned int CA = 0;
@ -958,6 +965,8 @@ static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
CA = (slot->cur_addr>>SHIFT)&AICA->RAM_MASK; CA = (slot->cur_addr>>SHIFT)&AICA->RAM_MASK;
} }
//printf("%08x %08x\n",CA,slot->cur_addr&AICA->RAM_MASK16);
AICA->udata.data[0x14/2] = CA; AICA->udata.data[0x14/2] = CA;
} }
break; break;

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@ -36,6 +36,7 @@ class dc_state : public driver_device
UINT32 dc_sysctrl_regs[0x200/4]; UINT32 dc_sysctrl_regs[0x200/4];
UINT32 g1bus_regs[0x100/4]; // DC-only UINT32 g1bus_regs[0x100/4]; // DC-only
UINT32 g2bus_regs[0x100/4]; UINT32 g2bus_regs[0x100/4];
UINT8 m_armrst;
struct { struct {
UINT32 aica_addr; UINT32 aica_addr;

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@ -666,6 +666,7 @@ void dc_state::machine_start()
void dc_state::machine_reset() void dc_state::machine_reset()
{ {
/* halt the ARM7 */ /* halt the ARM7 */
m_armrst = 1;
m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); m_soundcpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
memset(dc_sysctrl_regs, 0, sizeof(dc_sysctrl_regs)); memset(dc_sysctrl_regs, 0, sizeof(dc_sysctrl_regs));
@ -677,6 +678,9 @@ READ32_MEMBER(dc_state::dc_aica_reg_r)
{ {
// mame_printf_verbose("AICA REG: [%08x] read %" I64FMT "x, mask %" I64FMT "x\n", 0x700000+reg*4, (UINT64)offset, mem_mask); // mame_printf_verbose("AICA REG: [%08x] read %" I64FMT "x, mask %" I64FMT "x\n", 0x700000+reg*4, (UINT64)offset, mem_mask);
if(offset == 0x2c00/4)
return m_armrst;
return aica_r(machine().device("aica"), space, offset*2, 0xffff); return aica_r(machine().device("aica"), space, offset*2, 0xffff);
} }
@ -684,6 +688,10 @@ WRITE32_MEMBER(dc_state::dc_aica_reg_w)
{ {
if (offset == (0x2c00/4)) if (offset == (0x2c00/4))
{ {
if(ACCESSING_BITS_0_7)
{
m_armrst = data & 1;
if (data & 1) if (data & 1)
{ {
/* halt the ARM7 */ /* halt the ARM7 */
@ -695,6 +703,7 @@ WRITE32_MEMBER(dc_state::dc_aica_reg_w)
m_soundcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); m_soundcpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
} }
} }
}
aica_w(machine().device("aica"), space, offset*2, data, 0xffff); aica_w(machine().device("aica"), space, offset*2, data, 0xffff);

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@ -157,9 +157,9 @@
ok ok
S_Clock (03xx) S_Clock (03xx)
50MSEC (0301) 50MSEC (0301)
NG NG -> ~0xa58 in 0x702814, must be > 0x889 and < 0x8b0
25MSEC (0302) 25MSEC (0302)
NG NG -> ~0x372 in 0x702814, must be > 0x443 and < 0x45a
Timer (04xx) Timer (04xx)
Timer A (0401) Timer A (0401)
NG NG