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Fixed coinage in Speed Attack! and cleaned-up the driver to current standards.

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(And added a re-write note to Speed Attack and Yumefuda drivers)
This commit is contained in:
Angelo Salese 2008-11-04 20:41:25 +00:00
parent 62d7168295
commit 62195dc9a0
3 changed files with 83 additions and 51 deletions
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98
src/mame/drivers/speedatk.c
View File

@ -5,9 +5,9 @@ Speed Attack! (c) 1984 Seta Kikaku Corp.
driver by Pierpaolo Prazzoli & Angelo Salese, based on early work by David Haywood driver by Pierpaolo Prazzoli & Angelo Salese, based on early work by David Haywood
TODO: TODO:
- Coinage Dip Switch doesn't match the readme? Also there are wrong coin insertions even - Video emulation requires a major conversion to the HD46505SP C.R.T. chip (MC6845 clone)
with the bit impulse macro. There are chances that there's a circuitry which controls - It's possible that there is only one coin chute and not two,needs a real board to know
both... more about it.
How to play: How to play:
- A to D selects a card. - A to D selects a card.
@ -78,10 +78,11 @@ PS / PD : key matrix
#include "sound/ay8910.h" #include "sound/ay8910.h"
static UINT8 mux_data; static UINT8 mux_data;
static UINT8 km_status,coin_settings;
extern WRITE8_HANDLER( speedatk_videoram_w ); extern WRITE8_HANDLER( speedatk_videoram_w );
extern WRITE8_HANDLER( speedatk_colorram_w ); extern WRITE8_HANDLER( speedatk_colorram_w );
extern WRITE8_HANDLER( speedatk_flip_screen_w ); extern WRITE8_HANDLER( speedatk_videoregs_w );
extern PALETTE_INIT( speedatk ); extern PALETTE_INIT( speedatk );
extern VIDEO_START( speedatk ); extern VIDEO_START( speedatk );
extern VIDEO_UPDATE( speedatk ); extern VIDEO_UPDATE( speedatk );
@ -92,6 +93,21 @@ extern VIDEO_UPDATE( speedatk );
* it handles the multiplexer device between player one and two. */ * it handles the multiplexer device between player one and two. */
static READ8_HANDLER( key_matrix_r ) static READ8_HANDLER( key_matrix_r )
{ {
static UINT8 coin_impulse;
if(coin_impulse > 0)
{
coin_impulse--;
return 0x80;
}
if((input_port_read(machine,"COINS") & 1) || (input_port_read(machine,"COINS") & 2))
{
coin_impulse = coin_settings;
coin_impulse--;
return 0x80;
}
switch(mux_data) switch(mux_data)
{ {
case 0x02: case 0x02:
@ -109,7 +125,6 @@ static READ8_HANDLER( key_matrix_r )
case 0x100: return 0x10; case 0x100: return 0x10;
case 0x200: return 0x20; case 0x200: return 0x20;
case 0x400: return 0x40; case 0x400: return 0x40;
case 0x800: return 0x80;
default: return 0x00; default: return 0x00;
} }
} }
@ -128,7 +143,6 @@ static READ8_HANDLER( key_matrix_r )
case 0x100: return 0x10; case 0x100: return 0x10;
case 0x200: return 0x20; case 0x200: return 0x20;
case 0x400: return 0x40; case 0x400: return 0x40;
case 0x800: return 0x80;
default: return 0x00; default: return 0x00;
} }
} }
@ -143,41 +157,42 @@ static WRITE8_HANDLER( key_matrix_w )
mux_data = data; mux_data = data;
} }
static READ8_HANDLER( read_8001 ) /*Key matrix status,used for coin settings and I don't know what else...*/
static READ8_HANDLER( key_matrix_status_r )
{ {
return 1; /*bit 0: busy flag,active low*/
return (km_status & 0xfe) | 1;
} }
static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 ) static WRITE8_HANDLER( key_matrix_status_w )
AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM) {
AM_RANGE(0x8000, 0x8000) AM_READ(key_matrix_r) km_status = data;
AM_RANGE(0x8001, 0x8001) AM_READ(read_8001) if(km_status & 0x80 && km_status < 0xa0)
AM_RANGE(0x8588, 0x858f) AM_READ(SMH_RAM) coin_settings = km_status & 0xf;
AM_RANGE(0x8800, 0x8bff) AM_READ(SMH_RAM) }
AM_RANGE(0x8c00, 0x8fff) AM_READ(SMH_RAM)
AM_RANGE(0xa000, 0xa3ff) AM_READ(SMH_RAM) static ADDRESS_MAP_START( speedatk_mem, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xb000, 0xb3ff) AM_READ(SMH_RAM) AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x8000) AM_READWRITE(key_matrix_r,key_matrix_w)
AM_RANGE(0x8001, 0x8001) AM_READWRITE(key_matrix_status_r,key_matrix_status_w)
AM_RANGE(0x8800, 0x8bff) AM_RAM
AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(speedatk_videoram_w) AM_BASE(&videoram)
AM_RANGE(0xb000, 0xb3ff) AM_RAM_WRITE(speedatk_colorram_w) AM_BASE(&colorram)
ADDRESS_MAP_END ADDRESS_MAP_END
static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 ) static ADDRESS_MAP_START( speedatk_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
AM_RANGE(0x8000, 0x8000) AM_WRITE(key_matrix_w)
AM_RANGE(0x8588, 0x858f) AM_WRITE(SMH_RAM)
AM_RANGE(0x8800, 0x8bff) AM_WRITE(SMH_RAM)
AM_RANGE(0x8c00, 0x8fff) AM_WRITE(SMH_RAM)
AM_RANGE(0xa000, 0xa3ff) AM_WRITE(speedatk_videoram_w) AM_BASE(&videoram)
AM_RANGE(0xb000, 0xb3ff) AM_WRITE(speedatk_colorram_w) AM_BASE(&colorram)
ADDRESS_MAP_END
static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x01, 0x01) AM_WRITE(speedatk_flip_screen_w) AM_RANGE(0x00, 0x01) AM_WRITE(speedatk_videoregs_w) // HD46505SP video registers
AM_RANGE(0x24, 0x24) AM_WRITE(SMH_NOP) //video timing
AM_RANGE(0x40, 0x40) AM_READ_PORT("DSW") AM_WRITE(ay8910_control_port_0_w) AM_RANGE(0x40, 0x40) AM_READ_PORT("DSW") AM_WRITE(ay8910_control_port_0_w)
AM_RANGE(0x41, 0x41) AM_WRITE(ay8910_write_port_0_w) AM_RANGE(0x41, 0x41) AM_WRITE(ay8910_write_port_0_w)
/* are these not used? after they're read it sets bit 7 */ /*Used only during attract mode,unknown meaning.*/
AM_RANGE(0x60, 0x60) AM_READ(SMH_NOP) AM_RANGE(0x60, 0x60) AM_READWRITE(SMH_NOP,SMH_NOP)//write the result to $62/$65
AM_RANGE(0x61, 0x61) AM_READ(SMH_NOP) AM_RANGE(0x61, 0x61) AM_READ(SMH_NOP)//write the result to $66
AM_RANGE(0x68, 0x68) AM_READ(SMH_NOP) AM_RANGE(0x62, 0x62) AM_WRITE(SMH_NOP)
AM_RANGE(0x65, 0x65) AM_WRITE(SMH_NOP)
AM_RANGE(0x66, 0x66) AM_WRITE(SMH_NOP)
AM_RANGE(0x68, 0x68) AM_READ(SMH_NOP)//bit 7 controls writings to ram address at $880f-$8810
ADDRESS_MAP_END ADDRESS_MAP_END
static INPUT_PORTS_START( speedatk ) static INPUT_PORTS_START( speedatk )
@ -197,11 +212,10 @@ static INPUT_PORTS_START( speedatk )
PORT_DIPSETTING( 0x20, DEF_STR( Normal ) ) PORT_DIPSETTING( 0x20, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) PORT_DIPSETTING( 0x10, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x30, DEF_STR( Hardest ) ) PORT_DIPSETTING( 0x30, DEF_STR( Hardest ) )
/* Doesn't work? */
PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coinage ) ) PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coinage ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_5C ) ) PORT_DIPSETTING( 0x40, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0xc0, "1 Coin/10 Credits" ) PORT_DIPSETTING( 0xc0, "1 Coin/10 Credits" )
PORT_START("P1") PORT_START("P1")
@ -216,7 +230,6 @@ static INPUT_PORTS_START( speedatk )
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(1) //P1 Turn PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(1) //P1 Turn
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x800, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2)
PORT_START("P2") PORT_START("P2")
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) //P2 A PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) //P2 A
@ -230,7 +243,10 @@ static INPUT_PORTS_START( speedatk )
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(2) //P2 Turn PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(2) //P2 Turn
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2)
PORT_START("COINS")
PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
INPUT_PORTS_END INPUT_PORTS_END
static const gfx_layout charlayout_1bpp = static const gfx_layout charlayout_1bpp =
@ -263,8 +279,8 @@ GFXDECODE_END
static MACHINE_DRIVER_START( speedatk ) static MACHINE_DRIVER_START( speedatk )
MDRV_CPU_ADD("main", Z80,12000000/2) MDRV_CPU_ADD("main", Z80,12000000/2)
MDRV_CPU_PROGRAM_MAP(readmem,writemem) MDRV_CPU_PROGRAM_MAP(speedatk_mem,0)
MDRV_CPU_IO_MAP(io_map,0) MDRV_CPU_IO_MAP(speedatk_io,0)
MDRV_CPU_VBLANK_INT("main", irq0_line_hold) MDRV_CPU_VBLANK_INT("main", irq0_line_hold)
/* video hardware */ /* video hardware */
@ -310,5 +326,5 @@ ROM_START( speedatk )
ROM_LOAD( "cb2.bpr", 0x0020, 0x0100, CRC(a604cf96) SHA1(a4ef6e77dcd3abe4c27e8e636222a5ee711a51f5) ) /* lookup table */ ROM_LOAD( "cb2.bpr", 0x0020, 0x0100, CRC(a604cf96) SHA1(a4ef6e77dcd3abe4c27e8e636222a5ee711a51f5) ) /* lookup table */
ROM_END ROM_END
GAME( 1984, speedatk, 0, speedatk, speedatk, 0, ROT0, "Seta Kikaku Corp.", "Speed Attack!", 0 ) GAME( 1984, speedatk, 0, speedatk, speedatk, 0, ROT0, "Seta Kikaku Corp.", "Speed Attack! (Japan)", 0 )

12
src/mame/drivers/yumefuda.c
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@ -15,7 +15,7 @@ TODO:
panel" is just a dedicated panel for this game; panel" is just a dedicated panel for this game;
-"Custom RAM" emulation: might be a (weak) protection device or related to the "Back-up RAM NG" -"Custom RAM" emulation: might be a (weak) protection device or related to the "Back-up RAM NG"
msg that pops up at every start-up. msg that pops up at every start-up.
-Video registers...are they of a custom hardware or a common device? -Video emulation requires a major conversion to the HD46505SP C.R.T. chip (MC6845 clone)
============================================================================================ ============================================================================================
Code disassembling Code disassembling
@ -236,9 +236,9 @@ static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK1, SMH_ROM) AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
AM_RANGE(0xa7fc, 0xa7fc) AM_WRITE(prot_lock_w) AM_RANGE(0xa7fc, 0xa7fc) AM_WRITE(prot_lock_w)
AM_RANGE(0xa7ff, 0xa7ff) AM_WRITE(eeprom_w) AM_RANGE(0xa7ff, 0xa7ff) AM_WRITE(eeprom_w)
AM_RANGE(0xaf80, 0xafff) AM_READWRITE(custom_ram_r, custom_ram_w) AM_BASE(&cus_ram) /*260d - 2626*/ AM_RANGE(0xaf80, 0xafff) AM_READWRITE(custom_ram_r, custom_ram_w) AM_BASE(&cus_ram)
AM_RANGE(0xb000, 0xb07f) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_split1_w) AM_BASE(&paletteram) /*Custom Format*/ AM_RANGE(0xb000, 0xb07f) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_split1_w) AM_BASE(&paletteram)
AM_RANGE(0xb080, 0xb0ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_split2_w) AM_BASE(&paletteram_2) /*Custom Format*/ AM_RANGE(0xb080, 0xb0ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_split2_w) AM_BASE(&paletteram_2)
AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(yumefuda_vram_w) AM_BASE(&videoram) AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(yumefuda_vram_w) AM_BASE(&videoram)
AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(yumefuda_cram_w) AM_BASE(&colorram) AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(yumefuda_cram_w) AM_BASE(&colorram)
AM_RANGE(0xe000, 0xffff) AM_RAM AM_RANGE(0xe000, 0xffff) AM_RAM
@ -246,13 +246,13 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( port_map, ADDRESS_SPACE_IO, 8 ) static ADDRESS_MAP_START( port_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff) ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_WRITE(yumefuda_videoregs_w) AM_RANGE(0x00, 0x01) AM_WRITE(yumefuda_videoregs_w) // HD46505SP video registers
AM_RANGE(0x40, 0x40) AM_READWRITE(ay8910_read_port_0_r, ay8910_control_port_0_w) AM_RANGE(0x40, 0x40) AM_READWRITE(ay8910_read_port_0_r, ay8910_control_port_0_w)
AM_RANGE(0x41, 0x41) AM_WRITE(ay8910_write_port_0_w) AM_RANGE(0x41, 0x41) AM_WRITE(ay8910_write_port_0_w)
AM_RANGE(0x80, 0x80) AM_WRITE(mux_w) AM_RANGE(0x80, 0x80) AM_WRITE(mux_w)
AM_RANGE(0x81, 0x81) AM_READ(eeprom_r) AM_RANGE(0x81, 0x81) AM_READ(eeprom_r)
AM_RANGE(0x82, 0x82) AM_READ(mux_r) AM_RANGE(0x82, 0x82) AM_READ(mux_r)
AM_RANGE(0xc0, 0xc0) AM_WRITE(port_c0_w) /*watchdog write?*/ AM_RANGE(0xc0, 0xc0) AM_WRITE(port_c0_w) // video timing
ADDRESS_MAP_END ADDRESS_MAP_END
static MACHINE_RESET( yumefuda ) static MACHINE_RESET( yumefuda )

20
src/mame/video/speedatk.c
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@ -85,9 +85,25 @@ WRITE8_HANDLER( speedatk_colorram_w )
tilemap_mark_tile_dirty(bg_tilemap, offset); tilemap_mark_tile_dirty(bg_tilemap, offset);
} }
WRITE8_HANDLER( speedatk_flip_screen_w ) WRITE8_HANDLER( speedatk_videoregs_w )
{ {
flip_screen_set(data); static UINT8 address;
if(offset == 0)
address = data;
else
{
switch(address)
{
/*temporary hook-up.*/
case 0x0d:
flip_screen_set(data & 8);
tilemap_set_scrolldx(bg_tilemap,0,data & 0x40);
break;
default:
logerror("Video Register %02x called with %02x data\n",address,data);
}
}
} }
static TILE_GET_INFO( get_tile_info ) static TILE_GET_INFO( get_tile_info )