added m58846 pinout

This commit is contained in:
hap 2015-05-22 19:26:40 +02:00
parent 04f90c4920
commit 62374751ec
4 changed files with 46 additions and 11 deletions

View File

@ -11,6 +11,8 @@
#include "melps4.h"
// note: for pinout and more info, see melps4.h
class m58846_device : public melps4_cpu_device
{

View File

@ -15,6 +15,7 @@
*M58845: 42-pin DIL, 2Kx9 ROM, 128x4 RAM, A/D converter, 2 timers
M58846: 42-pin DIL, 2Kx9 ROM, 128x4 RAM, 2 timers(not same as M58845), extra I/O ports
*M58847: 40-pin DIL, 2Kx9 ROM, 128x4 RAM, extra I/O ports(not same as M58846)
*M58848: ? (couldn't find info, just that it exists)
MELPS 41/42 subfamily:
@ -22,6 +23,8 @@
*M58496: 72-pin QFP CMOS, 2Kx10 ROM, 128x4 internal + 256x4 external RAM, 1 timer, low-power
*M58497: almost same as M58496
MELPS 740 subfamily has more differences, document them when needed.
References:
- 1982 Mitsubishi LSI Data Book
@ -78,6 +81,7 @@ void melps4_cpu_device::device_start()
memset(m_stack, 0, sizeof(m_stack));
m_op = 0;
m_prev_op = 0;
m_bitmask = 0;
m_cps = 0;
m_skip = false;
@ -104,6 +108,7 @@ void melps4_cpu_device::device_start()
save_item(NAME(m_stack));
save_item(NAME(m_op));
save_item(NAME(m_prev_op));
save_item(NAME(m_bitmask));
save_item(NAME(m_cps));
save_item(NAME(m_skip));
@ -192,6 +197,7 @@ void melps4_cpu_device::execute_run()
debugger_instruction_hook(this, m_pc);
m_icount--;
m_op = m_program->read_word(m_pc << 1) & 0x1ff;
m_bitmask = 1 << (m_op & 3);
m_pc = (m_pc & ~0x7f) | ((m_pc + 1) & 0x7f); // stays in the same page
// handle opcode if it's not skipped

View File

@ -12,6 +12,35 @@
#include "emu.h"
// pinout reference
/*
______ ______
D9 1 |* \_/ | 42 D8
D10 2 | | 41 D7
D11 3 | | 40 D6
RESET 4 | | 39 D5
T 5 | | 38 D4
K0 6 | | 37 D3
K1 7 | | 36 D2
K2 8 | | 35 D1
K3 9 | | 34 D0
G0 10 | | 33 Xin
G1 11 | M58846 | 32 Xout
G2 12 | | 31 S7
G3 13 | | 30 S6
U 14 | | 29 S5
F0 15 | | 28 S4
F1 16 | | 27 S3
F2 17 | | 26 S2
F3 18 | | 25 S1
INT 19 | | 24 S0
CNVss 20 | | 23 Vp
Vss 21 |_______________| 22 Vdd
*/
class melps4_cpu_device : public cpu_device
{
public:
@ -25,7 +54,7 @@ public:
, m_stack_levels(3)
, m_bm_page(14)
, m_int_page(12)
, m_xami_mask(0)
, m_xami_mask(0xf)
{ }
protected:
@ -66,7 +95,7 @@ protected:
UINT8 m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
UINT8 m_bm_page; // short BM default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
UINT8 m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
UINT8 m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0 for others)
UINT8 m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
// internal state, misc regs
UINT16 m_pc; // program counter (11 or 10-bit)
@ -74,6 +103,7 @@ protected:
UINT16 m_stack[12]; // callstack
UINT16 m_op;
UINT16 m_prev_op;
UINT8 m_bitmask; // opcode bit argument
UINT8 m_cps; // DP,CY or DP',CY' selected
bool m_skip; // skip next opcode

View File

@ -169,10 +169,10 @@ void melps4_cpu_device::op_xamd()
void melps4_cpu_device::op_xami()
{
// XAMI j: XAM J, INY, skip next on Y=mask(default 0)
// XAMI j: XAM J, skip next on Y mask(default 0xf), increment Y
op_xam();
op_iny();
m_skip = (m_y == m_xami_mask);
m_skip = ((m_y & m_xami_mask) == m_xami_mask);
m_y = (m_y + 1) & 0xf;
}
@ -245,22 +245,19 @@ void melps4_cpu_device::op_cma()
void melps4_cpu_device::op_sb()
{
// SB j: set RAM bit
UINT8 mask = 1 << (m_op & 3);
ram_w(ram_r() | mask);
ram_w(ram_r() | m_bitmask);
}
void melps4_cpu_device::op_rb()
{
// RB j: reset RAM bit
UINT8 mask = 1 << (m_op & 3);
ram_w(ram_r() & ~mask);
ram_w(ram_r() & ~m_bitmask);
}
void melps4_cpu_device::op_szb()
{
// SZB j: skip next if RAM bit is 0
UINT8 mask = 1 << (m_op & 3);
m_skip = !(ram_r() & mask);
m_skip = !(ram_r() & m_bitmask);
}