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lucky74.cpp: enabled save state support

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This commit is contained in:
Ivan Vangelista 2020-07-17 16:50:00 +02:00
parent f668cb4637
commit 625a0595fb
4 changed files with 213 additions and 201 deletions
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4
src/mame/drivers/goldstar.cpp
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@ -2212,7 +2212,7 @@ static INPUT_PORTS_START( cmast91 )
PORT_INCLUDE( cmv4_dsw5 ) PORT_INCLUDE( cmv4_dsw5 )
PORT_MODIFY("DSW5") PORT_MODIFY("DSW5")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:1") /* normally Display of Doll On Demo, but no whores in this set */ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:1") /* normally Display of Doll On Demo, but no ladies in this set */
PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) )
/* Coin In Limit OK */ /* Coin In Limit OK */
@ -2223,7 +2223,7 @@ static INPUT_PORTS_START( cmast91 )
PORT_DIPNAME( 0x40, 0x40, "Skill Stop" ) PORT_DIPLOCATION("DSW5:7") /* OK */ PORT_DIPNAME( 0x40, 0x40, "Skill Stop" ) PORT_DIPLOCATION("DSW5:7") /* OK */
PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:8") /* normally Test Mode For Disp. Of Doll, but no whores in this set */ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:8") /* normally Test Mode For Disp. Of Doll, but no ladies in this set */
PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END INPUT_PORTS_END

352
src/mame/drivers/lucky74.cpp
View File

@ -709,7 +709,7 @@
- Changes on the interrupt system (need to be verified on the PCB). - Changes on the interrupt system (need to be verified on the PCB).
- Renamed the graphics regions to more descriptive names. - Renamed the graphics regions to more descriptive names.
- Corrected the manufacturer's name. - Corrected the manufacturer's name.
- Splitted the driver to driver + video. - Split the driver to driver + video.
- Updated technical notes. - Updated technical notes.
@ -763,7 +763,6 @@
#include "cpu/z80/z80.h" #include "cpu/z80/z80.h"
#include "sound/ay8910.h" #include "sound/ay8910.h"
#include "sound/msm5205.h"
#include "sound/sn76496.h" #include "sound/sn76496.h"
#include "machine/i8255.h" #include "machine/i8255.h"
#include "machine/nvram.h" #include "machine/nvram.h"
@ -773,29 +772,42 @@
#include "lucky74.lh" #include "lucky74.lh"
#define MASTER_CLOCK XTAL(12'000'000) /* confirmed */ #define MASTER_CLOCK XTAL(12'000'000) // confirmed
/* custom 06B49P clocks */ // custom 06B49P clocks
#define C_06B49P_CLKOUT_01 (MASTER_CLOCK/2) /* 6 MHz. */ #define C_06B49P_CLKOUT_01 (MASTER_CLOCK/2) // 6 MHz.
#define C_06B49P_CLKOUT_02 (MASTER_CLOCK/4) /* 3 MHz. */ #define C_06B49P_CLKOUT_02 (MASTER_CLOCK/4) // 3 MHz.
#define C_06B49P_CLKOUT_03 (MASTER_CLOCK/4) /* 3 MHz. */ #define C_06B49P_CLKOUT_03 (MASTER_CLOCK/4) // 3 MHz.
#define C_06B49P_CLKOUT_04 (MASTER_CLOCK/8) /* 1.5 MHz. */ #define C_06B49P_CLKOUT_04 (MASTER_CLOCK/8) // 1.5 MHz.
#define C_06B49P_CLKOUT_05 (MASTER_CLOCK/16) /* 750 kHz. */ #define C_06B49P_CLKOUT_05 (MASTER_CLOCK/16) // 750 kHz.
#define C_06B49P_CLKOUT_06 (MASTER_CLOCK/32) /* 375 kHz. */ #define C_06B49P_CLKOUT_06 (MASTER_CLOCK/32) // 375 kHz.
#define C_06B49P_CLKOUT_07 (MASTER_CLOCK/64) /* 187.5 kHz. */ #define C_06B49P_CLKOUT_07 (MASTER_CLOCK/64) // 187.5 kHz.
#define C_06B49P_CLKOUT_08 (MASTER_CLOCK/128) /* 93.75 kHz. */ #define C_06B49P_CLKOUT_08 (MASTER_CLOCK/128) // 93.75 kHz.
#define C_06B49P_CLKOUT_09 (MASTER_CLOCK/256) /* 46875 Hz. */ #define C_06B49P_CLKOUT_09 (MASTER_CLOCK/256) // 46875 Hz.
#define C_06B49P_CLKOUT_10 (7782) /* 7782 Hz. measured */ #define C_06B49P_CLKOUT_10 (7782) // 7782 Hz. measured
#define C_06B49P_CLKOUT_11 (3920) /* 3920 Hz. measured */ #define C_06B49P_CLKOUT_11 (3920) // 3920 Hz. measured
#define C_06B49P_CLKOUT_12 (1960) /* 1960 Hz. measured */ #define C_06B49P_CLKOUT_12 (1960) // 1960 Hz. measured
#define C_06B49P_CLKOUT_13 (950) /* 950 Hz. measured */ #define C_06B49P_CLKOUT_13 (950) // 950 Hz. measured
#define C_06B49P_CLKOUT_14 (475) /* 475 Hz. measured */ #define C_06B49P_CLKOUT_14 (475) // 475 Hz. measured
#define C_06B49P_CLKOUT_15 (237) /* 237 Hz. measured */ #define C_06B49P_CLKOUT_15 (237) // 237 Hz. measured
#define C_06B49P_CLKOUT_16 (MASTER_CLOCK/100000) /* 120 Hz. */ #define C_06B49P_CLKOUT_16 (MASTER_CLOCK/100000) // 120 Hz.
#define C_06B49P_CLKOUT_17 (MASTER_CLOCK/200000) /* 60 Hz. */ #define C_06B49P_CLKOUT_17 (MASTER_CLOCK/200000) // 60 Hz.
#define C_06B49P_CLKOUT_18 (MASTER_CLOCK/256/3) /* 15625 Hz. (H-Sync) */ #define C_06B49P_CLKOUT_18 (MASTER_CLOCK/256/3) // 15625 Hz. (H-Sync)
#define C_06B49P_CLKOUT_19 (MASTER_CLOCK/200000) /* 60 Hz. (V-Sync) */ #define C_06B49P_CLKOUT_19 (MASTER_CLOCK/200000) // 60 Hz. (V-Sync)
void lucky74_state::machine_start()
{
m_lamps.resolve();
save_item(NAME(m_ym2149_portb));
save_item(NAME(m_usart_8251));
save_item(NAME(m_copro_sm7831));
save_item(NAME(m_adpcm_pos));
save_item(NAME(m_adpcm_end));
save_item(NAME(m_adpcm_data));
save_item(NAME(m_adpcm_reg));
save_item(NAME(m_adpcm_busy_line));
}
void lucky74_state::machine_reset() void lucky74_state::machine_reset()
{ {
@ -838,28 +850,28 @@ void lucky74_state::ym2149_portb_w(uint8_t data)
uint8_t lucky74_state::usart_8251_r() uint8_t lucky74_state::usart_8251_r()
{ {
/* reads to USART 8251 port */ // reads to USART 8251 port
logerror("read from USART port.\n"); logerror("read from USART port.\n");
return 0xff; return 0xff;
} }
void lucky74_state::usart_8251_w(uint8_t data) void lucky74_state::usart_8251_w(uint8_t data)
{ {
/* writes to USART 8251 port */ // writes to USART 8251 port
m_usart_8251 = data; m_usart_8251 = data;
logerror("write to USART port: %02x \n", m_usart_8251); logerror("write to USART port: %02x \n", m_usart_8251);
} }
uint8_t lucky74_state::copro_sm7831_r() uint8_t lucky74_state::copro_sm7831_r()
{ {
/* read from SM7831 co-processor */ // read from SM7831 co-processor
logerror("read from co-processor.\n"); logerror("read from co-processor.\n");
return 0xff; return 0xff;
} }
void lucky74_state::copro_sm7831_w(uint8_t data) void lucky74_state::copro_sm7831_w(uint8_t data)
{ {
/* write to SM7831 co-processor */ // write to SM7831 co-processor
m_copro_sm7831 = data; m_copro_sm7831 = data;
logerror("write to co-processor: %2X\n", m_copro_sm7831); logerror("write to co-processor: %2X\n", m_copro_sm7831);
} }
@ -878,10 +890,10 @@ void lucky74_state::lamps_a_w(uint8_t data)
---- xx-- BIG + SMALL (need to be individualized) ---- xx-- BIG + SMALL (need to be individualized)
*/ */
m_lamps[8] = BIT(data, 0); /* D-UP */ m_lamps[8] = BIT(data, 0); // D-UP
m_lamps[9] = BIT(data, 1); /* TAKE SCORE */ m_lamps[9] = BIT(data, 1); // TAKE SCORE
m_lamps[10] = BIT(data, 2); /* BIG */ m_lamps[10] = BIT(data, 2); // BIG
m_lamps[11] = BIT(data, 3); /* SMALL */ m_lamps[11] = BIT(data, 3); // SMALL
} }
void lucky74_state::lamps_b_w(uint8_t data) void lucky74_state::lamps_b_w(uint8_t data)
@ -895,17 +907,17 @@ void lucky74_state::lamps_b_w(uint8_t data)
---- x--- HOLD4 ---- x--- HOLD4
---x ---- HOLD5 ---x ---- HOLD5
-xx- ---- BET + START (need to be individualized) -xx- ---- BET + START (need to be individualized)
x--- ---- CANCEL (should lit start too?) x--- ---- CANCEL (should light start too?)
*/ */
m_lamps[0] = BIT(data, 0); /* HOLD1 */ m_lamps[0] = BIT(data, 0); // HOLD1
m_lamps[1] = BIT(data, 1); /* HOLD2 */ m_lamps[1] = BIT(data, 1); // HOLD2
m_lamps[2] = BIT(data, 2); /* HOLD3 */ m_lamps[2] = BIT(data, 2); // HOLD3
m_lamps[3] = BIT(data, 3); /* HOLD4 */ m_lamps[3] = BIT(data, 3); // HOLD4
m_lamps[4] = BIT(data, 4); /* HOLD5 */ m_lamps[4] = BIT(data, 4); // HOLD5
m_lamps[5] = BIT(data, 5); /* BET */ m_lamps[5] = BIT(data, 5); // BET
m_lamps[6] = BIT(data, 6) | BIT(data, 7); /* START */ m_lamps[6] = BIT(data, 6) | BIT(data, 7); // START
m_lamps[7] = BIT(data, 7); /* CANCEL */ m_lamps[7] = BIT(data, 7); // CANCEL
} }
@ -915,7 +927,7 @@ void lucky74_state::lamps_b_w(uint8_t data)
INTERRUPT_GEN_MEMBER(lucky74_state::nmi_interrupt) INTERRUPT_GEN_MEMBER(lucky74_state::nmi_interrupt)
{ {
if ((m_ym2149_portb & 0x10) == 0) /* ym2149 portB bit 4 trigger the NMI */ if ((m_ym2149_portb & 0x10) == 0) // ym2149 portB bit 4 triggers the NMI
{ {
device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero); device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero);
} }
@ -926,14 +938,14 @@ INTERRUPT_GEN_MEMBER(lucky74_state::nmi_interrupt)
* Memory Map Information * * Memory Map Information *
*************************/ *************************/
void lucky74_state::lucky74_map(address_map &map) void lucky74_state::prg_map(address_map &map)
{ {
map(0x0000, 0xbfff).rom(); map(0x0000, 0xbfff).rom();
map(0xc000, 0xcfff).ram().share("nvram"); /* NVRAM */ map(0xc000, 0xcfff).ram().share("nvram"); // NVRAM
map(0xd000, 0xd7ff).ram().w(FUNC(lucky74_state::lucky74_fg_videoram_w)).share("fg_videoram"); // VRAM1-1 map(0xd000, 0xd7ff).ram().w(FUNC(lucky74_state::fg_videoram_w)).share(m_fg_videoram); // VRAM1-1
map(0xd800, 0xdfff).ram().w(FUNC(lucky74_state::lucky74_fg_colorram_w)).share("fg_colorram"); // VRAM1-2 map(0xd800, 0xdfff).ram().w(FUNC(lucky74_state::fg_colorram_w)).share(m_fg_colorram); // VRAM1-2
map(0xe000, 0xe7ff).ram().w(FUNC(lucky74_state::lucky74_bg_videoram_w)).share("bg_videoram"); // VRAM2-1 map(0xe000, 0xe7ff).ram().w(FUNC(lucky74_state::bg_videoram_w)).share(m_bg_videoram); // VRAM2-1
map(0xe800, 0xefff).ram().w(FUNC(lucky74_state::lucky74_bg_colorram_w)).share("bg_colorram"); // VRAM2-2 map(0xe800, 0xefff).ram().w(FUNC(lucky74_state::bg_colorram_w)).share(m_bg_colorram); // VRAM2-2
map(0xf000, 0xf003).rw("ppi8255_0", FUNC(i8255_device::read), FUNC(i8255_device::write)); // Input Ports 0 & 1 map(0xf000, 0xf003).rw("ppi8255_0", FUNC(i8255_device::read), FUNC(i8255_device::write)); // Input Ports 0 & 1
map(0xf080, 0xf083).rw("ppi8255_2", FUNC(i8255_device::read), FUNC(i8255_device::write)); // DSW 1, 2 & 3 map(0xf080, 0xf083).rw("ppi8255_2", FUNC(i8255_device::read), FUNC(i8255_device::write)); // DSW 1, 2 & 3
map(0xf0c0, 0xf0c3).rw("ppi8255_3", FUNC(i8255_device::read), FUNC(i8255_device::write)); // DSW 4 map(0xf0c0, 0xf0c3).rw("ppi8255_3", FUNC(i8255_device::read), FUNC(i8255_device::write)); // DSW 4
@ -947,10 +959,10 @@ void lucky74_state::lucky74_map(address_map &map)
map(0xf800, 0xf803).rw(FUNC(lucky74_state::copro_sm7831_r), FUNC(lucky74_state::copro_sm7831_w)); // SM7831 Co-Processor map(0xf800, 0xf803).rw(FUNC(lucky74_state::copro_sm7831_r), FUNC(lucky74_state::copro_sm7831_w)); // SM7831 Co-Processor
} }
void lucky74_state::lucky74_portmap(address_map &map) void lucky74_state::portmap(address_map &map)
{ {
map.global_mask(0xff); map.global_mask(0xff);
map(0x00, 0x05).rw(FUNC(lucky74_state::custom_09R81P_port_r), FUNC(lucky74_state::custom_09R81P_port_w)); /* custom 09R81P (samples system) */ map(0x00, 0x05).rw(FUNC(lucky74_state::custom_09R81P_port_r), FUNC(lucky74_state::custom_09R81P_port_w)); // custom 09R81P (samples system)
map(0xff, 0xff).ram(); // presumably HS satellite control port (check patched in Lucky 74) map(0xff, 0xff).ram(); // presumably HS satellite control port (check patched in Lucky 74)
} }
@ -1019,24 +1031,24 @@ static INPUT_PORTS_START( lucky74 )
Test mode shows them as dupes. Maybe are multiplexed? Test mode shows them as dupes. Maybe are multiplexed?
*/ */
PORT_START("IN0") PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) /* 'A' in test mode */ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) // 'A' in test mode
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) /* 'B' in test mode */ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) // 'B' in test mode
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) /* 'C' in test mode */ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) // 'C' in test mode
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) /* 'D' in test mode */ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) // 'D' in test mode
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) /* 'E' in test mode */ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) // 'E' in test mode
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small") /* 'F' in test mode */ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small") // 'F' in test mode
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Flip SC Off") PORT_CODE(KEYCODE_O) /* 'G' in test mode (normal screen) */ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Flip SC Off") PORT_CODE(KEYCODE_O) // 'G' in test mode (normal screen)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Input H") PORT_CODE(KEYCODE_K) /* 'H' in test mode */ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Input H") PORT_CODE(KEYCODE_K) // 'H' in test mode
PORT_START("IN1") PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) /* 'I' in test mode */ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) // 'I' in test mode
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start") /* 'J' in test mode */ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start") // 'J' in test mode
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) /* 'K' in test mode */ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) // 'K' in test mode
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) /* 'L' in test mode */ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) // 'L' in test mode
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) /* 'M' & 'Q' in test mode */ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) // 'M' & 'Q' in test mode
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big") /* 'N' & 'P' in test mode */ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big") // 'N' & 'P' in test mode
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Flip SC On") PORT_CODE(KEYCODE_I) /* 'O' in test mode (inverted screen) */ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Flip SC On") PORT_CODE(KEYCODE_I) // 'O' in test mode (inverted screen)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* not in test mode */ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // not in test mode
PORT_START("IN2") PORT_START("IN2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
@ -1048,11 +1060,11 @@ static INPUT_PORTS_START( lucky74 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN3") /* YM2149, port A */ PORT_START("IN3") // YM2149, port A
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* Coin A */ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) // Coin A
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* Coin B */ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) // Coin B
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) /* Coin C */ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) // Coin C
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service") PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
@ -1069,38 +1081,38 @@ static INPUT_PORTS_START( lucky74 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW1") PORT_START("DSW1")
PORT_DIPNAME( 0x01, 0x01, "Auto Hold" ) PORT_DIPLOCATION("DSW1:1") /* see note 1 */ PORT_DIPNAME( 0x01, 0x01, "Auto Hold" ) PORT_DIPLOCATION("DSW1:1") // see note 1
PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) ) PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
PORT_DIPNAME( 0x02, 0x02, "Jackpot" ) PORT_DIPLOCATION("DSW1:2") /* see note 2 */ PORT_DIPNAME( 0x02, 0x02, "Jackpot" ) PORT_DIPLOCATION("DSW1:2") // see note 2
PORT_DIPSETTING( 0x02, "Bet x 100" ) PORT_DIPSETTING( 0x02, "Bet x 100" )
PORT_DIPSETTING( 0x00, "Bet x 150" ) PORT_DIPSETTING( 0x00, "Bet x 150" )
PORT_DIPNAME( 0x04, 0x04, "Ceiling Bonus Point" ) PORT_DIPLOCATION("DSW1:3") /* see note 3 */ PORT_DIPNAME( 0x04, 0x04, "Ceiling Bonus Point" ) PORT_DIPLOCATION("DSW1:3") // see note 3
PORT_DIPSETTING( 0x04, "Bet x 40" ) PORT_DIPSETTING( 0x04, "Bet x 40" )
PORT_DIPSETTING( 0x00, "Bet x 50" ) PORT_DIPSETTING( 0x00, "Bet x 50" )
PORT_DIPNAME( 0x78, 0x40, "Percentage" ) PORT_DIPLOCATION("DSW1:4,5,6,7") /* see note 4 */ PORT_DIPNAME( 0x78, 0x40, "Percentage" ) PORT_DIPLOCATION("DSW1:4,5,6,7") // see note 4
PORT_DIPSETTING( 0x00, "90%" ) /* 110% in the instruction sheet */ PORT_DIPSETTING( 0x00, "90%" ) // 110% in the instruction sheet
PORT_DIPSETTING( 0x08, "87%" ) /* 106% in the instruction sheet */ PORT_DIPSETTING( 0x08, "87%" ) // 106% in the instruction sheet
PORT_DIPSETTING( 0x10, "84%" ) /* 102% in the instruction sheet */ PORT_DIPSETTING( 0x10, "84%" ) // 102% in the instruction sheet
PORT_DIPSETTING( 0x18, "81%" ) /* 98% in the instruction sheet */ PORT_DIPSETTING( 0x18, "81%" ) // 98% in the instruction sheet
PORT_DIPSETTING( 0x20, "78%" ) /* 94% in the instruction sheet */ PORT_DIPSETTING( 0x20, "78%" ) // 94% in the instruction sheet
PORT_DIPSETTING( 0x28, "75%" ) /* 90% in the instruction sheet */ PORT_DIPSETTING( 0x28, "75%" ) // 90% in the instruction sheet
PORT_DIPSETTING( 0x30, "72%" ) /* 86% in the instruction sheet */ PORT_DIPSETTING( 0x30, "72%" ) // 86% in the instruction sheet
PORT_DIPSETTING( 0x38, "69%" ) /* 82% in the instruction sheet */ PORT_DIPSETTING( 0x38, "69%" ) // 82% in the instruction sheet
PORT_DIPSETTING( 0x40, "66%" ) /* 78% in the instruction sheet */ PORT_DIPSETTING( 0x40, "66%" ) // 78% in the instruction sheet
PORT_DIPSETTING( 0x48, "63%" ) /* 74% in the instruction sheet */ PORT_DIPSETTING( 0x48, "63%" ) // 74% in the instruction sheet
PORT_DIPSETTING( 0x50, "60%" ) /* 70% in the instruction sheet */ PORT_DIPSETTING( 0x50, "60%" ) // 70% in the instruction sheet
PORT_DIPSETTING( 0x58, "57%" ) /* 66% in the instruction sheet */ PORT_DIPSETTING( 0x58, "57%" ) // 66% in the instruction sheet
PORT_DIPSETTING( 0x60, "54%" ) /* 62% in the instruction sheet */ PORT_DIPSETTING( 0x60, "54%" ) // 62% in the instruction sheet
PORT_DIPSETTING( 0x68, "51%" ) /* 58% in the instruction sheet */ PORT_DIPSETTING( 0x68, "51%" ) // 58% in the instruction sheet
PORT_DIPSETTING( 0x70, "48%" ) /* 54% in the instruction sheet */ PORT_DIPSETTING( 0x70, "48%" ) // 54% in the instruction sheet
PORT_DIPSETTING( 0x78, "45%" ) /* 50% in the instruction sheet */ PORT_DIPSETTING( 0x78, "45%" ) // 50% in the instruction sheet
PORT_DIPNAME( 0x80, 0x80, "Panties" ) PORT_DIPLOCATION("DSW1:8") PORT_DIPNAME( 0x80, 0x80, "Panties" ) PORT_DIPLOCATION("DSW1:8")
PORT_DIPSETTING( 0x00, "Without" ) PORT_DIPSETTING( 0x00, "Without" )
PORT_DIPSETTING( 0x80, "With" ) PORT_DIPSETTING( 0x80, "With" )
PORT_START("DSW2") PORT_START("DSW2")
/* DIPs 1-4 handle the harcoded coinage for Coin A, B and Remote credits (B = A x 5; R = A x 10) */ // DIPs 1-4 handle the hardcoded coinage for Coin A, B and Remote credits (B = A x 5; R = A x 10)
PORT_DIPNAME( 0x0f, 0x0f, "Coinage A, B & Remote" ) PORT_DIPLOCATION("DSW2:1,2,3,4") PORT_DIPNAME( 0x0f, 0x0f, "Coinage A, B & Remote" ) PORT_DIPLOCATION("DSW2:1,2,3,4")
PORT_DIPSETTING( 0x00, "A: 20 Coins/1 Credit; B: 4 Coins/1 Credit; R: 2 Pulses/1 Credit" ) PORT_DIPSETTING( 0x00, "A: 20 Coins/1 Credit; B: 4 Coins/1 Credit; R: 2 Pulses/1 Credit" )
PORT_DIPSETTING( 0x01, "A: 15 Coins/1 Credit; B: 3 Coins/1 Credit; R: 15 Pulses/10 Credits" ) PORT_DIPSETTING( 0x01, "A: 15 Coins/1 Credit; B: 3 Coins/1 Credit; R: 15 Pulses/10 Credits" )
@ -1118,13 +1130,13 @@ static INPUT_PORTS_START( lucky74 )
PORT_DIPSETTING( 0x0d, "A: 1 Coin/2 Credits; B: 1 Coin/10 Credits; R: 1 Pulse/20 Credits" ) PORT_DIPSETTING( 0x0d, "A: 1 Coin/2 Credits; B: 1 Coin/10 Credits; R: 1 Pulse/20 Credits" )
PORT_DIPSETTING( 0x0e, "A: 1 Coin/5 Credits; B: 1 Coin/25 Credits; R: 1 Pulse/50 Credits" ) PORT_DIPSETTING( 0x0e, "A: 1 Coin/5 Credits; B: 1 Coin/25 Credits; R: 1 Pulse/50 Credits" )
PORT_DIPSETTING( 0x0f, "A: 1 Coin/10 Credits; B: 1 Coin/50 Credits; R: 1 Pulse/100 Credits" ) PORT_DIPSETTING( 0x0f, "A: 1 Coin/10 Credits; B: 1 Coin/50 Credits; R: 1 Pulse/100 Credits" )
/* DIPs 5-8 handle the Coin C coinage */ // DIPs 5-8 handle the Coin C coinage
PORT_DIPNAME( 0xf0, 0xf0, "Coinage C" ) PORT_DIPLOCATION("DSW2:5,6,7,8") PORT_DIPNAME( 0xf0, 0xf0, "Coinage C" ) PORT_DIPLOCATION("DSW2:5,6,7,8")
PORT_DIPSETTING( 0x00, "10 Coins/1 Credit" ) PORT_DIPSETTING( 0x00, "10 Coins/1 Credit" )
PORT_DIPSETTING( 0x10, DEF_STR( 5C_1C ) ) PORT_DIPSETTING( 0x10, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x30, DEF_STR( 4C_1C ) ) PORT_DIPSETTING( 0x30, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 3C_1C ) ) PORT_DIPSETTING( 0x40, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x20, "5 Coins/2 Credits" ) /* 2.5 coins per credit */ PORT_DIPSETTING( 0x20, "5 Coins/2 Credits" ) // 2.5 coins per credit
PORT_DIPSETTING( 0x50, DEF_STR( 2C_1C ) ) PORT_DIPSETTING( 0x50, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x70, DEF_STR( 1C_1C ) ) PORT_DIPSETTING( 0x70, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x60, DEF_STR( 2C_3C ) ) PORT_DIPSETTING( 0x60, DEF_STR( 2C_3C ) )
@ -1141,7 +1153,7 @@ static INPUT_PORTS_START( lucky74 )
PORT_DIPNAME( 0x01, 0x00, "Bet Max" ) PORT_DIPLOCATION("DSW3:1") PORT_DIPNAME( 0x01, 0x00, "Bet Max" ) PORT_DIPLOCATION("DSW3:1")
PORT_DIPSETTING( 0x01, "20" ) PORT_DIPSETTING( 0x01, "20" )
PORT_DIPSETTING( 0x00, "40" ) PORT_DIPSETTING( 0x00, "40" )
PORT_DIPNAME( 0x06, 0x06, "Minimum Bet" ) PORT_DIPLOCATION("DSW3:2,3") /* Bet Min */ PORT_DIPNAME( 0x06, 0x06, "Minimum Bet" ) PORT_DIPLOCATION("DSW3:2,3") // Bet Min
PORT_DIPSETTING( 0x06, "1" ) PORT_DIPSETTING( 0x06, "1" )
PORT_DIPSETTING( 0x04, "5" ) PORT_DIPSETTING( 0x04, "5" )
PORT_DIPSETTING( 0x02, "8" ) PORT_DIPSETTING( 0x02, "8" )
@ -1151,12 +1163,12 @@ static INPUT_PORTS_START( lucky74 )
PORT_DIPSETTING( 0x10, "10000" ) PORT_DIPSETTING( 0x10, "10000" )
PORT_DIPSETTING( 0x08, "15000" ) PORT_DIPSETTING( 0x08, "15000" )
PORT_DIPSETTING( 0x00, "20000" ) PORT_DIPSETTING( 0x00, "20000" )
PORT_DIPNAME( 0x20, 0x20, "Woman's figure in Main Game" ) PORT_DIPLOCATION("DSW3:6") /* see note 6 */ PORT_DIPNAME( 0x20, 0x20, "Woman's figure in Main Game" ) PORT_DIPLOCATION("DSW3:6") // see note 6
PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x20, DEF_STR( Yes ) ) PORT_DIPSETTING( 0x20, DEF_STR( Yes ) )
PORT_DIPNAME( 0x40, 0x40, "Type of Poker" ) PORT_DIPLOCATION("DSW3:7") PORT_DIPNAME( 0x40, 0x40, "Type of Poker" ) PORT_DIPLOCATION("DSW3:7")
PORT_DIPSETTING( 0x40, "A - Without Wild Card" ) /* see the game notes */ PORT_DIPSETTING( 0x40, "A - Without Wild Card" ) // see the game notes
PORT_DIPSETTING( 0x00, "B - Joker Wild Poker" ) /* see the game notes */ PORT_DIPSETTING( 0x00, "B - Joker Wild Poker" ) // see the game notes
PORT_DIPNAME( 0x80, 0x80, "Kinds of Poker" ) PORT_DIPLOCATION("DSW3:8") PORT_DIPNAME( 0x80, 0x80, "Kinds of Poker" ) PORT_DIPLOCATION("DSW3:8")
PORT_DIPSETTING( 0x80, "A - Hold" ) PORT_DIPSETTING( 0x80, "A - Hold" )
PORT_DIPSETTING( 0x00, "B - Discard" ) PORT_DIPSETTING( 0x00, "B - Discard" )
@ -1171,20 +1183,20 @@ static INPUT_PORTS_START( lucky74 )
PORT_DIPNAME( 0x04, 0x00, "Hopper Capacity" ) PORT_DIPLOCATION("DSW4:3") PORT_DIPNAME( 0x04, 0x00, "Hopper Capacity" ) PORT_DIPLOCATION("DSW4:3")
PORT_DIPSETTING( 0x04, "700" ) PORT_DIPSETTING( 0x04, "700" )
PORT_DIPSETTING( 0x00, "Unlimited" ) PORT_DIPSETTING( 0x00, "Unlimited" )
PORT_DIPNAME( 0x08, 0x08, "Woman's figure in D-UP game" ) PORT_DIPLOCATION("DSW4:4") /* doesn't seems to work */ PORT_DIPNAME( 0x08, 0x08, "Woman's figure in D-UP game" ) PORT_DIPLOCATION("DSW4:4") // doesn't seems to work
PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x08, DEF_STR( Yes ) ) PORT_DIPSETTING( 0x08, DEF_STR( Yes ) )
PORT_DIPNAME( 0x10, 0x10, "Double-Up game" ) PORT_DIPLOCATION("DSW4:5") PORT_DIPNAME( 0x10, 0x10, "Double-Up game" ) PORT_DIPLOCATION("DSW4:5")
PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) ) PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
PORT_DIPNAME( 0x20, 0x20, "Stop by 6th Double-Up" ) PORT_DIPLOCATION("DSW4:6") /* see note 7 */ PORT_DIPNAME( 0x20, 0x20, "Stop by 6th Double-Up" ) PORT_DIPLOCATION("DSW4:6") // see note 7
PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x20, DEF_STR( Yes ) ) PORT_DIPSETTING( 0x20, DEF_STR( Yes ) )
PORT_DIPNAME( 0xC0, 0xC0, "Double-Up difficulty" ) PORT_DIPLOCATION("DSW4:7,8") PORT_DIPNAME( 0xC0, 0xC0, "Double-Up difficulty" ) PORT_DIPLOCATION("DSW4:7,8")
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) /* easy (from instruction sheet) */ PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) // easy (from instruction sheet)
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) ) /* .... (from instruction sheet) */ PORT_DIPSETTING( 0x40, DEF_STR( Hard ) ) // .... (from instruction sheet)
PORT_DIPSETTING( 0x80, DEF_STR( Normal ) ) /* .... (from instruction sheet) */ PORT_DIPSETTING( 0x80, DEF_STR( Normal ) ) // .... (from instruction sheet)
PORT_DIPSETTING( 0xC0, DEF_STR( Easy ) ) /* difficult (from instruction sheet) */ PORT_DIPSETTING( 0xC0, DEF_STR( Easy ) ) // difficult (from instruction sheet)
INPUT_PORTS_END INPUT_PORTS_END
@ -1194,22 +1206,22 @@ static INPUT_PORTS_START( lucky74a )
PORT_MODIFY("DSW1") PORT_MODIFY("DSW1")
PORT_DIPNAME( 0x78, 0x40, "Percentage" ) PORT_DIPLOCATION("DSW1:4,5,6,7") PORT_DIPNAME( 0x78, 0x40, "Percentage" ) PORT_DIPLOCATION("DSW1:4,5,6,7")
PORT_DIPSETTING( 0x00, "110%" ) /* 110% in the instruction sheet */ PORT_DIPSETTING( 0x00, "110%" ) // 110% in the instruction sheet
PORT_DIPSETTING( 0x08, "106%" ) /* 106% in the instruction sheet */ PORT_DIPSETTING( 0x08, "106%" ) // 106% in the instruction sheet
PORT_DIPSETTING( 0x10, "102%" ) /* 102% in the instruction sheet */ PORT_DIPSETTING( 0x10, "102%" ) // 102% in the instruction sheet
PORT_DIPSETTING( 0x18, "98%" ) /* 98% in the instruction sheet */ PORT_DIPSETTING( 0x18, "98%" ) // 98% in the instruction sheet
PORT_DIPSETTING( 0x20, "94%" ) /* 94% in the instruction sheet */ PORT_DIPSETTING( 0x20, "94%" ) // 94% in the instruction sheet
PORT_DIPSETTING( 0x28, "90%" ) /* 90% in the instruction sheet */ PORT_DIPSETTING( 0x28, "90%" ) // 90% in the instruction sheet
PORT_DIPSETTING( 0x30, "86%" ) /* 86% in the instruction sheet */ PORT_DIPSETTING( 0x30, "86%" ) // 86% in the instruction sheet
PORT_DIPSETTING( 0x38, "82%" ) /* 82% in the instruction sheet */ PORT_DIPSETTING( 0x38, "82%" ) // 82% in the instruction sheet
PORT_DIPSETTING( 0x40, "78%" ) /* 78% in the instruction sheet */ PORT_DIPSETTING( 0x40, "78%" ) // 78% in the instruction sheet
PORT_DIPSETTING( 0x48, "74%" ) /* 74% in the instruction sheet */ PORT_DIPSETTING( 0x48, "74%" ) // 74% in the instruction sheet
PORT_DIPSETTING( 0x50, "70%" ) /* 70% in the instruction sheet */ PORT_DIPSETTING( 0x50, "70%" ) // 70% in the instruction sheet
PORT_DIPSETTING( 0x58, "66%" ) /* 66% in the instruction sheet */ PORT_DIPSETTING( 0x58, "66%" ) // 66% in the instruction sheet
PORT_DIPSETTING( 0x60, "62%" ) /* 62% in the instruction sheet */ PORT_DIPSETTING( 0x60, "62%" ) // 62% in the instruction sheet
PORT_DIPSETTING( 0x68, "58%" ) /* 58% in the instruction sheet */ PORT_DIPSETTING( 0x68, "58%" ) // 58% in the instruction sheet
PORT_DIPSETTING( 0x70, "54%" ) /* 54% in the instruction sheet */ PORT_DIPSETTING( 0x70, "54%" ) // 54% in the instruction sheet
PORT_DIPSETTING( 0x78, "50%" ) /* 50% in the instruction sheet */ PORT_DIPSETTING( 0x78, "50%" ) // 50% in the instruction sheet
INPUT_PORTS_END INPUT_PORTS_END
@ -1377,12 +1389,12 @@ INPUT_PORTS_END
static const gfx_layout tilelayout = static const gfx_layout tilelayout =
{ {
8, 8, 8, 8,
RGN_FRAC(1,4), /* 4096 tiles */ RGN_FRAC(1,4), // 4096 tiles */
4, 4,
{ 0, RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) }, /* bitplanes are separated */ { 0, RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) }, // bitplanes are separated
{ 0, 1, 2, 3, 4, 5, 6, 7 }, { 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
8*8 /* every char takes 8 consecutive bytes */ 8*8 // every char takes 8 consecutive bytes
}; };
@ -1391,8 +1403,8 @@ static const gfx_layout tilelayout =
******************************/ ******************************/
static GFXDECODE_START( gfx_lucky74 ) static GFXDECODE_START( gfx_lucky74 )
GFXDECODE_ENTRY( "fgtiles", 0, tilelayout, 0, 16 ) /* text, frames & cards */ GFXDECODE_ENTRY( "fgtiles", 0, tilelayout, 0, 16 ) // text, frames & cards
GFXDECODE_ENTRY( "bgtiles", 0, tilelayout, 256, 16 ) /* title & whores */ GFXDECODE_ENTRY( "bgtiles", 0, tilelayout, 256, 16 ) // title & ladies
GFXDECODE_END GFXDECODE_END
@ -1402,7 +1414,7 @@ GFXDECODE_END
void lucky74_state::sound_start() void lucky74_state::sound_start()
{ {
/* cleaning all 09R81P registers */ // cleaning all 09R81P registers
uint8_t i; uint8_t i;
@ -1411,18 +1423,18 @@ void lucky74_state::sound_start()
m_adpcm_reg[i] = 0; m_adpcm_reg[i] = 0;
} }
m_adpcm_busy_line = 0x01; /* free and ready */ m_adpcm_busy_line = 0x01; // free and ready
} }
WRITE_LINE_MEMBER(lucky74_state::lucky74_adpcm_int) WRITE_LINE_MEMBER(lucky74_state::adpcm_int)
{ {
if (m_adpcm_reg[05] == 0x01) /* register 0x05 (bit 0 activated), trigger the sample */ if (m_adpcm_reg[05] == 0x01) // register 0x05 (bit 0 activated), trigger the sample
{ {
/* conditional zone for samples reproduction */ // conditional zone for samples reproduction
if (m_adpcm_busy_line) /* still not started */ if (m_adpcm_busy_line) // still not started
{ {
/* init all 09R81P registers */ // init all 09R81P registers
logerror("init ADPCM registers\n"); logerror("init ADPCM registers\n");
m_adpcm_end = (m_adpcm_reg[04] << 8) + m_adpcm_reg[03]; m_adpcm_end = (m_adpcm_reg[04] << 8) + m_adpcm_reg[03];
m_adpcm_pos = (m_adpcm_reg[01] << 8) + m_adpcm_reg[00]; m_adpcm_pos = (m_adpcm_reg[01] << 8) + m_adpcm_reg[00];
@ -1435,22 +1447,22 @@ WRITE_LINE_MEMBER(lucky74_state::lucky74_adpcm_int)
if (m_adpcm_data == -1) if (m_adpcm_data == -1)
{ {
/* transferring 1st nibble */ // transferring 1st nibble
m_adpcm_data = memregion("adpcm")->base()[m_adpcm_pos]; m_adpcm_data = memregion("adpcm")->base()[m_adpcm_pos];
m_adpcm_pos = (m_adpcm_pos + 1) & 0xffff; m_adpcm_pos = (m_adpcm_pos + 1) & 0xffff;
m_msm->data_w(m_adpcm_data >> 4); m_msm->data_w(m_adpcm_data >> 4);
if (m_adpcm_pos == m_adpcm_end) if (m_adpcm_pos == m_adpcm_end)
{ {
m_msm->reset_w(0); /* reset the M5205 */ m_msm->reset_w(0); // reset the M5205
m_adpcm_reg[05] = 0; /* clean trigger register */ m_adpcm_reg[05] = 0; // clean trigger register
m_adpcm_busy_line = 0x01; /* deactivate busy flag */ m_adpcm_busy_line = 0x01; // deactivate busy flag
logerror("end of sample.\n"); logerror("end of sample.\n");
} }
} }
else else
{ {
/* transferring 2nd nibble */ // transferring 2nd nibble
m_msm->data_w(m_adpcm_data & 0x0f); m_msm->data_w(m_adpcm_data & 0x0f);
m_adpcm_data = -1; m_adpcm_data = -1;
} }
@ -1465,11 +1477,11 @@ WRITE_LINE_MEMBER(lucky74_state::lucky74_adpcm_int)
void lucky74_state::lucky74(machine_config &config) void lucky74_state::lucky74(machine_config &config)
{ {
/* basic machine hardware */ // basic machine hardware
Z80(config, m_maincpu, C_06B49P_CLKOUT_03); /* 3 MHz. */ Z80(config, m_maincpu, C_06B49P_CLKOUT_03); // 3 MHz.
m_maincpu->set_addrmap(AS_PROGRAM, &lucky74_state::lucky74_map); m_maincpu->set_addrmap(AS_PROGRAM, &lucky74_state::prg_map);
m_maincpu->set_addrmap(AS_IO, &lucky74_state::lucky74_portmap); m_maincpu->set_addrmap(AS_IO, &lucky74_state::portmap);
m_maincpu->set_vblank_int("screen", FUNC(lucky74_state::nmi_interrupt)); /* 60 Hz. measured */ m_maincpu->set_vblank_int("screen", FUNC(lucky74_state::nmi_interrupt)); // 60 Hz. measured
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
@ -1494,34 +1506,34 @@ void lucky74_state::lucky74(machine_config &config)
ppi3.out_pb_callback().set(FUNC(lucky74_state::lamps_a_w)); ppi3.out_pb_callback().set(FUNC(lucky74_state::lamps_a_w));
ppi3.out_pc_callback().set(FUNC(lucky74_state::lamps_b_w)); ppi3.out_pc_callback().set(FUNC(lucky74_state::lamps_b_w));
/* video hardware */ // video hardware
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60); screen.set_refresh_hz(60);
screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
screen.set_size(64*8, 32*8); screen.set_size(64*8, 32*8);
screen.set_visarea(0*8, 64*8-1, 1*8, 30*8-1); screen.set_visarea(0*8, 64*8-1, 1*8, 30*8-1);
screen.set_screen_update(FUNC(lucky74_state::screen_update_lucky74)); screen.set_screen_update(FUNC(lucky74_state::screen_update));
screen.set_palette("palette"); screen.set_palette("palette");
GFXDECODE(config, m_gfxdecode, "palette", gfx_lucky74); GFXDECODE(config, m_gfxdecode, "palette", gfx_lucky74);
PALETTE(config, "palette", FUNC(lucky74_state::lucky74_palette), 512); PALETTE(config, "palette", FUNC(lucky74_state::palette), 512);
/* sound hardware */ // sound hardware
SPEAKER(config, "mono").front_center(); SPEAKER(config, "mono").front_center();
SN76489(config, "sn1", C_06B49P_CLKOUT_03).add_route(ALL_OUTPUTS, "mono", 0.80); /* 3 MHz. */ SN76489(config, "sn1", C_06B49P_CLKOUT_03).add_route(ALL_OUTPUTS, "mono", 0.80); // 3 MHz.
SN76489(config, "sn2", C_06B49P_CLKOUT_03).add_route(ALL_OUTPUTS, "mono", 0.80); /* 3 MHz. */ SN76489(config, "sn2", C_06B49P_CLKOUT_03).add_route(ALL_OUTPUTS, "mono", 0.80); // 3 MHz.
SN76489(config, "sn3", C_06B49P_CLKOUT_03).add_route(ALL_OUTPUTS, "mono", 0.80); /* 3 MHz. */ SN76489(config, "sn3", C_06B49P_CLKOUT_03).add_route(ALL_OUTPUTS, "mono", 0.80); // 3 MHz.
ay8910_device &aysnd(AY8910(config, "aysnd", C_06B49P_CLKOUT_04)); /* 1.5 MHz. */ ay8910_device &aysnd(AY8910(config, "aysnd", C_06B49P_CLKOUT_04)); // 1.5 MHz.
aysnd.port_a_read_callback().set_ioport("IN3"); aysnd.port_a_read_callback().set_ioport("IN3");
/* port b read is a sort of status byte */ // port b read is a sort of status byte
aysnd.port_b_write_callback().set(FUNC(lucky74_state::ym2149_portb_w)); aysnd.port_b_write_callback().set(FUNC(lucky74_state::ym2149_portb_w));
aysnd.add_route(ALL_OUTPUTS, "mono", 0.00); /* not routed to audio hardware */ aysnd.add_route(ALL_OUTPUTS, "mono", 0.00); // not routed to audio hardware
MSM5205(config, m_msm, C_06B49P_CLKOUT_06); /* 375 kHz. */ MSM5205(config, m_msm, C_06B49P_CLKOUT_06); // 375 kHz.
m_msm->vck_legacy_callback().set(FUNC(lucky74_state::lucky74_adpcm_int)); /* interrupt function */ m_msm->vck_legacy_callback().set(FUNC(lucky74_state::adpcm_int)); // interrupt function
m_msm->set_prescaler_selector(msm5205_device::S48_4B); /* 8KHz */ m_msm->set_prescaler_selector(msm5205_device::S48_4B); // 8KHz
m_msm->add_route(ALL_OUTPUTS, "mono", 0.70); m_msm->add_route(ALL_OUTPUTS, "mono", 0.70);
} }
@ -1557,9 +1569,9 @@ ROM_START( lucky74 )
ROM_LOAD( "luckychi.18", 0x10000, 0x8000, CRC(f2d45e76) SHA1(46df7bf98434c836fd38539575a35bf67c9ec2c6) ) ROM_LOAD( "luckychi.18", 0x10000, 0x8000, CRC(f2d45e76) SHA1(46df7bf98434c836fd38539575a35bf67c9ec2c6) )
ROM_LOAD( "luckychi.19", 0x18000, 0x8000, CRC(6b0196f3) SHA1(277049279dcfcf07189dbdb20935c2a71b2f6061) ) ROM_LOAD( "luckychi.19", 0x18000, 0x8000, CRC(6b0196f3) SHA1(277049279dcfcf07189dbdb20935c2a71b2f6061) )
ROM_REGION( 0x20000, "adpcm", 0 ) /* 4-bits ADPCM samples @ 8kHz */ ROM_REGION( 0x20000, "adpcm", 0 ) // 4-bits ADPCM samples @ 8kHz
ROM_LOAD( "luckyson.15", 0x00000, 0x10000, CRC(b896c87f) SHA1(985e625a937abd6353218f0cace14d3adec4c1bf) ) /* location 2n */ ROM_LOAD( "luckyson.15", 0x00000, 0x10000, CRC(b896c87f) SHA1(985e625a937abd6353218f0cace14d3adec4c1bf) ) // location 2n
ROM_FILL( 0x10000, 0x10000, 0xff ) /* empty socket @ 1n */ ROM_FILL( 0x10000, 0x10000, 0xff ) // empty socket @ 1n
ROM_REGION( 0x0600, "proms", 0 ) ROM_REGION( 0x0600, "proms", 0 )
ROM_LOAD( "luckyprom.e6", 0x0000, 0x0100, CRC(ae793fef) SHA1(e4e2d2dccabad7d756811fb2d5e123bf30f106f3) ) ROM_LOAD( "luckyprom.e6", 0x0000, 0x0100, CRC(ae793fef) SHA1(e4e2d2dccabad7d756811fb2d5e123bf30f106f3) )
@ -1627,9 +1639,9 @@ ROM_START( lucky74a )
ROM_LOAD( "8.1k", 0x10000, 0x8000, CRC(f2d45e76) SHA1(46df7bf98434c836fd38539575a35bf67c9ec2c6) ) ROM_LOAD( "8.1k", 0x10000, 0x8000, CRC(f2d45e76) SHA1(46df7bf98434c836fd38539575a35bf67c9ec2c6) )
ROM_LOAD( "9.1m", 0x18000, 0x8000, CRC(6b0196f3) SHA1(277049279dcfcf07189dbdb20935c2a71b2f6061) ) ROM_LOAD( "9.1m", 0x18000, 0x8000, CRC(6b0196f3) SHA1(277049279dcfcf07189dbdb20935c2a71b2f6061) )
ROM_REGION( 0x20000, "adpcm", 0 ) /* 4-bits ADPCM samples @ 8kHz */ ROM_REGION( 0x20000, "adpcm", 0 ) // 4-bits ADPCM samples @ 8kHz
ROM_LOAD( "5.2n", 0x00000, 0x10000, CRC(b896c87f) SHA1(985e625a937abd6353218f0cace14d3adec4c1bf) ) /* location 2n */ ROM_LOAD( "5.2n", 0x00000, 0x10000, CRC(b896c87f) SHA1(985e625a937abd6353218f0cace14d3adec4c1bf) ) // location 2n
ROM_FILL( 0x10000, 0x10000, 0xff ) /* empty socket @ 1n */ ROM_FILL( 0x10000, 0x10000, 0xff ) // empty socket @ 1n
ROM_REGION( 0x0600, "proms", 0 ) ROM_REGION( 0x0600, "proms", 0 )
ROM_LOAD( "82s129.e6", 0x0000, 0x0100, CRC(ae793fef) SHA1(e4e2d2dccabad7d756811fb2d5e123bf30f106f3) ) ROM_LOAD( "82s129.e6", 0x0000, 0x0100, CRC(ae793fef) SHA1(e4e2d2dccabad7d756811fb2d5e123bf30f106f3) )
@ -1652,7 +1664,7 @@ ROM_END
*/ */
ROM_START( lucky74b ) ROM_START( lucky74b )
ROM_REGION( 0x10000, "maincpu", 0 ) ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "luckygde.00", 0x0000, 0x10000, CRC(e3f7db99) SHA1(5c7d9d3fed9eb19d3d666c8c08b34968a9996a96) ) /* bad dump? */ ROM_LOAD( "luckygde.00", 0x0000, 0x10000, CRC(e3f7db99) SHA1(5c7d9d3fed9eb19d3d666c8c08b34968a9996a96) ) // bad dump?
ROM_REGION( 0x20000, "fgtiles", 0 ) ROM_REGION( 0x20000, "fgtiles", 0 )
ROM_LOAD( "luckygde.12", 0x00000, 0x8000, CRC(7127465b) SHA1(3f72f91652fcab52c073744b1651fdfe772c584a) ) ROM_LOAD( "luckygde.12", 0x00000, 0x8000, CRC(7127465b) SHA1(3f72f91652fcab52c073744b1651fdfe772c584a) )
@ -1666,9 +1678,9 @@ ROM_START( lucky74b )
ROM_LOAD( "luckygde.18", 0x10000, 0x8000, CRC(717e5f4e) SHA1(0f14c9525bf77bbc4de0d9695648acb40870a176) ) ROM_LOAD( "luckygde.18", 0x10000, 0x8000, CRC(717e5f4e) SHA1(0f14c9525bf77bbc4de0d9695648acb40870a176) )
ROM_LOAD( "luckygde.19", 0x18000, 0x8000, CRC(bb4608ae) SHA1(cc8ec596f445fe0364f254241227de368f309ebb) ) ROM_LOAD( "luckygde.19", 0x18000, 0x8000, CRC(bb4608ae) SHA1(cc8ec596f445fe0364f254241227de368f309ebb) )
ROM_REGION( 0x20000, "adpcm", 0 ) /* 4-bits ADPCM samples @ 8kHz */ ROM_REGION( 0x20000, "adpcm", 0 ) // 4-bits ADPCM samples @ 8kHz
ROM_LOAD( "luckyson.15", 0x00000, 0x10000, CRC(b896c87f) SHA1(985e625a937abd6353218f0cace14d3adec4c1bf) ) /* location 2n */ ROM_LOAD( "luckyson.15", 0x00000, 0x10000, CRC(b896c87f) SHA1(985e625a937abd6353218f0cace14d3adec4c1bf) ) // location 2n
ROM_FILL( 0x10000, 0x10000, 0xff ) /* empty socket @ 1n */ ROM_FILL( 0x10000, 0x10000, 0xff ) // empty socket @ 1n
ROM_REGION( 0x0600, "proms", 0 ) ROM_REGION( 0x0600, "proms", 0 )
ROM_LOAD( "luckyprom.e6", 0x0000, 0x0100, CRC(ae793fef) SHA1(e4e2d2dccabad7d756811fb2d5e123bf30f106f3) ) ROM_LOAD( "luckyprom.e6", 0x0000, 0x0100, CRC(ae793fef) SHA1(e4e2d2dccabad7d756811fb2d5e123bf30f106f3) )
@ -1721,9 +1733,9 @@ ROM_START( excitbj )
ROM_LOAD( "ebj_s8.1k", 0x20000, 0x10000, CRC(297443a7) SHA1(3a20498dcf69412f5bd3156391a55d3b1273c0b4) ) ROM_LOAD( "ebj_s8.1k", 0x20000, 0x10000, CRC(297443a7) SHA1(3a20498dcf69412f5bd3156391a55d3b1273c0b4) )
ROM_LOAD( "ebj_s9.1l", 0x30000, 0x10000, CRC(79ba7d75) SHA1(7301143a019d5e79eff7941a1a34fe96036acffa) ) ROM_LOAD( "ebj_s9.1l", 0x30000, 0x10000, CRC(79ba7d75) SHA1(7301143a019d5e79eff7941a1a34fe96036acffa) )
ROM_REGION( 0x20000, "adpcm", 0 ) /* 4-bits ADPCM samples @ 8kHz */ ROM_REGION( 0x20000, "adpcm", 0 ) // 4-bits ADPCM samples @ 8kHz
ROM_LOAD( "ebj_s5.2n", 0x00000, 0x10000, CRC(9b4a10a2) SHA1(843ab5955ba96bb1b1a5367652d0f6424ba23bdf) ) /* location 2n */ ROM_LOAD( "ebj_s5.2n", 0x00000, 0x10000, CRC(9b4a10a2) SHA1(843ab5955ba96bb1b1a5367652d0f6424ba23bdf) ) // location 2n
ROM_LOAD( "ebj_s10.1n", 0x10000, 0x10000, CRC(2fa7401d) SHA1(80a5dfd2b7c183acd2fc124d220de4a4921178b2) ) /* location 1n */ ROM_LOAD( "ebj_s10.1n", 0x10000, 0x10000, CRC(2fa7401d) SHA1(80a5dfd2b7c183acd2fc124d220de4a4921178b2) ) // location 1n
ROM_REGION( 0x0600, "proms", 0 ) ROM_REGION( 0x0600, "proms", 0 )
ROM_LOAD( "6e-a.6e", 0x0000, 0x0100, CRC(bcaa7a0d) SHA1(75554d539bf67effb862234cdf89e4df4e2193ed) ) ROM_LOAD( "6e-a.6e", 0x0000, 0x0100, CRC(bcaa7a0d) SHA1(75554d539bf67effb862234cdf89e4df4e2193ed) )
@ -1740,7 +1752,7 @@ ROM_END
**********************************************/ **********************************************/
// YEAR NAME PARENT MACHINE INPUT STATS INIT ROT COMPANY FULLNAME FLAGS LAYOUT // YEAR NAME PARENT MACHINE INPUT STATS INIT ROT COMPANY FULLNAME FLAGS LAYOUT
GAMEL( 1988, lucky74, 0, lucky74, lucky74, lucky74_state, empty_init, ROT0, "Wing Co., Ltd.", "Lucky 74 (bootleg, set 1)", 0, layout_lucky74 ) GAMEL( 1988, lucky74, 0, lucky74, lucky74, lucky74_state, empty_init, ROT0, "Wing Co., Ltd.", "Lucky 74 (bootleg, set 1)", MACHINE_SUPPORTS_SAVE, layout_lucky74 )
GAMEL( 1988, lucky74a, lucky74, lucky74, lucky74a, lucky74_state, empty_init, ROT0, "Wing Co., Ltd.", "Lucky 74 (bootleg, set 3)", 0, layout_lucky74 ) GAMEL( 1988, lucky74a, lucky74, lucky74, lucky74a, lucky74_state, empty_init, ROT0, "Wing Co., Ltd.", "Lucky 74 (bootleg, set 3)", MACHINE_SUPPORTS_SAVE, layout_lucky74 )
GAMEL( 1988, lucky74b, lucky74, lucky74, lucky74, lucky74_state, empty_init, ROT0, "Wing Co., Ltd.", "Lucky 74 (bootleg, set 2)", MACHINE_NOT_WORKING, layout_lucky74 ) GAMEL( 1988, lucky74b, lucky74, lucky74, lucky74, lucky74_state, empty_init, ROT0, "Wing Co., Ltd.", "Lucky 74 (bootleg, set 2)", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE, layout_lucky74 )
GAME( 1989, excitbj, 0, lucky74, excitbj, lucky74_state, empty_init, ROT0, "Sega", "Exciting Black Jack", MACHINE_NOT_WORKING ) GAME( 1989, excitbj, 0, lucky74, excitbj, lucky74_state, empty_init, ROT0, "Sega", "Exciting Black Jack", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )

20
src/mame/includes/lucky74.h
View File

@ -27,7 +27,7 @@ public:
void lucky74(machine_config &config); void lucky74(machine_config &config);
protected: protected:
virtual void machine_start() override { m_lamps.resolve(); } virtual void machine_start() override;
virtual void video_start() override; virtual void video_start() override;
virtual void machine_reset() override; virtual void machine_reset() override;
virtual void sound_start() override; virtual void sound_start() override;
@ -39,21 +39,21 @@ private:
void usart_8251_w(uint8_t data); void usart_8251_w(uint8_t data);
uint8_t copro_sm7831_r(); uint8_t copro_sm7831_r();
void copro_sm7831_w(uint8_t data); void copro_sm7831_w(uint8_t data);
void lucky74_fg_videoram_w(offs_t offset, uint8_t data); void fg_videoram_w(offs_t offset, uint8_t data);
void lucky74_fg_colorram_w(offs_t offset, uint8_t data); void fg_colorram_w(offs_t offset, uint8_t data);
void lucky74_bg_videoram_w(offs_t offset, uint8_t data); void bg_videoram_w(offs_t offset, uint8_t data);
void lucky74_bg_colorram_w(offs_t offset, uint8_t data); void bg_colorram_w(offs_t offset, uint8_t data);
void ym2149_portb_w(uint8_t data); void ym2149_portb_w(uint8_t data);
void lamps_a_w(uint8_t data); void lamps_a_w(uint8_t data);
void lamps_b_w(uint8_t data); void lamps_b_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_fg_tile_info); TILE_GET_INFO_MEMBER(get_fg_tile_info);
TILE_GET_INFO_MEMBER(get_bg_tile_info); TILE_GET_INFO_MEMBER(get_bg_tile_info);
void lucky74_palette(palette_device &palette) const; void palette(palette_device &palette) const;
uint32_t screen_update_lucky74(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(nmi_interrupt); INTERRUPT_GEN_MEMBER(nmi_interrupt);
DECLARE_WRITE_LINE_MEMBER(lucky74_adpcm_int); DECLARE_WRITE_LINE_MEMBER(adpcm_int);
void lucky74_map(address_map &map); void prg_map(address_map &map);
void lucky74_portmap(address_map &map); void portmap(address_map &map);
uint8_t m_ym2149_portb; uint8_t m_ym2149_portb;
uint8_t m_usart_8251; uint8_t m_usart_8251;

14
src/mame/video/lucky74.cpp
View File

@ -82,7 +82,7 @@
_ _
Regarding the abobe diagram, there are 2 different states controlled by both 06B53P. Regarding the above diagram, there are 2 different states controlled by both 06B53P.
Each state arrange a different palette that will be assigned to each graphics bank. Each state arrange a different palette that will be assigned to each graphics bank.
As we can see here, same pin of different PROMs are connected together in parallel. As we can see here, same pin of different PROMs are connected together in parallel.
@ -100,32 +100,32 @@
#include "includes/lucky74.h" #include "includes/lucky74.h"
void lucky74_state::lucky74_fg_videoram_w(offs_t offset, uint8_t data) void lucky74_state::fg_videoram_w(offs_t offset, uint8_t data)
{ {
m_fg_videoram[offset] = data; m_fg_videoram[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset); m_fg_tilemap->mark_tile_dirty(offset);
} }
void lucky74_state::lucky74_fg_colorram_w(offs_t offset, uint8_t data) void lucky74_state::fg_colorram_w(offs_t offset, uint8_t data)
{ {
m_fg_colorram[offset] = data; m_fg_colorram[offset] = data;
m_fg_tilemap->mark_tile_dirty(offset); m_fg_tilemap->mark_tile_dirty(offset);
} }
void lucky74_state::lucky74_bg_videoram_w(offs_t offset, uint8_t data) void lucky74_state::bg_videoram_w(offs_t offset, uint8_t data)
{ {
m_bg_videoram[offset] = data; m_bg_videoram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset); m_bg_tilemap->mark_tile_dirty(offset);
} }
void lucky74_state::lucky74_bg_colorram_w(offs_t offset, uint8_t data) void lucky74_state::bg_colorram_w(offs_t offset, uint8_t data)
{ {
m_bg_colorram[offset] = data; m_bg_colorram[offset] = data;
m_bg_tilemap->mark_tile_dirty(offset); m_bg_tilemap->mark_tile_dirty(offset);
} }
void lucky74_state::lucky74_palette(palette_device &palette) const void lucky74_state::palette(palette_device &palette) const
{ {
// There are 2 states (see the technical notes). // There are 2 states (see the technical notes).
// We're constructing a double-sized palette with one half for each state. // We're constructing a double-sized palette with one half for each state.
@ -233,7 +233,7 @@ void lucky74_state::video_start()
m_fg_tilemap->set_transparent_pen(0); m_fg_tilemap->set_transparent_pen(0);
} }
uint32_t lucky74_state::screen_update_lucky74(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) uint32_t lucky74_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{ {
m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0); m_bg_tilemap->draw(screen, bitmap, cliprect, 0, 0);
m_fg_tilemap->draw(screen, bitmap, cliprect, 0, 0); m_fg_tilemap->draw(screen, bitmap, cliprect, 0, 0);