From 626194e842091d2d98786179612c510ed153f9bc Mon Sep 17 00:00:00 2001 From: AJR Date: Thu, 16 Apr 2020 21:53:34 -0400 Subject: [PATCH] z8002: Correct width of I/O space (16-bit, not 8-bit) --- src/devices/cpu/z8000/z8000.cpp | 40 ++---------- src/devices/cpu/z8000/z8000.h | 8 +-- src/mame/drivers/onyx.cpp | 20 +++--- src/mame/drivers/wicat.cpp | 110 ++++---------------------------- 4 files changed, 29 insertions(+), 149 deletions(-) diff --git a/src/devices/cpu/z8000/z8000.cpp b/src/devices/cpu/z8000/z8000.cpp index 7b678978558..67a87c32179 100644 --- a/src/devices/cpu/z8000/z8000.cpp +++ b/src/devices/cpu/z8000/z8000.cpp @@ -27,19 +27,19 @@ DEFINE_DEVICE_TYPE(Z8002, z8002_device, "z8002", "Zilog Z8002") z8002_device::z8002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : z8002_device(mconfig, Z8002, tag, owner, clock, 16, 8, 1) + : z8002_device(mconfig, Z8002, tag, owner, clock, 16, 1) { } -z8002_device::z8002_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addrbits, int iobits, int vecmult) +z8002_device::z8002_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addrbits, int vecmult) : cpu_device(mconfig, type, tag, owner, clock) , m_program_config("program", ENDIANNESS_BIG, 16, addrbits, 0) , m_data_config("data", ENDIANNESS_BIG, 16, addrbits, 0) - , m_io_config("I/O", ENDIANNESS_BIG, iobits, 16, 0) + , m_io_config("I/O", ENDIANNESS_BIG, 16, 16, 0) , m_opcodes_config("first word", ENDIANNESS_BIG, 16, addrbits, 0) , m_stack_config("stack", ENDIANNESS_BIG, 16, addrbits, 0) - , m_sio_config("special I/O", ENDIANNESS_BIG, iobits, 16, 0) + , m_sio_config("special I/O", ENDIANNESS_BIG, 16, 16, 0) , m_iack_in(*this) , m_mo_out(*this) , m_ppc(0), m_pc(0), m_psapseg(0), m_psapoff(0), m_fcw(0), m_refresh(0), m_nspseg(0), m_nspoff(0), m_irq_req(0), m_irq_vec(0), m_op_valid(0), m_nmi_state(0), m_mi(0), m_halt(false), m_program(nullptr), m_data(nullptr), m_cache(nullptr), m_io(nullptr), m_icount(0) @@ -49,7 +49,7 @@ z8002_device::z8002_device(const machine_config &mconfig, device_type type, cons z8001_device::z8001_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : z8002_device(mconfig, Z8001, tag, owner, clock, 20, 16, 2) + : z8002_device(mconfig, Z8001, tag, owner, clock, 20, 2) { } @@ -258,21 +258,6 @@ uint8_t z8002_device::RDPORT_B(int mode, uint16_t addr) } uint16_t z8002_device::RDPORT_W(int mode, uint16_t addr) -{ - if(mode == 0) - { - // FIXME: this should perform a 16-bit big-endian word read - return m_io->read_byte((uint16_t)(addr)) + - (m_io->read_byte((uint16_t)(addr+1)) << 8); - } - else - { - /* how to handle MMU reads? */ - return m_sio->read_word_unaligned((uint16_t)addr); - } -} - -uint16_t z8001_device::RDPORT_W(int mode, uint16_t addr) { if(mode == 0) { @@ -299,21 +284,6 @@ void z8002_device::WRPORT_B(int mode, uint16_t addr, uint8_t value) } void z8002_device::WRPORT_W(int mode, uint16_t addr, uint16_t value) -{ - if(mode == 0) - { - // FIXME: this should perform a 16-bit big-endian word write - m_io->write_byte((uint16_t)(addr),value & 0xff); - m_io->write_byte((uint16_t)(addr+1),(value >> 8) & 0xff); - } - else - { - /* how to handle MMU writes? */ - m_sio->write_word_unaligned((uint16_t)addr, value); - } -} - -void z8001_device::WRPORT_W(int mode, uint16_t addr, uint16_t value) { if(mode == 0) { diff --git a/src/devices/cpu/z8000/z8000.h b/src/devices/cpu/z8000/z8000.h index dc75f16ae3e..b8f977c2f32 100644 --- a/src/devices/cpu/z8000/z8000.h +++ b/src/devices/cpu/z8000/z8000.h @@ -58,7 +58,7 @@ public: DECLARE_WRITE_LINE_MEMBER(mi_w) { m_mi = state; } // XXX: this has to apply in the middle of an insn for now protected: - z8002_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addrbits, int iobits, int vecmult); + z8002_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addrbits, int vecmult); // device-level overrides virtual void device_start() override; @@ -145,9 +145,9 @@ protected: inline void WRMEM_W(address_space &space, uint32_t addr, uint16_t value); inline void WRMEM_L(address_space &space, uint32_t addr, uint32_t value); inline uint8_t RDPORT_B(int mode, uint16_t addr); - virtual uint16_t RDPORT_W(int mode, uint16_t addr); + inline uint16_t RDPORT_W(int mode, uint16_t addr); inline void WRPORT_B(int mode, uint16_t addr, uint8_t value); - virtual void WRPORT_W(int mode, uint16_t addr, uint16_t value); + inline void WRPORT_W(int mode, uint16_t addr, uint16_t value); inline void cycles(int cycles); virtual void PUSH_PC(); virtual void CHANGE_FCW(uint16_t fcw); @@ -683,8 +683,6 @@ protected: // z8002_device overrides virtual bool get_segmented_mode() const override; virtual uint32_t adjust_addr_for_nonseg_mode(uint32_t addr) override; - virtual uint16_t RDPORT_W(int mode, uint16_t addr) override; - virtual void WRPORT_W(int mode, uint16_t addr, uint16_t value) override; virtual void PUSH_PC() override; virtual void CHANGE_FCW(uint16_t fcw) override; virtual uint32_t GET_PC(uint32_t VEC) override; diff --git a/src/mame/drivers/onyx.cpp b/src/mame/drivers/onyx.cpp index b632aafc784..f34ba13fc66 100644 --- a/src/mame/drivers/onyx.cpp +++ b/src/mame/drivers/onyx.cpp @@ -98,16 +98,16 @@ void onyx_state::z8002_m1_w(uint8_t data) void onyx_state::c8002_io(address_map &map) { - map(0xff00, 0xff07).lrw8(NAME([this] (offs_t offset) { return m_sio[0]->cd_ba_r(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_sio[0]->cd_ba_w(offset >> 1, data); })); - map(0xff08, 0xff0f).lrw8(NAME([this] (offs_t offset) { return m_sio[1]->cd_ba_r(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_sio[1]->cd_ba_w(offset >> 1, data); })); - map(0xff10, 0xff17).lrw8(NAME([this] (offs_t offset) { return m_sio[2]->cd_ba_r(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_sio[2]->cd_ba_w(offset >> 1, data); })); - map(0xff18, 0xff1f).lrw8(NAME([this] (offs_t offset) { return m_sio[3]->cd_ba_r(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_sio[3]->cd_ba_w(offset >> 1, data); })); - map(0xff20, 0xff27).lrw8(NAME([this] (offs_t offset) { return m_sio[4]->cd_ba_r(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_sio[4]->cd_ba_w(offset >> 1, data); })); - map(0xff30, 0xff37).lrw8(NAME([this] (offs_t offset) { return m_ctc[0]->read(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_ctc[0]->write(offset >> 1, data); })); - map(0xff38, 0xff3f).lrw8(NAME([this] (offs_t offset) { return m_ctc[1]->read(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_ctc[1]->write(offset >> 1, data); })); - map(0xff40, 0xff47).lrw8(NAME([this] (offs_t offset) { return m_ctc[2]->read(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_ctc[2]->write(offset >> 1, data); })); - map(0xff50, 0xff57).lrw8(NAME([this] (offs_t offset) { return m_pio[0]->read(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_pio[0]->write(offset >> 1, data); })); - map(0xff58, 0xff5f).lrw8(NAME([this] (offs_t offset) { return m_pio[1]->read(offset >> 1); }), NAME([this] (offs_t offset, u8 data) { m_pio[1]->write(offset >> 1, data); })); + map(0xff00, 0xff07).rw(m_sio[0], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff); + map(0xff08, 0xff0f).rw(m_sio[1], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff); + map(0xff10, 0xff17).rw(m_sio[2], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff); + map(0xff18, 0xff1f).rw(m_sio[3], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff); + map(0xff20, 0xff27).rw(m_sio[4], FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff); + map(0xff30, 0xff37).rw(m_ctc[0], FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff); + map(0xff38, 0xff3f).rw(m_ctc[1], FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff); + map(0xff40, 0xff47).rw(m_ctc[2], FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff); + map(0xff50, 0xff57).rw(m_pio[0], FUNC(z80pio_device::read), FUNC(z80pio_device::write)).umask16(0x00ff); + map(0xff58, 0xff5f).rw(m_pio[1], FUNC(z80pio_device::read), FUNC(z80pio_device::write)).umask16(0x00ff); map(0xffb9, 0xffb9).w(FUNC(onyx_state::z8002_m1_w)); } diff --git a/src/mame/drivers/wicat.cpp b/src/mame/drivers/wicat.cpp index d4380542985..ae8b7931266 100644 --- a/src/mame/drivers/wicat.cpp +++ b/src/mame/drivers/wicat.cpp @@ -43,7 +43,6 @@ class wicat_state : public driver_device public: wicat_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), - m_vram(*this, "vram"), m_maincpu(*this, "maincpu"), m_rtc(*this, "rtc"), m_via(*this, "via"), @@ -74,16 +73,6 @@ private: DECLARE_WRITE_LINE_MEMBER(bdir_w); DECLARE_WRITE8_MEMBER(via_a_w); DECLARE_WRITE8_MEMBER(via_b_w); - DECLARE_READ8_MEMBER(video_r); - DECLARE_WRITE8_MEMBER(video_w); - DECLARE_READ8_MEMBER(video_dma_r); - DECLARE_WRITE8_MEMBER(video_dma_w); - DECLARE_READ8_MEMBER(video_uart0_r); - DECLARE_WRITE8_MEMBER(video_uart0_w); - DECLARE_READ8_MEMBER(video_uart1_r); - DECLARE_WRITE8_MEMBER(video_uart1_w); - DECLARE_READ8_MEMBER(videosram_r); - DECLARE_WRITE8_MEMBER(videosram_w); DECLARE_WRITE8_MEMBER(videosram_store_w); DECLARE_WRITE8_MEMBER(videosram_recall_w); DECLARE_READ8_MEMBER(video_timer_r); @@ -102,7 +91,6 @@ private: DECLARE_WRITE16_MEMBER(via_w); I8275_DRAW_CHARACTER_MEMBER(wicat_display_pixels); - required_shared_ptr m_vram; required_device m_maincpu; required_device m_rtc; required_device m_via; @@ -185,20 +173,20 @@ void wicat_state::video_mem(address_map &map) void wicat_state::video_io(address_map &map) { // these are largely wild guesses... - map(0x0000, 0x0003).rw(FUNC(wicat_state::video_timer_r), FUNC(wicat_state::video_timer_w)); // some sort of timer? - map(0x0100, 0x0107).rw(FUNC(wicat_state::video_uart0_r), FUNC(wicat_state::video_uart0_w)); // INS2651 UART #1 - map(0x0200, 0x0207).rw(FUNC(wicat_state::video_uart1_r), FUNC(wicat_state::video_uart1_w)); // INS2651 UART #2 + map(0x0000, 0x0003).rw(FUNC(wicat_state::video_timer_r), FUNC(wicat_state::video_timer_w)).umask16(0xff00); // some sort of timer? + map(0x0100, 0x0107).rw(m_videouart0, FUNC(scn2651_device::read), FUNC(scn2651_device::write)).umask16(0xff00); // INS2651 UART #1 + map(0x0200, 0x0207).rw(m_videouart1, FUNC(scn2651_device::read), FUNC(scn2651_device::write)).umask16(0xff00); // INS2651 UART #2 map(0x0304, 0x0304).r(FUNC(wicat_state::video_status_r)); - map(0x0400, 0x047f).rw(FUNC(wicat_state::videosram_r), FUNC(wicat_state::videosram_w)); // XD2210 4-bit NOVRAM + map(0x0400, 0x047f).rw(m_videosram, FUNC(x2210_device::read), FUNC(x2210_device::write)).umask16(0xff00); // XD2210 4-bit NOVRAM map(0x0500, 0x0500).w(FUNC(wicat_state::videosram_recall_w)); map(0x0600, 0x0600).w(FUNC(wicat_state::videosram_store_w)); map(0x0800, 0x0807).w("videoctrl", FUNC(ls259_device::write_d0)).umask16(0xffff); - map(0x0a00, 0x0a1f).rw(FUNC(wicat_state::video_dma_r), FUNC(wicat_state::video_dma_w)); // AM9517A DMA - map(0x0b00, 0x0b03).rw(FUNC(wicat_state::video_r), FUNC(wicat_state::video_w)); // i8275 CRTC + map(0x0a00, 0x0a1f).rw(m_videodma, FUNC(am9517a_device::read), FUNC(am9517a_device::write)).umask16(0xff00); // AM9517A DMA + map(0x0b00, 0x0b03).rw(m_crtc, FUNC(i8275_device::read), FUNC(i8275_device::write)).umask16(0xff00); // i8275 CRTC map(0x0e00, 0x0eff).ram(); - map(0x4000, 0x5fff).ram().share("vram"); // video RAM? - map(0x8000, 0x8fff).rom().region("g2char", 0x0000); - map(0x9000, 0x9fff).rom().region("g2char", 0x0000); + map(0x4000, 0x5fff).ram(); // video RAM? + map(0x8000, 0x8fff).lr8(NAME([this] (offs_t offset) { return m_chargen->as_u8(offset); })); + map(0x9000, 0x9fff).lr8(NAME([this] (offs_t offset) { return m_chargen->as_u8(offset); })); } void wicat_state::wd1000_mem(address_map &map) @@ -547,32 +535,6 @@ WRITE16_MEMBER(wicat_state::via_w) m_via->write(offset,data>>8); } -READ8_MEMBER(wicat_state::video_r) -{ - switch(offset) - { - case 0x00: - return m_crtc->read(0); - case 0x02: - return m_crtc->read(1); - default: - return 0xff; - } -} - -WRITE8_MEMBER(wicat_state::video_w) -{ - switch(offset) - { - case 0x00: - m_crtc->write(0,data); - break; - case 0x02: - m_crtc->write(1,data); - break; - } -} - READ8_MEMBER( wicat_state::vram_r ) { return m_videocpu->space(AS_IO).read_byte(offset*2); @@ -583,56 +545,6 @@ WRITE8_MEMBER( wicat_state::vram_w ) m_videocpu->space(AS_IO).write_byte(offset*2,data); } -READ8_MEMBER(wicat_state::video_dma_r) -{ - return m_videodma->read(offset/2); -} - -WRITE8_MEMBER(wicat_state::video_dma_w) -{ - if(!(offset & 0x01)) - m_videodma->write(offset/2,data); -} - -READ8_MEMBER(wicat_state::video_uart0_r) -{ - uint16_t noff = offset >> 1; - return m_videouart0->read(noff); -} - -WRITE8_MEMBER(wicat_state::video_uart0_w) -{ - uint16_t noff = offset >> 1; - m_videouart0->write(noff,data); -} - -READ8_MEMBER(wicat_state::video_uart1_r) -{ - uint16_t noff = offset >> 1; - return m_videouart1->read(noff); -} - -WRITE8_MEMBER(wicat_state::video_uart1_w) -{ - uint16_t noff = offset >> 1; - m_videouart1->write(noff,data); -} - -// XD2210 64 x 4bit NOVRAM -READ8_MEMBER(wicat_state::videosram_r) -{ - if(offset & 0x01) - return 0xff; - else - return m_videosram->read(space,offset/2); -} - -WRITE8_MEMBER(wicat_state::videosram_w) -{ - if(!(offset & 0x01)) - m_videosram->write(offset/2,data); -} - WRITE8_MEMBER(wicat_state::videosram_store_w) { if(data & 0x01) // unsure of the actual bit checked, the terminal code just writes 0xff @@ -659,7 +571,7 @@ READ8_MEMBER(wicat_state::video_timer_r) if(offset == 0x00) return (m_videouart->dr_r() << 4) | (m_videouart->tbre_r() && m_videoctrl->q6_r() ? 0x08 : 0x00); - if(offset == 0x02) + if(offset == 0x01) { if (!machine().side_effects_disabled()) { @@ -674,7 +586,7 @@ READ8_MEMBER(wicat_state::video_timer_r) WRITE8_MEMBER(wicat_state::video_timer_w) { logerror("I/O port 0x%04x write %02x\n",offset,data); - if(offset == 0x02) + if(offset == 0x01) m_videouart->write(data); }