mirror of
https://github.com/holub/mame
synced 2025-04-26 18:23:08 +03:00
PAL porting, nw
This commit is contained in:
Angelo Salese
parent
4e66031c99
commit
6290c039a7
@ -2223,6 +2223,7 @@ DRIVER_INIT ( stv )
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state->m_smpc_ram[0x5f] = 0x10;
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state->m_instadma_hack = 0;
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state->m_vdp2.pal = 0;
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#ifdef MAME_DEBUG
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/*Uncomment this to enable header info*/
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@ -2563,17 +2564,22 @@ static TIMER_DEVICE_CALLBACK( saturn_scanline )
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saturn_state *state = timer.machine().driver_data<saturn_state>();
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int scanline = param;
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int max_y = timer.machine().primary_screen->height();
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int y_step;
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int y_step,vblank_line;
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y_step = (max_y == 263) ? 1 : 2;
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y_step = 2;
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if((max_y == 263 && state->m_vdp2.pal == 0) || (max_y == 313 && state->m_vdp2.pal == 1))
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y_step = 1;
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vblank_line = (state->m_vdp2.pal) ? 288 : 240;
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//popmessage("%08x %d %08x %08x",state->m_scu_regs[40] ^ 0xffffffff,max_y,state->m_scu_regs[36],state->m_scu_regs[38]);
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if(scanline == 0*y_step)
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device_set_input_line_and_vector(state->m_maincpu, 0xe, (stv_irq.vblank_out) ? HOLD_LINE : CLEAR_LINE , 0x41);
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else if(scanline == 240*y_step)
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else if(scanline == vblank_line*y_step)
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device_set_input_line_and_vector(state->m_maincpu, 0xf, (stv_irq.vblank_in) ? HOLD_LINE : CLEAR_LINE , 0x40);
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else if((scanline % y_step) == 0 && scanline < 240*y_step)
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else if((scanline % y_step) == 0 && scanline < vblank_line*y_step)
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device_set_input_line_and_vector(state->m_maincpu, 0xd, (stv_irq.hblank_in) ? HOLD_LINE : CLEAR_LINE, 0x42);
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/* TODO: this isn't completely correct */
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@ -2645,16 +2651,16 @@ static MACHINE_RESET( stv )
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static MACHINE_CONFIG_START( saturn, saturn_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", SH2, MASTER_CLOCK_320/2) // 28.6364 MHz
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MCFG_CPU_ADD("maincpu", SH2, MASTER_CLOCK_352/2) // 28.6364 MHz
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MCFG_CPU_PROGRAM_MAP(saturn_mem)
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MCFG_CPU_CONFIG(sh2_conf_master)
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MCFG_TIMER_ADD_SCANLINE("scantimer", saturn_scanline, "screen", 0, 1)
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MCFG_CPU_ADD("slave", SH2, MASTER_CLOCK_320/2) // 28.6364 MHz
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MCFG_CPU_ADD("slave", SH2, MASTER_CLOCK_352/2) // 28.6364 MHz
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MCFG_CPU_PROGRAM_MAP(saturn_mem)
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MCFG_CPU_CONFIG(sh2_conf_slave)
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MCFG_CPU_ADD("audiocpu", M68000, MASTER_CLOCK_320/5) //11.46 MHz
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MCFG_CPU_ADD("audiocpu", M68000, MASTER_CLOCK_352/5) //11.46 MHz
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MCFG_CPU_PROGRAM_MAP(sound_mem)
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MCFG_MACHINE_START(saturn)
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@ -2690,16 +2696,16 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_START( stv, saturn_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", SH2, MASTER_CLOCK_320/2) // 28.6364 MHz
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MCFG_CPU_ADD("maincpu", SH2, MASTER_CLOCK_352/2) // 28.6364 MHz
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MCFG_CPU_PROGRAM_MAP(stv_mem)
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MCFG_CPU_CONFIG(sh2_conf_master)
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MCFG_TIMER_ADD_SCANLINE("scantimer", saturn_scanline, "screen", 0, 1)
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MCFG_CPU_ADD("slave", SH2, MASTER_CLOCK_320/2) // 28.6364 MHz
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MCFG_CPU_ADD("slave", SH2, MASTER_CLOCK_352/2) // 28.6364 MHz
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MCFG_CPU_PROGRAM_MAP(stv_mem)
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MCFG_CPU_CONFIG(sh2_conf_slave)
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MCFG_CPU_ADD("audiocpu", M68000, MASTER_CLOCK_320/5) //11.46 MHz
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MCFG_CPU_ADD("audiocpu", M68000, MASTER_CLOCK_352/5) //11.46 MHz
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MCFG_CPU_PROGRAM_MAP(sound_mem)
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MCFG_MACHINE_START(stv)
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@ -2821,6 +2827,7 @@ static void saturn_init_driver(running_machine &machine, int rgn)
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system_time systime;
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state->saturn_region = rgn;
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state->m_vdp2.pal = (rgn == 12) ? 1 : 0;
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// set compatible options
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sh2drc_set_options(machine.device("maincpu"), SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
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@ -60,6 +60,7 @@ public:
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UINT8 *gfx_decode;
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bitmap_t *roz_bitmap[2];
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UINT8 dotsel;
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UINT8 pal;
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}m_vdp2;
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struct {
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@ -99,6 +100,7 @@ DRIVER_INIT ( stv );
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/*----------- defined in drivers/stvinit.c -----------*/
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UINT8 get_vblank(running_machine &machine);
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void install_stvbios_speedups(running_machine &machine);
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DRIVER_INIT(mausuke);
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DRIVER_INIT(puyosun);
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@ -161,8 +163,6 @@ WRITE32_HANDLER ( saturn_vdp1_framebuffer0_w );
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/*----------- defined in video/stvvdp2.c -----------*/
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UINT8 stv_get_vblank(running_machine &machine);
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READ32_HANDLER ( saturn_vdp2_vram_r );
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READ32_HANDLER ( saturn_vdp2_cram_r );
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READ32_HANDLER ( saturn_vdp2_regs_r );
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@ -272,7 +272,7 @@ WRITE32_HANDLER( saturn_vdp1_regs_w )
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else
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{
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if ( VDP1_LOG ) logerror( "VDP1: Access to register TVMR = %1X\n", STV_VDP1_TVMR );
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if ( STV_VDP1_VBE && stv_get_vblank(space->machine()) )
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if ( STV_VDP1_VBE && get_vblank(space->machine()) )
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{
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state->m_vdp1.framebuffer_clear_on_next_frame = 1;
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}
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@ -5161,14 +5161,9 @@ READ32_HANDLER ( saturn_vdp2_regs_r )
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{
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case 0x4/4:
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{
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int stv_hblank,stv_vblank,stv_odd;
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/*Screen Status Register*/
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stv_vblank = stv_get_vblank(space->machine());
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stv_hblank = get_hblank(space->machine());
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stv_odd = get_odd_bit(space->machine());
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/*VBLANK HBLANK ODD PAL */
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state->m_vdp2_regs[offset] = (stv_vblank<<19) | (stv_hblank<<18) | (stv_odd << 17) | (0 << 16);
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/*VBLANK HBLANK ODD PAL */
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state->m_vdp2_regs[offset] = (get_vblank(space->machine())<<19) | (get_hblank(space->machine())<<18) | (get_odd_bit(space->machine()) << 17) | (state->m_vdp2.pal << 16);
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break;
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}
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case 0x8/4:
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@ -5314,19 +5309,22 @@ static int get_hblank_duration(running_machine &machine)
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}
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/*some vblank lines measurements (according to Charles MacDonald)*/
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/* TODO: interlace mode "eats" one line, should be 262.5 */
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static int get_vblank_duration(running_machine &machine)
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{
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saturn_state *state = machine.driver_data<saturn_state>();
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int res;
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/* TODO: interlace mode "eats" one line, should be 262.5 */
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res = (state->m_vdp2.pal) ? 313 : 263;
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/* compensate for interlacing */
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if((STV_VDP2_LSMD & 3) == 3)
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res<<=1;
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if(STV_VDP2_HRES & 4)
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return (STV_VDP2_HRES & 1) ? 561 : 525; //Hi-Vision / 31kHz Monitor
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res = (STV_VDP2_HRES & 1) ? 561 : 525; //Hi-Vision / 31kHz Monitor
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if((STV_VDP2_LSMD & 3) == 3)
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return 263*2;
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return 263; //TODO: PAL uses 313
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return res;
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}
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static int get_pixel_clock(running_machine &machine)
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@ -5362,13 +5360,13 @@ static UINT8 get_hblank(running_machine &machine)
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return 0;
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}
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UINT8 stv_get_vblank(running_machine &machine)
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UINT8 get_vblank(running_machine &machine)
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{
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saturn_state *state = machine.driver_data<saturn_state>();
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int cur_v,vblank;
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cur_v = machine.primary_screen->vpos();
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vblank = 240;
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vblank = (state->m_vdp2.pal) ? 288 : 240;
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if((STV_VDP2_LSMD & 3) == 3)
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vblank<<=1;
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@ -5488,8 +5486,10 @@ void stv_vdp2_dynamic_res_change(running_machine &machine)
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const int d_vres[4] = { 224, 240, 256, 256 };
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const int d_hres[4] = { 320, 352, 640, 704 };
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int horz_res,vert_res;
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int vres_mask;
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vert_res = d_vres[STV_VDP2_VRES & 1]; //TODO: PAL uses mask 3, NTSC uses mask 1
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vres_mask = (state->m_vdp2.pal << 1)|1; //PAL uses mask 3, NTSC uses mask 1
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vert_res = d_vres[STV_VDP2_VRES & vres_mask];
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if((STV_VDP2_VRES & 3) == 3)
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popmessage("Illegal VRES MODE, contact MAMEdev");
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