mirror of
https://github.com/holub/mame
synced 2025-04-16 21:44:32 +03:00
- capbowl.cpp: used finders and other small cleanups
- system1.cpp: added hardware infos for pitfall2 [Guru]
This commit is contained in:
Ivan Vangelista
parent
3c8ef8d6fa
commit
62b74558d1
@ -2252,8 +2252,6 @@ files {
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createMAMEProjects(_target, _subtarget, "itech")
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createMAMEProjects(_target, _subtarget, "itech")
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files {
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files {
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MAME_DIR .. "src/mame/drivers/capbowl.cpp",
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MAME_DIR .. "src/mame/drivers/capbowl.cpp",
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MAME_DIR .. "src/mame/includes/capbowl.h",
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MAME_DIR .. "src/mame/video/capbowl.cpp",
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MAME_DIR .. "src/mame/drivers/itech8.cpp",
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MAME_DIR .. "src/mame/drivers/itech8.cpp",
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MAME_DIR .. "src/mame/includes/itech8.h",
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MAME_DIR .. "src/mame/includes/itech8.h",
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MAME_DIR .. "src/mame/machine/itech8.cpp",
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MAME_DIR .. "src/mame/machine/itech8.cpp",
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@ -40,7 +40,7 @@
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Bit 5 Player 2 Hook Right
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Bit 5 Player 2 Hook Right
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Bit 6 Upright/Cocktail DIP Switch
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Bit 6 Upright/Cocktail DIP Switch
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Bit 7 Coin 2
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Bit 7 Coin 2
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7800 Input port 2 Bit 0-3 Trackball Horizontal Positon
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7800 Input port 2 Bit 0-3 Trackball Horizontal Position
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Bit 4 Player 1 Hook Left
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Bit 4 Player 1 Hook Left
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Bit 5 Player 1 Hook Right
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Bit 5 Player 1 Hook Right
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Bit 6 Start
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Bit 6 Start
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@ -88,17 +88,286 @@
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***************************************************************************/
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***************************************************************************/
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#include "emu.h"
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#include "emu.h"
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#include "includes/capbowl.h"
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#include "cpu/m6809/m6809.h"
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#include "machine/gen_latch.h"
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#include "machine/nvram.h"
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#include "machine/rescap.h"
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#include "machine/rescap.h"
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#include "machine/ticket.h"
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#include "machine/ticket.h"
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#include "cpu/m6809/m6809.h"
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#include "machine/watchdog.h"
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#include "sound/dac.h"
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#include "sound/dac.h"
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#include "sound/ymopn.h"
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#include "sound/ymopn.h"
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#include "video/tms34061.h"
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#include "screen.h"
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#include "speaker.h"
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#include "speaker.h"
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#define MASTER_CLOCK XTAL(8'000'000)
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// configurable logging
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#define LOG_BLITTER (1U << 1)
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//#define VERBOSE (LOG_GENERAL | LOG_BLITTER)
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#include "logmacro.h"
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#define LOGBLITTER(...) LOGMASKED(LOG_BLITTER, __VA_ARGS__)
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namespace {
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class capbowl_base_state : public driver_device
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{
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public:
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capbowl_base_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_watchdog(*this, "watchdog"),
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m_audiocpu(*this, "audiocpu"),
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m_tms34061(*this, "tms34061"),
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m_screen(*this, "screen"),
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m_rowaddress(*this, "rowaddress"),
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m_service(*this, "SERVICE"),
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m_trackx(*this, "TRACKX"),
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m_tracky(*this, "TRACKY"),
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m_in(*this, "IN%u", 0U)
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{ }
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void base(machine_config &config);
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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required_device<cpu_device> m_maincpu;
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void base_main_map(address_map &map);
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private:
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// devices
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required_device<watchdog_timer_device> m_watchdog;
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required_device<cpu_device> m_audiocpu;
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required_device<tms34061_device> m_tms34061;
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required_device<screen_device> m_screen;
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// memory pointers
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required_shared_ptr<uint8_t> m_rowaddress;
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// input-related
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required_ioport m_service;
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required_ioport m_trackx;
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required_ioport m_tracky;
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required_ioport_array<2> m_in;
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uint8_t m_last_trackball_val[2]{};
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emu_timer *m_update_timer = nullptr;
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// common
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template <uint8_t Which> uint8_t track_r();
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void track_reset_w(uint8_t data);
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void tms34061_w(offs_t offset, uint8_t data);
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uint8_t tms34061_r(offs_t offset);
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INTERRUPT_GEN_MEMBER(interrupt);
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TIMER_CALLBACK_MEMBER(update);
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uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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inline rgb_t pen_for_pixel(uint8_t const *src, uint8_t pix);
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void sound_map(address_map &map);
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};
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class capbowl_state : public capbowl_base_state
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{
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public:
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capbowl_state(const machine_config &mconfig, device_type type, const char *tag) :
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capbowl_base_state(mconfig, type, tag),
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m_mainbank(*this, "mainbank")
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{ }
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void capbowl(machine_config &config);
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protected:
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virtual void machine_start() override;
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private:
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required_memory_bank m_mainbank;
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void rom_select_w(uint8_t data);
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void main_map(address_map &map);
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};
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class bowlrama_state : public capbowl_base_state
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{
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public:
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bowlrama_state(const machine_config &mconfig, device_type type, const char *tag) :
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capbowl_base_state(mconfig, type, tag),
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m_blitrom(*this, "blitter")
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{ }
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void bowlrama(machine_config &config);
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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private:
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required_region_ptr<uint8_t> m_blitrom;
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// video-related
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offs_t m_blitter_addr = 0U;
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void blitter_w(offs_t offset, uint8_t data);
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uint8_t blitter_r(offs_t offset);
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void main_map(address_map &map);
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};
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// video
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/*************************************
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*
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* TMS34061 I/O
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*
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*************************************/
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void capbowl_base_state::tms34061_w(offs_t offset, uint8_t data)
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{
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int func = (offset >> 8) & 3;
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int col = offset & 0xff;
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// Column address (CA0-CA8) is hooked up the A0-A7, with A1 being inverted during register access. CA8 is ignored
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if (func == 0 || func == 2)
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col ^= 2;
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// Row address (RA0-RA8) is not dependent on the offset
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m_tms34061->write(col, *m_rowaddress, func, data);
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}
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uint8_t capbowl_base_state::tms34061_r(offs_t offset)
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{
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int func = (offset >> 8) & 3;
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int col = offset & 0xff;
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// Column address (CA0-CA8) is hooked up the A0-A7, with A1 being inverted during register access. CA8 is ignored
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if (func == 0 || func == 2)
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col ^= 2;
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// Row address (RA0-RA8) is not dependent on the offset
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return m_tms34061->read(col, *m_rowaddress, func);
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}
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/*************************************
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*
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* Bowl-o-rama blitter
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*
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*************************************/
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void bowlrama_state::blitter_w(offs_t offset, uint8_t data)
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{
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switch (offset)
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{
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case 0x08: // Write address high byte (only 2 bits used)
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m_blitter_addr = (m_blitter_addr & ~0xff0000) | (data << 16);
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break;
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case 0x17: // Write address mid byte (8 bits)
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m_blitter_addr = (m_blitter_addr & ~0x00ff00) | (data << 8);
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break;
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case 0x18: // Write Address low byte (8 bits)
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m_blitter_addr = (m_blitter_addr & ~0x0000ff) | (data << 0);
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break;
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default:
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LOGBLITTER("PC=%04X Write to unsupported blitter address %02X Data=%02X\n", m_maincpu->pc(), offset, data);
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break;
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}
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}
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uint8_t bowlrama_state::blitter_r(offs_t offset)
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{
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uint8_t data = m_blitrom[m_blitter_addr];
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uint8_t result = 0;
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switch (offset)
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{
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/* Read Mask: Graphics data are 4bpp (2 pixels per byte).
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This function returns 0s for new pixel data.
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This allows data to be read as a mask, AND the mask with
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the screen data, then OR new data read by read data command. */
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case 0:
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if (!(data & 0xf0))
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result |= 0xf0; // High nibble is transparent
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if (!(data & 0x0f))
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result |= 0x0f; // Low nibble is transparent
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break;
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// Read data and increment address
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case 4:
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result = data;
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m_blitter_addr = (m_blitter_addr + 1) & 0x3ffff;
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break;
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default:
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LOGBLITTER("PC=%04X Read from unsupported blitter address %02X\n", m_maincpu->pc(), offset);
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break;
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}
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return result;
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}
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/*************************************
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*
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* Main refresh
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*
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*************************************/
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inline rgb_t capbowl_base_state::pen_for_pixel(uint8_t const *src, uint8_t pix)
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{
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return rgb_t(pal4bit(src[(pix << 1) + 0] >> 0),
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pal4bit(src[(pix << 1) + 1] >> 4),
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pal4bit(src[(pix << 1) + 1] >> 0));
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}
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uint32_t capbowl_base_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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// first get the current display state
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m_tms34061->get_display_state();
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// if we're blanked, just fill with black
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if (m_tms34061->blanked())
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{
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bitmap.fill(rgb_t::black(), cliprect);
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return 0;
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}
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// now regenerate the bitmap
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for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
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{
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uint8_t const *const src = &m_tms34061->vram(y);
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uint32_t *dest = &bitmap.pix(y);
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for (int x = cliprect.min_x & ~1; x <= cliprect.max_x; x += 2)
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{
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uint8_t pix = src[32 + (x / 2)];
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*dest++ = pen_for_pixel(src, pix >> 4);
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*dest++ = pen_for_pixel(src, pix & 0x0f);
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}
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}
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return 0;
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}
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// machine
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/*************************************
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/*************************************
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*
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*
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@ -108,10 +377,10 @@
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*
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*
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*************************************/
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*************************************/
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INTERRUPT_GEN_MEMBER(capbowl_state::interrupt)
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INTERRUPT_GEN_MEMBER(capbowl_base_state::interrupt)
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{
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{
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if (ioport("SERVICE")->read() & 1) /* get status of the F2 key */
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if (m_service->read() & 1) // get status of the F2 key
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device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero); /* trigger self test */
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device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero); // trigger self test
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}
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}
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@ -122,20 +391,7 @@ INTERRUPT_GEN_MEMBER(capbowl_state::interrupt)
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*
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*
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*************************************/
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*************************************/
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void capbowl_state::device_timer(emu_timer &timer, device_timer_id id, int param)
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TIMER_CALLBACK_MEMBER(capbowl_base_state::update)
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{
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switch (id)
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{
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case TIMER_UPDATE:
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update(param);
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break;
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default:
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throw emu_fatalerror("Unknown id in capbowl_state::device_timer");
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}
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}
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TIMER_CALLBACK_MEMBER(capbowl_state::update)
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{
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{
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int scanline = param;
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int scanline = param;
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@ -152,10 +408,10 @@ TIMER_CALLBACK_MEMBER(capbowl_state::update)
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*
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*
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*************************************/
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*************************************/
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void capbowl_state::capbowl_rom_select_w(uint8_t data)
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void capbowl_state::rom_select_w(uint8_t data)
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{
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{
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// 2009-11 FP: shall we add a check to be sure that bank < 6?
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// 2009-11 FP: shall we add a check to be sure that bank < 6?
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membank("bank1")->set_entry(((data & 0x0c) >> 1) + (data & 0x01));
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m_mainbank->set_entry(((data & 0x0c) >> 1) + (data & 0x01));
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}
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}
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@ -166,74 +422,53 @@ void capbowl_state::capbowl_rom_select_w(uint8_t data)
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*
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*
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*************************************/
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*************************************/
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uint8_t capbowl_state::track_0_r()
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template <uint8_t Which>
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uint8_t capbowl_base_state::track_r()
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{
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{
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return (ioport("IN0")->read() & 0xf0) | ((ioport("TRACKY")->read() - m_last_trackball_val[0]) & 0x0f);
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return (m_in[Which]->read() & 0xf0) | ((Which ? m_trackx->read() : m_tracky->read() - m_last_trackball_val[Which]) & 0x0f);
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}
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}
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void capbowl_base_state::track_reset_w(uint8_t data)
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uint8_t capbowl_state::track_1_r()
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{
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{
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return (ioport("IN1")->read() & 0xf0) | ((ioport("TRACKX")->read() - m_last_trackball_val[1]) & 0x0f);
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// reset the trackball counters
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}
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m_last_trackball_val[0] = m_tracky->read();
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m_last_trackball_val[1] = m_trackx->read();
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|
||||||
void capbowl_state::track_reset_w(uint8_t data)
|
|
||||||
{
|
|
||||||
/* reset the trackball counters */
|
|
||||||
m_last_trackball_val[0] = ioport("TRACKY")->read();
|
|
||||||
m_last_trackball_val[1] = ioport("TRACKX")->read();
|
|
||||||
|
|
||||||
m_watchdog->watchdog_reset();
|
m_watchdog->watchdog_reset();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
|
||||||
*
|
|
||||||
* Sound commands
|
|
||||||
*
|
|
||||||
*************************************/
|
|
||||||
|
|
||||||
void capbowl_state::sndcmd_w(uint8_t data)
|
|
||||||
{
|
|
||||||
m_audiocpu->set_input_line(M6809_IRQ_LINE, HOLD_LINE);
|
|
||||||
m_soundlatch->write(data);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
/*************************************
|
||||||
*
|
*
|
||||||
* Main CPU memory handlers
|
* Main CPU memory handlers
|
||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
void capbowl_state::capbowl_map(address_map &map)
|
void capbowl_base_state::base_main_map(address_map &map)
|
||||||
{
|
{
|
||||||
map(0x0000, 0x3fff).bankr("bank1");
|
map(0x4000, 0x4000).writeonly().share(m_rowaddress);
|
||||||
map(0x4000, 0x4000).writeonly().share("rowaddress");
|
|
||||||
map(0x4800, 0x4800).w(FUNC(capbowl_state::capbowl_rom_select_w));
|
|
||||||
map(0x5000, 0x57ff).ram().share("nvram");
|
map(0x5000, 0x57ff).ram().share("nvram");
|
||||||
map(0x5800, 0x5fff).rw(FUNC(capbowl_state::tms34061_r), FUNC(capbowl_state::tms34061_w));
|
map(0x5800, 0x5fff).rw(FUNC(capbowl_base_state::tms34061_r), FUNC(capbowl_base_state::tms34061_w));
|
||||||
map(0x6000, 0x6000).w(FUNC(capbowl_state::sndcmd_w));
|
map(0x6000, 0x6000).w("soundlatch", FUNC(generic_latch_8_device::write));
|
||||||
map(0x6800, 0x6800).w(FUNC(capbowl_state::track_reset_w)).nopr(); /* + watchdog */
|
map(0x6800, 0x6800).w(FUNC(capbowl_base_state::track_reset_w)).nopr(); // + watchdog
|
||||||
map(0x7000, 0x7000).r(FUNC(capbowl_state::track_0_r)); /* + other inputs */
|
map(0x7000, 0x7000).r(FUNC(capbowl_base_state::track_r<0>)); // + other inputs
|
||||||
map(0x7800, 0x7800).r(FUNC(capbowl_state::track_1_r)); /* + other inputs */
|
map(0x7800, 0x7800).r(FUNC(capbowl_base_state::track_r<1>)); // + other inputs
|
||||||
map(0x8000, 0xffff).rom();
|
map(0x8000, 0xffff).rom();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void capbowl_state::main_map(address_map &map)
|
||||||
void capbowl_state::bowlrama_map(address_map &map)
|
|
||||||
{
|
{
|
||||||
map(0x0000, 0x001f).rw(FUNC(capbowl_state::bowlrama_blitter_r), FUNC(capbowl_state::bowlrama_blitter_w));
|
base_main_map(map);
|
||||||
map(0x4000, 0x4000).writeonly().share("rowaddress");
|
|
||||||
map(0x5000, 0x57ff).ram().share("nvram");
|
map(0x0000, 0x3fff).bankr(m_mainbank);
|
||||||
map(0x5800, 0x5fff).rw(FUNC(capbowl_state::tms34061_r), FUNC(capbowl_state::tms34061_w));
|
map(0x4800, 0x4800).w(FUNC(capbowl_state::rom_select_w));
|
||||||
map(0x6000, 0x6000).w(FUNC(capbowl_state::sndcmd_w));
|
}
|
||||||
map(0x6800, 0x6800).w(FUNC(capbowl_state::track_reset_w)).nopr(); /* + watchdog */
|
|
||||||
map(0x7000, 0x7000).r(FUNC(capbowl_state::track_0_r)); /* + other inputs */
|
void bowlrama_state::main_map(address_map &map)
|
||||||
map(0x7800, 0x7800).r(FUNC(capbowl_state::track_1_r)); /* + other inputs */
|
{
|
||||||
map(0x8000, 0xffff).rom();
|
base_main_map(map);
|
||||||
|
|
||||||
|
map(0x0000, 0x001f).rw(FUNC(bowlrama_state::blitter_r), FUNC(bowlrama_state::blitter_w));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -244,13 +479,13 @@ void capbowl_state::bowlrama_map(address_map &map)
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
void capbowl_state::sound_map(address_map &map)
|
void capbowl_base_state::sound_map(address_map &map)
|
||||||
{
|
{
|
||||||
map(0x0000, 0x07ff).ram();
|
map(0x0000, 0x07ff).ram();
|
||||||
map(0x1000, 0x1001).rw("ymsnd", FUNC(ym2203_device::read), FUNC(ym2203_device::write));
|
map(0x1000, 0x1001).rw("ymsnd", FUNC(ym2203_device::read), FUNC(ym2203_device::write));
|
||||||
map(0x2000, 0x2000).nopw(); /* watchdog */
|
map(0x2000, 0x2000).nopw(); // watchdog
|
||||||
map(0x6000, 0x6000).w("dac", FUNC(dac_byte_interface::data_w));
|
map(0x6000, 0x6000).w("dac", FUNC(dac_byte_interface::data_w));
|
||||||
map(0x7000, 0x7000).r(m_soundlatch, FUNC(generic_latch_8_device::read));
|
map(0x7000, 0x7000).r("soundlatch", FUNC(generic_latch_8_device::read));
|
||||||
map(0x8000, 0xffff).rom();
|
map(0x8000, 0xffff).rom();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -264,16 +499,16 @@ void capbowl_state::sound_map(address_map &map)
|
|||||||
|
|
||||||
static INPUT_PORTS_START( capbowl )
|
static INPUT_PORTS_START( capbowl )
|
||||||
PORT_START("IN0")
|
PORT_START("IN0")
|
||||||
/* low 4 bits are for the trackball */
|
// low 4 bits are for the trackball
|
||||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
|
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
|
||||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
|
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
|
||||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) /* This version of Bowl-O-Rama */
|
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) // This version of Bowl-O-Rama
|
||||||
PORT_DIPSETTING( 0x40, DEF_STR( Upright ) ) /* is Upright only */
|
PORT_DIPSETTING( 0x40, DEF_STR( Upright ) ) // is Upright only
|
||||||
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
|
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
|
||||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
|
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
|
||||||
|
|
||||||
PORT_START("IN1")
|
PORT_START("IN1")
|
||||||
/* low 4 bits are for the trackball */
|
// low 4 bits are for the trackball
|
||||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
|
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
|
||||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
|
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
|
||||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
|
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
|
||||||
@ -286,8 +521,8 @@ static INPUT_PORTS_START( capbowl )
|
|||||||
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(20) PORT_KEYDELTA(40)
|
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(20) PORT_KEYDELTA(40)
|
||||||
|
|
||||||
PORT_START("SERVICE")
|
PORT_START("SERVICE")
|
||||||
/* This fake input port is used to get the status of the F2 key, */
|
/* This fake input port is used to get the status of the F2 key,
|
||||||
/* and activate the test mode, which is triggered by a NMI */
|
and activate the test mode, which is triggered by a NMI */
|
||||||
PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_HIGH )
|
PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_HIGH )
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
@ -298,60 +533,79 @@ INPUT_PORTS_END
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
void capbowl_state::machine_start()
|
void capbowl_base_state::machine_start()
|
||||||
{
|
{
|
||||||
m_update_timer = timer_alloc(TIMER_UPDATE);
|
m_update_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(capbowl_base_state::update), this));
|
||||||
|
|
||||||
save_item(NAME(m_blitter_addr));
|
|
||||||
save_item(NAME(m_last_trackball_val));
|
save_item(NAME(m_last_trackball_val));
|
||||||
}
|
}
|
||||||
|
|
||||||
void capbowl_state::machine_reset()
|
void capbowl_state::machine_start()
|
||||||
|
{
|
||||||
|
capbowl_base_state::machine_start();
|
||||||
|
|
||||||
|
uint8_t *rom = memregion("maincpu")->base();
|
||||||
|
|
||||||
|
// configure ROM banks in 0x0000-0x3fff
|
||||||
|
m_mainbank->configure_entries(0, 6, &rom[0x10000], 0x4000);
|
||||||
|
}
|
||||||
|
|
||||||
|
void bowlrama_state::machine_start()
|
||||||
|
{
|
||||||
|
capbowl_base_state::machine_start();
|
||||||
|
|
||||||
|
save_item(NAME(m_blitter_addr));
|
||||||
|
}
|
||||||
|
|
||||||
|
void capbowl_base_state::machine_reset()
|
||||||
{
|
{
|
||||||
m_update_timer->adjust(m_screen->time_until_pos(32), 32);
|
m_update_timer->adjust(m_screen->time_until_pos(32), 32);
|
||||||
|
|
||||||
m_blitter_addr = 0;
|
|
||||||
m_last_trackball_val[0] = 0;
|
m_last_trackball_val[0] = 0;
|
||||||
m_last_trackball_val[1] = 0;
|
m_last_trackball_val[1] = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void bowlrama_state::machine_reset()
|
||||||
void capbowl_state::capbowl(machine_config &config)
|
|
||||||
{
|
{
|
||||||
/* basic machine hardware */
|
capbowl_base_state::machine_reset();
|
||||||
MC6809E(config, m_maincpu, MASTER_CLOCK / 4); // MC68B09EP
|
|
||||||
m_maincpu->set_addrmap(AS_PROGRAM, &capbowl_state::capbowl_map);
|
m_blitter_addr = 0;
|
||||||
m_maincpu->set_vblank_int("screen", FUNC(capbowl_state::interrupt));
|
}
|
||||||
|
|
||||||
|
void capbowl_base_state::base(machine_config &config)
|
||||||
|
{
|
||||||
|
// basic machine hardware
|
||||||
|
MC6809E(config, m_maincpu, XTAL(8'000'000) / 4); // MC68B09EP
|
||||||
|
m_maincpu->set_vblank_int("screen", FUNC(capbowl_base_state::interrupt));
|
||||||
|
|
||||||
// watchdog: 555 timer 16 cycles, edge triggered, ~0.3s
|
// watchdog: 555 timer 16 cycles, edge triggered, ~0.3s
|
||||||
attotime const period = PERIOD_OF_555_ASTABLE(100000.0, 100000.0, 0.1e-6);
|
attotime const period = PERIOD_OF_555_ASTABLE(100000.0, 100000.0, 0.1e-6);
|
||||||
WATCHDOG_TIMER(config, m_watchdog).set_time(period * 16 - period / 2);
|
WATCHDOG_TIMER(config, m_watchdog).set_time(period * 16 - period / 2);
|
||||||
|
|
||||||
MC6809E(config, m_audiocpu, MASTER_CLOCK / 4); // MC68B09EP
|
MC6809E(config, m_audiocpu, XTAL(8'000'000) / 4); // MC68B09EP
|
||||||
m_audiocpu->set_addrmap(AS_PROGRAM, &capbowl_state::sound_map);
|
m_audiocpu->set_addrmap(AS_PROGRAM, &capbowl_base_state::sound_map);
|
||||||
|
|
||||||
NVRAM(config, "nvram", nvram_device::DEFAULT_RANDOM);
|
NVRAM(config, "nvram", nvram_device::DEFAULT_RANDOM);
|
||||||
|
|
||||||
TICKET_DISPENSER(config, "ticket", attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
|
TICKET_DISPENSER(config, "ticket", attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW);
|
||||||
|
|
||||||
/* video hardware */
|
// video hardware
|
||||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||||
m_screen->set_size(360, 256);
|
m_screen->set_size(360, 256);
|
||||||
m_screen->set_visarea(0, 359, 0, 244);
|
|
||||||
m_screen->set_refresh_hz(57);
|
m_screen->set_refresh_hz(57);
|
||||||
m_screen->set_screen_update(FUNC(capbowl_state::screen_update));
|
m_screen->set_screen_update(FUNC(capbowl_base_state::screen_update));
|
||||||
|
|
||||||
TMS34061(config, m_tms34061, 0);
|
TMS34061(config, m_tms34061, 0);
|
||||||
m_tms34061->set_rowshift(8); /* VRAM address is (row << rowshift) | col */
|
m_tms34061->set_rowshift(8); // VRAM address is (row << rowshift) | col
|
||||||
m_tms34061->set_vram_size(0x10000);
|
m_tms34061->set_vram_size(0x10000);
|
||||||
m_tms34061->int_callback().set_inputline("maincpu", M6809_FIRQ_LINE);
|
m_tms34061->int_callback().set_inputline("maincpu", M6809_FIRQ_LINE);
|
||||||
|
|
||||||
/* sound hardware */
|
// sound hardware
|
||||||
SPEAKER(config, "speaker").front_center();
|
SPEAKER(config, "speaker").front_center();
|
||||||
|
|
||||||
GENERIC_LATCH_8(config, m_soundlatch);
|
GENERIC_LATCH_8(config, "soundlatch");
|
||||||
|
|
||||||
ym2203_device &ymsnd(YM2203(config, "ymsnd", MASTER_CLOCK / 2));
|
ym2203_device &ymsnd(YM2203(config, "ymsnd", XTAL(8'000'000) / 2));
|
||||||
ymsnd.irq_handler().set_inputline(m_audiocpu, M6809_FIRQ_LINE);
|
ymsnd.irq_handler().set_inputline(m_audiocpu, M6809_FIRQ_LINE);
|
||||||
ymsnd.port_a_read_callback().set("ticket", FUNC(ticket_dispenser_device::line_r)).lshift(7);
|
ymsnd.port_a_read_callback().set("ticket", FUNC(ticket_dispenser_device::line_r)).lshift(7);
|
||||||
ymsnd.port_b_write_callback().set("ticket", FUNC(ticket_dispenser_device::motor_w)).bit(7); // Also a status LED. See memory map above
|
ymsnd.port_b_write_callback().set("ticket", FUNC(ticket_dispenser_device::motor_w)).bit(7); // Also a status LED. See memory map above
|
||||||
@ -363,17 +617,26 @@ void capbowl_state::capbowl(machine_config &config)
|
|||||||
DAC0832(config, "dac", 0).add_route(ALL_OUTPUTS, "speaker", 0.5);
|
DAC0832(config, "dac", 0).add_route(ALL_OUTPUTS, "speaker", 0.5);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void capbowl_state::capbowl(machine_config &config)
|
||||||
void capbowl_state::bowlrama(machine_config &config)
|
|
||||||
{
|
{
|
||||||
capbowl(config);
|
base(config);
|
||||||
|
|
||||||
/* basic machine hardware */
|
// basic machine hardware
|
||||||
|
m_maincpu->set_addrmap(AS_PROGRAM, &capbowl_state::main_map);
|
||||||
|
|
||||||
m_maincpu->set_addrmap(AS_PROGRAM, &capbowl_state::bowlrama_map);
|
// video hardware
|
||||||
|
subdevice<screen_device>("screen")->set_visarea(0, 359, 0, 244);
|
||||||
|
}
|
||||||
|
|
||||||
/* video hardware */
|
void bowlrama_state::bowlrama(machine_config &config)
|
||||||
m_screen->set_visarea(0, 359, 0, 239);
|
{
|
||||||
|
base(config);
|
||||||
|
|
||||||
|
// basic machine hardware
|
||||||
|
m_maincpu->set_addrmap(AS_PROGRAM, &bowlrama_state::main_map);
|
||||||
|
|
||||||
|
// video hardware
|
||||||
|
subdevice<screen_device>("screen")->set_visarea(0, 359, 0, 239);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -451,26 +714,11 @@ ROM_START( bowlrama )
|
|||||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||||
ROM_LOAD( "bowl-o-rama_rev_1.0_u30.u30", 0x08000, 0x08000, CRC(f3168834) SHA1(40b7fbe9c15cc4442f4394b71c0666185afe4c8d) )
|
ROM_LOAD( "bowl-o-rama_rev_1.0_u30.u30", 0x08000, 0x08000, CRC(f3168834) SHA1(40b7fbe9c15cc4442f4394b71c0666185afe4c8d) )
|
||||||
|
|
||||||
ROM_REGION( 0x40000, "gfx1", 0 )
|
ROM_REGION( 0x40000, "blitter", 0 )
|
||||||
ROM_LOAD( "bowl-o-rama_rev_1.0_ux7.ux7", 0x00000, 0x40000, CRC(8727432a) SHA1(a81d366c5f8df0bdb97e795bba7752e6526ddba0) ) /* located on daughter card add-on */
|
ROM_LOAD( "bowl-o-rama_rev_1.0_ux7.ux7", 0x00000, 0x40000, CRC(8727432a) SHA1(a81d366c5f8df0bdb97e795bba7752e6526ddba0) ) /* located on daughter card add-on */
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
|
} // anonymous namespace
|
||||||
|
|
||||||
/*************************************
|
|
||||||
*
|
|
||||||
* Driver init
|
|
||||||
*
|
|
||||||
*************************************/
|
|
||||||
|
|
||||||
void capbowl_state::init_capbowl()
|
|
||||||
{
|
|
||||||
uint8_t *ROM = memregion("maincpu")->base();
|
|
||||||
|
|
||||||
/* configure ROM banks in 0x0000-0x3fff */
|
|
||||||
membank("bank1")->configure_entries(0, 6, &ROM[0x10000], 0x4000);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
/*************************************
|
||||||
*
|
*
|
||||||
@ -478,9 +726,9 @@ void capbowl_state::init_capbowl()
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
GAME( 1988, capbowl, 0, capbowl, capbowl, capbowl_state, init_capbowl, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 1)", MACHINE_SUPPORTS_SAVE )
|
GAME( 1988, capbowl, 0, capbowl, capbowl, capbowl_state, empty_init, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 1)", MACHINE_SUPPORTS_SAVE )
|
||||||
GAME( 1988, capbowl2, capbowl, capbowl, capbowl, capbowl_state, init_capbowl, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 2)", MACHINE_SUPPORTS_SAVE )
|
GAME( 1988, capbowl2, capbowl, capbowl, capbowl, capbowl_state, empty_init, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 2)", MACHINE_SUPPORTS_SAVE )
|
||||||
GAME( 1988, capbowl3, capbowl, capbowl, capbowl, capbowl_state, init_capbowl, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 3)", MACHINE_SUPPORTS_SAVE )
|
GAME( 1988, capbowl3, capbowl, capbowl, capbowl, capbowl_state, empty_init, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 3)", MACHINE_SUPPORTS_SAVE )
|
||||||
GAME( 1988, capbowl4, capbowl, capbowl, capbowl, capbowl_state, init_capbowl, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 4)", MACHINE_SUPPORTS_SAVE )
|
GAME( 1988, capbowl4, capbowl, capbowl, capbowl, capbowl_state, empty_init, ROT270, "Incredible Technologies / Capcom", "Capcom Bowling (set 4)", MACHINE_SUPPORTS_SAVE )
|
||||||
GAME( 1989, clbowl, capbowl, capbowl, capbowl, capbowl_state, init_capbowl, ROT270, "Incredible Technologies / Capcom", "Coors Light Bowling", MACHINE_SUPPORTS_SAVE )
|
GAME( 1989, clbowl, capbowl, capbowl, capbowl, capbowl_state, empty_init, ROT270, "Incredible Technologies / Capcom", "Coors Light Bowling", MACHINE_SUPPORTS_SAVE )
|
||||||
GAME( 1991, bowlrama, 0, bowlrama, capbowl, capbowl_state, empty_init, ROT270, "P&P Marketing", "Bowl-O-Rama Rev 1.0", MACHINE_SUPPORTS_SAVE )
|
GAME( 1991, bowlrama, 0, bowlrama, capbowl, bowlrama_state, empty_init, ROT270, "P&P Marketing", "Bowl-O-Rama Rev 1.0", MACHINE_SUPPORTS_SAVE )
|
||||||
|
|||||||
@ -136,8 +136,8 @@ This game runs on Sega System 1 hardware.
|
|||||||
|
|
||||||
*******************************************************************************
|
*******************************************************************************
|
||||||
|
|
||||||
Chop Lifter
|
Chop Lifter, Sega 1985
|
||||||
Sega 1985
|
Hardware info by Guru
|
||||||
|
|
||||||
This game runs on Sega System 2 hardware.
|
This game runs on Sega System 2 hardware.
|
||||||
|
|
||||||
@ -185,7 +185,7 @@ Notes:
|
|||||||
8255 - NEC D8255 Programmable Peripheral Interface IC (DIP40)
|
8255 - NEC D8255 Programmable Peripheral Interface IC (DIP40)
|
||||||
Z80A(1) - Sharp LH0080A Z80A CPU, clock 4.000MHz [8/2]
|
Z80A(1) - Sharp LH0080A Z80A CPU, clock 4.000MHz [8/2]
|
||||||
Z80A(2) - Sharp LH0080A Z80A CPU, clock 4.000MHz [8/2]
|
Z80A(2) - Sharp LH0080A Z80A CPU, clock 4.000MHz [8/2]
|
||||||
CXK5808 - Sony CXK5808 SRAM. Size unknown, maybe 256 bytes x4-bit? (NDIP22)
|
CXK5808 - Sony CXK5808 1kBx8-bit SRAM (NDIP22)
|
||||||
M5M5165 - Mitsubishi M5M5165 8k x8 SRAM (DIP28)
|
M5M5165 - Mitsubishi M5M5165 8k x8 SRAM (DIP28)
|
||||||
SN76489(1) - Texas Instruments SN76489 4-channel Programmable Sound Generator. Clock 4.000MHz [8/2] (DIP16)
|
SN76489(1) - Texas Instruments SN76489 4-channel Programmable Sound Generator. Clock 4.000MHz [8/2] (DIP16)
|
||||||
SN76489(2) - Texas Instruments SN76489 4-channel Programmable Sound Generator. Clock 2.000MHz [8/4] (DIP16)
|
SN76489(2) - Texas Instruments SN76489 4-channel Programmable Sound Generator. Clock 2.000MHz [8/4] (DIP16)
|
||||||
@ -203,6 +203,90 @@ Notes:
|
|||||||
VSync - 60.0952Hz
|
VSync - 60.0952Hz
|
||||||
HSync - 15.4442kHz
|
HSync - 15.4442kHz
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
Pitfall II The Lost Caverns, Sega, 1984
|
||||||
|
Hardware info by Guru
|
||||||
|
|
||||||
|
This game runs on Sega System 1 hardware. The version documented here is
|
||||||
|
the not-encrypted version.
|
||||||
|
The same PCB runs a few other games, including some official Sega conversions.
|
||||||
|
For example: My Hero, Teddy Boy Blues, Sega Ninja, Ninja Princess and several others.
|
||||||
|
The bootleg Pitfall II PCB is an exact 1:1 copy, including using the same encrypted ROMs,
|
||||||
|
and the custom chips have been replaced with plug-in daughterboards.
|
||||||
|
|
||||||
|
|
||||||
|
Sega Game ID#: 834-5627-10 PITFALL II (sticker). Also seen: -11, -12 and -13 stickers.
|
||||||
|
PCB#: 171-5054-02 (seen on some PCBs with (C) 1984). The (C) 1985 PCB does not have a 171 number on the PCB.
|
||||||
|
|--------------------------------------------------------------------------------|
|
||||||
|
| 20MHz 315-5063.IC67 |
|
||||||
|
| LED |
|
||||||
|
|Z80(1) EPR-6623.IC116 D4168 315-5062.IC41 |
|
||||||
|
| EPR-6624A.IC109 |
|
||||||
|
| EPR-6625.IC96 25LS251 2148 2148 2148 |
|
||||||
|
| |
|
||||||
|
| EPR-6454A.IC117 X X EPR-6455.IC05 2148 2148 2148 |
|
||||||
|
| |
|
||||||
|
| TLP521-4(x6) |--| |--| |
|
||||||
|
|4 |3 | |3 | 2148 |
|
||||||
|
|4 DIPSW_B |1 | |1 | 2148 2147 |
|
||||||
|
|W |5 | |5 | 2148 |
|
||||||
|
|A DIPSW_A || | || | 2148 EPR-6473A.IC61 |
|
||||||
|
|Y |5 | |5 | 315-5025 |
|
||||||
|
| |0 | |0 | EPR-6474A.IC62 74S201 |
|
||||||
|
| ULN2003 |1 | |1 | 8128 8128 315-5025 |
|
||||||
|
| |2 | |1 | EPR-6471A.IC63 |
|
||||||
|
| |--| |--| 315-5025 |
|
||||||
|
| Z80PIO Z80 8128 EPR-6472A.IC64 |
|
||||||
|
| 8MHz |
|
||||||
|
| VOL EPR-6462.IC120 EPR-6469A.IC65 |
|
||||||
|
| LA4460 76489A(1) 8128 |
|
||||||
|
| 76489A(2) PR5317.IC76 EPR-6470A.IC66 |
|
||||||
|
|--------------------------------------------------------------------------------|
|
||||||
|
Notes:
|
||||||
|
315-5011 - Sega custom DIP40 IC \
|
||||||
|
315-5012 - Sega custom DIP48 IC / The bootleg replaces these two chips with a plug-in daughterboard containing logic chips
|
||||||
|
Z80(1) - Z80 CPU. Clock input measures 3.76992MHz on first power on and changes to 3.65950MHz or 3.80062MHz during game play.
|
||||||
|
Replaced with encrypted Z80 with sticker '315-5093' on the encrypted version.
|
||||||
|
Some factory conversions have been seen with a plug-in daughterboard containing Z80, PAL and PROM and some later games
|
||||||
|
or later releases of the same game use a stock Z80 without encryption.
|
||||||
|
315-5025 - Sega custom IC. The bootleg replaces this with a plug-in daughterboard containing logic chips: 74LS299 (x6), 74LS273 (x3), 74LS157 (x3)
|
||||||
|
76489A(1) - Texas Instruments SN76489 4-channel Programmable Sound Generator. Clock 4.000MHz [8/2]
|
||||||
|
76489A(2) - Texas Instruments SN76489 4-channel Programmable Sound Generator. Clock 2.000MHz [8/4]
|
||||||
|
LA4460 - Sanyo LA4460 12W AF Power Amplifier
|
||||||
|
PR5317 - Fujitsu MB7114 Bipolar PROM (equivalent to 82S129)
|
||||||
|
Z80 - Zilog Z8400A Z80A CPU or Sharp LH0080A CPU or NEC D780C-1 CPU. Clock input 4.000MHz
|
||||||
|
Z80PIO - Zilog Z8420A Z80A-PIO or Sharp LH0081A Z80A-PIO. Clock input measures the same as the Z80(1) clock
|
||||||
|
D4168 - NEC D4168 8kBx8-bit SRAM, equivalent to 6264
|
||||||
|
8128 - Fujitsu MB8128 2kBx8-bit SRAM, equivalent to 6116
|
||||||
|
2148 - Fujitsu MB2148 1kBx4-bit SRAM
|
||||||
|
2147 - Fujitsu MB2147 4kBx1-bit SRAM
|
||||||
|
74S201 - Texas Instruments 256bx1-bit SRAM
|
||||||
|
315-5063 - National DMPAL16R4
|
||||||
|
315-5062 - National DMPAL16R4
|
||||||
|
25LS251 - AMD AM25LS251 8-Input Multiplexor
|
||||||
|
EPR-6623.IC116 \
|
||||||
|
EPR-6624A.IC109 / 27128 16kBx8-bit EPROM (main program, not-encrypted version)
|
||||||
|
EPR-6625.IC96 /
|
||||||
|
EPR-6462.IC120 - 2764 8kBx8-bit EPROM (sound program)
|
||||||
|
EPR-6473A.IC61 \
|
||||||
|
EPR-6474A.IC62 \
|
||||||
|
EPR-6471A.IC63 \
|
||||||
|
EPR-6472A.IC64 / 2764 8kBx8-bit EPROM (background tiles)
|
||||||
|
EPR-6469A.IC65 /
|
||||||
|
EPR-6470A.IC66 /
|
||||||
|
EPR-6454A.IC117 \
|
||||||
|
EPR-6455.IC05 / 27128 16kBx8-bit EPROM (sprites)
|
||||||
|
X - Empty socket
|
||||||
|
TLP521-4 - Toshiba TLP521-4 4-Channel Photocoupler
|
||||||
|
ULN2003 - Texas Instruments ULN2003 or Toshiba TD62003 7-channel Darlington Sink Driver
|
||||||
|
DIPSW_A,B - 8-position DIP switch
|
||||||
|
LED - Power LED
|
||||||
|
VSync - 60.0757Hz
|
||||||
|
HSync - 15.2585kHz
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
Flicky sets version notes:
|
Flicky sets version notes:
|
||||||
|
|
||||||
flicky, flickyo
|
flicky, flickyo
|
||||||
@ -5223,8 +5307,8 @@ ROM_END
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
||||||
Noboranka
|
Noboranka, Data East, 1986
|
||||||
Data East, 1986
|
Hardware info by Guru
|
||||||
|
|
||||||
PCB Layout
|
PCB Layout
|
||||||
----------
|
----------
|
||||||
|
|||||||
@ -1,93 +0,0 @@
|
|||||||
// license:BSD-3-Clause
|
|
||||||
// copyright-holders:Zsolt Vasvari
|
|
||||||
/*************************************************************************
|
|
||||||
|
|
||||||
Coors Light Bowling/Bowl-O-Rama hardware
|
|
||||||
|
|
||||||
*************************************************************************/
|
|
||||||
#ifndef MAME_INCLUDES_CAPBOWL_H
|
|
||||||
#define MAME_INCLUDES_CAPBOWL_H
|
|
||||||
|
|
||||||
#pragma once
|
|
||||||
|
|
||||||
#include "machine/gen_latch.h"
|
|
||||||
#include "machine/nvram.h"
|
|
||||||
#include "machine/watchdog.h"
|
|
||||||
#include "video/tms34061.h"
|
|
||||||
#include "screen.h"
|
|
||||||
|
|
||||||
class capbowl_state : public driver_device
|
|
||||||
{
|
|
||||||
public:
|
|
||||||
enum
|
|
||||||
{
|
|
||||||
TIMER_UPDATE
|
|
||||||
};
|
|
||||||
|
|
||||||
capbowl_state(const machine_config &mconfig, device_type type, const char *tag) :
|
|
||||||
driver_device(mconfig, type, tag),
|
|
||||||
m_maincpu(*this, "maincpu"),
|
|
||||||
m_watchdog(*this, "watchdog"),
|
|
||||||
m_audiocpu(*this, "audiocpu"),
|
|
||||||
m_tms34061(*this, "tms34061"),
|
|
||||||
m_screen(*this, "screen"),
|
|
||||||
m_soundlatch(*this, "soundlatch"),
|
|
||||||
m_rowaddress(*this, "rowaddress")
|
|
||||||
{ }
|
|
||||||
|
|
||||||
void init_capbowl();
|
|
||||||
void bowlrama(machine_config &config);
|
|
||||||
void capbowl(machine_config &config);
|
|
||||||
|
|
||||||
private:
|
|
||||||
/* devices */
|
|
||||||
required_device<cpu_device> m_maincpu;
|
|
||||||
required_device<watchdog_timer_device> m_watchdog;
|
|
||||||
required_device<cpu_device> m_audiocpu;
|
|
||||||
required_device<tms34061_device> m_tms34061;
|
|
||||||
required_device<screen_device> m_screen;
|
|
||||||
required_device<generic_latch_8_device> m_soundlatch;
|
|
||||||
|
|
||||||
/* memory pointers */
|
|
||||||
required_shared_ptr<uint8_t> m_rowaddress;
|
|
||||||
|
|
||||||
/* video-related */
|
|
||||||
offs_t m_blitter_addr = 0U;
|
|
||||||
|
|
||||||
/* input-related */
|
|
||||||
uint8_t m_last_trackball_val[2]{};
|
|
||||||
|
|
||||||
emu_timer *m_update_timer = nullptr;
|
|
||||||
|
|
||||||
// common
|
|
||||||
uint8_t track_0_r();
|
|
||||||
uint8_t track_1_r();
|
|
||||||
void track_reset_w(uint8_t data);
|
|
||||||
void sndcmd_w(uint8_t data);
|
|
||||||
void tms34061_w(offs_t offset, uint8_t data);
|
|
||||||
uint8_t tms34061_r(offs_t offset);
|
|
||||||
|
|
||||||
// capbowl specific
|
|
||||||
void capbowl_rom_select_w(uint8_t data);
|
|
||||||
|
|
||||||
// bowlrama specific
|
|
||||||
void bowlrama_blitter_w(offs_t offset, uint8_t data);
|
|
||||||
uint8_t bowlrama_blitter_r(offs_t offset);
|
|
||||||
|
|
||||||
virtual void machine_start() override;
|
|
||||||
virtual void machine_reset() override;
|
|
||||||
|
|
||||||
INTERRUPT_GEN_MEMBER(interrupt);
|
|
||||||
TIMER_CALLBACK_MEMBER(update);
|
|
||||||
|
|
||||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
|
||||||
inline rgb_t pen_for_pixel( uint8_t const *src, uint8_t pix );
|
|
||||||
|
|
||||||
void bowlrama_map(address_map &map);
|
|
||||||
void capbowl_map(address_map &map);
|
|
||||||
void sound_map(address_map &map);
|
|
||||||
protected:
|
|
||||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override;
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif // MAME_INCLUDES_CAPBOWL_H
|
|
||||||
@ -1,154 +0,0 @@
|
|||||||
// license:BSD-3-Clause
|
|
||||||
// copyright-holders:Zsolt Vasvari
|
|
||||||
/***************************************************************************
|
|
||||||
|
|
||||||
Coors Light Bowling/Bowl-O-Rama hardware
|
|
||||||
|
|
||||||
***************************************************************************/
|
|
||||||
|
|
||||||
#include "emu.h"
|
|
||||||
#include "cpu/m6809/m6809.h"
|
|
||||||
#include "includes/capbowl.h"
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
|
||||||
*
|
|
||||||
* TMS34061 I/O
|
|
||||||
*
|
|
||||||
*************************************/
|
|
||||||
|
|
||||||
void capbowl_state::tms34061_w(offs_t offset, uint8_t data)
|
|
||||||
{
|
|
||||||
int func = (offset >> 8) & 3;
|
|
||||||
int col = offset & 0xff;
|
|
||||||
|
|
||||||
/* Column address (CA0-CA8) is hooked up the A0-A7, with A1 being inverted
|
|
||||||
during register access. CA8 is ignored */
|
|
||||||
if (func == 0 || func == 2)
|
|
||||||
col ^= 2;
|
|
||||||
|
|
||||||
/* Row address (RA0-RA8) is not dependent on the offset */
|
|
||||||
m_tms34061->write(col, *m_rowaddress, func, data);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
uint8_t capbowl_state::tms34061_r(offs_t offset)
|
|
||||||
{
|
|
||||||
int func = (offset >> 8) & 3;
|
|
||||||
int col = offset & 0xff;
|
|
||||||
|
|
||||||
/* Column address (CA0-CA8) is hooked up the A0-A7, with A1 being inverted
|
|
||||||
during register access. CA8 is ignored */
|
|
||||||
if (func == 0 || func == 2)
|
|
||||||
col ^= 2;
|
|
||||||
|
|
||||||
/* Row address (RA0-RA8) is not dependent on the offset */
|
|
||||||
return m_tms34061->read(col, *m_rowaddress, func);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
|
||||||
*
|
|
||||||
* Bowl-o-rama blitter
|
|
||||||
*
|
|
||||||
*************************************/
|
|
||||||
|
|
||||||
void capbowl_state::bowlrama_blitter_w(offs_t offset, uint8_t data)
|
|
||||||
{
|
|
||||||
switch (offset)
|
|
||||||
{
|
|
||||||
case 0x08: /* Write address high byte (only 2 bits used) */
|
|
||||||
m_blitter_addr = (m_blitter_addr & ~0xff0000) | (data << 16);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 0x17: /* Write address mid byte (8 bits) */
|
|
||||||
m_blitter_addr = (m_blitter_addr & ~0x00ff00) | (data << 8);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 0x18: /* Write Address low byte (8 bits) */
|
|
||||||
m_blitter_addr = (m_blitter_addr & ~0x0000ff) | (data << 0);
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
logerror("PC=%04X Write to unsupported blitter address %02X Data=%02X\n", m_maincpu->pc(), offset, data);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
uint8_t capbowl_state::bowlrama_blitter_r(offs_t offset)
|
|
||||||
{
|
|
||||||
uint8_t data = memregion("gfx1")->base()[m_blitter_addr];
|
|
||||||
uint8_t result = 0;
|
|
||||||
|
|
||||||
switch (offset)
|
|
||||||
{
|
|
||||||
/* Read Mask: Graphics data are 4bpp (2 pixels per byte).
|
|
||||||
This function returns 0's for new pixel data.
|
|
||||||
This allows data to be read as a mask, AND the mask with
|
|
||||||
the screen data, then OR new data read by read data command. */
|
|
||||||
case 0:
|
|
||||||
if (!(data & 0xf0))
|
|
||||||
result |= 0xf0; /* High nibble is transparent */
|
|
||||||
if (!(data & 0x0f))
|
|
||||||
result |= 0x0f; /* Low nibble is transparent */
|
|
||||||
break;
|
|
||||||
|
|
||||||
/* Read data and increment address */
|
|
||||||
case 4:
|
|
||||||
result = data;
|
|
||||||
m_blitter_addr = (m_blitter_addr + 1) & 0x3ffff;
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
logerror("PC=%04X Read from unsupported blitter address %02X\n", m_maincpu->pc(), offset);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
return result;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*************************************
|
|
||||||
*
|
|
||||||
* Main refresh
|
|
||||||
*
|
|
||||||
*************************************/
|
|
||||||
|
|
||||||
inline rgb_t capbowl_state::pen_for_pixel( uint8_t const *src, uint8_t pix )
|
|
||||||
{
|
|
||||||
return rgb_t(pal4bit(src[(pix << 1) + 0] >> 0),
|
|
||||||
pal4bit(src[(pix << 1) + 1] >> 4),
|
|
||||||
pal4bit(src[(pix << 1) + 1] >> 0));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
uint32_t capbowl_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
|
||||||
{
|
|
||||||
/* first get the current display state */
|
|
||||||
m_tms34061->get_display_state();
|
|
||||||
|
|
||||||
/* if we're blanked, just fill with black */
|
|
||||||
if (m_tms34061->blanked())
|
|
||||||
{
|
|
||||||
bitmap.fill(rgb_t::black(), cliprect);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* now regenerate the bitmap */
|
|
||||||
for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
|
|
||||||
{
|
|
||||||
uint8_t const *const src = &m_tms34061->vram(y);
|
|
||||||
uint32_t *dest = &bitmap.pix(y);
|
|
||||||
|
|
||||||
for (int x = cliprect.min_x & ~1; x <= cliprect.max_x; x += 2)
|
|
||||||
{
|
|
||||||
uint8_t pix = src[32 + (x / 2)];
|
|
||||||
*dest++ = pen_for_pixel(src, pix >> 4);
|
|
||||||
*dest++ = pen_for_pixel(src, pix & 0x0f);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
Loading…
Reference in New Issue
Block a user