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More "old GCC" fixups (nw)

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This commit is contained in:
R. Belmont 2013-11-16 22:10:20 +00:00
parent 0d14d26ff7
commit 62bbecae28
2 changed files with 6 additions and 4 deletions
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8
src/emu/cpu/arm7/arm7drc.c
View File

@ -637,9 +637,9 @@ void arm7_cpu_device::static_generate_check_irq()
UML_JMPc(block, uml::COND_Z, nopabt = label++); // jmpz nound UML_JMPc(block, uml::COND_Z, nopabt = label++); // jmpz nound
UML_ROLINS(block, uml::mem(&GET_CPSR), eARM7_MODE_UND, 0, MODE_FLAG); // rolins CPSR, eARM7_MODE_UND, 0, MODE_FLAG UML_ROLINS(block, uml::mem(&GET_CPSR), eARM7_MODE_UND, 0, MODE_FLAG); // rolins CPSR, eARM7_MODE_UND, 0, MODE_FLAG
UML_MOV(block, uml::I1, -4); // mov i1, -4 UML_MOV(block, uml::I1, (UINT64)-4); // mov i1, -4
UML_TEST(block, uml::mem(&GET_CPSR), T_MASK); // test CPSR, T_MASK UML_TEST(block, uml::mem(&GET_CPSR), T_MASK); // test CPSR, T_MASK
UML_MOVc(block, uml::COND_NZ, uml::I1, -2); // movnz i1, -2 UML_MOVc(block, uml::COND_NZ, uml::I1, (UINT64)-2); // movnz i1, -2
UML_ADD(block, uml::mem(&GET_REGISTER(14)), uml::I0, uml::I1); // add LR, i0, i1 UML_ADD(block, uml::mem(&GET_REGISTER(14)), uml::I0, uml::I1); // add LR, i0, i1
UML_MOV(block, uml::mem(&GET_REGISTER(SPSR)), uml::mem(&GET_CPSR)); // mov SPSR, CPSR UML_MOV(block, uml::mem(&GET_REGISTER(SPSR)), uml::mem(&GET_CPSR)); // mov SPSR, CPSR
UML_OR(block, uml::mem(&GET_CPSR), uml::mem(&GET_CPSR), I_MASK); // or CPSR, CPSR, I_MASK UML_OR(block, uml::mem(&GET_CPSR), uml::mem(&GET_CPSR), I_MASK); // or CPSR, CPSR, I_MASK
@ -655,9 +655,9 @@ void arm7_cpu_device::static_generate_check_irq()
UML_JMPc(block, uml::COND_Z, done = label++); // jmpz done UML_JMPc(block, uml::COND_Z, done = label++); // jmpz done
UML_ROLINS(block, uml::mem(&GET_CPSR), eARM7_MODE_SVC, 0, MODE_FLAG); // rolins CPSR, eARM7_MODE_SVC, 0, MODE_FLAG UML_ROLINS(block, uml::mem(&GET_CPSR), eARM7_MODE_SVC, 0, MODE_FLAG); // rolins CPSR, eARM7_MODE_SVC, 0, MODE_FLAG
UML_MOV(block, uml::I1, -4); // mov i1, -4 UML_MOV(block, uml::I1, (UINT64)-4); // mov i1, -4
UML_TEST(block, uml::mem(&GET_CPSR), T_MASK); // test CPSR, T_MASK UML_TEST(block, uml::mem(&GET_CPSR), T_MASK); // test CPSR, T_MASK
UML_MOVc(block, uml::COND_NZ, uml::I1, -2); // movnz i1, -2 UML_MOVc(block, uml::COND_NZ, uml::I1, (UINT64)-2); // movnz i1, -2
UML_ADD(block, uml::mem(&GET_REGISTER(14)), uml::I0, uml::I1); // add LR, i0, i1 UML_ADD(block, uml::mem(&GET_REGISTER(14)), uml::I0, uml::I1); // add LR, i0, i1
UML_TEST(block, uml::mem(&GET_CPSR), SR_MODE32); // test CPSR, MODE32 UML_TEST(block, uml::mem(&GET_CPSR), SR_MODE32); // test CPSR, MODE32

2
src/emu/cpu/es5510/es5510.c
View File

@ -214,6 +214,8 @@ static inline char * DESCRIBE_REG(char *s, UINT8 r, const char *name) {
} else { } else {
return stpcpy_int(s, REGNAME(r)); return stpcpy_int(s, REGNAME(r));
} }
return 0;
} }
const alu_op_t es5510_device::ALU_OPS[16] = { const alu_op_t es5510_device::ALU_OPS[16] = {