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https://github.com/holub/mame
synced 2025-07-03 00:56:03 +03:00
m6801: add support for canned nvram
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a91e526f55
commit
632f0a0e09
@ -379,7 +379,7 @@ m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *ta
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{
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}
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m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes)
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m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes)
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: m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, internal)
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, device_nvram_interface(mconfig, *this)
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, m_in_port_func(*this, 0xff)
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@ -387,9 +387,10 @@ m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type ty
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, m_out_sc2_func(*this)
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, m_out_sertx_func(*this)
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, m_standby_func(*this)
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, m_sclk_divider(8)
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, m_internal_ram(*this, "internal")
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, m_standby_bytes(standby_bytes)
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, m_nvram_bytes(nvram_bytes)
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, m_nvram_defval(0)
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, m_sclk_divider(8)
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{
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// disable nvram by default (set to true if MCU is battery-backed when in standby mode)
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nvram_enable_backup(false);
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@ -430,8 +431,8 @@ mc68121_device::mc68121_device(const machine_config &mconfig, const char *tag, d
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{
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}
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hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes)
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: m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, standby_bytes)
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hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes)
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: m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, nvram_bytes)
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{
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}
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@ -450,8 +451,8 @@ hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char
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{
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}
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hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes)
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: hd6301_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, standby_bytes)
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hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes)
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: hd6301_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, nvram_bytes)
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, m_in_portx_func(*this, 0xff)
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, m_out_portx_func(*this)
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{
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@ -473,8 +474,8 @@ hd6303x_cpu_device::hd6303x_cpu_device(const machine_config &mconfig, const char
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{
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}
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hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes)
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: hd6301x_cpu_device(mconfig, type, tag, owner, clock, internal, standby_bytes)
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hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes)
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: hd6301x_cpu_device(mconfig, type, tag, owner, clock, internal, nvram_bytes)
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{
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}
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@ -1322,12 +1323,12 @@ bool m6801_cpu_device::nvram_write(util::write_stream &file)
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{
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size_t actual;
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if (file.write(&m_internal_ram[0], m_standby_bytes, actual) || m_standby_bytes != actual)
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if (file.write(&m_internal_ram[0], m_nvram_bytes, actual) || m_nvram_bytes != actual)
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return false;
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// upper bits of RAM control register
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u8 ram_ctrl = m_ram_ctrl & 0xc0;
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if (file.write(&ram_ctrl, sizeof(ram_ctrl), actual) || (sizeof(ram_ctrl) != actual))
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uint8_t ram_ctrl = m_ram_ctrl & 0xc0;
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if (file.write(&ram_ctrl, 1, actual) || actual != 1)
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return false;
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return true;
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@ -1337,18 +1338,37 @@ bool m6801_cpu_device::nvram_read(util::read_stream &file)
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{
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size_t actual;
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if (file.read(&m_internal_ram[0], m_standby_bytes, actual) || m_standby_bytes != actual)
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if (file.read(&m_internal_ram[0], m_nvram_bytes, actual) || m_nvram_bytes != actual)
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return false;
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// upper bits of RAM control register
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u8 ram_ctrl = 0;
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if (file.read(&ram_ctrl, sizeof(ram_ctrl), actual) || (sizeof(ram_ctrl) != actual))
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uint8_t ram_ctrl = 0;
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if (file.read(&ram_ctrl, 1, actual) || actual != 1)
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return false;
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m_ram_ctrl |= ram_ctrl & 0xc0;
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return true;
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}
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void m6801_cpu_device::nvram_default()
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{
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if (!nvram_backup_enabled() || m_nvram_bytes == 0)
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return;
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std::fill_n(&m_internal_ram[0], m_nvram_bytes, m_nvram_defval);
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// default nvram from mytag:nvram region if it exists
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memory_region *region = memregion("nvram");
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if (region != nullptr)
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{
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if (region->bytes() != m_nvram_bytes)
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fatalerror("%s: Wrong region size (expected 0x%x, found 0x%x)", region->name(), m_nvram_bytes, region->bytes());
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std::copy_n(®ion->as_u8(), m_nvram_bytes, &m_internal_ram[0]);
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m_ram_ctrl |= 0x80;
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}
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}
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void m6801_cpu_device::write_port2()
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@ -58,20 +58,21 @@ public:
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auto out_sc2_cb() { return m_out_sc2_func.bind(); }
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auto out_ser_tx_cb() { return m_out_sertx_func.bind(); }
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void nvram_set_default_value(uint8_t val) { m_nvram_defval = val; } // default is 0
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auto standby_cb() { return m_standby_func.bind(); } // notifier (not an output pin)
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bool standby() { return suspended(SUSPEND_REASON_CLOCK); }
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void m6801_clock_serial();
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protected:
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m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes);
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m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes);
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// device_t implementation
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virtual void device_start() override;
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virtual void device_reset() override;
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// device_nvram_interface implementation
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virtual void nvram_default() override { ; }
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virtual void nvram_default() override;
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virtual bool nvram_read(util::read_stream &file) override;
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virtual bool nvram_write(util::write_stream &file) override;
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@ -137,10 +138,10 @@ protected:
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devcb_write_line m_out_sertx_func;
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devcb_write_line m_standby_func;
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int m_sclk_divider;
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required_shared_ptr<uint8_t> m_internal_ram;
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const int m_standby_bytes;
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const int m_nvram_bytes;
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uint8_t m_nvram_defval;
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int m_sclk_divider;
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/* internal registers */
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uint8_t m_port_ddr[4];
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@ -253,7 +254,7 @@ public:
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class hd6301_cpu_device : public m6801_cpu_device
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{
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protected:
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hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int standby_bytes);
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hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes);
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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@ -305,7 +306,7 @@ public:
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auto out_p7_cb() { return m_out_portx_func[2].bind(); }
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protected:
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hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes);
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hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes);
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void hd6301x_io(address_map &map);
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void hd6303x_io(address_map &map);
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@ -403,7 +404,7 @@ public:
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class hd6301y_cpu_device : public hd6301x_cpu_device
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{
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protected:
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hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int standby_bytes);
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hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes);
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void hd6301y_io(address_map &map);
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void hd6303y_io(address_map &map);
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