upd765: improve SRA and SRB emulation; add DP8473 reset irq (#9062)

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shattered 2021-12-30 12:07:13 +00:00 committed by GitHub
parent 51986b61e9
commit 6335d9e43b
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 35 additions and 4 deletions

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@ -396,8 +396,7 @@ void upd765_family_device::set_floppy(floppy_image_device *flop)
uint8_t ps2_fdc_device::sra_r()
{
uint8_t sra = 0;
int fid = dor & 3;
floppy_info &fi = flopi[fid];
floppy_info &fi = flopi[dor & 3];
if(fi.dir)
sra |= 0x01;
if(fi.index)
@ -408,17 +407,38 @@ uint8_t ps2_fdc_device::sra_r()
sra |= 0x10;
if(fi.main_state == SEEK_WAIT_STEP_SIGNAL_TIME)
sra |= 0x20;
sra |= 0x40;
if(cur_irq)
sra |= 0x80;
if(mode == mode_t::M30)
{
sra ^= 0x1f;
if(drq)
sra |= 0x40;
}
else
{
if(!flopi[1].dev)
sra |= 0x40;
}
return sra;
}
uint8_t ps2_fdc_device::srb_r()
{
return 0;
uint8_t srb = 0;
// TODO: rddata, wrdata, write enable bits
if(mode == mode_t::M30)
{
const uint8_t ds[4] = { 0x43, 0x23, 0x62, 0x61 };
srb = ds[dor & 3];
if(!flopi[1].dev)
srb |= 0x80;
}
else
{
srb = 0xc0 | ((dor & 1) << 6) | ((dor & 0x30) >> 4);
}
return srb;
}
uint8_t upd765_family_device::dor_r()
@ -3095,6 +3115,14 @@ dp8473_device::dp8473_device(const machine_config &mconfig, const char *tag, dev
recalibrate_steps = 77; // TODO: 3917 in extended track range mode
}
void dp8473_device::soft_reset()
{
upd765_family_device::soft_reset();
// "interrupt is generated when ... Internal Ready signal changes state immediately after a hardware or software reset"
other_irq = true;
}
pc8477a_device::pc8477a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : ps2_fdc_device(mconfig, PC8477A, tag, owner, clock)
{
ready_polled = true;

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@ -512,6 +512,9 @@ public:
dp8473_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void map(address_map &map) override;
protected:
virtual void soft_reset() override;
};
class pc8477a_device : public ps2_fdc_device {