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https://github.com/holub/mame
synced 2025-07-03 09:06:08 +03:00
-cmi2x: Fixed channel card memory tests. [Ryan Holtz]
This commit is contained in:
parent
1927ba1ce1
commit
636a2bbbf4
@ -115,7 +115,7 @@ void ptm6840_device::device_start()
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save_item(NAME(m_t3_divisor));
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save_item(NAME(m_t3_scaler));
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save_item(NAME(m_internal_clock));
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save_item(NAME(m_IRQ));
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save_item(NAME(m_irq));
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save_item(NAME(m_control_reg));
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save_item(NAME(m_output));
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@ -142,7 +142,7 @@ void ptm6840_device::device_reset()
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m_status_reg = 0;
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m_t3_divisor = 1;
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m_status_read_since_int = 0;
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m_IRQ = 0;
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m_irq = 0;
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m_t3_scaler = 0;
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for (int i = 0; i < 3; i++)
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{
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@ -175,7 +175,7 @@ void ptm6840_device::subtract_from_counter(int counter, int count)
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double clock;
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// Determine the clock frequency for this timer
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if (m_control_reg[counter] & 0x02)
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if (m_control_reg[counter] & INTERNAL_CLK_EN)
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{
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clock = m_internal_clock;
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}
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@ -185,7 +185,7 @@ void ptm6840_device::subtract_from_counter(int counter, int count)
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}
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// Dual-byte mode
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if (m_control_reg[counter] & 0x04)
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if (m_control_reg[counter] & COUNT_MODE_8BIT)
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{
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int lsb = m_counter[counter] & 0xff;
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int msb = m_counter[counter] >> 8;
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@ -279,24 +279,24 @@ void ptm6840_device::tick(int counter, int count)
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void ptm6840_device::update_interrupts()
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{
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int new_state = ((m_status_reg & 0x01) && (m_control_reg[0] & 0x40)) ||
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((m_status_reg & 0x02) && (m_control_reg[1] & 0x40)) ||
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((m_status_reg & 0x04) && (m_control_reg[2] & 0x40));
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int new_state = ((m_status_reg & TIMER1_IRQ) && (m_control_reg[0] & INTERRUPT_EN)) ||
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((m_status_reg & TIMER2_IRQ) && (m_control_reg[1] & INTERRUPT_EN)) ||
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((m_status_reg & TIMER3_IRQ) && (m_control_reg[2] & INTERRUPT_EN));
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if (new_state != m_IRQ)
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if (new_state != m_irq)
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{
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m_IRQ = new_state;
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m_irq = new_state;
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if (m_IRQ)
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if (m_irq)
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{
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m_status_reg |= 0x80;
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m_status_reg |= ANY_IRQ;
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}
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else
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{
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m_status_reg &= ~0x80;
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m_status_reg &= ~ANY_IRQ;
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}
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m_irq_cb(m_IRQ);
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m_irq_cb(m_irq);
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}
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}
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@ -318,7 +318,7 @@ UINT16 ptm6840_device::compute_counter( int counter ) const
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}
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// determine the clock frequency for this timer
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if (m_control_reg[counter] & 0x02)
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if (m_control_reg[counter] & INTERNAL_CLK_EN)
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{
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clock = m_internal_clock;
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PLOG(("MC6840 #%s: %d internal clock freq %f \n", tag(), counter, clock));
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@ -332,7 +332,7 @@ UINT16 ptm6840_device::compute_counter( int counter ) const
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int remaining = (m_timer[counter]->remaining() * clock).as_double();
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// Adjust the count for dual byte mode
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if (m_control_reg[counter] & 0x04)
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if (m_control_reg[counter] & COUNT_MODE_8BIT)
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{
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int divisor = (m_counter[counter] & 0xff) + 1;
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int msb = remaining / divisor;
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@ -356,8 +356,12 @@ void ptm6840_device::reload_count(int idx)
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// Copy the latched value in
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m_counter[idx] = m_latch[idx];
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// If reset is held, don't start counting
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if (m_control_reg[0] & RESET_TIMERS)
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return;
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// Determine the clock frequency for this timer
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if (m_control_reg[idx] & 0x02)
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if (m_control_reg[idx] & INTERNAL_CLK_EN)
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{
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clock = m_internal_clock;
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PLOG(("MC6840 #%s: %d internal clock freq %f \n", tag(), idx, clock));
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@ -370,7 +374,7 @@ void ptm6840_device::reload_count(int idx)
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// Determine the number of clock periods before we expire
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int count = m_counter[idx];
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if (m_control_reg[idx] & 0x04)
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if (m_control_reg[idx] & COUNT_MODE_8BIT)
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{
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count = ((count >> 8) + 1) * ((count & 0xff) + 1);
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}
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@ -410,7 +414,7 @@ void ptm6840_device::reload_count(int idx)
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PLOG(("MC6840 #%s: reload_count(%d): output = %f\n", tag(), idx, duration.as_double()));
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#if 0
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if (!(m_control_reg[idx] & 0x02))
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if (!(m_control_reg[idx] & INTERNAL_CLK_EN))
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{
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if (!m_external_clock[idx])
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{
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@ -504,9 +508,9 @@ WRITE8_MEMBER( ptm6840_device::write )
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case PTM_6840_CTRL1:
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case PTM_6840_CTRL2:
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{
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int idx = (offset == 1) ? 1 : (m_control_reg[1] & 0x01) ? 0 : 2;
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int idx = (offset == 1) ? 1 : (m_control_reg[1] & CR1_SELECT) ? 0 : 2;
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UINT8 diffs = data ^ m_control_reg[idx];
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m_t3_divisor = (m_control_reg[2] & 0x01) ? 8 : 1;
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m_t3_divisor = (m_control_reg[2] & T3_PRESCALE_EN) ? 8 : 1;
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m_mode[idx] = (data >> 3) & 0x07;
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m_control_reg[idx] = data;
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@ -515,7 +519,10 @@ WRITE8_MEMBER( ptm6840_device::write )
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PLOG(("value = %04X\n", m_control_reg[idx]));
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PLOG(("t3divisor = %d\n", m_t3_divisor));
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if (!(m_control_reg[idx] & 0x80 ))
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if (diffs & INTERRUPT_EN)
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update_interrupts();
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if (!(m_control_reg[idx] & COUNT_OUT_EN))
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{
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// Output cleared
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switch (idx)
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@ -531,11 +538,12 @@ WRITE8_MEMBER( ptm6840_device::write )
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break;
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}
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}
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// Reset?
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if (idx == 0 && (diffs & 0x01))
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if (idx == 0 && (diffs & RESET_TIMERS))
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{
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// Holding reset down
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if (data & 0x01)
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if (data & RESET_TIMERS)
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{
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PLOG(("MC6840 #%s : Timer reset\n", tag()));
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for (int i = 0; i < 3; i++)
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@ -555,13 +563,13 @@ WRITE8_MEMBER( ptm6840_device::write )
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m_status_reg = 0;
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update_interrupts();
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}
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// Changing the clock source? (e.g. Zwackery)
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if (diffs & 0x02)
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if (diffs & INTERNAL_CLK_EN)
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{
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reload_count(idx);
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}
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}
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break;
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}
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@ -611,9 +619,9 @@ void ptm6840_device::timeout(int idx)
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m_status_read_since_int &= ~(1 << idx);
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update_interrupts();
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if ( m_control_reg[idx] & 0x80 )
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if (m_control_reg[idx] & COUNT_OUT_EN)
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{
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if ((m_mode[idx] == 0)||(m_mode[idx] == 2))
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if (m_mode[idx] == 0 || m_mode[idx] == 2)
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{
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m_output[idx] = m_output[idx] ? 0 : 1;
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PLOG(("**ptm6840 %s t%d output %d **\n", tag(), idx, m_output[idx]));
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@ -694,7 +702,7 @@ void ptm6840_device::set_clock(int idx, int state)
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{
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m_clk[idx] = state;
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if (!(m_control_reg[idx] & 0x02))
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if (!(m_control_reg[idx] & INTERNAL_CLK_EN))
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{
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if (state)
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{
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@ -716,7 +724,7 @@ void ptm6840_device::set_ext_clock(int counter, double clock)
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{
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m_external_clock[counter] = clock;
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if (!(m_control_reg[counter] & 0x02))
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if (!(m_control_reg[counter] & INTERNAL_CLK_EN))
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{
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if (!m_external_clock[counter])
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{
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@ -732,7 +740,7 @@ void ptm6840_device::set_ext_clock(int counter, double clock)
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// Determine the number of clock periods before we expire
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count = m_counter[counter];
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if (m_control_reg[counter] & 0x04)
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if (m_control_reg[counter] & COUNT_MODE_8BIT)
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{
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count = ((count >> 8) + 1) * ((count & 0xff) + 1);
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}
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@ -59,7 +59,7 @@ public:
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template<class _Object> static devcb_base &set_irq_callback(device_t &device, _Object object) { return downcast<ptm6840_device &>(device).m_irq_cb.set_callback(object); }
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int status(int clock) const { return m_enabled[clock]; } // get whether timer is enabled
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int irq_state() const { return m_IRQ; } // get IRQ state
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int irq_state() const { return m_irq; } // get IRQ state
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UINT16 count(int counter) const { return compute_counter(counter); } // get counter value
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void set_ext_clock(int counter, double clock); // set clock frequency
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int ext_clock(int counter) const { return m_external_clock[counter]; } // get clock frequency
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@ -108,6 +108,25 @@ private:
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PTM_6840_LSB3 = 7
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};
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enum
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{
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RESET_TIMERS = 0x01,
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CR1_SELECT = 0x01,
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T3_PRESCALE_EN = 0x01,
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INTERNAL_CLK_EN = 0x02,
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COUNT_MODE_8BIT = 0x04,
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INTERRUPT_EN = 0x40,
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COUNT_OUT_EN = 0x80
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};
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enum
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{
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TIMER1_IRQ = 0x01,
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TIMER2_IRQ = 0x02,
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TIMER3_IRQ = 0x04,
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ANY_IRQ = 0x80
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};
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double m_internal_clock;
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double m_external_clock[3];
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@ -125,7 +144,7 @@ private:
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UINT8 m_fired[3];
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UINT8 m_t3_divisor;
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UINT8 m_t3_scaler;
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UINT8 m_IRQ;
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UINT8 m_irq;
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UINT8 m_status_reg;
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UINT8 m_status_read_since_int;
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UINT8 m_lsb_buffer;
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@ -290,6 +290,8 @@ MACHINE_CONFIG_FRAGMENT( cmi01a_device )
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MCFG_DEVICE_ADD("cmi01a_pia_0", PIA6821, 0) // pia_cmi01a_1_config
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MCFG_PIA_CA2_HANDLER(WRITELINE(cmi01a_device, cmi01a_1_ca2_w))
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MCFG_PIA_CB2_HANDLER(WRITELINE(cmi01a_device, cmi01a_1_cb2_w))
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MCFG_PIA_IRQA_HANDLER(WRITELINE(cmi01a_device, ch_int))
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MCFG_PIA_IRQB_HANDLER(WRITELINE(cmi01a_device, ch_int))
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MCFG_DEVICE_ADD("cmi01a_pia_1", PIA6821, 0) // pia_cmi01a_2_config
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MCFG_PIA_READCA1_HANDLER(READLINE(cmi01a_device, zx_r))
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@ -300,7 +302,10 @@ MACHINE_CONFIG_FRAGMENT( cmi01a_device )
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MCFG_PIA_IRQB_HANDLER(WRITELINE(cmi01a_device, ch_int))
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MCFG_DEVICE_ADD("cmi01a_ptm", PTM6840, 0) // ptm_cmi01a_config
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MCFG_PTM6840_INTERNAL_CLOCK(2000000)
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MCFG_PTM6840_EXTERNAL_CLOCKS(250000, 500000, 500000)
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MCFG_PTM6840_OUT0_CB(WRITE8(cmi01a_device, cmi01a_ptm_c0))
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MCFG_PTM6840_IRQ_CB(WRITELINE(cmi01a_device, ch_int))
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MACHINE_CONFIG_END
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machine_config_constructor cmi01a_device::device_mconfig_additions() const
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@ -477,6 +482,7 @@ public:
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DECLARE_READ8_MEMBER( cmi02_r );
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DECLARE_WRITE8_MEMBER( cmi02_w );
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DECLARE_WRITE8_MEMBER( master_tune_w );
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DECLARE_WRITE_LINE_MEMBER( cmi02_ptm_irq );
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// Alphanumeric keyboard
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DECLARE_READ8_MEMBER( ank_col_r );
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@ -644,6 +650,9 @@ private:
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// Alphanumeric keyboard
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int m_ank_irqa;
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int m_ank_irqb;
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// Master card (CMI-02)
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int m_cmi02_ptm_irq;
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};
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/**************************************
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@ -1639,7 +1648,7 @@ WRITE_LINE_MEMBER( cmi01a_device::cmi01a_1_ca2_w )
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WRITE_LINE_MEMBER( cmi01a_device::ch_int )
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{
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// printf("CH%d INT: %x %x\n", ch, state, m_int_state[0]);
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//printf("CH%d INT: %x\n", m_channel, state);
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dynamic_cast<cmi_state*>(owner())->set_interrupt(CPU_1, ch_int_levels[m_channel], state ? ASSERT_LINE : CLEAR_LINE);
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}
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@ -1819,7 +1828,7 @@ WRITE8_MEMBER( cmi01a_device::write )
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int a1 = (m_ptm_output && BIT(offset, 3)) || (!BIT(offset, 3) && BIT(offset, 2));
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int a2 = BIT(offset, 1);
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//printf("CH%d PTM: [%x] %x\n", ch, (a2 << 2) | (a1 << 1) | a0, data);
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//printf("CH%d PTM: [%x] %x, %d %d %d, %02x\n", m_channel, (a2 << 2) | (a1 << 1) | a0, data, a2, a1, a0, offset);
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m_ptm->write(space, (a2 << 2) | (a1 << 1) | a0, data);
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break;
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}
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@ -1877,6 +1886,13 @@ WRITE8_MEMBER( cmi01a_device::cmi01a_ptm_c0 )
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m_ptm_output = data;
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}
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WRITE_LINE_MEMBER( cmi_state::cmi02_ptm_irq )
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{
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m_cmi02_ptm_irq = state;
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set_interrupt(CPU_1, IRQ_TIMINT_LEVEL, m_cmi02_ptm_irq ? ASSERT_LINE : CLEAR_LINE);
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//printf("CMI-02 PTM IRQ: %d\n", state);
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}
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READ8_MEMBER( cmi_state::cmi02_r )
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{
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if (offset <= 0x1f)
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@ -1886,7 +1902,9 @@ READ8_MEMBER( cmi_state::cmi02_r )
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for (int i = 0; i < 8; ++i)
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{
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if (ch_mask & (1 << i))
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return m_channels[i]->read(space, i, offset & 0x1f);
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{
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return m_channels[i]->read(space, offset & 0x1f, 0xff);
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}
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}
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return 0xff;
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@ -2509,6 +2527,7 @@ void cmi_state::machine_reset()
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m_ank_irqa = 0;
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m_ank_irqb = 0;
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m_q133_acia_irq = 0;
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m_cmi02_ptm_irq = 0;
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}
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void cmi_state::machine_start()
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@ -2636,6 +2655,7 @@ static MACHINE_CONFIG_START( cmi2x, cmi_state )
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MCFG_DEVICE_ADD("cmi02_ptm", PTM6840, 0) // ptm_cmi02_config
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MCFG_PTM6840_INTERNAL_CLOCK(2000000) // TODO
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MCFG_PTM6840_IRQ_CB(WRITELINE(cmi_state, cmi02_ptm_irq))
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MCFG_DEVICE_ADD("mkbd_acia_clock", CLOCK, 9600*16)
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MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(cmi_state, mkbd_acia_clock))
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