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Massive API cleanup/change. The primary goal is that all CPU-

Browse Source 
related APIs now take a device pointer instead of an index.
All functions that take a CPU device are prefixed with cpu_*
All functions that are globally related to cpu execution
are prefixed with cpuexec_*. Below is a list of some of the 
mappings:

  cpu_boost_interleave     -> cpuexec_boost_interleave
  cpunum_suspend           -> cpu_suspend
  cpunum_resume            -> cpu_resume
  cpunum_is_suspended      -> cpu_is_suspended
  cpunum_get_clock         -> cpu_get_clock
  cpunum_set_clock         -> cpu_set_clock
  cpunum_get_clockscale    -> cpu_get_clockscale
  cpunum_set_clockscale    -> cpu_set_clockscale
  cpunum_get_localtime     -> cpu_get_local_time
  cpunum_gettotalcycles    -> cpu_get_total_cycles
  activecpu_eat_cycles     -> cpu_eat_cycles
  activecpu_adjust_icount  -> cpu_adjust_icount
  cpu_trigger              -> cpuexec_trigger
  cpu_triggertime          -> cpuexec_triggertime
  cpunum_set_input_line    -> cpu_set_input_line
  cpunum_set_irq_callback  -> cpu_set_irq_callback

In addition, a number of functions retain the same name but
now require a specific CPU parameter to be passed in:

  cpu_yield
  cpu_spin
  cpu_spinuntil_time
  cpu_spinuntil_int
  cpu_spinuntil_trigger
  cpu_triggerint

Merged cpuint.c into cpuexec.c. One side-effect of this
change is that driver reset callbacks are called AFTER the
CPUs and devices are reset. This means that if you make
changes to the CPU state and expect the reset vectors to
recognize the changes in your reset routine, you will need
to manually reset the CPU after making the change (since it
has already been reset).

Added a number of inline helper functions to cpuintrf.h for
managing addresses

Removed cpu_gettotalcpu(). This information is rarely needed
outside of the core and can be obtained by looking at the
machine->cpu[] array.

Changed CPU interrupt acknowledge callbacks to pass a CPU 
device instead of machine/cpunum pair.

Changed VBLANK and periodic timer callbacks to pass a CPU
device instead of machine/cpunum pair.

Renamed all information getters from cpu_* to cpu_get_* and
from cputype_* to cputype_get_*.
This commit is contained in:
Aaron Giles 2008-11-13 06:59:57 +00:00
parent 451a03ff70
commit 63d10ee9bf
945 changed files with 6437 additions and 6478 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.gitattributes vendored
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@ -494,8 +494,6 @@ src/emu/cpu/z8000/z8000ops.c svneol=native#text/plain
src/emu/cpu/z8000/z8000tbl.c svneol=native#text/plain
src/emu/cpuexec.c svneol=native#text/plain
src/emu/cpuexec.h svneol=native#text/plain
src/emu/cpuint.c svneol=native#text/plain
src/emu/cpuint.h svneol=native#text/plain
src/emu/cpuintrf.c svneol=native#text/plain
src/emu/cpuintrf.h svneol=native#text/plain
src/emu/crsshair.c svneol=native#text/plain

24
src/emu/cpu/apexc/apexc.c
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@ -902,20 +902,20 @@ CPU_GET_INFO( apexc )
case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(apexc); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &apexc_ICount; break;
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "APEXC"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "APEC"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Raphael Nabet"); break;
case CPUINFO_STR_NAME: strcpy(info->s, "APEXC"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "APEC"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
case CPUINFO_STR_FLAGS: sprintf(info->s = cpuintrf_temp_str(), "%c", (apexc.running) ? 'R' : 'S'); break;
case CPUINFO_STR_FLAGS: sprintf(info->s, "%c", (apexc.running) ? 'R' : 'S'); break;
case CPUINFO_STR_REGISTER + APEXC_CR: sprintf(info->s = cpuintrf_temp_str(), "CR:%08X", apexc.cr); break;
case CPUINFO_STR_REGISTER + APEXC_A: sprintf(info->s = cpuintrf_temp_str(), "A :%08X", apexc.a); break;
case CPUINFO_STR_REGISTER + APEXC_R: sprintf(info->s = cpuintrf_temp_str(), "R :%08X", apexc.r); break;
case CPUINFO_STR_REGISTER + APEXC_ML: sprintf(info->s = cpuintrf_temp_str(), "ML:%03X", apexc.ml); break;
case CPUINFO_STR_REGISTER + APEXC_WS: sprintf(info->s = cpuintrf_temp_str(), "WS:%01X", apexc.working_store); break;
case CPUINFO_STR_REGISTER + APEXC_CR: sprintf(info->s, "CR:%08X", apexc.cr); break;
case CPUINFO_STR_REGISTER + APEXC_A: sprintf(info->s, "A :%08X", apexc.a); break;
case CPUINFO_STR_REGISTER + APEXC_R: sprintf(info->s, "R :%08X", apexc.r); break;
case CPUINFO_STR_REGISTER + APEXC_ML: sprintf(info->s, "ML:%03X", apexc.ml); break;
case CPUINFO_STR_REGISTER + APEXC_WS: sprintf(info->s, "WS:%01X", apexc.working_store); break;
case CPUINFO_STR_REGISTER + APEXC_STATE: sprintf(info->s = cpuintrf_temp_str(), "CPU state:%01X", apexc.running ? TRUE : FALSE); break;
case CPUINFO_STR_REGISTER + APEXC_STATE: sprintf(info->s, "CPU state:%01X", apexc.running ? TRUE : FALSE); break;
}
}

32
src/emu/cpu/cp1610/cp1610.c
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@ -21,7 +21,7 @@
*
*****************************************************************************/
#include "cpuintrf.h"
#include "cpuexec.h"
#include "debugger.h"
#include "deprecat.h"
#include "cp1610.h"
@ -1551,7 +1551,7 @@ static void cp1610_xori(int d)
static CPU_RESET( cp1610 )
{
/* This is how we set the reset vector */
cpunum_set_input_line(Machine, cpunum_get_active(), CP1610_RESET, PULSE_LINE);
cpu_set_input_line(Machine->activecpu, CP1610_RESET, PULSE_LINE);
}
/***************************************************
@ -3498,28 +3498,28 @@ CPU_GET_INFO( cp1610 )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cp1610_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "CP1610"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), ""); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(),
case CPUINFO_STR_NAME: strcpy(info->s, "CP1610"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, ""); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s,
"Copyright Frank Palazzolo, all rights reserved.");
break;
case CPUINFO_STR_FLAGS:
sprintf(info->s = cpuintrf_temp_str(), "%c%c%c%c",
sprintf(info->s, "%c%c%c%c",
cp1610.flags & 0x80 ? 'S':'.',
cp1610.flags & 0x40 ? 'Z':'.',
cp1610.flags & 0x10 ? 'V':'.',
cp1610.flags & 0x10 ? 'C':'.');
break;
case CPUINFO_STR_REGISTER+CP1610_R0: sprintf(info->s = cpuintrf_temp_str(), "R0:%04X", cp1610.r[0]); break;
case CPUINFO_STR_REGISTER+CP1610_R1: sprintf(info->s = cpuintrf_temp_str(), "R1:%04X", cp1610.r[1]); break;
case CPUINFO_STR_REGISTER+CP1610_R2: sprintf(info->s = cpuintrf_temp_str(), "R2:%04X", cp1610.r[2]); break;
case CPUINFO_STR_REGISTER+CP1610_R3: sprintf(info->s = cpuintrf_temp_str(), "R3:%04X", cp1610.r[3]); break;
case CPUINFO_STR_REGISTER+CP1610_R4: sprintf(info->s = cpuintrf_temp_str(), "R4:%04X", cp1610.r[4]); break;
case CPUINFO_STR_REGISTER+CP1610_R5: sprintf(info->s = cpuintrf_temp_str(), "R5:%04X", cp1610.r[5]); break;
case CPUINFO_STR_REGISTER+CP1610_R6: sprintf(info->s = cpuintrf_temp_str(), "R6:%04X", cp1610.r[6]); break;
case CPUINFO_STR_REGISTER+CP1610_R7: sprintf(info->s = cpuintrf_temp_str(), "R7:%04X", cp1610.r[7]); break;
case CPUINFO_STR_REGISTER+CP1610_R0: sprintf(info->s, "R0:%04X", cp1610.r[0]); break;
case CPUINFO_STR_REGISTER+CP1610_R1: sprintf(info->s, "R1:%04X", cp1610.r[1]); break;
case CPUINFO_STR_REGISTER+CP1610_R2: sprintf(info->s, "R2:%04X", cp1610.r[2]); break;
case CPUINFO_STR_REGISTER+CP1610_R3: sprintf(info->s, "R3:%04X", cp1610.r[3]); break;
case CPUINFO_STR_REGISTER+CP1610_R4: sprintf(info->s, "R4:%04X", cp1610.r[4]); break;
case CPUINFO_STR_REGISTER+CP1610_R5: sprintf(info->s, "R5:%04X", cp1610.r[5]); break;
case CPUINFO_STR_REGISTER+CP1610_R6: sprintf(info->s, "R6:%04X", cp1610.r[6]); break;
case CPUINFO_STR_REGISTER+CP1610_R7: sprintf(info->s, "R7:%04X", cp1610.r[7]); break;
}
return;

9
src/emu/cpu/e132xs/e132xs.c
View File

@ -213,6 +213,7 @@
#include "debugger.h"
#include "deprecat.h"
#include "cpuexec.h"
#include "eminline.h"
#include "e132xs.h"
#include "osd_cpu.h"
@ -604,7 +605,7 @@ static void hyperstone_set_trap_entry(int which)
static UINT32 compute_tr(void)
{
UINT64 cycles_since_base = activecpu_gettotalcycles() - hyperstone.tr_base_cycles;
UINT64 cycles_since_base = cpu_get_total_cycles(Machine->activecpu) - hyperstone.tr_base_cycles;
UINT64 clocks_since_base = cycles_since_base >> hyperstone.clock_scale;
return hyperstone.tr_base_value + (clocks_since_base / hyperstone.tr_clocks_per_tick);
}
@ -620,12 +621,12 @@ static void update_timer_prescale(void)
hyperstone.clock_cycles_6 = 6 << hyperstone.clock_scale;
hyperstone.tr_clocks_per_tick = ((TPR >> 16) & 0xff) + 2;
hyperstone.tr_base_value = prevtr;
hyperstone.tr_base_cycles = activecpu_gettotalcycles();
hyperstone.tr_base_cycles = cpu_get_total_cycles(Machine->activecpu);
}
static void adjust_timer_interrupt(void)
{
UINT64 cycles_since_base = activecpu_gettotalcycles() - hyperstone.tr_base_cycles;
UINT64 cycles_since_base = cpu_get_total_cycles(Machine->activecpu) - hyperstone.tr_base_cycles;
UINT64 clocks_since_base = cycles_since_base >> hyperstone.clock_scale;
UINT64 cycles_until_next_clock = cycles_since_base - (clocks_since_base << hyperstone.clock_scale);
int cpunum = cpunum_get_active();
@ -800,7 +801,7 @@ INLINE void set_global_register(UINT8 code, UINT32 val)
*/
case TR_REGISTER:
hyperstone.tr_base_value = val;
hyperstone.tr_base_cycles = activecpu_gettotalcycles();
hyperstone.tr_base_cycles = cpu_get_total_cycles(Machine->activecpu);
adjust_timer_interrupt();
break;

154
src/emu/cpu/f8/f8.c
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@ -2121,16 +2121,16 @@ CPU_GET_INFO( f8 )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &f8_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "F8"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "Fairchild F8"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(),
case CPUINFO_STR_NAME: strcpy(info->s, "F8"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Fairchild F8"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s,
"Copyright Juergen Buchmueller, all rights reserved.");
break;
case CPUINFO_STR_FLAGS:
sprintf(info->s = cpuintrf_temp_str(), "%c%c%c%c%c",
sprintf(info->s, "%c%c%c%c%c",
f8.w & 0x10 ? 'I':'.',
f8.w & 0x08 ? 'O':'.',
f8.w & 0x04 ? 'Z':'.',
@ -2138,77 +2138,77 @@ CPU_GET_INFO( f8 )
f8.w & 0x01 ? 'S':'.');
break;
case CPUINFO_STR_REGISTER+F8_PC0:sprintf(info->s = cpuintrf_temp_str(), "PC0:%04X", ((f8.pc0) - 1) & 0xffff); break;
case CPUINFO_STR_REGISTER+F8_PC1:sprintf(info->s = cpuintrf_temp_str(), "PC1:%04X", f8.pc1); break;
case CPUINFO_STR_REGISTER+F8_DC0:sprintf(info->s = cpuintrf_temp_str(), "DC0:%04X", f8.dc0); break;
case CPUINFO_STR_REGISTER+F8_DC1:sprintf(info->s = cpuintrf_temp_str(), "DC1:%04X", f8.dc1); break;
case CPUINFO_STR_REGISTER+F8_W: sprintf(info->s = cpuintrf_temp_str(), "W :%02X", f8.w); break;
case CPUINFO_STR_REGISTER+F8_A: sprintf(info->s = cpuintrf_temp_str(), "A :%02X", f8.a); break;
case CPUINFO_STR_REGISTER+F8_IS: sprintf(info->s = cpuintrf_temp_str(), "IS :%02X", f8.is); break;
case CPUINFO_STR_REGISTER+F8_J: sprintf(info->s = cpuintrf_temp_str(), "J :%02X", f8.r[9]); break;
case CPUINFO_STR_REGISTER+F8_HU: sprintf(info->s = cpuintrf_temp_str(), "HU :%02X", f8.r[10]); break;
case CPUINFO_STR_REGISTER+F8_HL: sprintf(info->s = cpuintrf_temp_str(), "HL :%02X", f8.r[11]); break;
case CPUINFO_STR_REGISTER+F8_KU: sprintf(info->s = cpuintrf_temp_str(), "KU :%02X", f8.r[12]); break;
case CPUINFO_STR_REGISTER+F8_KL: sprintf(info->s = cpuintrf_temp_str(), "KL :%02X", f8.r[13]); break;
case CPUINFO_STR_REGISTER+F8_QU: sprintf(info->s = cpuintrf_temp_str(), "QU :%02X", f8.r[14]); break;
case CPUINFO_STR_REGISTER+F8_QL: sprintf(info->s = cpuintrf_temp_str(), "QL :%02X", f8.r[15]); break;
case CPUINFO_STR_REGISTER+F8_R0: sprintf(info->s = cpuintrf_temp_str(), "R0 :%02X", f8.r[0]); break;
case CPUINFO_STR_REGISTER+F8_R1: sprintf(info->s = cpuintrf_temp_str(), "R1 :%02X", f8.r[1]); break;
case CPUINFO_STR_REGISTER+F8_R2: sprintf(info->s = cpuintrf_temp_str(), "R2 :%02X", f8.r[2]); break;
case CPUINFO_STR_REGISTER+F8_R3: sprintf(info->s = cpuintrf_temp_str(), "R3 :%02X", f8.r[3]); break;
case CPUINFO_STR_REGISTER+F8_R4: sprintf(info->s = cpuintrf_temp_str(), "R4 :%02X", f8.r[4]); break;
case CPUINFO_STR_REGISTER+F8_R5: sprintf(info->s = cpuintrf_temp_str(), "R5 :%02X", f8.r[5]); break;
case CPUINFO_STR_REGISTER+F8_R6: sprintf(info->s = cpuintrf_temp_str(), "R6 :%02X", f8.r[6]); break;
case CPUINFO_STR_REGISTER+F8_R7: sprintf(info->s = cpuintrf_temp_str(), "R7 :%02X", f8.r[7]); break;
case CPUINFO_STR_REGISTER+F8_R8: sprintf(info->s = cpuintrf_temp_str(), "R8 :%02X", f8.r[8]); break;
case CPUINFO_STR_REGISTER+F8_R16: sprintf(info->s = cpuintrf_temp_str(), "R16 :%02X", f8.r[16]); break;
case CPUINFO_STR_REGISTER+F8_R17: sprintf(info->s = cpuintrf_temp_str(), "R17 :%02X", f8.r[17]); break;
case CPUINFO_STR_REGISTER+F8_R18: sprintf(info->s = cpuintrf_temp_str(), "R18 :%02X", f8.r[18]); break;
case CPUINFO_STR_REGISTER+F8_R19: sprintf(info->s = cpuintrf_temp_str(), "R19 :%02X", f8.r[19]); break;
case CPUINFO_STR_REGISTER+F8_R20: sprintf(info->s = cpuintrf_temp_str(), "R20 :%02X", f8.r[20]); break;
case CPUINFO_STR_REGISTER+F8_R21: sprintf(info->s = cpuintrf_temp_str(), "R21 :%02X", f8.r[21]); break;
case CPUINFO_STR_REGISTER+F8_R22: sprintf(info->s = cpuintrf_temp_str(), "R22 :%02X", f8.r[22]); break;
case CPUINFO_STR_REGISTER+F8_R23: sprintf(info->s = cpuintrf_temp_str(), "R23 :%02X", f8.r[23]); break;
case CPUINFO_STR_REGISTER+F8_R24: sprintf(info->s = cpuintrf_temp_str(), "R24 :%02X", f8.r[24]); break;
case CPUINFO_STR_REGISTER+F8_R25: sprintf(info->s = cpuintrf_temp_str(), "R25 :%02X", f8.r[25]); break;
case CPUINFO_STR_REGISTER+F8_R26: sprintf(info->s = cpuintrf_temp_str(), "R26 :%02X", f8.r[26]); break;
case CPUINFO_STR_REGISTER+F8_R27: sprintf(info->s = cpuintrf_temp_str(), "R27 :%02X", f8.r[27]); break;
case CPUINFO_STR_REGISTER+F8_R28: sprintf(info->s = cpuintrf_temp_str(), "R28 :%02X", f8.r[28]); break;
case CPUINFO_STR_REGISTER+F8_R29: sprintf(info->s = cpuintrf_temp_str(), "R29 :%02X", f8.r[29]); break;
case CPUINFO_STR_REGISTER+F8_R30: sprintf(info->s = cpuintrf_temp_str(), "R30 :%02X", f8.r[30]); break;
case CPUINFO_STR_REGISTER+F8_R31: sprintf(info->s = cpuintrf_temp_str(), "R31 :%02X", f8.r[31]); break;
case CPUINFO_STR_REGISTER+F8_R32: sprintf(info->s = cpuintrf_temp_str(), "R32 :%02X", f8.r[32]); break;
case CPUINFO_STR_REGISTER+F8_R33: sprintf(info->s = cpuintrf_temp_str(), "R33 :%02X", f8.r[33]); break;
case CPUINFO_STR_REGISTER+F8_R34: sprintf(info->s = cpuintrf_temp_str(), "R34 :%02X", f8.r[34]); break;
case CPUINFO_STR_REGISTER+F8_R35: sprintf(info->s = cpuintrf_temp_str(), "R35 :%02X", f8.r[35]); break;
case CPUINFO_STR_REGISTER+F8_R36: sprintf(info->s = cpuintrf_temp_str(), "R36 :%02X", f8.r[36]); break;
case CPUINFO_STR_REGISTER+F8_R37: sprintf(info->s = cpuintrf_temp_str(), "R37 :%02X", f8.r[37]); break;
case CPUINFO_STR_REGISTER+F8_R38: sprintf(info->s = cpuintrf_temp_str(), "R38 :%02X", f8.r[38]); break;
case CPUINFO_STR_REGISTER+F8_R39: sprintf(info->s = cpuintrf_temp_str(), "R39 :%02X", f8.r[39]); break;
case CPUINFO_STR_REGISTER+F8_R40: sprintf(info->s = cpuintrf_temp_str(), "R40 :%02X", f8.r[40]); break;
case CPUINFO_STR_REGISTER+F8_R41: sprintf(info->s = cpuintrf_temp_str(), "R41 :%02X", f8.r[41]); break;
case CPUINFO_STR_REGISTER+F8_R42: sprintf(info->s = cpuintrf_temp_str(), "R42 :%02X", f8.r[42]); break;
case CPUINFO_STR_REGISTER+F8_R43: sprintf(info->s = cpuintrf_temp_str(), "R43 :%02X", f8.r[43]); break;
case CPUINFO_STR_REGISTER+F8_R44: sprintf(info->s = cpuintrf_temp_str(), "R44 :%02X", f8.r[44]); break;
case CPUINFO_STR_REGISTER+F8_R45: sprintf(info->s = cpuintrf_temp_str(), "R45 :%02X", f8.r[45]); break;
case CPUINFO_STR_REGISTER+F8_R46: sprintf(info->s = cpuintrf_temp_str(), "R46 :%02X", f8.r[46]); break;
case CPUINFO_STR_REGISTER+F8_R47: sprintf(info->s = cpuintrf_temp_str(), "R47 :%02X", f8.r[47]); break;
case CPUINFO_STR_REGISTER+F8_R48: sprintf(info->s = cpuintrf_temp_str(), "R48 :%02X", f8.r[48]); break;
case CPUINFO_STR_REGISTER+F8_R49: sprintf(info->s = cpuintrf_temp_str(), "R49 :%02X", f8.r[49]); break;
case CPUINFO_STR_REGISTER+F8_R50: sprintf(info->s = cpuintrf_temp_str(), "R50 :%02X", f8.r[50]); break;
case CPUINFO_STR_REGISTER+F8_R51: sprintf(info->s = cpuintrf_temp_str(), "R51 :%02X", f8.r[51]); break;
case CPUINFO_STR_REGISTER+F8_R52: sprintf(info->s = cpuintrf_temp_str(), "R52 :%02X", f8.r[52]); break;
case CPUINFO_STR_REGISTER+F8_R53: sprintf(info->s = cpuintrf_temp_str(), "R53 :%02X", f8.r[53]); break;
case CPUINFO_STR_REGISTER+F8_R54: sprintf(info->s = cpuintrf_temp_str(), "R54 :%02X", f8.r[54]); break;
case CPUINFO_STR_REGISTER+F8_R55: sprintf(info->s = cpuintrf_temp_str(), "R55 :%02X", f8.r[55]); break;
case CPUINFO_STR_REGISTER+F8_R56: sprintf(info->s = cpuintrf_temp_str(), "R56 :%02X", f8.r[56]); break;
case CPUINFO_STR_REGISTER+F8_R57: sprintf(info->s = cpuintrf_temp_str(), "R57 :%02X", f8.r[57]); break;
case CPUINFO_STR_REGISTER+F8_R58: sprintf(info->s = cpuintrf_temp_str(), "R58 :%02X", f8.r[58]); break;
case CPUINFO_STR_REGISTER+F8_R59: sprintf(info->s = cpuintrf_temp_str(), "R59 :%02X", f8.r[59]); break;
case CPUINFO_STR_REGISTER+F8_R60: sprintf(info->s = cpuintrf_temp_str(), "R60 :%02X", f8.r[60]); break;
case CPUINFO_STR_REGISTER+F8_R61: sprintf(info->s = cpuintrf_temp_str(), "R61 :%02X", f8.r[61]); break;
case CPUINFO_STR_REGISTER+F8_R62: sprintf(info->s = cpuintrf_temp_str(), "R62 :%02X", f8.r[62]); break;
case CPUINFO_STR_REGISTER+F8_R63: sprintf(info->s = cpuintrf_temp_str(), "R63 :%02X", f8.r[63]); break;
case CPUINFO_STR_REGISTER+F8_PC0:sprintf(info->s, "PC0:%04X", ((f8.pc0) - 1) & 0xffff); break;
case CPUINFO_STR_REGISTER+F8_PC1:sprintf(info->s, "PC1:%04X", f8.pc1); break;
case CPUINFO_STR_REGISTER+F8_DC0:sprintf(info->s, "DC0:%04X", f8.dc0); break;
case CPUINFO_STR_REGISTER+F8_DC1:sprintf(info->s, "DC1:%04X", f8.dc1); break;
case CPUINFO_STR_REGISTER+F8_W: sprintf(info->s, "W :%02X", f8.w); break;
case CPUINFO_STR_REGISTER+F8_A: sprintf(info->s, "A :%02X", f8.a); break;
case CPUINFO_STR_REGISTER+F8_IS: sprintf(info->s, "IS :%02X", f8.is); break;
case CPUINFO_STR_REGISTER+F8_J: sprintf(info->s, "J :%02X", f8.r[9]); break;
case CPUINFO_STR_REGISTER+F8_HU: sprintf(info->s, "HU :%02X", f8.r[10]); break;
case CPUINFO_STR_REGISTER+F8_HL: sprintf(info->s, "HL :%02X", f8.r[11]); break;
case CPUINFO_STR_REGISTER+F8_KU: sprintf(info->s, "KU :%02X", f8.r[12]); break;
case CPUINFO_STR_REGISTER+F8_KL: sprintf(info->s, "KL :%02X", f8.r[13]); break;
case CPUINFO_STR_REGISTER+F8_QU: sprintf(info->s, "QU :%02X", f8.r[14]); break;
case CPUINFO_STR_REGISTER+F8_QL: sprintf(info->s, "QL :%02X", f8.r[15]); break;
case CPUINFO_STR_REGISTER+F8_R0: sprintf(info->s, "R0 :%02X", f8.r[0]); break;
case CPUINFO_STR_REGISTER+F8_R1: sprintf(info->s, "R1 :%02X", f8.r[1]); break;
case CPUINFO_STR_REGISTER+F8_R2: sprintf(info->s, "R2 :%02X", f8.r[2]); break;
case CPUINFO_STR_REGISTER+F8_R3: sprintf(info->s, "R3 :%02X", f8.r[3]); break;
case CPUINFO_STR_REGISTER+F8_R4: sprintf(info->s, "R4 :%02X", f8.r[4]); break;
case CPUINFO_STR_REGISTER+F8_R5: sprintf(info->s, "R5 :%02X", f8.r[5]); break;
case CPUINFO_STR_REGISTER+F8_R6: sprintf(info->s, "R6 :%02X", f8.r[6]); break;
case CPUINFO_STR_REGISTER+F8_R7: sprintf(info->s, "R7 :%02X", f8.r[7]); break;
case CPUINFO_STR_REGISTER+F8_R8: sprintf(info->s, "R8 :%02X", f8.r[8]); break;
case CPUINFO_STR_REGISTER+F8_R16: sprintf(info->s, "R16 :%02X", f8.r[16]); break;
case CPUINFO_STR_REGISTER+F8_R17: sprintf(info->s, "R17 :%02X", f8.r[17]); break;
case CPUINFO_STR_REGISTER+F8_R18: sprintf(info->s, "R18 :%02X", f8.r[18]); break;
case CPUINFO_STR_REGISTER+F8_R19: sprintf(info->s, "R19 :%02X", f8.r[19]); break;
case CPUINFO_STR_REGISTER+F8_R20: sprintf(info->s, "R20 :%02X", f8.r[20]); break;
case CPUINFO_STR_REGISTER+F8_R21: sprintf(info->s, "R21 :%02X", f8.r[21]); break;
case CPUINFO_STR_REGISTER+F8_R22: sprintf(info->s, "R22 :%02X", f8.r[22]); break;
case CPUINFO_STR_REGISTER+F8_R23: sprintf(info->s, "R23 :%02X", f8.r[23]); break;
case CPUINFO_STR_REGISTER+F8_R24: sprintf(info->s, "R24 :%02X", f8.r[24]); break;
case CPUINFO_STR_REGISTER+F8_R25: sprintf(info->s, "R25 :%02X", f8.r[25]); break;
case CPUINFO_STR_REGISTER+F8_R26: sprintf(info->s, "R26 :%02X", f8.r[26]); break;
case CPUINFO_STR_REGISTER+F8_R27: sprintf(info->s, "R27 :%02X", f8.r[27]); break;
case CPUINFO_STR_REGISTER+F8_R28: sprintf(info->s, "R28 :%02X", f8.r[28]); break;
case CPUINFO_STR_REGISTER+F8_R29: sprintf(info->s, "R29 :%02X", f8.r[29]); break;
case CPUINFO_STR_REGISTER+F8_R30: sprintf(info->s, "R30 :%02X", f8.r[30]); break;
case CPUINFO_STR_REGISTER+F8_R31: sprintf(info->s, "R31 :%02X", f8.r[31]); break;
case CPUINFO_STR_REGISTER+F8_R32: sprintf(info->s, "R32 :%02X", f8.r[32]); break;
case CPUINFO_STR_REGISTER+F8_R33: sprintf(info->s, "R33 :%02X", f8.r[33]); break;
case CPUINFO_STR_REGISTER+F8_R34: sprintf(info->s, "R34 :%02X", f8.r[34]); break;
case CPUINFO_STR_REGISTER+F8_R35: sprintf(info->s, "R35 :%02X", f8.r[35]); break;
case CPUINFO_STR_REGISTER+F8_R36: sprintf(info->s, "R36 :%02X", f8.r[36]); break;
case CPUINFO_STR_REGISTER+F8_R37: sprintf(info->s, "R37 :%02X", f8.r[37]); break;
case CPUINFO_STR_REGISTER+F8_R38: sprintf(info->s, "R38 :%02X", f8.r[38]); break;
case CPUINFO_STR_REGISTER+F8_R39: sprintf(info->s, "R39 :%02X", f8.r[39]); break;
case CPUINFO_STR_REGISTER+F8_R40: sprintf(info->s, "R40 :%02X", f8.r[40]); break;
case CPUINFO_STR_REGISTER+F8_R41: sprintf(info->s, "R41 :%02X", f8.r[41]); break;
case CPUINFO_STR_REGISTER+F8_R42: sprintf(info->s, "R42 :%02X", f8.r[42]); break;
case CPUINFO_STR_REGISTER+F8_R43: sprintf(info->s, "R43 :%02X", f8.r[43]); break;
case CPUINFO_STR_REGISTER+F8_R44: sprintf(info->s, "R44 :%02X", f8.r[44]); break;
case CPUINFO_STR_REGISTER+F8_R45: sprintf(info->s, "R45 :%02X", f8.r[45]); break;
case CPUINFO_STR_REGISTER+F8_R46: sprintf(info->s, "R46 :%02X", f8.r[46]); break;
case CPUINFO_STR_REGISTER+F8_R47: sprintf(info->s, "R47 :%02X", f8.r[47]); break;
case CPUINFO_STR_REGISTER+F8_R48: sprintf(info->s, "R48 :%02X", f8.r[48]); break;
case CPUINFO_STR_REGISTER+F8_R49: sprintf(info->s, "R49 :%02X", f8.r[49]); break;
case CPUINFO_STR_REGISTER+F8_R50: sprintf(info->s, "R50 :%02X", f8.r[50]); break;
case CPUINFO_STR_REGISTER+F8_R51: sprintf(info->s, "R51 :%02X", f8.r[51]); break;
case CPUINFO_STR_REGISTER+F8_R52: sprintf(info->s, "R52 :%02X", f8.r[52]); break;
case CPUINFO_STR_REGISTER+F8_R53: sprintf(info->s, "R53 :%02X", f8.r[53]); break;
case CPUINFO_STR_REGISTER+F8_R54: sprintf(info->s, "R54 :%02X", f8.r[54]); break;
case CPUINFO_STR_REGISTER+F8_R55: sprintf(info->s, "R55 :%02X", f8.r[55]); break;
case CPUINFO_STR_REGISTER+F8_R56: sprintf(info->s, "R56 :%02X", f8.r[56]); break;
case CPUINFO_STR_REGISTER+F8_R57: sprintf(info->s, "R57 :%02X", f8.r[57]); break;
case CPUINFO_STR_REGISTER+F8_R58: sprintf(info->s, "R58 :%02X", f8.r[58]); break;
case CPUINFO_STR_REGISTER+F8_R59: sprintf(info->s, "R59 :%02X", f8.r[59]); break;
case CPUINFO_STR_REGISTER+F8_R60: sprintf(info->s, "R60 :%02X", f8.r[60]); break;
case CPUINFO_STR_REGISTER+F8_R61: sprintf(info->s, "R61 :%02X", f8.r[61]); break;
case CPUINFO_STR_REGISTER+F8_R62: sprintf(info->s, "R62 :%02X", f8.r[62]); break;
case CPUINFO_STR_REGISTER+F8_R63: sprintf(info->s, "R63 :%02X", f8.r[63]); break;
}

7
src/emu/cpu/h83002/h8periph.c
View File

@ -10,6 +10,7 @@
#include "debugger.h"
#include "deprecat.h"
#include "cpuexec.h"
#include "h83002.h"
#include "h8priv.h"
@ -61,7 +62,7 @@ static void h8_itu_refresh_timer(int tnum)
ourTCR = h8.per_regs[tcr[tnum]];
ourTVAL = h8.h8TCNT[tnum];
period = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(h8.cpu_number)), tscales[ourTCR & 3] * (65536 - ourTVAL));
period = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(Machine->cpu[h8.cpu_number])), tscales[ourTCR & 3] * (65536 - ourTVAL));
if (ourTCR & 4)
{
@ -80,7 +81,7 @@ static void h8_itu_sync_timers(int tnum)
ourTCR = h8.per_regs[tcr[tnum]];
// get the time per unit
cycle_time = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(h8.cpu_number)), tscales[ourTCR & 3]);
cycle_time = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(Machine->cpu[h8.cpu_number])), tscales[ourTCR & 3]);
cur = timer_timeelapsed(h8.timer[tnum]);
ratio = attotime_to_double(cur) / attotime_to_double(cycle_time);
@ -418,7 +419,7 @@ static void h8_3007_itu_refresh_timer(int tnum)
attotime period;
int ourTCR = h8.per_regs[0x68+(tnum*8)];
period = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(h8.cpu_number)), tscales[ourTCR & 3]);
period = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(Machine->cpu[h8.cpu_number])), tscales[ourTCR & 3]);
if (ourTCR & 4)
{

17
src/emu/cpu/jaguar/jaguar.c
View File

@ -8,6 +8,7 @@
#include "debugger.h"
#include "deprecat.h"
#include "cpuexec.h"
#include "jaguar.h"
#define LOG_GPU_IO 0
@ -506,7 +507,7 @@ static CPU_EXECUTE( jaguargpu )
/* if we're halted, we shouldn't be here */
if (!(jaguar.ctrl[G_CTRL] & 1))
{
cpunum_set_input_line(Machine, cpunum_get_active(), INPUT_LINE_HALT, ASSERT_LINE);
cpu_set_input_line(device->machine->activecpu, INPUT_LINE_HALT, ASSERT_LINE);
return cycles;
}
@ -552,7 +553,7 @@ static CPU_EXECUTE( jaguardsp )
/* if we're halted, we shouldn't be here */
if (!(jaguar.ctrl[G_CTRL] & 1))
{
cpunum_set_input_line(Machine, cpunum_get_active(), INPUT_LINE_HALT, ASSERT_LINE);
cpu_set_input_line(Machine->activecpu, INPUT_LINE_HALT, ASSERT_LINE);
return cycles;
}
@ -1366,9 +1367,9 @@ void jaguargpu_ctrl_w(int cpunum, offs_t offset, UINT32 data, UINT32 mem_mask)
jaguar.ctrl[offset] = newval;
if ((oldval ^ newval) & 0x01)
{
cpunum_set_input_line(Machine, cpunum, INPUT_LINE_HALT, (newval & 1) ? CLEAR_LINE : ASSERT_LINE);
if (cpunum_get_executing() >= 0)
cpu_yield();
cpu_set_input_line(Machine->cpu[cpunum], INPUT_LINE_HALT, (newval & 1) ? CLEAR_LINE : ASSERT_LINE);
if (cpunum_get_active() >= 0)
cpu_yield(Machine->activecpu);
}
if (newval & 0x02)
{
@ -1477,9 +1478,9 @@ void jaguardsp_ctrl_w(int cpunum, offs_t offset, UINT32 data, UINT32 mem_mask)
jaguar.ctrl[offset] = newval;
if ((oldval ^ newval) & 0x01)
{
cpunum_set_input_line(Machine, cpunum, INPUT_LINE_HALT, (newval & 1) ? CLEAR_LINE : ASSERT_LINE);
if (cpunum_get_executing() >= 0)
cpu_yield();
cpu_set_input_line(Machine->cpu[cpunum], INPUT_LINE_HALT, (newval & 1) ? CLEAR_LINE : ASSERT_LINE);
if (cpunum_get_active() >= 0)
cpu_yield(Machine->activecpu);
}
if (newval & 0x02)
{

38
src/emu/cpu/lh5801/lh5801.c
View File

@ -240,14 +240,14 @@ CPU_GET_INFO( lh5801 )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &lh5801_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "LH5801"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "LH5801"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0alpha"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_NAME: strcpy(info->s, "LH5801"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "LH5801"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0alpha"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s = cpuintrf_temp_str(), "%s%s%s%s%s%s%s%s",
sprintf(info->s, "%s%s%s%s%s%s%s%s",
lh5801.t&0x80?"1":"0",
lh5801.t&0x40?"1":"0",
lh5801.t&0x20?"1":"0",
@ -258,18 +258,18 @@ CPU_GET_INFO( lh5801 )
lh5801.t&1?"C":".");
break;
case CPUINFO_STR_REGISTER + LH5801_P: sprintf(info->s = cpuintrf_temp_str(), "P:%04X", lh5801.p.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_S: sprintf(info->s = cpuintrf_temp_str(), "S:%04X", lh5801.s.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_U: sprintf(info->s = cpuintrf_temp_str(), "U:%04X", lh5801.u.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_X: sprintf(info->s = cpuintrf_temp_str(), "X:%04X", lh5801.x.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_Y: sprintf(info->s = cpuintrf_temp_str(), "Y:%04X", lh5801.y.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_T: sprintf(info->s = cpuintrf_temp_str(), "T:%02X", lh5801.t); break;
case CPUINFO_STR_REGISTER + LH5801_A: sprintf(info->s = cpuintrf_temp_str(), "A:%02X", lh5801.a); break;
case CPUINFO_STR_REGISTER + LH5801_TM: sprintf(info->s = cpuintrf_temp_str(), "TM:%03X", lh5801.tm); break;
case CPUINFO_STR_REGISTER + LH5801_IN: sprintf(info->s = cpuintrf_temp_str(), "IN:%02X", lh5801.config->in()); break;
case CPUINFO_STR_REGISTER + LH5801_PV: sprintf(info->s = cpuintrf_temp_str(), "PV:%04X", lh5801.pv); break;
case CPUINFO_STR_REGISTER + LH5801_PU: sprintf(info->s = cpuintrf_temp_str(), "PU:%04X", lh5801.pu); break;
case CPUINFO_STR_REGISTER + LH5801_BF: sprintf(info->s = cpuintrf_temp_str(), "BF:%04X", lh5801.bf); break;
case CPUINFO_STR_REGISTER + LH5801_DP: sprintf(info->s = cpuintrf_temp_str(), "DP:%04X", lh5801.dp); break;
case CPUINFO_STR_REGISTER + LH5801_P: sprintf(info->s, "P:%04X", lh5801.p.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_S: sprintf(info->s, "S:%04X", lh5801.s.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_U: sprintf(info->s, "U:%04X", lh5801.u.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_X: sprintf(info->s, "X:%04X", lh5801.x.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_Y: sprintf(info->s, "Y:%04X", lh5801.y.w.l); break;
case CPUINFO_STR_REGISTER + LH5801_T: sprintf(info->s, "T:%02X", lh5801.t); break;
case CPUINFO_STR_REGISTER + LH5801_A: sprintf(info->s, "A:%02X", lh5801.a); break;
case CPUINFO_STR_REGISTER + LH5801_TM: sprintf(info->s, "TM:%03X", lh5801.tm); break;
case CPUINFO_STR_REGISTER + LH5801_IN: sprintf(info->s, "IN:%02X", lh5801.config->in()); break;
case CPUINFO_STR_REGISTER + LH5801_PV: sprintf(info->s, "PV:%04X", lh5801.pv); break;
case CPUINFO_STR_REGISTER + LH5801_PU: sprintf(info->s, "PU:%04X", lh5801.pu); break;
case CPUINFO_STR_REGISTER + LH5801_BF: sprintf(info->s, "BF:%04X", lh5801.bf); break;
case CPUINFO_STR_REGISTER + LH5801_DP: sprintf(info->s, "DP:%04X", lh5801.dp); break;
}
}

7
src/emu/cpu/m37710/m37710.c
View File

@ -53,6 +53,7 @@
#include "deprecat.h"
#include "debugger.h"
#include "cpuexec.h"
#include "m37710cm.h"
#define M37710_DEBUG (0) // enables verbose logging for peripherals, etc.
@ -279,7 +280,7 @@ static TIMER_CALLBACK( m37710_timer_cb )
m37710i_cpu.m37710_regs[m37710_irq_levels[curirq]] |= 0x04;
m37710_set_irq_line(curirq, PULSE_LINE);
cpu_triggerint(machine, cpunum);
cpu_triggerint(machine->cpu[cpunum]);
cpu_pop_context();
}
@ -338,7 +339,7 @@ static void m37710_recalc_timer(int timer)
switch (m37710i_cpu.m37710_regs[0x56+timer] & 0x3)
{
case 0: // timer mode
time = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(cpunum_get_active())), tscales[m37710i_cpu.m37710_regs[tcr[timer]]>>6]);
time = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(Machine->activecpu)), tscales[m37710i_cpu.m37710_regs[tcr[timer]]>>6]);
time = attotime_mul(time, tval + 1);
#if M37710_DEBUG
@ -373,7 +374,7 @@ static void m37710_recalc_timer(int timer)
switch (m37710i_cpu.m37710_regs[0x56+timer] & 0x3)
{
case 0: // timer mode
time = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(cpunum_get_active())), tscales[m37710i_cpu.m37710_regs[tcr[timer]]>>6]);
time = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(Machine->activecpu)), tscales[m37710i_cpu.m37710_regs[tcr[timer]]>>6]);
time = attotime_mul(time, tval + 1);
#if M37710_DEBUG

2
src/emu/cpu/m6502/m6502.h
View File

@ -57,7 +57,7 @@ enum
};
#define M6502_IRQ_LINE 0
/* use cpunum_set_input_line(machine, cpu, M6502_SET_OVERFLOW, level)
/* use cpu_set_input_line(machine->cpu[cpu], M6502_SET_OVERFLOW, level)
to change level of the so input line
positiv edge sets overflow flag */
#define M6502_SET_OVERFLOW 1

2
src/emu/cpu/m6502/m6509.h
View File

@ -34,7 +34,7 @@ enum
};
#define M6509_IRQ_LINE M6502_IRQ_LINE
/* use cpunum_set_input_line(machine, cpu, M6509_SET_OVERFLOW, level)
/* use cpu_set_input_line(machine->cpu[cpu], M6509_SET_OVERFLOW, level)
to change level of the so input line
positiv edge sets overflow flag */
#define M6509_SET_OVERFLOW 3

1
src/emu/cpu/mcs48/mcs48.c
View File

@ -999,6 +999,7 @@ static CPU_SET_CONTEXT( mcs48 )
{
}
/*-------------------------------------------------
mcs48_set_info - set a piece of information
on the CPU core

8
src/emu/cpu/mcs51/mcs51dasm.c
View File

@ -282,7 +282,7 @@ static void init_mem_names(int feature_set, const char **mem_names)
static const char *get_data_address( const char **mem_names, UINT8 arg )
{
char *buffer = cpuintrf_temp_str();
static char buffer[32];
if (mem_names[arg] == NULL)
sprintf(buffer,"$%02X",arg);
@ -293,7 +293,7 @@ static const char *get_data_address( const char **mem_names, UINT8 arg )
static const char *get_bit_address( const char **mem_names, UINT8 arg )
{
char *buffer = cpuintrf_temp_str();
static char buffer[32];
if(arg < 0x80)
{
@ -324,14 +324,14 @@ static const char *get_bit_address( const char **mem_names, UINT8 arg )
static const char *get_data_address( UINT8 arg )
{
char *buffer = cpuintrf_temp_str();
static char buffer[32];
sprintf(buffer,"$%02X",arg);
return buffer;
}
static const char *get_bit_address( UINT8 arg )
{
char *buffer = cpuintrf_temp_str();
static char buffer[32];
sprintf(buffer,"$%02X",arg);
return buffer;
}

40
src/emu/cpu/minx/minx.c
View File

@ -359,13 +359,13 @@ CPU_GET_INFO( minx )
case CPUINFO_PTR_BURN: info->burn = CPU_BURN_NAME(minx); break;
case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(minx); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &minx_icount; break;
case CPUINFO_STR_NAME: strcpy( info->s = cpuintrf_temp_str(), "Minx" ); break;
case CPUINFO_STR_CORE_FAMILY: strcpy( info->s = cpuintrf_temp_str(), "Nintendo Minx" ); break;
case CPUINFO_STR_CORE_VERSION: strcpy( info->s = cpuintrf_temp_str(), "0.1" ); break;
case CPUINFO_STR_CORE_FILE: strcpy( info->s = cpuintrf_temp_str(), __FILE__ ); break;
case CPUINFO_STR_CORE_CREDITS: strcpy( info->s = cpuintrf_temp_str(), "Copyright The MESS Team." ); break;
case CPUINFO_STR_NAME: strcpy( info->s, "Minx" ); break;
case CPUINFO_STR_CORE_FAMILY: strcpy( info->s, "Nintendo Minx" ); break;
case CPUINFO_STR_CORE_VERSION: strcpy( info->s, "0.1" ); break;
case CPUINFO_STR_CORE_FILE: strcpy( info->s, __FILE__ ); break;
case CPUINFO_STR_CORE_CREDITS: strcpy( info->s, "Copyright The MESS Team." ); break;
case CPUINFO_STR_FLAGS:
sprintf( info->s = cpuintrf_temp_str(), "%c%c%c%c%c%c%c%c-%c%c%c%c%c",
sprintf( info->s, "%c%c%c%c%c%c%c%c-%c%c%c%c%c",
regs.F & FLAG_I ? 'I' : '.',
regs.F & FLAG_D ? 'D' : '.',
regs.F & FLAG_L ? 'L' : '.',
@ -380,20 +380,20 @@ CPU_GET_INFO( minx )
regs.E & EXEC_DZ ? 'z' : '.',
regs.E & EXEC_EN ? 'E' : '.' );
break;
case CPUINFO_STR_REGISTER + MINX_PC: sprintf( info->s = cpuintrf_temp_str(), "PC:%04X", regs.PC ); break;
case CPUINFO_STR_REGISTER + MINX_SP: sprintf( info->s = cpuintrf_temp_str(), "SP:%04X", regs.SP ); break;
case CPUINFO_STR_REGISTER + MINX_BA: sprintf( info->s = cpuintrf_temp_str(), "BA:%04X", regs.BA ); break;
case CPUINFO_STR_REGISTER + MINX_HL: sprintf( info->s = cpuintrf_temp_str(), "HL:%04X", regs.HL ); break;
case CPUINFO_STR_REGISTER + MINX_X: sprintf( info->s = cpuintrf_temp_str(), "X:%04X", regs.X ); break;
case CPUINFO_STR_REGISTER + MINX_Y: sprintf( info->s = cpuintrf_temp_str(), "Y:%04X", regs.Y ); break;
case CPUINFO_STR_REGISTER + MINX_U: sprintf( info->s = cpuintrf_temp_str(), "U:%02X", regs.U ); break;
case CPUINFO_STR_REGISTER + MINX_V: sprintf( info->s = cpuintrf_temp_str(), "V:%02X", regs.V ); break;
case CPUINFO_STR_REGISTER + MINX_F: sprintf( info->s = cpuintrf_temp_str(), "F:%02X", regs.F ); break;
case CPUINFO_STR_REGISTER + MINX_E: sprintf( info->s = cpuintrf_temp_str(), "E:%02X", regs.E ); break;
case CPUINFO_STR_REGISTER + MINX_N: sprintf( info->s = cpuintrf_temp_str(), "N:%02X", regs.N ); break;
case CPUINFO_STR_REGISTER + MINX_I: sprintf( info->s = cpuintrf_temp_str(), "I:%02X", regs.I ); break;
case CPUINFO_STR_REGISTER + MINX_XI: sprintf( info->s = cpuintrf_temp_str(), "XI:%02X", regs.XI ); break;
case CPUINFO_STR_REGISTER + MINX_YI: sprintf( info->s = cpuintrf_temp_str(), "YI:%02X", regs.YI ); break;
case CPUINFO_STR_REGISTER + MINX_PC: sprintf( info->s, "PC:%04X", regs.PC ); break;
case CPUINFO_STR_REGISTER + MINX_SP: sprintf( info->s, "SP:%04X", regs.SP ); break;
case CPUINFO_STR_REGISTER + MINX_BA: sprintf( info->s, "BA:%04X", regs.BA ); break;
case CPUINFO_STR_REGISTER + MINX_HL: sprintf( info->s, "HL:%04X", regs.HL ); break;
case CPUINFO_STR_REGISTER + MINX_X: sprintf( info->s, "X:%04X", regs.X ); break;
case CPUINFO_STR_REGISTER + MINX_Y: sprintf( info->s, "Y:%04X", regs.Y ); break;
case CPUINFO_STR_REGISTER + MINX_U: sprintf( info->s, "U:%02X", regs.U ); break;
case CPUINFO_STR_REGISTER + MINX_V: sprintf( info->s, "V:%02X", regs.V ); break;
case CPUINFO_STR_REGISTER + MINX_F: sprintf( info->s, "F:%02X", regs.F ); break;
case CPUINFO_STR_REGISTER + MINX_E: sprintf( info->s, "E:%02X", regs.E ); break;
case CPUINFO_STR_REGISTER + MINX_N: sprintf( info->s, "N:%02X", regs.N ); break;
case CPUINFO_STR_REGISTER + MINX_I: sprintf( info->s, "I:%02X", regs.I ); break;
case CPUINFO_STR_REGISTER + MINX_XI: sprintf( info->s, "XI:%02X", regs.XI ); break;
case CPUINFO_STR_REGISTER + MINX_YI: sprintf( info->s, "YI:%02X", regs.YI ); break;
}
}

6
src/emu/cpu/mips/mips3.c
View File

@ -476,7 +476,7 @@ INLINE UINT64 get_cop0_reg(int idx)
mips3.core.icount -= MIPS3_COUNT_READ_CYCLES;
else
mips3.core.icount = 0;
return (UINT32)((activecpu_gettotalcycles() - mips3.core.count_zero_time) / 2);
return (UINT32)((cpu_get_total_cycles(machine->activecpu) - mips3.core.count_zero_time) / 2);
}
else if (idx == COP0_Cause)
{
@ -492,7 +492,7 @@ INLINE UINT64 get_cop0_reg(int idx)
int wired = mips3.core.cpr[0][COP0_Wired] & 0x3f;
int range = 48 - wired;
if (range > 0)
return ((activecpu_gettotalcycles() - mips3.core.count_zero_time) % range + wired) & 0x3f;
return ((cpu_get_total_cycles(machine->activecpu) - mips3.core.count_zero_time) % range + wired) & 0x3f;
else
return 47;
}
@ -532,7 +532,7 @@ INLINE void set_cop0_reg(int idx, UINT64 val)
case COP0_Count:
mips3.core.cpr[0][idx] = val;
mips3.core.count_zero_time = activecpu_gettotalcycles() - ((UINT64)(UINT32)val * 2);
mips3.core.count_zero_time = cpu_get_total_cycles(machine->activecpu) - ((UINT64)(UINT32)val * 2);
mips3com_update_cycle_counting(&mips3.core);
break;

14
src/emu/cpu/mips/mips3com.c
View File

@ -8,6 +8,8 @@
#include "mips3com.h"
#include "deprecat.h"
#include "cpuexec.h"
#include "mame.h"
/***************************************************************************
@ -141,7 +143,7 @@ void mips3com_reset(mips3_state *mips)
mips->cpr[0][COP0_Count] = 0;
mips->cpr[0][COP0_Config] = compute_config_register(mips);
mips->cpr[0][COP0_PRId] = compute_prid_register(mips);
mips->count_zero_time = activecpu_gettotalcycles();
mips->count_zero_time = cpu_get_total_cycles(Machine->activecpu);
/* initialize the TLB state */
for (tlbindex = 0; tlbindex < ARRAY_LENGTH(mips->tlb); tlbindex++)
@ -188,7 +190,7 @@ void mips3com_update_cycle_counting(mips3_state *mips)
/* modify the timer to go off */
if (mips->compare_armed && (mips->cpr[0][COP0_Status] & SR_IMEX5))
{
UINT32 count = (activecpu_gettotalcycles() - mips->count_zero_time) / 2;
UINT32 count = (cpu_get_total_cycles(Machine->activecpu) - mips->count_zero_time) / 2;
UINT32 compare = mips->cpr[0][COP0_Compare];
UINT32 delta = compare - count;
attotime newtime = ATTOTIME_IN_CYCLES(((UINT64)delta * 2), cpunum_get_active());
@ -285,7 +287,7 @@ void mips3com_tlbwr(mips3_state *mips)
/* "random" is based off of the current cycle counting through the non-wired pages */
if (unwired > 0)
tlbindex = ((activecpu_gettotalcycles() - mips->count_zero_time) % unwired + wired) & 0x3f;
tlbindex = ((cpu_get_total_cycles(Machine->activecpu) - mips->count_zero_time) % unwired + wired) & 0x3f;
/* use the common handler to write to this tlbindex */
tlb_write_common(mips, tlbindex);
@ -475,7 +477,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
case CPUINFO_INT_REGISTER + MIPS3_SR: info->i = mips->cpr[0][COP0_Status]; break;
case CPUINFO_INT_REGISTER + MIPS3_EPC: info->i = mips->cpr[0][COP0_EPC]; break;
case CPUINFO_INT_REGISTER + MIPS3_CAUSE: info->i = mips->cpr[0][COP0_Cause]; break;
case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((activecpu_gettotalcycles() - mips->count_zero_time) / 2); break;
case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((cpu_get_total_cycles(Machine->activecpu) - mips->count_zero_time) / 2); break;
case CPUINFO_INT_REGISTER + MIPS3_COMPARE: info->i = mips->cpr[0][COP0_Compare]; break;
case CPUINFO_INT_REGISTER + MIPS3_INDEX: info->i = mips->cpr[0][COP0_Index]; break;
case CPUINFO_INT_REGISTER + MIPS3_RANDOM: info->i = mips->cpr[0][COP0_Random]; break;
@ -547,7 +549,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
case CPUINFO_STR_REGISTER + MIPS3_SR: sprintf(info->s, "SR: %08X", (UINT32)mips->cpr[0][COP0_Status]); break;
case CPUINFO_STR_REGISTER + MIPS3_EPC: sprintf(info->s, "EPC:%08X", (UINT32)mips->cpr[0][COP0_EPC]); break;
case CPUINFO_STR_REGISTER + MIPS3_CAUSE: sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break;
case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((activecpu_gettotalcycles() - mips->count_zero_time) / 2)); break;
case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((cpu_get_total_cycles(Machine->activecpu) - mips->count_zero_time) / 2)); break;
case CPUINFO_STR_REGISTER + MIPS3_COMPARE: sprintf(info->s, "Compare:%08X", (UINT32)mips->cpr[0][COP0_Compare]); break;
case CPUINFO_STR_REGISTER + MIPS3_INDEX: sprintf(info->s, "Index:%08X", (UINT32)mips->cpr[0][COP0_Index]); break;
case CPUINFO_STR_REGISTER + MIPS3_RANDOM: sprintf(info->s, "Random:%08X", (UINT32)mips->cpr[0][COP0_Random]); break;
@ -706,7 +708,7 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
static TIMER_CALLBACK( compare_int_callback )
{
cpunum_set_input_line(machine, param, MIPS3_IRQ5, ASSERT_LINE);
cpu_set_input_line(machine->cpu[param], MIPS3_IRQ5, ASSERT_LINE);
}

1
src/emu/cpu/mips/mips3com.h
View File

@ -14,6 +14,7 @@
#include "cpuintrf.h"
#include "mips3.h"
#include "cpu/vtlb.h"
#include "timer.h"
/***************************************************************************

3
src/emu/cpu/mips/mips3drc.c
View File

@ -28,6 +28,7 @@
#include <stddef.h>
#include "cpuintrf.h"
#include "debugger.h"
#include "cpuexec.h"
#include "mips3com.h"
#include "mips3fe.h"
#include "deprecat.h"
@ -816,7 +817,7 @@ static void code_compile_block(drcuml_state *drcuml, UINT8 mode, offs_t pc)
static void cfunc_get_cycles(void *param)
{
UINT64 *dest = param;
*dest = activecpu_gettotalcycles();
*dest = cpu_get_total_cycles(Machine->activecpu);
}

84
src/emu/cpu/pdp1/pdp1.c
View File

@ -1027,11 +1027,11 @@ CPU_GET_INFO( pdp1 )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &pdp1_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "PDP1"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "DEC PDP-1"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "2.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(),
case CPUINFO_STR_NAME: strcpy(info->s, "PDP1"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "DEC PDP-1"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "2.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s,
"Brian Silverman (original Java Source)\n"
"Vadim Gerasimov (original Java Source)\n"
"Chris Salomon (MESS driver)\n"
@ -1039,7 +1039,7 @@ CPU_GET_INFO( pdp1 )
break;
case CPUINFO_STR_FLAGS:
sprintf(info->s = cpuintrf_temp_str(), "%c%c%c%c%c%c-%c%c%c%c%c%c",
sprintf(info->s, "%c%c%c%c%c%c-%c%c%c%c%c%c",
(FLAGS & 040) ? '1' : '.',
(FLAGS & 020) ? '2' : '.',
(FLAGS & 010) ? '3' : '.',
@ -1055,42 +1055,42 @@ CPU_GET_INFO( pdp1 )
break;
case CPUINFO_STR_REGISTER + PDP1_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:0%06o", PC); break;
case CPUINFO_STR_REGISTER + PDP1_IR: sprintf(info->s = cpuintrf_temp_str(), "IR:0%02o", IR); break;
case CPUINFO_STR_REGISTER + PDP1_MB: sprintf(info->s = cpuintrf_temp_str(), "MB:0%06o", MB); break;
case CPUINFO_STR_REGISTER + PDP1_MA: sprintf(info->s = cpuintrf_temp_str(), "MA:0%06o", MA); break;
case CPUINFO_STR_REGISTER + PDP1_AC: sprintf(info->s = cpuintrf_temp_str(), "AC:0%06o", AC); break;
case CPUINFO_STR_REGISTER + PDP1_IO: sprintf(info->s = cpuintrf_temp_str(), "IO:0%06o", IO); break;
case CPUINFO_STR_REGISTER + PDP1_OV: sprintf(info->s = cpuintrf_temp_str(), "OV:%X", OV); break;
case CPUINFO_STR_REGISTER + PDP1_PF: sprintf(info->s = cpuintrf_temp_str(), "FLAGS:0%02o", FLAGS); break;
case CPUINFO_STR_REGISTER + PDP1_PF1: sprintf(info->s = cpuintrf_temp_str(), "FLAG1:%X", READFLAG(1)); break;
case CPUINFO_STR_REGISTER + PDP1_PF2: sprintf(info->s = cpuintrf_temp_str(), "FLAG2:%X", READFLAG(2)); break;
case CPUINFO_STR_REGISTER + PDP1_PF3: sprintf(info->s = cpuintrf_temp_str(), "FLAG3:%X", READFLAG(3)); break;
case CPUINFO_STR_REGISTER + PDP1_PF4: sprintf(info->s = cpuintrf_temp_str(), "FLAG4:%X", READFLAG(4)); break;
case CPUINFO_STR_REGISTER + PDP1_PF5: sprintf(info->s = cpuintrf_temp_str(), "FLAG5:%X", READFLAG(5)); break;
case CPUINFO_STR_REGISTER + PDP1_PF6: sprintf(info->s = cpuintrf_temp_str(), "FLAG6:%X", READFLAG(6)); break;
case CPUINFO_STR_REGISTER + PDP1_TA: sprintf(info->s = cpuintrf_temp_str(), "TA:0%06o", pdp1.ta); break;
case CPUINFO_STR_REGISTER + PDP1_TW: sprintf(info->s = cpuintrf_temp_str(), "TW:0%06o", pdp1.tw); break;
case CPUINFO_STR_REGISTER + PDP1_SS: sprintf(info->s = cpuintrf_temp_str(), "SS:0%02o", SENSE_SW); break;
case CPUINFO_STR_REGISTER + PDP1_SS1: sprintf(info->s = cpuintrf_temp_str(), "SENSE1:%X", READSENSE(1)); break;
case CPUINFO_STR_REGISTER + PDP1_SS2: sprintf(info->s = cpuintrf_temp_str(), "SENSE2:%X", READSENSE(2)); break;
case CPUINFO_STR_REGISTER + PDP1_SS3: sprintf(info->s = cpuintrf_temp_str(), "SENSE3:%X", READSENSE(3)); break;
case CPUINFO_STR_REGISTER + PDP1_SS4: sprintf(info->s = cpuintrf_temp_str(), "SENSE4:%X", READSENSE(4)); break;
case CPUINFO_STR_REGISTER + PDP1_SS5: sprintf(info->s = cpuintrf_temp_str(), "SENSE5:%X", READSENSE(5)); break;
case CPUINFO_STR_REGISTER + PDP1_SS6: sprintf(info->s = cpuintrf_temp_str(), "SENSE6:%X", READSENSE(6)); break;
case CPUINFO_STR_REGISTER + PDP1_SNGL_STEP: sprintf(info->s = cpuintrf_temp_str(), "SNGLSTEP:%X", pdp1.sngl_step); break;
case CPUINFO_STR_REGISTER + PDP1_SNGL_INST: sprintf(info->s = cpuintrf_temp_str(), "SNGLINST:%X", pdp1.sngl_inst); break;
case CPUINFO_STR_REGISTER + PDP1_EXTEND_SW: sprintf(info->s = cpuintrf_temp_str(), "EXS:%X", pdp1.extend_sw); break;
case CPUINFO_STR_REGISTER + PDP1_RUN: sprintf(info->s = cpuintrf_temp_str(), "RUN:%X", pdp1.run); break;
case CPUINFO_STR_REGISTER + PDP1_CYC: sprintf(info->s = cpuintrf_temp_str(), "CYC:%X", pdp1.cycle); break;
case CPUINFO_STR_REGISTER + PDP1_DEFER: sprintf(info->s = cpuintrf_temp_str(), "DF:%X", pdp1.defer); break;
case CPUINFO_STR_REGISTER + PDP1_BRK_CTR: sprintf(info->s = cpuintrf_temp_str(), "BRKCTR:%X", pdp1.brk_ctr); break;
case CPUINFO_STR_REGISTER + PDP1_RIM: sprintf(info->s = cpuintrf_temp_str(), "RIM:%X", pdp1.rim); break;
case CPUINFO_STR_REGISTER + PDP1_SBM: sprintf(info->s = cpuintrf_temp_str(), "SBM:%X", pdp1.sbm); break;
case CPUINFO_STR_REGISTER + PDP1_EXD: sprintf(info->s = cpuintrf_temp_str(), "EXD:%X", EXD); break;
case CPUINFO_STR_REGISTER + PDP1_IOC: sprintf(info->s = cpuintrf_temp_str(), "IOC:%X", pdp1.ioc); break;
case CPUINFO_STR_REGISTER + PDP1_IOH: sprintf(info->s = cpuintrf_temp_str(), "IOH:%X", pdp1.ioh); break;
case CPUINFO_STR_REGISTER + PDP1_IOS: sprintf(info->s = cpuintrf_temp_str(), "IOS:%X", pdp1.ios); break;
case CPUINFO_STR_REGISTER + PDP1_PC: sprintf(info->s, "PC:0%06o", PC); break;
case CPUINFO_STR_REGISTER + PDP1_IR: sprintf(info->s, "IR:0%02o", IR); break;
case CPUINFO_STR_REGISTER + PDP1_MB: sprintf(info->s, "MB:0%06o", MB); break;
case CPUINFO_STR_REGISTER + PDP1_MA: sprintf(info->s, "MA:0%06o", MA); break;
case CPUINFO_STR_REGISTER + PDP1_AC: sprintf(info->s, "AC:0%06o", AC); break;
case CPUINFO_STR_REGISTER + PDP1_IO: sprintf(info->s, "IO:0%06o", IO); break;
case CPUINFO_STR_REGISTER + PDP1_OV: sprintf(info->s, "OV:%X", OV); break;
case CPUINFO_STR_REGISTER + PDP1_PF: sprintf(info->s, "FLAGS:0%02o", FLAGS); break;
case CPUINFO_STR_REGISTER + PDP1_PF1: sprintf(info->s, "FLAG1:%X", READFLAG(1)); break;
case CPUINFO_STR_REGISTER + PDP1_PF2: sprintf(info->s, "FLAG2:%X", READFLAG(2)); break;
case CPUINFO_STR_REGISTER + PDP1_PF3: sprintf(info->s, "FLAG3:%X", READFLAG(3)); break;
case CPUINFO_STR_REGISTER + PDP1_PF4: sprintf(info->s, "FLAG4:%X", READFLAG(4)); break;
case CPUINFO_STR_REGISTER + PDP1_PF5: sprintf(info->s, "FLAG5:%X", READFLAG(5)); break;
case CPUINFO_STR_REGISTER + PDP1_PF6: sprintf(info->s, "FLAG6:%X", READFLAG(6)); break;
case CPUINFO_STR_REGISTER + PDP1_TA: sprintf(info->s, "TA:0%06o", pdp1.ta); break;
case CPUINFO_STR_REGISTER + PDP1_TW: sprintf(info->s, "TW:0%06o", pdp1.tw); break;
case CPUINFO_STR_REGISTER + PDP1_SS: sprintf(info->s, "SS:0%02o", SENSE_SW); break;
case CPUINFO_STR_REGISTER + PDP1_SS1: sprintf(info->s, "SENSE1:%X", READSENSE(1)); break;
case CPUINFO_STR_REGISTER + PDP1_SS2: sprintf(info->s, "SENSE2:%X", READSENSE(2)); break;
case CPUINFO_STR_REGISTER + PDP1_SS3: sprintf(info->s, "SENSE3:%X", READSENSE(3)); break;
case CPUINFO_STR_REGISTER + PDP1_SS4: sprintf(info->s, "SENSE4:%X", READSENSE(4)); break;
case CPUINFO_STR_REGISTER + PDP1_SS5: sprintf(info->s, "SENSE5:%X", READSENSE(5)); break;
case CPUINFO_STR_REGISTER + PDP1_SS6: sprintf(info->s, "SENSE6:%X", READSENSE(6)); break;
case CPUINFO_STR_REGISTER + PDP1_SNGL_STEP: sprintf(info->s, "SNGLSTEP:%X", pdp1.sngl_step); break;
case CPUINFO_STR_REGISTER + PDP1_SNGL_INST: sprintf(info->s, "SNGLINST:%X", pdp1.sngl_inst); break;
case CPUINFO_STR_REGISTER + PDP1_EXTEND_SW: sprintf(info->s, "EXS:%X", pdp1.extend_sw); break;
case CPUINFO_STR_REGISTER + PDP1_RUN: sprintf(info->s, "RUN:%X", pdp1.run); break;
case CPUINFO_STR_REGISTER + PDP1_CYC: sprintf(info->s, "CYC:%X", pdp1.cycle); break;
case CPUINFO_STR_REGISTER + PDP1_DEFER: sprintf(info->s, "DF:%X", pdp1.defer); break;
case CPUINFO_STR_REGISTER + PDP1_BRK_CTR: sprintf(info->s, "BRKCTR:%X", pdp1.brk_ctr); break;
case CPUINFO_STR_REGISTER + PDP1_RIM: sprintf(info->s, "RIM:%X", pdp1.rim); break;
case CPUINFO_STR_REGISTER + PDP1_SBM: sprintf(info->s, "SBM:%X", pdp1.sbm); break;
case CPUINFO_STR_REGISTER + PDP1_EXD: sprintf(info->s, "EXD:%X", EXD); break;
case CPUINFO_STR_REGISTER + PDP1_IOC: sprintf(info->s, "IOC:%X", pdp1.ioc); break;
case CPUINFO_STR_REGISTER + PDP1_IOH: sprintf(info->s, "IOH:%X", pdp1.ioh); break;
case CPUINFO_STR_REGISTER + PDP1_IOS: sprintf(info->s, "IOS:%X", pdp1.ios); break;
}
}

108
src/emu/cpu/pdp1/tx0.c
View File

@ -521,24 +521,24 @@ CPU_GET_INFO( tx0_64kw )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Raphael Nabet"); break;
case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "TX-0"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
case CPUINFO_STR_FLAGS: strcpy(info->s = cpuintrf_temp_str(), ""); break;
case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:0%06o", PC); break;
case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s = cpuintrf_temp_str(), "IR:0%02o", IR); break;
case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s = cpuintrf_temp_str(), "MBR:0%06o", MBR); break;
case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s = cpuintrf_temp_str(), "MAR:0%06o", MAR); break;
case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s = cpuintrf_temp_str(), "AC:0%06o", AC); break;
case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s = cpuintrf_temp_str(), "LR:0%06o", LR); break;
case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s = cpuintrf_temp_str(), "XR:0%05o", XR); break;
case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s = cpuintrf_temp_str(), "PF:0%02o", PF); break; break;
case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s = cpuintrf_temp_str(), "TBR:0%06o", tx0.tbr); break;
case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s = cpuintrf_temp_str(), "TAC:0%06o", tx0.tac); break;
case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break; break;
case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", tx0.tbr); break;
case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", tx0.tac); break;
case CPUINFO_STR_REGISTER + TX0_TSS00:
case CPUINFO_STR_REGISTER + TX0_TSS01:
case CPUINFO_STR_REGISTER + TX0_TSS02:
@ -554,17 +554,17 @@ CPU_GET_INFO( tx0_64kw )
case CPUINFO_STR_REGISTER + TX0_TSS14:
case CPUINFO_STR_REGISTER + TX0_TSS15:
case CPUINFO_STR_REGISTER + TX0_TSS16:
case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s = cpuintrf_temp_str(), "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "CMSEL:0%06o", tx0.cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s = cpuintrf_temp_str(), "LRSEL:0%06o", tx0.lr_sel); break;
case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC0:%X", tx0.stop_cyc0); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC1:%X", tx0.stop_cyc1); break;
case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s = cpuintrf_temp_str(), "RUN:%X", tx0.run); break;
case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s = cpuintrf_temp_str(), "RIM:%X", tx0.rim); break;
case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s = cpuintrf_temp_str(), "CYCLE:%X", tx0.cycle); break;
case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s = cpuintrf_temp_str(), "IOH:%X", tx0.ioh); break;
case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s = cpuintrf_temp_str(), "IOS:%X", tx0.ios); break;
case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", tx0.cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", tx0.lr_sel); break;
case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", tx0.stop_cyc0); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", tx0.stop_cyc1); break;
case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", tx0.run); break;
case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", tx0.rim); break;
case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", tx0.cycle); break;
case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", tx0.ioh); break;
case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", tx0.ios); break;
}
}
@ -647,24 +647,24 @@ CPU_GET_INFO( tx0_8kw )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tx0_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "TX-0"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Raphael Nabet"); break;
case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "TX-0"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
case CPUINFO_STR_FLAGS: strcpy(info->s = cpuintrf_temp_str(), ""); break;
case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:0%06o", PC); break;
case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s = cpuintrf_temp_str(), "IR:0%02o", IR); break;
case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s = cpuintrf_temp_str(), "MBR:0%06o", MBR); break;
case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s = cpuintrf_temp_str(), "MAR:0%06o", MAR); break;
case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s = cpuintrf_temp_str(), "AC:0%06o", AC); break;
case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s = cpuintrf_temp_str(), "LR:0%06o", LR); break;
case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s = cpuintrf_temp_str(), "XR:0%05o", XR); break;
case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s = cpuintrf_temp_str(), "PF:0%02o", PF); break; break;
case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s = cpuintrf_temp_str(), "TBR:0%06o", tx0.tbr); break;
case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s = cpuintrf_temp_str(), "TAC:0%06o", tx0.tac); break;
case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break; break;
case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", tx0.tbr); break;
case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", tx0.tac); break;
case CPUINFO_STR_REGISTER + TX0_TSS00:
case CPUINFO_STR_REGISTER + TX0_TSS01:
case CPUINFO_STR_REGISTER + TX0_TSS02:
@ -680,17 +680,17 @@ CPU_GET_INFO( tx0_8kw )
case CPUINFO_STR_REGISTER + TX0_TSS14:
case CPUINFO_STR_REGISTER + TX0_TSS15:
case CPUINFO_STR_REGISTER + TX0_TSS16:
case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s = cpuintrf_temp_str(), "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "CMSEL:0%06o", tx0.cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s = cpuintrf_temp_str(), "LRSEL:0%06o", tx0.lr_sel); break;
case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s = cpuintrf_temp_str(), "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC0:%X", tx0.stop_cyc0); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s = cpuintrf_temp_str(), "STOPCYC1:%X", tx0.stop_cyc1); break;
case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s = cpuintrf_temp_str(), "RUN:%X", tx0.run); break;
case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s = cpuintrf_temp_str(), "RIM:%X", tx0.rim); break;
case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s = cpuintrf_temp_str(), "CYCLE:%X", tx0.cycle); break;
case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s = cpuintrf_temp_str(), "IOH:%X", tx0.ioh); break;
case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s = cpuintrf_temp_str(), "IOS:%X", tx0.ios); break;
case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), tx0.tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", tx0.cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", tx0.lr_sel); break;
case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", tx0.gbl_cm_sel); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", tx0.stop_cyc0); break;
case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", tx0.stop_cyc1); break;
case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", tx0.run); break;
case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", tx0.rim); break;
case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", tx0.cycle); break;
case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", tx0.ioh); break;
case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", tx0.ios); break;
}
}

17
src/emu/cpu/powerpc/ppccom.c
View File

@ -7,6 +7,7 @@
***************************************************************************/
#include "ppccom.h"
#include "cpuexec.h"
#include "mame.h"
#include "deprecat.h"
@ -122,7 +123,7 @@ INLINE void set_xer(powerpc_state *ppc, UINT32 value)
INLINE UINT64 get_timebase(powerpc_state *ppc)
{
return (cpunum_gettotalcycles(ppc->cpunum) - ppc->tb_zero_cycles) / ppc->tb_divisor;
return (cpu_get_total_cycles(Machine->cpu[ppc->cpunum]) - ppc->tb_zero_cycles) / ppc->tb_divisor;
}
@ -132,7 +133,7 @@ INLINE UINT64 get_timebase(powerpc_state *ppc)
INLINE void set_timebase(powerpc_state *ppc, UINT64 newtb)
{
ppc->tb_zero_cycles = activecpu_gettotalcycles() - newtb * ppc->tb_divisor;
ppc->tb_zero_cycles = cpu_get_total_cycles(Machine->activecpu) - newtb * ppc->tb_divisor;
}
@ -143,7 +144,7 @@ INLINE void set_timebase(powerpc_state *ppc, UINT64 newtb)
INLINE UINT32 get_decrementer(powerpc_state *ppc)
{
INT64 cycles_until_zero = ppc->dec_zero_cycles - cpunum_gettotalcycles(ppc->cpunum);
INT64 cycles_until_zero = ppc->dec_zero_cycles - cpu_get_total_cycles(Machine->cpu[ppc->cpunum]);
cycles_until_zero = MAX(cycles_until_zero, 0);
return cycles_until_zero / ppc->tb_divisor;
}
@ -160,13 +161,13 @@ INLINE void set_decrementer(powerpc_state *ppc, UINT32 newdec)
if (PRINTF_DECREMENTER)
{
UINT64 total = cpunum_gettotalcycles(ppc->cpunum);
UINT64 total = cpu_get_total_cycles(Machine->cpu[ppc->cpunum]);
mame_printf_debug("set_decrementer: olddec=%08X newdec=%08X divisor=%d totalcyc=%08X%08X timer=%08X%08X\n",
curdec, newdec, ppc->tb_divisor,
(UINT32)(total >> 32), (UINT32)total, (UINT32)(cycles_until_done >> 32), (UINT32)cycles_until_done);
}
ppc->dec_zero_cycles = cpunum_gettotalcycles(ppc->cpunum) + cycles_until_done;
ppc->dec_zero_cycles = cpu_get_total_cycles(Machine->cpu[ppc->cpunum]) + cycles_until_done;
timer_adjust_oneshot(ppc->decrementer_int_timer, ATTOTIME_IN_CYCLES(cycles_until_done, ppc->cpunum), 0);
if ((INT32)curdec >= 0 && (INT32)newdec < 0)
@ -281,7 +282,7 @@ void ppccom_reset(powerpc_state *ppc)
ppc->msr = MSROEA_IP;
/* reset the decrementer */
ppc->dec_zero_cycles = cpunum_gettotalcycles(ppc->cpunum);
ppc->dec_zero_cycles = cpu_get_total_cycles(Machine->cpu[ppc->cpunum]);
decrementer_int_callback(Machine, ppc, 0);
}
@ -302,7 +303,7 @@ void ppccom_reset(powerpc_state *ppc)
ppc->spr[SPR603_HID0] = 1;
/* time base starts here */
ppc->tb_zero_cycles = cpunum_gettotalcycles(ppc->cpunum);
ppc->tb_zero_cycles = cpu_get_total_cycles(Machine->cpu[ppc->cpunum]);
/* clear interrupts */
ppc->irq_pending = 0;
@ -1256,7 +1257,7 @@ static TIMER_CALLBACK( decrementer_int_callback )
/* advance by another full rev */
ppc->dec_zero_cycles += (UINT64)ppc->tb_divisor << 32;
cycles_until_next = ppc->dec_zero_cycles - cpunum_gettotalcycles(ppc->cpunum);
cycles_until_next = ppc->dec_zero_cycles - cpu_get_total_cycles(machine->cpu[ppc->cpunum]);
timer_adjust_oneshot(ppc->decrementer_int_timer, ATTOTIME_IN_CYCLES(cycles_until_next, ppc->cpunum), 0);
}

1
src/emu/cpu/powerpc/ppccom.h
View File

@ -13,6 +13,7 @@
#include "cpuintrf.h"
#include "ppc.h"
#include "timer.h"
#include "cpu/vtlb.h"

66
src/emu/cpu/saturn/saturn.c
View File

@ -376,39 +376,39 @@ CPU_GET_INFO( saturn )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &saturn_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "Saturn"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "Saturn"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0alpha"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_NAME: strcpy(info->s, "Saturn"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Saturn"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0alpha"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_REGISTER + SATURN_PC: sprintf(info->s = cpuintrf_temp_str(), "PC: %.5x", saturn.pc);break;
case CPUINFO_STR_REGISTER + SATURN_D0: sprintf(info->s = cpuintrf_temp_str(), "D0: %.5x", saturn.d[0]);break;
case CPUINFO_STR_REGISTER + SATURN_D1: sprintf(info->s = cpuintrf_temp_str(), "D1: %.5x", saturn.d[1]);break;
case CPUINFO_STR_REGISTER + SATURN_A: sprintf(info->s = cpuintrf_temp_str(), "A: " Reg64Format, Reg64Data(saturn.reg[A]));break;
case CPUINFO_STR_REGISTER + SATURN_B: sprintf(info->s = cpuintrf_temp_str(), "B: " Reg64Format, Reg64Data(saturn.reg[B]));break;
case CPUINFO_STR_REGISTER + SATURN_C: sprintf(info->s = cpuintrf_temp_str(), "C: " Reg64Format, Reg64Data(saturn.reg[C]));break;
case CPUINFO_STR_REGISTER + SATURN_D: sprintf(info->s = cpuintrf_temp_str(), "D: " Reg64Format, Reg64Data(saturn.reg[D]));break;
case CPUINFO_STR_REGISTER + SATURN_R0: sprintf(info->s = cpuintrf_temp_str(), "R0: " Reg64Format, Reg64Data(saturn.reg[R0]));break;
case CPUINFO_STR_REGISTER + SATURN_R1: sprintf(info->s = cpuintrf_temp_str(), "R1: " Reg64Format, Reg64Data(saturn.reg[R1]));break;
case CPUINFO_STR_REGISTER + SATURN_R2: sprintf(info->s = cpuintrf_temp_str(), "R2: " Reg64Format, Reg64Data(saturn.reg[R2]));break;
case CPUINFO_STR_REGISTER + SATURN_R3: sprintf(info->s = cpuintrf_temp_str(), "R3: " Reg64Format, Reg64Data(saturn.reg[R3]));break;
case CPUINFO_STR_REGISTER + SATURN_R4: sprintf(info->s = cpuintrf_temp_str(), "R4: " Reg64Format, Reg64Data(saturn.reg[R4]));break;
case CPUINFO_STR_REGISTER + SATURN_P: sprintf(info->s = cpuintrf_temp_str(), "P:%x", saturn.p);break;
case CPUINFO_STR_REGISTER + SATURN_OUT: sprintf(info->s = cpuintrf_temp_str(), "OUT:%.3x", saturn.out);break;
case CPUINFO_STR_REGISTER + SATURN_CARRY: sprintf(info->s = cpuintrf_temp_str(), "Carry: %d", saturn.carry);break;
case CPUINFO_STR_REGISTER + SATURN_ST: sprintf(info->s = cpuintrf_temp_str(), "ST:%.4x", saturn.st);break;
case CPUINFO_STR_REGISTER + SATURN_HST: sprintf(info->s = cpuintrf_temp_str(), "HST:%x", saturn.hst);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK0: sprintf(info->s = cpuintrf_temp_str(), "RSTK0:%.5x", saturn.rstk[0]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK1: sprintf(info->s = cpuintrf_temp_str(), "RSTK1:%.5x", saturn.rstk[1]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK2: sprintf(info->s = cpuintrf_temp_str(), "RSTK2:%.5x", saturn.rstk[2]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK3: sprintf(info->s = cpuintrf_temp_str(), "RSTK3:%.5x", saturn.rstk[3]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK4: sprintf(info->s = cpuintrf_temp_str(), "RSTK4:%.5x", saturn.rstk[4]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK5: sprintf(info->s = cpuintrf_temp_str(), "RSTK5:%.5x", saturn.rstk[5]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK6: sprintf(info->s = cpuintrf_temp_str(), "RSTK6:%.5x", saturn.rstk[6]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK7: sprintf(info->s = cpuintrf_temp_str(), "RSTK7:%.5x", saturn.rstk[7]);break;
case CPUINFO_STR_REGISTER + SATURN_IRQ_STATE: sprintf(info->s = cpuintrf_temp_str(), "IRQ:%c%c%c%i", saturn.in_irq?'S':'.', saturn.irq_enable?'e':'.', saturn.pending_irq?'p':'.', saturn.irq_state); break;
case CPUINFO_STR_FLAGS: sprintf(info->s = cpuintrf_temp_str(), "%c%c", saturn.decimal?'D':'.', saturn.carry ? 'C':'.'); break;
case CPUINFO_STR_REGISTER + SATURN_SLEEPING: sprintf(info->s = cpuintrf_temp_str(), "sleep:%c", saturn.sleeping?'S':'.'); break;
case CPUINFO_STR_REGISTER + SATURN_PC: sprintf(info->s, "PC: %.5x", saturn.pc);break;
case CPUINFO_STR_REGISTER + SATURN_D0: sprintf(info->s, "D0: %.5x", saturn.d[0]);break;
case CPUINFO_STR_REGISTER + SATURN_D1: sprintf(info->s, "D1: %.5x", saturn.d[1]);break;
case CPUINFO_STR_REGISTER + SATURN_A: sprintf(info->s, "A: " Reg64Format, Reg64Data(saturn.reg[A]));break;
case CPUINFO_STR_REGISTER + SATURN_B: sprintf(info->s, "B: " Reg64Format, Reg64Data(saturn.reg[B]));break;
case CPUINFO_STR_REGISTER + SATURN_C: sprintf(info->s, "C: " Reg64Format, Reg64Data(saturn.reg[C]));break;
case CPUINFO_STR_REGISTER + SATURN_D: sprintf(info->s, "D: " Reg64Format, Reg64Data(saturn.reg[D]));break;
case CPUINFO_STR_REGISTER + SATURN_R0: sprintf(info->s, "R0: " Reg64Format, Reg64Data(saturn.reg[R0]));break;
case CPUINFO_STR_REGISTER + SATURN_R1: sprintf(info->s, "R1: " Reg64Format, Reg64Data(saturn.reg[R1]));break;
case CPUINFO_STR_REGISTER + SATURN_R2: sprintf(info->s, "R2: " Reg64Format, Reg64Data(saturn.reg[R2]));break;
case CPUINFO_STR_REGISTER + SATURN_R3: sprintf(info->s, "R3: " Reg64Format, Reg64Data(saturn.reg[R3]));break;
case CPUINFO_STR_REGISTER + SATURN_R4: sprintf(info->s, "R4: " Reg64Format, Reg64Data(saturn.reg[R4]));break;
case CPUINFO_STR_REGISTER + SATURN_P: sprintf(info->s, "P:%x", saturn.p);break;
case CPUINFO_STR_REGISTER + SATURN_OUT: sprintf(info->s, "OUT:%.3x", saturn.out);break;
case CPUINFO_STR_REGISTER + SATURN_CARRY: sprintf(info->s, "Carry: %d", saturn.carry);break;
case CPUINFO_STR_REGISTER + SATURN_ST: sprintf(info->s, "ST:%.4x", saturn.st);break;
case CPUINFO_STR_REGISTER + SATURN_HST: sprintf(info->s, "HST:%x", saturn.hst);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK0: sprintf(info->s, "RSTK0:%.5x", saturn.rstk[0]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK1: sprintf(info->s, "RSTK1:%.5x", saturn.rstk[1]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK2: sprintf(info->s, "RSTK2:%.5x", saturn.rstk[2]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK3: sprintf(info->s, "RSTK3:%.5x", saturn.rstk[3]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK4: sprintf(info->s, "RSTK4:%.5x", saturn.rstk[4]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK5: sprintf(info->s, "RSTK5:%.5x", saturn.rstk[5]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK6: sprintf(info->s, "RSTK6:%.5x", saturn.rstk[6]);break;
case CPUINFO_STR_REGISTER + SATURN_RSTK7: sprintf(info->s, "RSTK7:%.5x", saturn.rstk[7]);break;
case CPUINFO_STR_REGISTER + SATURN_IRQ_STATE: sprintf(info->s, "IRQ:%c%c%c%i", saturn.in_irq?'S':'.', saturn.irq_enable?'e':'.', saturn.pending_irq?'p':'.', saturn.irq_state); break;
case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", saturn.decimal?'D':'.', saturn.carry ? 'C':'.'); break;
case CPUINFO_STR_REGISTER + SATURN_SLEEPING: sprintf(info->s, "sleep:%c", saturn.sleeping?'S':'.'); break;
}
}

46
src/emu/cpu/sc61860/sc61860.c
View File

@ -218,32 +218,32 @@ CPU_GET_INFO( sc61860 )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sc61860_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "SC61860"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "SC61860"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0beta"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_NAME: strcpy(info->s, "SC61860"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "SC61860"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0beta"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s = cpuintrf_temp_str(), "%c%c", sc61860.zero?'Z':'.', sc61860.carry ? 'C':'.');
sprintf(info->s, "%c%c", sc61860.zero?'Z':'.', sc61860.carry ? 'C':'.');
break;
case CPUINFO_STR_REGISTER + SC61860_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:%.4x", sc61860.pc);break;
case CPUINFO_STR_REGISTER + SC61860_DP: sprintf(info->s = cpuintrf_temp_str(), "DP:%.4x", sc61860.dp);break;
case CPUINFO_STR_REGISTER + SC61860_P: sprintf(info->s = cpuintrf_temp_str(), "P:%.2x", sc61860.p);break;
case CPUINFO_STR_REGISTER + SC61860_Q: sprintf(info->s = cpuintrf_temp_str(), "Q:%.2x", sc61860.q);break;
case CPUINFO_STR_REGISTER + SC61860_R: sprintf(info->s = cpuintrf_temp_str(), "R:%.2x", sc61860.r);break;
case CPUINFO_STR_REGISTER + SC61860_I: sprintf(info->s = cpuintrf_temp_str(), "I:%.2x", sc61860.ram[I]);break;
case CPUINFO_STR_REGISTER + SC61860_J: sprintf(info->s = cpuintrf_temp_str(), "J:%.2x", sc61860.ram[J]);break;
case CPUINFO_STR_REGISTER + SC61860_K: sprintf(info->s = cpuintrf_temp_str(), "K:%.2x", sc61860.ram[K]);break;
case CPUINFO_STR_REGISTER + SC61860_L: sprintf(info->s = cpuintrf_temp_str(), "L:%.2x", sc61860.ram[L]);break;
case CPUINFO_STR_REGISTER + SC61860_V: sprintf(info->s = cpuintrf_temp_str(), "V:%.2x", sc61860.ram[V]);break;
case CPUINFO_STR_REGISTER + SC61860_W: sprintf(info->s = cpuintrf_temp_str(), "W:%.2x", sc61860.ram[W]);break;
case CPUINFO_STR_REGISTER + SC61860_H: sprintf(info->s = cpuintrf_temp_str(), "W:%.2x", sc61860.h);break;
case CPUINFO_STR_REGISTER + SC61860_BA: sprintf(info->s = cpuintrf_temp_str(), "BA:%.2x%.2x", sc61860.ram[B], sc61860.ram[A]);break;
case CPUINFO_STR_REGISTER + SC61860_X: sprintf(info->s = cpuintrf_temp_str(), "X: %.2x%.2x", sc61860.ram[XH], sc61860.ram[XL]);break;
case CPUINFO_STR_REGISTER + SC61860_Y: sprintf(info->s = cpuintrf_temp_str(), "Y: %.2x%.2x", sc61860.ram[YH], sc61860.ram[YL]);break;
case CPUINFO_STR_REGISTER + SC61860_CARRY: sprintf(info->s = cpuintrf_temp_str(), "Carry: %d", sc61860.carry);break;
case CPUINFO_STR_REGISTER + SC61860_ZERO: sprintf(info->s = cpuintrf_temp_str(), "Zero: %d", sc61860.zero);break;
case CPUINFO_STR_REGISTER + SC61860_PC: sprintf(info->s, "PC:%.4x", sc61860.pc);break;
case CPUINFO_STR_REGISTER + SC61860_DP: sprintf(info->s, "DP:%.4x", sc61860.dp);break;
case CPUINFO_STR_REGISTER + SC61860_P: sprintf(info->s, "P:%.2x", sc61860.p);break;
case CPUINFO_STR_REGISTER + SC61860_Q: sprintf(info->s, "Q:%.2x", sc61860.q);break;
case CPUINFO_STR_REGISTER + SC61860_R: sprintf(info->s, "R:%.2x", sc61860.r);break;
case CPUINFO_STR_REGISTER + SC61860_I: sprintf(info->s, "I:%.2x", sc61860.ram[I]);break;
case CPUINFO_STR_REGISTER + SC61860_J: sprintf(info->s, "J:%.2x", sc61860.ram[J]);break;
case CPUINFO_STR_REGISTER + SC61860_K: sprintf(info->s, "K:%.2x", sc61860.ram[K]);break;
case CPUINFO_STR_REGISTER + SC61860_L: sprintf(info->s, "L:%.2x", sc61860.ram[L]);break;
case CPUINFO_STR_REGISTER + SC61860_V: sprintf(info->s, "V:%.2x", sc61860.ram[V]);break;
case CPUINFO_STR_REGISTER + SC61860_W: sprintf(info->s, "W:%.2x", sc61860.ram[W]);break;
case CPUINFO_STR_REGISTER + SC61860_H: sprintf(info->s, "W:%.2x", sc61860.h);break;
case CPUINFO_STR_REGISTER + SC61860_BA: sprintf(info->s, "BA:%.2x%.2x", sc61860.ram[B], sc61860.ram[A]);break;
case CPUINFO_STR_REGISTER + SC61860_X: sprintf(info->s, "X: %.2x%.2x", sc61860.ram[XH], sc61860.ram[XL]);break;
case CPUINFO_STR_REGISTER + SC61860_Y: sprintf(info->s, "Y: %.2x%.2x", sc61860.ram[YH], sc61860.ram[YL]);break;
case CPUINFO_STR_REGISTER + SC61860_CARRY: sprintf(info->s, "Carry: %d", sc61860.carry);break;
case CPUINFO_STR_REGISTER + SC61860_ZERO: sprintf(info->s, "Zero: %d", sc61860.zero);break;
}
}

5
src/emu/cpu/sh2/sh2comn.c
View File

@ -8,6 +8,7 @@
#include "debugger.h"
#include "deprecat.h"
#include "cpuexec.h"
#include "sh2.h"
#include "sh2comn.h"
@ -59,7 +60,7 @@ INLINE void WL(offs_t A, UINT32 V)
static void sh2_timer_resync(void)
{
int divider = div_tab[(sh2->m[5] >> 8) & 3];
UINT64 cur_time = cpunum_gettotalcycles(sh2->cpu_number);
UINT64 cur_time = cpu_get_total_cycles(Machine->cpu[sh2->cpu_number]);
if(divider)
sh2->frc += (cur_time - sh2->frc_base) >> divider;
@ -96,7 +97,7 @@ static void sh2_timer_activate(void)
int divider = div_tab[(sh2->m[5] >> 8) & 3];
if(divider) {
max_delta <<= divider;
sh2->frc_base = cpunum_gettotalcycles(sh2->cpu_number);
sh2->frc_base = cpu_get_total_cycles(Machine->cpu[sh2->cpu_number]);
timer_adjust_oneshot(sh2->timer, ATTOTIME_IN_CYCLES(max_delta, sh2->cpu_number), sh2->cpu_number);
} else {
logerror("SH2.%d: Timer event in %d cycles of external clock", sh2->cpu_number, max_delta);

2
src/emu/cpu/sh2/sh2comn.h
View File

@ -11,6 +11,8 @@
#ifndef __SH2COMN_H__
#define __SH2COMN_H__
#include "timer.h"
#define USE_SH2DRC
#ifdef USE_SH2DRC

3
src/emu/cpu/sh4/sh4comn.c
View File

@ -8,6 +8,7 @@
#include "debugger.h"
#include "deprecat.h"
#include "cpuexec.h"
#include "sh4.h"
#include "sh4regs.h"
#include "sh4comn.h"
@ -1010,7 +1011,7 @@ void sh4_set_irln_input(int cpunum, int value)
if (sh4.irln == value)
return;
sh4.irln = value;
cpunum_set_input_line(Machine, cpunum, SH4_IRLn, PULSE_LINE);
cpu_set_input_line(Machine->cpu[cpunum], SH4_IRLn, PULSE_LINE);
}
void sh4_set_irq_line(int irqline, int state) // set state of external interrupt line

36
src/emu/cpu/sm8500/sm8500.c
View File

@ -502,13 +502,13 @@ CPU_GET_INFO( sm8500 )
case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sm8500); break;
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sm8500_icount; break;
case CPUINFO_STR_NAME: strcpy( info->s = cpuintrf_temp_str(), "sm8500" ); break;
case CPUINFO_STR_CORE_FAMILY: strcpy( info->s = cpuintrf_temp_str(), "Sharp SM8500" ); break;
case CPUINFO_STR_CORE_VERSION: strcpy( info->s = cpuintrf_temp_str(), "0.1" ); break;
case CPUINFO_STR_CORE_FILE: strcpy( info->s = cpuintrf_temp_str(), __FILE__ ); break;
case CPUINFO_STR_CORE_CREDITS: strcpy( info->s = cpuintrf_temp_str(), "Copyright The MESS Team." ); break;
case CPUINFO_STR_NAME: strcpy( info->s, "sm8500" ); break;
case CPUINFO_STR_CORE_FAMILY: strcpy( info->s, "Sharp SM8500" ); break;
case CPUINFO_STR_CORE_VERSION: strcpy( info->s, "0.1" ); break;
case CPUINFO_STR_CORE_FILE: strcpy( info->s, __FILE__ ); break;
case CPUINFO_STR_CORE_CREDITS: strcpy( info->s, "Copyright The MESS Team." ); break;
case CPUINFO_STR_FLAGS:
sprintf( info->s = cpuintrf_temp_str(), "%c%c%c%c%c%c%c%c",
sprintf( info->s, "%c%c%c%c%c%c%c%c",
regs.PS1 & FLAG_C ? 'C' : '.',
regs.PS1 & FLAG_Z ? 'Z' : '.',
regs.PS1 & FLAG_S ? 'S' : '.',
@ -518,18 +518,18 @@ CPU_GET_INFO( sm8500 )
regs.PS1 & FLAG_B ? 'B' : '.',
regs.PS1 & FLAG_I ? 'I' : '.' );
break;
case CPUINFO_STR_REGISTER + SM8500_RR0: sprintf(info->s = cpuintrf_temp_str(), "RR0:%04X", sm85cpu_mem_readword( 0x00 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR2: sprintf(info->s = cpuintrf_temp_str(), "RR2:%04X", sm85cpu_mem_readword( 0x02 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR4: sprintf(info->s = cpuintrf_temp_str(), "RR4:%04X", sm85cpu_mem_readword( 0x04 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR6: sprintf(info->s = cpuintrf_temp_str(), "RR6:%04X", sm85cpu_mem_readword( 0x06 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR8: sprintf(info->s = cpuintrf_temp_str(), "RR8:%04X", sm85cpu_mem_readword( 0x08 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR10: sprintf(info->s = cpuintrf_temp_str(), "RR10:%04X", sm85cpu_mem_readword( 0x0A ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR12: sprintf(info->s = cpuintrf_temp_str(), "RR12:%04X", sm85cpu_mem_readword( 0x0C ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR14: sprintf(info->s = cpuintrf_temp_str(), "RR14:%04X", sm85cpu_mem_readword( 0x0E ) ); break;
case CPUINFO_STR_REGISTER + SM8500_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:%04X", regs.PC); break;
case CPUINFO_STR_REGISTER + SM8500_SP: sprintf(info->s = cpuintrf_temp_str(), "SP:%04X", regs.SP); break;
case CPUINFO_STR_REGISTER + SM8500_PS: sprintf(info->s = cpuintrf_temp_str(), "PS:%04X", ( regs.PS0 << 8 ) | regs.PS1 ); break;
case CPUINFO_STR_REGISTER + SM8500_SYS16: sprintf(info->s = cpuintrf_temp_str(), "SYS:%04X", regs.SYS ); break;
case CPUINFO_STR_REGISTER + SM8500_RR0: sprintf(info->s, "RR0:%04X", sm85cpu_mem_readword( 0x00 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR2: sprintf(info->s, "RR2:%04X", sm85cpu_mem_readword( 0x02 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR4: sprintf(info->s, "RR4:%04X", sm85cpu_mem_readword( 0x04 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR6: sprintf(info->s, "RR6:%04X", sm85cpu_mem_readword( 0x06 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR8: sprintf(info->s, "RR8:%04X", sm85cpu_mem_readword( 0x08 ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR10: sprintf(info->s, "RR10:%04X", sm85cpu_mem_readword( 0x0A ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR12: sprintf(info->s, "RR12:%04X", sm85cpu_mem_readword( 0x0C ) ); break;
case CPUINFO_STR_REGISTER + SM8500_RR14: sprintf(info->s, "RR14:%04X", sm85cpu_mem_readword( 0x0E ) ); break;
case CPUINFO_STR_REGISTER + SM8500_PC: sprintf(info->s, "PC:%04X", regs.PC); break;
case CPUINFO_STR_REGISTER + SM8500_SP: sprintf(info->s, "SP:%04X", regs.SP); break;
case CPUINFO_STR_REGISTER + SM8500_PS: sprintf(info->s, "PS:%04X", ( regs.PS0 << 8 ) | regs.PS1 ); break;
case CPUINFO_STR_REGISTER + SM8500_SYS16: sprintf(info->s, "SYS:%04X", regs.SYS ); break;
}
}

2
src/emu/cpu/t11/t11dasm.c
View File

@ -19,7 +19,7 @@ static offs_t pcbase;
static unsigned MakeEA (char **ea, int lo, unsigned pc, int width)
{
char *buffer = cpuintrf_temp_str();
static char buffer[32];
int reg, pm;
assert (width == 2 || width == 4);

51
src/emu/cpu/tlcs90/tlcs90.c
View File

@ -8,6 +8,7 @@
#include "debugger.h"
#include "deprecat.h"
#include "cpuexec.h"
#include "tlcs90.h"
typedef struct
@ -2655,7 +2656,7 @@ static CPU_INIT( t90 )
T90.irq_callback = irqcallback;
T90.device = device;
T90.timer_period = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(cpunum_get_active())), 8);
T90.timer_period = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(device->machine->activecpu)), 8);
// Reset registers to their initial values
@ -2792,14 +2793,14 @@ CPU_GET_INFO( tmp90840 )
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMP90840"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "Toshiba TLCS-90"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Luca Elia"); break;
case CPUINFO_STR_NAME: strcpy(info->s, "TMP90840"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Toshiba TLCS-90"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Luca Elia"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s = cpuintrf_temp_str(), "%c%c%c%c%c%c%c%c",
sprintf(info->s, "%c%c%c%c%c%c%c%c",
F & 0x80 ? 'S':'.',
F & 0x40 ? 'Z':'.',
F & 0x20 ? 'I':'.',
@ -2810,21 +2811,21 @@ CPU_GET_INFO( tmp90840 )
F & 0x01 ? 'C':'.');
break;
case CPUINFO_STR_REGISTER + T90_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:%04X", T90.pc.w.l); break;
case CPUINFO_STR_REGISTER + T90_SP: sprintf(info->s = cpuintrf_temp_str(), "SP:%04X", T90.sp.w.l); break;
case CPUINFO_STR_REGISTER + T90_A: sprintf(info->s = cpuintrf_temp_str(), "~A:%02X", T90.af.b.h); break;
case CPUINFO_STR_REGISTER + T90_B: sprintf(info->s = cpuintrf_temp_str(), "~B:%02X", T90.bc.b.h); break;
case CPUINFO_STR_REGISTER + T90_C: sprintf(info->s = cpuintrf_temp_str(), "~C:%02X", T90.bc.b.l); break;
case CPUINFO_STR_REGISTER + T90_D: sprintf(info->s = cpuintrf_temp_str(), "~D:%02X", T90.de.b.h); break;
case CPUINFO_STR_REGISTER + T90_E: sprintf(info->s = cpuintrf_temp_str(), "~E:%02X", T90.de.b.l); break;
case CPUINFO_STR_REGISTER + T90_H: sprintf(info->s = cpuintrf_temp_str(), "~H:%02X", T90.hl.b.h); break;
case CPUINFO_STR_REGISTER + T90_L: sprintf(info->s = cpuintrf_temp_str(), "~L:%02X", T90.hl.b.l); break;
case CPUINFO_STR_REGISTER + T90_AF: sprintf(info->s = cpuintrf_temp_str(), "AF:%04X", T90.af.w.l); break;
case CPUINFO_STR_REGISTER + T90_BC: sprintf(info->s = cpuintrf_temp_str(), "BC:%04X", T90.bc.w.l); break;
case CPUINFO_STR_REGISTER + T90_DE: sprintf(info->s = cpuintrf_temp_str(), "DE:%04X", T90.de.w.l); break;
case CPUINFO_STR_REGISTER + T90_HL: sprintf(info->s = cpuintrf_temp_str(), "HL:%04X", T90.hl.w.l); break;
case CPUINFO_STR_REGISTER + T90_IX: sprintf(info->s = cpuintrf_temp_str(), "IX:%04X", T90.ix.w.l); break;
case CPUINFO_STR_REGISTER + T90_IY: sprintf(info->s = cpuintrf_temp_str(), "IY:%04X", T90.iy.w.l); break;
case CPUINFO_STR_REGISTER + T90_PC: sprintf(info->s, "PC:%04X", T90.pc.w.l); break;
case CPUINFO_STR_REGISTER + T90_SP: sprintf(info->s, "SP:%04X", T90.sp.w.l); break;
case CPUINFO_STR_REGISTER + T90_A: sprintf(info->s, "~A:%02X", T90.af.b.h); break;
case CPUINFO_STR_REGISTER + T90_B: sprintf(info->s, "~B:%02X", T90.bc.b.h); break;
case CPUINFO_STR_REGISTER + T90_C: sprintf(info->s, "~C:%02X", T90.bc.b.l); break;
case CPUINFO_STR_REGISTER + T90_D: sprintf(info->s, "~D:%02X", T90.de.b.h); break;
case CPUINFO_STR_REGISTER + T90_E: sprintf(info->s, "~E:%02X", T90.de.b.l); break;
case CPUINFO_STR_REGISTER + T90_H: sprintf(info->s, "~H:%02X", T90.hl.b.h); break;
case CPUINFO_STR_REGISTER + T90_L: sprintf(info->s, "~L:%02X", T90.hl.b.l); break;
case CPUINFO_STR_REGISTER + T90_AF: sprintf(info->s, "AF:%04X", T90.af.w.l); break;
case CPUINFO_STR_REGISTER + T90_BC: sprintf(info->s, "BC:%04X", T90.bc.w.l); break;
case CPUINFO_STR_REGISTER + T90_DE: sprintf(info->s, "DE:%04X", T90.de.w.l); break;
case CPUINFO_STR_REGISTER + T90_HL: sprintf(info->s, "HL:%04X", T90.hl.w.l); break;
case CPUINFO_STR_REGISTER + T90_IX: sprintf(info->s, "IX:%04X", T90.ix.w.l); break;
case CPUINFO_STR_REGISTER + T90_IY: sprintf(info->s, "IY:%04X", T90.iy.w.l); break;
}
}
@ -2838,7 +2839,7 @@ CPU_GET_INFO( tmp90841 )
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMP90841"); return;
case CPUINFO_STR_NAME: strcpy(info->s, "TMP90841"); return;
}
CPU_GET_INFO_CALL(tmp90840);
@ -2854,7 +2855,7 @@ CPU_GET_INFO( tmp91640 )
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMP91640"); return;
case CPUINFO_STR_NAME: strcpy(info->s, "TMP91640"); return;
}
CPU_GET_INFO_CALL(tmp90840);
@ -2870,7 +2871,7 @@ CPU_GET_INFO( tmp91641 )
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMP91641"); return;
case CPUINFO_STR_NAME: strcpy(info->s, "TMP91641"); return;
}
CPU_GET_INFO_CALL(tmp90840);

2
src/emu/cpu/tms34010/34010ops.c
View File

@ -97,7 +97,7 @@ static void unimpl(tms34010_state *tms, UINT16 op)
/* extra check to prevent bad things */
if (tms->pc == 0 || opcode_table[cpu_readop16(TOBYTE(tms->pc)) >> 4] == unimpl)
{
cpunum_set_input_line(tms->device->machine, cpunum_get_active(), INPUT_LINE_HALT, ASSERT_LINE);
cpu_set_input_line(tms->device, INPUT_LINE_HALT, ASSERT_LINE);
debugger_break(tms->device->machine);
}
}

8
src/emu/cpu/tms34010/tms34010.c
View File

@ -778,7 +778,7 @@ static TIMER_CALLBACK( internal_interrupt_callback )
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] == tms->device)
{
cpu_triggerint(machine, cpunum);
cpu_triggerint(machine->cpu[cpunum]);
break;
}
}
@ -1508,7 +1508,7 @@ READ16_HANDLER( tms34010_io_register_r )
return result;
case REG_REFCNT:
return (activecpu_gettotalcycles() / 16) & 0xfffc;
return (cpu_get_total_cycles(machine->activecpu) / 16) & 0xfffc;
case REG_INTPEND:
result = IOREG(tms, offset);
@ -1554,7 +1554,7 @@ READ16_HANDLER( tms34020_io_register_r )
{
int refreshrate = (IOREG(tms, REG020_CONFIG) >> 8) & 7;
if (refreshrate < 6)
return (activecpu_gettotalcycles() / refreshrate) & 0xffff;
return (cpu_get_total_cycles(machine->activecpu) / refreshrate) & 0xffff;
break;
}
}
@ -1633,7 +1633,7 @@ void tms34010_host_w(const device_config *cpu, int reg, int data)
/* swap back */
cpu_pop_context();
activecpu_reset_banking();
memory_set_opbase(cpu_get_physical_pc_byte(tms->device));
}

37
src/emu/cpu/tms7000/tms7000.c
View File

@ -29,6 +29,7 @@
// SJE: Implemented internal register file
#include "cpuintrf.h"
#include "cpuexec.h"
#include "debugger.h"
#include "tms7000.h"
#include "deprecat.h"
@ -338,14 +339,14 @@ CPU_GET_INFO( tms7000 )
case CPUINFO_PTR_INTERNAL_MEMORY_MAP: info->internal_map8 = ADDRESS_MAP_NAME(tms7000_mem); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "TMS7000"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "Texas Instriuments TMS7000"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "Copyright tim lindner"); break;
case CPUINFO_STR_NAME: strcpy(info->s, "TMS7000"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "Texas Instriuments TMS7000"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.0"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright tim lindner"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s = cpuintrf_temp_str(), "%c%c%c%c%c%c%c%c",
sprintf(info->s, "%c%c%c%c%c%c%c%c",
tms7000.sr & 0x80 ? 'C':'c',
tms7000.sr & 0x40 ? 'N':'n',
tms7000.sr & 0x20 ? 'Z':'z',
@ -356,13 +357,13 @@ CPU_GET_INFO( tms7000 )
tms7000.sr & 0x01 ? '?':'.' );
break;
case CPUINFO_STR_REGISTER + TMS7000_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:%04X", tms7000.pc.w.l); break;
case CPUINFO_STR_REGISTER + TMS7000_SP: sprintf(info->s = cpuintrf_temp_str(), "S:%02X", tms7000.sp); break;
case CPUINFO_STR_REGISTER + TMS7000_ST: sprintf(info->s = cpuintrf_temp_str(), "ST:%02X", tms7000.sr); break;
case CPUINFO_STR_REGISTER + TMS7000_IDLE: sprintf(info->s = cpuintrf_temp_str(), "Idle:%02X", tms7000.idle_state); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_CL: sprintf(info->s = cpuintrf_temp_str(), "T1CL:%02X", tms7000.t1_capture_latch); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_PS: sprintf(info->s = cpuintrf_temp_str(), "T1PS:%02X", tms7000.t1_prescaler & 0x1f); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_DEC: sprintf(info->s = cpuintrf_temp_str(), "T1DEC:%02X", tms7000.t1_decrementer & 0xff); break;
case CPUINFO_STR_REGISTER + TMS7000_PC: sprintf(info->s, "PC:%04X", tms7000.pc.w.l); break;
case CPUINFO_STR_REGISTER + TMS7000_SP: sprintf(info->s, "S:%02X", tms7000.sp); break;
case CPUINFO_STR_REGISTER + TMS7000_ST: sprintf(info->s, "ST:%02X", tms7000.sr); break;
case CPUINFO_STR_REGISTER + TMS7000_IDLE: sprintf(info->s, "Idle:%02X", tms7000.idle_state); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_CL: sprintf(info->s, "T1CL:%02X", tms7000.t1_capture_latch); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_PS: sprintf(info->s, "T1PS:%02X", tms7000.t1_prescaler & 0x1f); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_DEC: sprintf(info->s, "T1DEC:%02X", tms7000.t1_decrementer & 0xff); break;
}
}
@ -562,14 +563,14 @@ static void tms7000_service_timer1( void )
if( --tms7000.t1_decrementer < 0 ) /* Decrement timer1 register and check for underflow */
{
tms7000.t1_decrementer = tms7000.pf[2]; /* Reload decrementer (8 bit) */
cpunum_set_input_line(Machine, cpunum_get_active(), TMS7000_IRQ2_LINE, HOLD_LINE);
//LOG( ("tms7000: trigger int2 (cycles: %d)\t%d\tdelta %d\n", activecpu_gettotalcycles(), activecpu_gettotalcycles() - tick, tms7000_cycles_per_INT2-(activecpu_gettotalcycles() - tick) );
//tick = activecpu_gettotalcycles() );
cpu_set_input_line(Machine->activecpu, TMS7000_IRQ2_LINE, HOLD_LINE);
//LOG( ("tms7000: trigger int2 (cycles: %d)\t%d\tdelta %d\n", cpu_get_total_cycles(machine->activecpu), cpu_get_total_cycles(machine->activecpu) - tick, tms7000_cycles_per_INT2-(cpu_get_total_cycles(machine->activecpu) - tick) );
//tick = cpu_get_total_cycles(machine->activecpu) );
/* Also, cascade out to timer 2 - timer 2 unimplemented */
}
}
// LOG( ( "tms7000: service timer1. 0x%2.2x 0x%2.2x (cycles %d)\t%d\t\n", tms7000.t1_prescaler, tms7000.t1_decrementer, activecpu_gettotalcycles(), activecpu_gettotalcycles() - tick2 ) );
// tick2 = activecpu_gettotalcycles();
// LOG( ( "tms7000: service timer1. 0x%2.2x 0x%2.2x (cycles %d)\t%d\t\n", tms7000.t1_prescaler, tms7000.t1_decrementer, cpu_get_total_cycles(machine->activecpu), cpu_get_total_cycles(machine->activecpu) - tick2 ) );
// tick2 = cpu_get_total_cycles(machine->activecpu);
}
static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */

44
src/emu/cpu/v30mz/v30mz.c
View File

@ -1102,14 +1102,14 @@ CPU_GET_INFO( v30mz )
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s = cpuintrf_temp_str(), "NEC V-Series"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s = cpuintrf_temp_str(), "1.5"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s = cpuintrf_temp_str(), __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s = cpuintrf_temp_str(), "NEC emulator v1.5 by Bryan McPhail"); break;
case CPUINFO_STR_CORE_FAMILY: strcpy(info->s, "NEC V-Series"); break;
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "1.5"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "NEC emulator v1.5 by Bryan McPhail"); break;
case CPUINFO_STR_FLAGS:
flags = CompressFlags();
sprintf(info->s = cpuintrf_temp_str(), "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
flags & 0x8000 ? 'M':'.',
flags & 0x4000 ? '?':'.',
flags & 0x2000 ? '?':'.',
@ -1128,22 +1128,22 @@ CPU_GET_INFO( v30mz )
flags & 0x0001 ? 'C':'.');
break;
case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s = cpuintrf_temp_str(), "PC:%04X", (I.sregs[CS]<<4) + I.ip); break;
case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s = cpuintrf_temp_str(), "IP:%04X", I.ip); break;
case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s = cpuintrf_temp_str(), "SP:%04X", I.regs.w[SP]); break;
case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s = cpuintrf_temp_str(), "F:%04X", CompressFlags()); break;
case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s = cpuintrf_temp_str(), "AW:%04X", I.regs.w[AW]); break;
case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s = cpuintrf_temp_str(), "CW:%04X", I.regs.w[CW]); break;
case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s = cpuintrf_temp_str(), "DW:%04X", I.regs.w[DW]); break;
case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s = cpuintrf_temp_str(), "BW:%04X", I.regs.w[BW]); break;
case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s = cpuintrf_temp_str(), "BP:%04X", I.regs.w[BP]); break;
case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s = cpuintrf_temp_str(), "IX:%04X", I.regs.w[IX]); break;
case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s = cpuintrf_temp_str(), "IY:%04X", I.regs.w[IY]); break;
case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s = cpuintrf_temp_str(), "ES:%04X", I.sregs[ES]); break;
case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s = cpuintrf_temp_str(), "CS:%04X", I.sregs[CS]); break;
case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s = cpuintrf_temp_str(), "SS:%04X", I.sregs[SS]); break;
case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s = cpuintrf_temp_str(), "DS:%04X", I.sregs[DS]); break;
case CPUINFO_STR_REGISTER + NEC_VECTOR: sprintf(info->s = cpuintrf_temp_str(), "V:%02X", I.int_vector); break;
case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%04X", (I.sregs[CS]<<4) + I.ip); break;
case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s, "IP:%04X", I.ip); break;
case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", I.regs.w[SP]); break;
case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s, "F:%04X", CompressFlags()); break;
case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", I.regs.w[AW]); break;
case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", I.regs.w[CW]); break;
case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", I.regs.w[DW]); break;
case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", I.regs.w[BW]); break;
case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", I.regs.w[BP]); break;
case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", I.regs.w[IX]); break;
case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", I.regs.w[IY]); break;
case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "ES:%04X", I.sregs[ES]); break;
case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "CS:%04X", I.sregs[CS]); break;
case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", I.sregs[SS]); break;
case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS:%04X", I.sregs[DS]); break;
case CPUINFO_STR_REGISTER + NEC_VECTOR: sprintf(info->s, "V:%02X", I.int_vector); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_PTR_INIT: info->init = CPU_INIT_NAME(v30mz);
@ -1152,7 +1152,7 @@ CPU_GET_INFO( v30mz )
break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case CPUINFO_STR_NAME: strcpy(info->s = cpuintrf_temp_str(), "V30MZ");
case CPUINFO_STR_NAME: strcpy(info->s, "V30MZ");
break;
}
}

1319
src/emu/cpuexec.c
View File

File diff suppressed because it is too large Load Diff

358
src/emu/cpuexec.h
View File

@ -14,7 +14,7 @@
#ifndef __CPUEXEC_H__
#define __CPUEXEC_H__
#include "memory.h"
#include "cpuintrf.h"
#include "timer.h"
@ -44,235 +44,6 @@ enum
};
/* list of all possible CPUs we might be compiled with */
enum _cpu_type
{
CPU_DUMMY,
CPU_Z80,
CPU_Z180,
CPU_8080,
CPU_8085A,
CPU_M6502,
CPU_M65C02,
CPU_M65SC02,
CPU_M65CE02,
CPU_M6509,
CPU_M6510,
CPU_M6510T,
CPU_M7501,
CPU_M8502,
CPU_N2A03,
CPU_DECO16,
CPU_M4510,
CPU_H6280,
CPU_I8086,
CPU_I8088,
CPU_I80186,
CPU_I80188,
CPU_I80286,
CPU_V20,
CPU_V25,
CPU_V30,
CPU_V33,
CPU_V35,
CPU_V60,
CPU_V70,
CPU_I8035,
CPU_I8048,
CPU_I8648,
CPU_I8748,
CPU_MB8884,
CPU_N7751,
CPU_I8039,
CPU_I8049,
CPU_I8749,
CPU_M58715,
CPU_I8041,
CPU_I8741,
CPU_I8042,
CPU_I8242,
CPU_I8742,
CPU_I8031,
CPU_I8032,
CPU_I8051,
CPU_I8052,
CPU_I8751,
CPU_I8752,
CPU_I80C31,
CPU_I80C32,
CPU_I80C51,
CPU_I80C52,
CPU_I87C51,
CPU_I87C52,
CPU_AT89C4051,
CPU_DS5002FP,
CPU_M6800,
CPU_M6801,
CPU_M6802,
CPU_M6803,
CPU_M6808,
CPU_HD63701,
CPU_NSC8105,
CPU_M6805,
CPU_M68705,
CPU_HD63705,
CPU_HD6309,
CPU_M6809,
CPU_M6809E,
CPU_KONAMI,
CPU_M68000,
CPU_M68008,
CPU_M68010,
CPU_M68EC020,
CPU_M68020,
CPU_M68040,
CPU_T11,
CPU_S2650,
CPU_TMS34010,
CPU_TMS34020,
CPU_TI990_10,
CPU_TMS9900,
CPU_TMS9940,
CPU_TMS9980,
CPU_TMS9985,
CPU_TMS9989,
CPU_TMS9995,
CPU_TMS99100,
CPU_TMS99105A,
CPU_TMS99110A,
CPU_TMS99000,
CPU_Z8000,
CPU_TMS32010,
CPU_TMS32025,
CPU_TMS32026,
CPU_TMS32031,
CPU_TMS32032,
CPU_TMS32051,
CPU_CCPU,
CPU_ADSP2100,
CPU_ADSP2101,
CPU_ADSP2104,
CPU_ADSP2105,
CPU_ADSP2115,
CPU_ADSP2181,
CPU_PSXCPU,
CPU_ASAP,
CPU_UPD7810,
CPU_UPD7807,
CPU_UPD7801,
CPU_UPD78C05,
CPU_UPD78C06,
CPU_JAGUARGPU,
CPU_JAGUARDSP,
CPU_CQUESTSND,
CPU_CQUESTROT,
CPU_CQUESTLIN,
CPU_R3000BE,
CPU_R3000LE,
CPU_R3041BE,
CPU_R3041LE,
CPU_R4600BE,
CPU_R4600LE,
CPU_R4650BE,
CPU_R4650LE,
CPU_R4700BE,
CPU_R4700LE,
CPU_R5000BE,
CPU_R5000LE,
CPU_QED5271BE,
CPU_QED5271LE,
CPU_RM7000BE,
CPU_RM7000LE,
CPU_ARM,
CPU_ARM7,
CPU_SH1,
CPU_SH2,
CPU_SH4,
CPU_DSP32C,
CPU_PIC16C54,
CPU_PIC16C55,
CPU_PIC16C56,
CPU_PIC16C57,
CPU_PIC16C58,
CPU_G65816,
CPU_SPC700,
CPU_E116T,
CPU_E116XT,
CPU_E116XS,
CPU_E116XSR,
CPU_E132N,
CPU_E132T,
CPU_E132XN,
CPU_E132XT,
CPU_E132XS,
CPU_E132XSR,
CPU_GMS30C2116,
CPU_GMS30C2132,
CPU_GMS30C2216,
CPU_GMS30C2232,
CPU_I386,
CPU_I486,
CPU_PENTIUM,
CPU_MEDIAGX,
CPU_I960,
CPU_H83002,
CPU_H83007,
CPU_H83044,
CPU_V810,
CPU_M37702,
CPU_M37710,
CPU_PPC403GA,
CPU_PPC403GCX,
CPU_PPC601,
CPU_PPC602,
CPU_PPC603,
CPU_PPC603E,
CPU_PPC603R,
CPU_PPC604,
CPU_MPC8240,
CPU_SE3208,
CPU_MC68HC11,
CPU_ADSP21062,
CPU_DSP56156,
CPU_RSP,
CPU_ALPHA8201,
CPU_ALPHA8301,
CPU_CDP1802,
CPU_COP420,
CPU_COP421,
CPU_COP410,
CPU_COP411,
CPU_TMP90840,
CPU_TMP90841,
CPU_TMP91640,
CPU_TMP91641,
CPU_APEXC,
CPU_CP1610,
CPU_F8,
CPU_LH5801,
CPU_PDP1,
CPU_SATURN,
CPU_SC61860,
CPU_TX0_64KW,
CPU_TX0_8KW,
CPU_LR35902,
CPU_TMS7000,
CPU_TMS7000_EXL,
CPU_SM8500,
CPU_V30MZ,
CPU_MB8841,
CPU_MB8842,
CPU_MB8843,
CPU_MB8844,
CPU_MB86233,
CPU_SSP1601,
CPU_MINX,
CPU_CXD8661R,
CPU_COUNT
};
typedef enum _cpu_type cpu_type;
/***************************************************************************
TYPE DEFINITIONS
@ -286,10 +57,10 @@ struct _cpu_config
int flags; /* flags; see #defines below */
int clock; /* in Hertz */
const addrmap_token *address_map[ADDRESS_SPACES][2]; /* 2 memory maps per address space */
void (*vblank_interrupt)(running_machine *machine, int cpunum); /* for interrupts tied to VBLANK */
void (*vblank_interrupt)(const device_config *device); /* for interrupts tied to VBLANK */
int vblank_interrupts_per_frame;/* usually 1 */
const char * vblank_interrupt_screen; /* the screen that causes the VBLANK interrupt */
void (*timed_interrupt)(running_machine *machine, int cpunum); /* for interrupts not tied to VBLANK */
void (*timed_interrupt)(const device_config *device); /* for interrupts not tied to VBLANK */
attoseconds_t timed_interrupt_period; /* period for periodic interrupts */
const void * reset_param; /* parameter for cpu_reset */
const char * tag;
@ -297,6 +68,14 @@ struct _cpu_config
/***************************************************************************
MACROS
***************************************************************************/
#define INTERRUPT_GEN(func) void func(const device_config *device)
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
@ -310,91 +89,136 @@ void cpuexec_init(running_machine *machine);
/* execute for a single timeslice */
void cpuexec_timeslice(running_machine *machine);
/* temporarily boosts the interleave factor */
void cpuexec_boost_interleave(running_machine *machine, attotime timeslice_time, attotime boost_duration);
/* return a pointer to the given CPU by tag */
const device_config *cputag_get_cpu(running_machine *machine, const char *tag);
/* ----- CPU scheduling----- */
/* temporarily boosts the interleave factor */
void cpu_boost_interleave(running_machine *machine, attotime timeslice_time, attotime boost_duration);
/* aborts the timeslice for the active CPU */
void activecpu_abort_timeslice(void);
/* suspend the given CPU for a specific reason */
void cpunum_suspend(int cpunum, int reason, int eatcycles);
void cpu_suspend(const device_config *device, int reason, int eatcycles);
/* resume the given CPU for a specific reason */
void cpunum_resume(int cpunum, int reason);
void cpu_resume(const device_config *device, int reason);
/* returns true if the given CPU is suspended for any of the given reasons */
int cpunum_is_suspended(int cpunum, int reason);
int cpu_is_suspended(const device_config *device, int reason);
/* ----- CPU clock management ----- */
/* returns the current CPU's unscaled running clock speed */
int cpunum_get_clock(int cpunum);
int cpu_get_clock(const device_config *device);
/* sets the current CPU's clock speed and then adjusts for scaling */
void cpunum_set_clock(running_machine *machine, int cpunum, int clock);
void cpu_set_clock(const device_config *device, int clock);
/* returns the current scaling factor for a CPU's clock speed */
double cpunum_get_clockscale(int cpunum);
double cpu_get_clockscale(const device_config *device);
/* sets the current scaling factor for a CPU's clock speed */
void cpunum_set_clockscale(running_machine *machine, int cpunum, double clockscale);
void cpu_set_clockscale(const device_config *device, double clockscale);
/* ----- CPU timing ----- */
/* returns the current local time for a CPU */
attotime cpunum_get_localtime(int cpunum);
/* returns the total number of CPU cycles */
UINT64 activecpu_gettotalcycles(void);
attotime cpu_get_local_time(const device_config *device);
/* returns the total number of CPU cycles for a given CPU */
UINT64 cpunum_gettotalcycles(int cpunum);
UINT64 cpu_get_total_cycles(const device_config *device);
/* safely eats cycles so we don't cross a timeslice boundary */
void activecpu_eat_cycles(int cycles);
void cpu_eat_cycles(const device_config *device, int cycles);
/* apply a +/- to the current icount */
void cpu_adjust_icount(const device_config *device, int delta);
/* aborts the timeslice for the active CPU */
void cpu_abort_timeslice(const device_config *device);
/* ----- synchronization helpers ----- */
/* yield our current timeslice */
void cpu_yield(void);
/* yield the given CPU until the end of the current timeslice */
void cpu_yield(const device_config *device);
/* burn CPU cycles until our timeslice is up */
void cpu_spin(void);
/* burn CPU cycles until the end of the current timeslice */
void cpu_spin(const device_config *device);
/* burn CPU cycles until a timer trigger */
void cpu_spinuntil_trigger(int trigger);
/* burn specified CPU cycles until a timer trigger */
void cpunum_spinuntil_trigger(int cpunum, int trigger);
/* burn specified CPU cycles until a trigger */
void cpu_spinuntil_trigger(const device_config *device, int trigger);
/* burn CPU cycles until the next interrupt */
void cpu_spinuntil_int(void);
void cpu_spinuntil_int(const device_config *device);
/* burn CPU cycles for a specific period of time */
void cpu_spinuntil_time(attotime duration);
void cpu_spinuntil_time(const device_config *device, attotime duration);
/* ----- triggers ----- */
/* generate a trigger now */
void cpu_trigger(running_machine *machine, int trigger);
/* generate a global trigger now */
void cpuexec_trigger(running_machine *machine, int trigger);
/* generate a trigger after a specific period of time */
void cpu_triggertime(attotime duration, int trigger);
/* generate a global trigger after a specific period of time */
void cpuexec_triggertime(running_machine *machine, int trigger, attotime duration);
/* generate a trigger corresponding to an interrupt on the given CPU */
void cpu_triggerint(running_machine *machine, int cpunum);
void cpu_triggerint(const device_config *device);
/* ----- interrupts ----- */
/* set the logical state (ASSERT_LINE/CLEAR_LINE) of the an input line on a CPU */
void cpu_set_input_line(const device_config *cpu, int line, int state);
/* set the vector to be returned during a CPU's interrupt acknowledge cycle */
void cpu_set_input_line_vector(const device_config *cpu, int irqline, int vector);
/* set the logical state (ASSERT_LINE/CLEAR_LINE) of the an input line on a CPU and its associated vector */
void cpu_set_input_line_and_vector(const device_config *cpu, int line, int state, int vector);
/* install a driver-specific callback for IRQ acknowledge */
void cpu_set_irq_callback(const device_config *cpu, cpu_irq_callback callback);
/***************************************************************************
INLINE FUNCTIONS
***************************************************************************/
/*-------------------------------------------------
cputag_set_input_line - set the logical state
(ASSERT_LINE/CLEAR_LINE) of an input line
on a CPU specified by machine/tag
-------------------------------------------------*/
INLINE void cputag_set_input_line(running_machine *machine, const char *tag, int line, int state)
{
cpu_set_input_line(cputag_get_cpu(machine, tag), line, state);
}
/*-------------------------------------------------
cputag_set_input_line_and_vector - set the
logical state (ASSERT_LINE/CLEAR_LINE) of an
input line on a CPU and its associated vector
-------------------------------------------------*/
INLINE void cputag_set_input_line_and_vector(running_machine *machine, const char *tag, int line, int state, int vector)
{
cpu_set_input_line_and_vector(cputag_get_cpu(machine, tag), line, state, vector);
}

434
src/emu/cpuint.c
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@ -1,434 +0,0 @@
/***************************************************************************
cpuint.c
Core multi-CPU interrupt engine.
Copyright Nicola Salmoria and the MAME Team.
Visit http://mamedev.org for licensing and usage restrictions.
***************************************************************************/
#include "driver.h"
#include "deprecat.h"
#include "debug/debugcpu.h"
/*************************************
*
* Debug logging
*
*************************************/
#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/*************************************
*
* CPU interrupt variables
*
*************************************/
/* current states for each CPU */
static INT32 interrupt_vector[MAX_CPU][MAX_INPUT_LINES];
/* deferred states written in callbacks */
static UINT8 input_line_state[MAX_CPU][MAX_INPUT_LINES];
static INT32 input_line_vector[MAX_CPU][MAX_INPUT_LINES];
/* ick, interrupt event queues */
#define MAX_INPUT_EVENTS 32
static INT32 input_event_queue[MAX_CPU][MAX_INPUT_LINES][MAX_INPUT_EVENTS];
static int input_event_index[MAX_CPU][MAX_INPUT_LINES];
/*************************************
*
* IRQ acknowledge callbacks
*
*************************************/
static int cpu_0_irq_callback(const device_config *device, int line);
static int cpu_1_irq_callback(const device_config *device, int line);
static int cpu_2_irq_callback(const device_config *device, int line);
static int cpu_3_irq_callback(const device_config *device, int line);
static int cpu_4_irq_callback(const device_config *device, int line);
static int cpu_5_irq_callback(const device_config *device, int line);
static int cpu_6_irq_callback(const device_config *device, int line);
static int cpu_7_irq_callback(const device_config *device, int line);
cpu_irq_callback cpu_irq_callbacks[MAX_CPU] =
{
cpu_0_irq_callback,
cpu_1_irq_callback,
cpu_2_irq_callback,
cpu_3_irq_callback,
cpu_4_irq_callback,
cpu_5_irq_callback,
cpu_6_irq_callback,
cpu_7_irq_callback
};
static int (*drv_irq_callbacks[MAX_CPU])(running_machine *, int);
#if 0
#pragma mark CORE CPU
#endif
/*************************************
*
* Initialize a CPU's interrupt states
*
*************************************/
void cpuint_init(running_machine *machine)
{
int cpunum;
int line;
/* loop over all CPUs and input lines */
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
{
/* reset any driver hooks into the IRQ acknowledge callbacks */
drv_irq_callbacks[cpunum] = NULL;
/* clear out all the CPU states */
for (line = 0; line < MAX_INPUT_LINES; line++)
{
input_line_state[cpunum][line] = CLEAR_LINE;
interrupt_vector[cpunum][line] =
input_line_vector[cpunum][line] = cputype_default_irq_vector(machine->config->cpu[cpunum].type);
input_event_index[cpunum][line] = 0;
}
}
/* set up some stuff to save */
state_save_push_tag(0);
state_save_register_item_2d_array("cpu", 0, interrupt_vector);
state_save_register_item_2d_array("cpu", 0, input_line_state);
state_save_register_item_2d_array("cpu", 0, input_line_vector);
state_save_pop_tag();
}
/*************************************
*
* Reset a CPU's interrupt states
*
*************************************/
void cpuint_reset(running_machine *machine)
{
int cpunum, line;
/* loop over CPUs */
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
for (line = 0; line < MAX_INPUT_LINES; line++)
{
interrupt_vector[cpunum][line] = cpu_get_default_irq_vector(machine->cpu[cpunum]);
input_event_index[cpunum][line] = 0;
}
}
#if 0
#pragma mark -
#pragma mark LINE STATES
#endif
/*************************************
*
* Empty a CPU's event queue for
* a specific input line
*
*************************************/
static TIMER_CALLBACK( cpunum_empty_event_queue )
{
int cpunum = param & 0xff;
int line = param >> 8;
int i;
/* swap to the CPU's context */
cpu_push_context(machine->cpu[cpunum]);
/* loop over all events */
for (i = 0; i < input_event_index[cpunum][line]; i++)
{
INT32 input_event = input_event_queue[cpunum][line][i];
int state = input_event & 0xff;
int vector = input_event >> 8;
LOG(("cpunum_empty_event_queue %d,%d,%d\n",cpunum,line,state));
/* set the input line state and vector */
input_line_state[cpunum][line] = state;
input_line_vector[cpunum][line] = vector;
/* special case: RESET */
if (line == INPUT_LINE_RESET)
{
/* if we're asserting the line, just halt the CPU */
if (state == ASSERT_LINE)
cpunum_suspend(cpunum, SUSPEND_REASON_RESET, 1);
else
{
/* if we're clearing the line that was previously asserted, or if we're just */
/* pulsing the line, reset the CPU */
if ((state == CLEAR_LINE && cpunum_is_suspended(cpunum, SUSPEND_REASON_RESET)) || state == PULSE_LINE)
cpu_reset(machine->cpu[cpunum]);
/* if we're clearing the line, make sure the CPU is not halted */
cpunum_resume(cpunum, SUSPEND_REASON_RESET);
}
}
/* special case: HALT */
else if (line == INPUT_LINE_HALT)
{
/* if asserting, halt the CPU */
if (state == ASSERT_LINE)
cpunum_suspend(cpunum, SUSPEND_REASON_HALT, 1);
/* if clearing, unhalt the CPU */
else if (state == CLEAR_LINE)
cpunum_resume(cpunum, SUSPEND_REASON_HALT);
}
/* all other cases */
else
{
/* switch off the requested state */
switch (state)
{
case PULSE_LINE:
/* temporary: PULSE_LINE only makes sense for NMI lines on Z80 */
assert(machine->config->cpu[cpunum].type != CPU_Z80 || line == INPUT_LINE_NMI);
cpu_set_info_int(machine->activecpu, CPUINFO_INT_INPUT_STATE + line, ASSERT_LINE);
cpu_set_info_int(machine->activecpu, CPUINFO_INT_INPUT_STATE + line, CLEAR_LINE);
break;
case HOLD_LINE:
case ASSERT_LINE:
cpu_set_info_int(machine->activecpu, CPUINFO_INT_INPUT_STATE + line, ASSERT_LINE);
break;
case CLEAR_LINE:
cpu_set_info_int(machine->activecpu, CPUINFO_INT_INPUT_STATE + line, CLEAR_LINE);
break;
default:
logerror("cpunum_empty_event_queue cpu #%d, line %d, unknown state %d\n", cpunum, line, state);
}
/* generate a trigger to unsuspend any CPUs waiting on the interrupt */
if (state != CLEAR_LINE)
cpu_triggerint(machine, cpunum);
}
}
/* swap back */
cpu_pop_context();
/* reset counter */
input_event_index[cpunum][line] = 0;
}
/*************************************
*
* Set the state of a CPU's input
* line
*
*************************************/
void cpunum_set_input_line(running_machine *machine, int cpunum, int line, int state)
{
int vector = (line >= 0 && line < MAX_INPUT_LINES) ? interrupt_vector[cpunum][line] : 0xff;
cpunum_set_input_line_and_vector(machine, cpunum, line, state, vector);
}
void cputag_set_input_line(running_machine *machine, const char *tag, int line, int state)
{
int cpunum = mame_find_cpu_index(machine, tag);
assert(cpunum != -1);
cpunum_set_input_line(machine, cpunum, line, state);
}
void cpunum_set_input_line_vector(int cpunum, int line, int vector)
{
if (cpunum < cpu_gettotalcpu() && line >= 0 && line < MAX_INPUT_LINES)
{
LOG(("cpunum_set_input_line_vector(%d,%d,$%04x)\n",cpunum,line,vector));
interrupt_vector[cpunum][line] = vector;
return;
}
LOG(("cpunum_set_input_line_vector CPU#%d line %d > max input lines\n", cpunum, line));
}
void cpunum_set_input_line_and_vector(running_machine *machine, int cpunum, int line, int state, int vector)
{
#ifdef MAME_DEBUG
/* catch errors where people use PULSE_LINE for CPUs that don't support it */
if (state == PULSE_LINE && line != INPUT_LINE_NMI && line != INPUT_LINE_RESET)
{
switch (machine->config->cpu[cpunum].type)
{
case CPU_Z80:
case CPU_Z180:
case CPU_M68000:
case CPU_M68008:
case CPU_M68010:
case CPU_M68EC020:
case CPU_M68020:
case CPU_M68040:
case CPU_R4600BE:
case CPU_R4600LE:
case CPU_R4650BE:
case CPU_R4650LE:
case CPU_R4700BE:
case CPU_R4700LE:
case CPU_R5000BE:
case CPU_R5000LE:
case CPU_QED5271BE:
case CPU_QED5271LE:
case CPU_RM7000BE:
case CPU_RM7000LE:
case CPU_PPC403GA:
case CPU_PPC403GCX:
case CPU_PPC601:
case CPU_PPC602:
case CPU_PPC603:
case CPU_PPC603E:
case CPU_PPC603R:
case CPU_PPC604:
case CPU_I8035:
case CPU_I8041:
case CPU_I8048:
case CPU_I8648:
case CPU_I8748:
case CPU_MB8884:
case CPU_N7751:
case CPU_TMS34010:
case CPU_TMS34020:
case CPU_TMS32010:
case CPU_TMS32025:
case CPU_TMS32026:
fatalerror("CPU %s: PULSE_LINE used with level-detected IRQ %d\n", machine->config->cpu[cpunum].tag, line);
break;
default:
break;
}
}
#endif
if (line >= 0 && line < MAX_INPUT_LINES)
{
INT32 input_event = (state & 0xff) | (vector << 8);
int event_index = input_event_index[cpunum][line]++;
LOG(("cpunum_set_input_line_and_vector(%d,%d,%d,%02x)\n", cpunum, line, state, vector));
/* if we're full of events, flush the queue and log a message */
if (event_index >= MAX_INPUT_EVENTS)
{
input_event_index[cpunum][line]--;
cpunum_empty_event_queue(machine, NULL, cpunum | (line << 8));
event_index = input_event_index[cpunum][line]++;
logerror("Exceeded pending input line event queue on CPU %d!\n", cpunum);
}
/* enqueue the event */
if (event_index < MAX_INPUT_EVENTS)
{
input_event_queue[cpunum][line][event_index] = input_event;
/* if this is the first one, set the timer */
if (event_index == 0)
timer_call_after_resynch(NULL, cpunum | (line << 8), cpunum_empty_event_queue);
}
}
}
void cputag_set_input_line_and_vector(running_machine *machine, const char *tag, int line, int state, int vector)
{
int cpunum = mame_find_cpu_index(machine, tag);
assert(cpunum != -1);
cpunum_set_input_line_and_vector(machine, cpunum, line, state, vector);
}
#if 0
#pragma mark -
#pragma mark INTERRUPT HANDLING
#endif
/*************************************
*
* Set IRQ callback for drivers
*
*************************************/
void cpunum_set_irq_callback(int cpunum, int (*callback)(running_machine *, int))
{
drv_irq_callbacks[cpunum] = callback;
}
/*************************************
*
* Internal IRQ callbacks
*
*************************************/
INLINE int generic_irq_callback(running_machine *machine, int cpunum, int line)
{
int vector = input_line_vector[cpunum][line];
LOG(("cpu_%d_irq_callback(%d) $%04x\n", cpunum, line, vector));
/* if the IRQ state is HOLD_LINE, clear it */
if (input_line_state[cpunum][line] == HOLD_LINE)
{
LOG(("->set_irq_line(%d,%d,%d)\n", cpunum, line, CLEAR_LINE));
cpu_set_info_int(machine->activecpu, CPUINFO_INT_INPUT_STATE + line, CLEAR_LINE);
input_line_state[cpunum][line] = CLEAR_LINE;
}
/* if there's a driver callback, run it */
if (drv_irq_callbacks[cpunum])
vector = (*drv_irq_callbacks[cpunum])(machine, line);
/* notify the debugger */
debug_cpu_interrupt_hook(machine, cpunum, line);
/* otherwise, just return the current vector */
return vector;
}
static int cpu_0_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 0, line); }
static int cpu_1_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 1, line); }
static int cpu_2_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 2, line); }
static int cpu_3_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 3, line); }
static int cpu_4_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 4, line); }
static int cpu_5_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 5, line); }
static int cpu_6_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 6, line); }
static int cpu_7_irq_callback(const device_config *device, int line) { return generic_irq_callback(device->machine, 7, line); }

57
src/emu/cpuint.h
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@ -1,57 +0,0 @@
/***************************************************************************
cpuint.h
Core multi-CPU interrupt engine.
Copyright Nicola Salmoria and the MAME Team.
Visit http://mamedev.org for licensing and usage restrictions.
***************************************************************************/
#pragma once
#ifndef __CPUINT_H__
#define __CPUINT_H__
#include "memory.h"
#define INTERRUPT_GEN(func) void func(running_machine *machine, int cpunum)
#define IRQ_CALLBACK(func) int func(running_machine *machine, int irqline)
/*************************************
*
* Startup/shutdown
*
*************************************/
void cpuint_init(running_machine *machine);
void cpuint_reset(running_machine *machine);
/*************************************
*
* CPU lines
*
*************************************/
/* Set the logical state (ASSERT_LINE/CLEAR_LINE) of the an input line on a CPU */
void cpunum_set_input_line(running_machine *machine, int cpunum, int line, int state);
void cputag_set_input_line(running_machine *machine, const char *tag, int line, int state);
/* Set the vector to be returned during a CPU's interrupt acknowledge cycle */
void cpunum_set_input_line_vector(int cpunum, int irqline, int vector);
/* Set the logical state (ASSERT_LINE/CLEAR_LINE) of the an input line on a CPU and its associated vector */
void cpunum_set_input_line_and_vector(running_machine *machine, int cpunum, int line, int state, int vector);
void cputag_set_input_line_and_vector(running_machine *machine, const char *tag, int line, int state, int vector);
/* Install a driver callback for IRQ acknowledge */
void cpunum_set_irq_callback(int cpunum, int (*callback)(running_machine *machine, int irqline));
#endif /* __CPUINT_H__ */

850
src/emu/cpuintrf.c
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File diff suppressed because it is too large Load Diff

554
src/emu/cpuintrf.h
View File

@ -15,8 +15,7 @@
#define __CPUINTRF_H__
#include "devintrf.h"
#include "cpuint.h"
#include "cpuexec.h"
#include "memory.h"
#include "watchdog.h"
#include "state.h"
@ -26,6 +25,7 @@
***************************************************************************/
#define MAX_CPU 8
#define MAX_INPUT_EVENTS 32
/* Interrupt line constants */
@ -114,7 +114,7 @@ enum
CPUINFO_PTR_SET_INFO = CPUINFO_PTR_FIRST, /* R/O: void (*set_info)(UINT32 state, INT64 data, void *ptr) */
CPUINFO_PTR_GET_CONTEXT, /* R/O: void (*get_context)(void *buffer) */
CPUINFO_PTR_SET_CONTEXT, /* R/O: void (*set_context)(void *buffer) */
CPUINFO_PTR_INIT, /* R/O: void (*init)(int index, int clock, int (*irqcallback)(int)) */
CPUINFO_PTR_INIT, /* R/O: void (*init)(int index, int clock, int (*irqcallback)(const device_config *device, int)) */
CPUINFO_PTR_RESET, /* R/O: void (*reset)(void) */
CPUINFO_PTR_EXIT, /* R/O: void (*exit)(void) */
CPUINFO_PTR_EXECUTE, /* R/O: int (*execute)(int cycles) */
@ -201,11 +201,242 @@ enum
#define DASMFLAG_STEP_OVER_EXTRA(x) ((x) << DASMFLAG_OVERINSTSHIFT)
/* list of all possible CPUs we might be compiled with */
enum _cpu_type
{
CPU_DUMMY,
CPU_Z80,
CPU_Z180,
CPU_8080,
CPU_8085A,
CPU_M6502,
CPU_M65C02,
CPU_M65SC02,
CPU_M65CE02,
CPU_M6509,
CPU_M6510,
CPU_M6510T,
CPU_M7501,
CPU_M8502,
CPU_N2A03,
CPU_DECO16,
CPU_M4510,
CPU_H6280,
CPU_I8086,
CPU_I8088,
CPU_I80186,
CPU_I80188,
CPU_I80286,
CPU_V20,
CPU_V25,
CPU_V30,
CPU_V33,
CPU_V35,
CPU_V60,
CPU_V70,
CPU_I8035,
CPU_I8048,
CPU_I8648,
CPU_I8748,
CPU_MB8884,
CPU_N7751,
CPU_I8039,
CPU_I8049,
CPU_I8749,
CPU_M58715,
CPU_I8041,
CPU_I8741,
CPU_I8042,
CPU_I8242,
CPU_I8742,
CPU_I8031,
CPU_I8032,
CPU_I8051,
CPU_I8052,
CPU_I8751,
CPU_I8752,
CPU_I80C31,
CPU_I80C32,
CPU_I80C51,
CPU_I80C52,
CPU_I87C51,
CPU_I87C52,
CPU_AT89C4051,
CPU_DS5002FP,
CPU_M6800,
CPU_M6801,
CPU_M6802,
CPU_M6803,
CPU_M6808,
CPU_HD63701,
CPU_NSC8105,
CPU_M6805,
CPU_M68705,
CPU_HD63705,
CPU_HD6309,
CPU_M6809,
CPU_M6809E,
CPU_KONAMI,
CPU_M68000,
CPU_M68008,
CPU_M68010,
CPU_M68EC020,
CPU_M68020,
CPU_M68040,
CPU_T11,
CPU_S2650,
CPU_TMS34010,
CPU_TMS34020,
CPU_TI990_10,
CPU_TMS9900,
CPU_TMS9940,
CPU_TMS9980,
CPU_TMS9985,
CPU_TMS9989,
CPU_TMS9995,
CPU_TMS99100,
CPU_TMS99105A,
CPU_TMS99110A,
CPU_TMS99000,
CPU_Z8000,
CPU_TMS32010,
CPU_TMS32025,
CPU_TMS32026,
CPU_TMS32031,
CPU_TMS32032,
CPU_TMS32051,
CPU_CCPU,
CPU_ADSP2100,
CPU_ADSP2101,
CPU_ADSP2104,
CPU_ADSP2105,
CPU_ADSP2115,
CPU_ADSP2181,
CPU_PSXCPU,
CPU_ASAP,
CPU_UPD7810,
CPU_UPD7807,
CPU_UPD7801,
CPU_UPD78C05,
CPU_UPD78C06,
CPU_JAGUARGPU,
CPU_JAGUARDSP,
CPU_CQUESTSND,
CPU_CQUESTROT,
CPU_CQUESTLIN,
CPU_R3000BE,
CPU_R3000LE,
CPU_R3041BE,
CPU_R3041LE,
CPU_R4600BE,
CPU_R4600LE,
CPU_R4650BE,
CPU_R4650LE,
CPU_R4700BE,
CPU_R4700LE,
CPU_R5000BE,
CPU_R5000LE,
CPU_QED5271BE,
CPU_QED5271LE,
CPU_RM7000BE,
CPU_RM7000LE,
CPU_ARM,
CPU_ARM7,
CPU_SH1,
CPU_SH2,
CPU_SH4,
CPU_DSP32C,
CPU_PIC16C54,
CPU_PIC16C55,
CPU_PIC16C56,
CPU_PIC16C57,
CPU_PIC16C58,
CPU_G65816,
CPU_SPC700,
CPU_E116T,
CPU_E116XT,
CPU_E116XS,
CPU_E116XSR,
CPU_E132N,
CPU_E132T,
CPU_E132XN,
CPU_E132XT,
CPU_E132XS,
CPU_E132XSR,
CPU_GMS30C2116,
CPU_GMS30C2132,
CPU_GMS30C2216,
CPU_GMS30C2232,
CPU_I386,
CPU_I486,
CPU_PENTIUM,
CPU_MEDIAGX,
CPU_I960,
CPU_H83002,
CPU_H83007,
CPU_H83044,
CPU_V810,
CPU_M37702,
CPU_M37710,
CPU_PPC403GA,
CPU_PPC403GCX,
CPU_PPC601,
CPU_PPC602,
CPU_PPC603,
CPU_PPC603E,
CPU_PPC603R,
CPU_PPC604,
CPU_MPC8240,
CPU_SE3208,
CPU_MC68HC11,
CPU_ADSP21062,
CPU_DSP56156,
CPU_RSP,
CPU_ALPHA8201,
CPU_ALPHA8301,
CPU_CDP1802,
CPU_COP420,
CPU_COP421,
CPU_COP410,
CPU_COP411,
CPU_TMP90840,
CPU_TMP90841,
CPU_TMP91640,
CPU_TMP91641,
CPU_APEXC,
CPU_CP1610,
CPU_F8,
CPU_LH5801,
CPU_PDP1,
CPU_SATURN,
CPU_SC61860,
CPU_TX0_64KW,
CPU_TX0_8KW,
CPU_LR35902,
CPU_TMS7000,
CPU_TMS7000_EXL,
CPU_SM8500,
CPU_V30MZ,
CPU_MB8841,
CPU_MB8842,
CPU_MB8843,
CPU_MB8844,
CPU_MB86233,
CPU_SSP1601,
CPU_MINX,
CPU_CXD8661R,
CPU_COUNT
};
typedef enum _cpu_type cpu_type;
/***************************************************************************
MACROS
***************************************************************************/
#define IRQ_CALLBACK(func) int func(const device_config *device, int irqline)
#define CPU_GET_INFO_NAME(name) cpu_get_info_##name
#define CPU_GET_INFO(name) void CPU_GET_INFO_NAME(name)(const device_config *device, UINT32 state, cpuinfo *info)
#define CPU_GET_INFO_CALL(name) CPU_GET_INFO_NAME(name)(device, state, info)
@ -271,6 +502,64 @@ enum
#define CPU_SET_CONTEXT_CALL(name) CPU_SET_CONTEXT_NAME(name)(buffer)
/* helpers for accessing common CPU state */
#define cpu_get_context_size(cpu) cpu_get_info_int(cpu, CPUINFO_INT_CONTEXT_SIZE)
#define cpu_get_input_lines(cpu) cpu_get_info_int(cpu, CPUINFO_INT_INPUT_LINES)
#define cpu_get_output_lines(cpu) cpu_get_info_int(cpu, CPUINFO_INT_OUTPUT_LINES)
#define cpu_get_default_irq_vector(cpu) cpu_get_info_int(cpu, CPUINFO_INT_DEFAULT_IRQ_VECTOR)
#define cpu_get_endianness(cpu) cpu_get_info_int(cpu, CPUINFO_INT_ENDIANNESS)
#define cpu_get_clock_multiplier(cpu) cpu_get_info_int(cpu, CPUINFO_INT_CLOCK_MULTIPLIER)
#define cpu_get_clock_divider(cpu) cpu_get_info_int(cpu, CPUINFO_INT_CLOCK_DIVIDER)
#define cpu_get_min_opcode_bytes(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MIN_INSTRUCTION_BYTES)
#define cpu_get_max_opcode_bytes(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MAX_INSTRUCTION_BYTES)
#define cpu_get_min_cycles(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MIN_CYCLES)
#define cpu_get_max_cycles(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MAX_CYCLES)
#define cpu_get_databus_width(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_DATABUS_WIDTH + (space))
#define cpu_get_addrbus_width(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_ADDRBUS_WIDTH + (space))
#define cpu_get_addrbus_shift(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_ADDRBUS_SHIFT + (space))
#define cpu_get_logaddr_width(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_LOGADDR_WIDTH + (space))
#define cpu_get_page_shift(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_PAGE_SHIFT + (space))
#define cpu_get_reg(cpu, reg) cpu_get_info_int(cpu, CPUINFO_INT_REGISTER + (reg))
#define cpu_get_previouspc(cpu) ((offs_t)cpu_get_reg(cpu, REG_PREVIOUSPC))
#define cpu_get_pc(cpu) ((offs_t)cpu_get_reg(cpu, REG_PC))
#define cpu_get_sp(cpu) cpu_get_reg(cpu, REG_SP)
#define cpu_get_icount_ptr(cpu) (int *)cpu_get_info_ptr(cpu, CPUINFO_PTR_INSTRUCTION_COUNTER)
#define cpu_get_debug_register_list(cpu) cpu_get_info_ptr(cpu, CPUINFO_PTR_DEBUG_REGISTER_LIST)
#define cpu_get_name(cpu) cpu_get_info_string(cpu, CPUINFO_STR_NAME)
#define cpu_get_core_family(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_FAMILY)
#define cpu_get_core_version(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_VERSION)
#define cpu_get_core_file(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_FILE)
#define cpu_get_core_credits(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_CREDITS)
#define cpu_get_flags_string(cpu) cpu_get_info_string(cpu, CPUINFO_STR_FLAGS)
#define cpu_get_irq_string(cpu, irq) cpu_get_info_string(cpu, CPUINFO_STR_IRQ_STATE + (irq))
#define cpu_get_reg_string(cpu, reg) cpu_get_info_string(cpu, CPUINFO_STR_REGISTER + (reg))
#define cpu_set_reg(cpu, reg, val) cpu_set_info_int(cpu, CPUINFO_INT_REGISTER + (reg), (val))
/* helpers for accessing common CPU type state */
#define cputype_get_context_size(cputype) cputype_get_info_int(cputype, CPUINFO_INT_CONTEXT_SIZE)
#define cputype_get_input_lines(cputype) cputype_get_info_int(cputype, CPUINFO_INT_INPUT_LINES)
#define cputype_get_output_lines(cputype) cputype_get_info_int(cputype, CPUINFO_INT_OUTPUT_LINES)
#define cputype_get_default_irq_vector(cputype) cputype_get_info_int(cputype, CPUINFO_INT_DEFAULT_IRQ_VECTOR)
#define cputype_get_endianness(cputype) cputype_get_info_int(cputype, CPUINFO_INT_ENDIANNESS)
#define cputype_get_clock_multiplier(cputype) cputype_get_info_int(cputype, CPUINFO_INT_CLOCK_MULTIPLIER)
#define cputype_get_clock_divider(cputype) cputype_get_info_int(cputype, CPUINFO_INT_CLOCK_DIVIDER)
#define cputype_get_min_instruction_bytes(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MIN_INSTRUCTION_BYTES)
#define cputype_get_max_instruction_bytes(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MAX_INSTRUCTION_BYTES)
#define cputype_get_min_cycles(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MIN_CYCLES)
#define cputype_get_max_cycles(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MAX_CYCLES)
#define cputype_get_databus_width(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_DATABUS_WIDTH + (space))
#define cputype_get_addrbus_width(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_ADDRBUS_WIDTH + (space))
#define cputype_get_addrbus_shift(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_ADDRBUS_SHIFT + (space))
#define cputype_get_page_shift(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_PAGE_SHIFT + (space))
#define cputype_get_debug_register_list(cputype) cputype_get_info_ptr(cputype, CPUINFO_PTR_DEBUG_REGISTER_LIST)
#define cputype_get_name(cputype) cputype_get_info_string(cputype, CPUINFO_STR_NAME)
#define cputype_get_core_family(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_FAMILY)
#define cputype_get_core_version(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_VERSION)
#define cputype_get_core_file(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_FILE)
#define cputype_get_core_credits(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_CREDITS)
/***************************************************************************
TYPE DEFINITIONS
@ -333,9 +622,13 @@ union _cpuinfo
};
typedef struct _cpu_interface cpu_interface;
struct _cpu_interface
/* partial data hanging off of the classtoken */
typedef struct _cpu_class_header cpu_class_header;
struct _cpu_class_header
{
int index; /* index of this CPU */
cpu_type cputype; /* type index of this CPU */
/* table of core functions */
cpu_get_info_func get_info;
cpu_set_info_func set_info;
@ -348,61 +641,59 @@ struct _cpu_interface
cpu_burn_func burn;
cpu_translate_func translate;
cpu_disassemble_func disassemble;
cpu_disassemble_func dasm_override;
/* other info */
size_t context_size;
INT8 address_shift;
/* other frequently-needed information */
INT8 address_shift[ADDRESS_SPACES];
UINT32 clock_divider;
UINT32 clock_multiplier;
};
/***************************************************************************
CORE CPU INTERFACE FUNCTIONS
FUNCTION PROTOTYPES
***************************************************************************/
/* ----- global management ----- */
/* reset the internal CPU tracking */
void cpuintrf_init(running_machine *machine);
/* set up the interface for one CPU of a given type */
int cpuintrf_init_cpu(int cpunum, cpu_type cputype, int clock, const void *config, cpu_irq_callback irqcallback);
/* clean up the interface for one CPU */
void cpuintrf_exit_cpu(int cpunum);
/* remember the previous context and set a new one */
void cpu_push_context(const device_config *cpu);
/* restore the previous context */
void cpu_pop_context(void);
/* circular string buffer */
char *cpuintrf_temp_str(void);
/* set the dasm override handler */
void cpu_set_dasm_override(const device_config *cpu, cpu_disassemble_func dasm_override);
/* apply a +/- to the current icount */
void activecpu_adjust_icount(int delta);
/* return the current icount */
int activecpu_get_icount(void);
/* ----- live context control ----- */
/* ensure banking is reset properly */
void activecpu_reset_banking(void);
/* remember the current context and push a new one on the stack */
void cpu_push_context(const device_config *cpu);
/* restore the previously saved context */
void cpu_pop_context(void);
/* return the index of the active CPU (deprecated soon) */
int cpunum_get_active(void);
/***************************************************************************
CORE CPU ACCCESSORS
***************************************************************************/
/* ----- live CPU accessors ----- */
/* get info accessors */
/* initialize a live CPU */
void cpu_init(const device_config *cpu, int index, int clock, cpu_irq_callback irqcallback);
/* free a live CPU */
void cpu_exit(const device_config *cpu);
/* return information about a live CPU */
INT64 cpu_get_info_int(const device_config *cpu, UINT32 state);
void *cpu_get_info_ptr(const device_config *cpu, UINT32 state);
genf *cpu_get_info_fct(const device_config *cpu, UINT32 state);
const char *cpu_get_info_string(const device_config *cpu, UINT32 state);
/* set info accessors */
/* set information about a live CPU */
void cpu_set_info_int(const device_config *cpu, UINT32 state, INT64 data);
void cpu_set_info_ptr(const device_config *cpu, UINT32 state, void *data);
void cpu_set_info_fct(const device_config *cpu, UINT32 state, genf *data);
@ -419,7 +710,7 @@ UINT8 cpu_read_byte(const device_config *cpu, offs_t address);
/* write a byte from another CPU's memory space */
void cpu_write_byte(const device_config *cpu, offs_t address, UINT8 data);
/* return the PC, corrected to a byte offset, on a given CPU */
/* return the PC, corrected to a byte offset and translated to physical space, on a given CPU */
offs_t cpu_get_physical_pc_byte(const device_config *cpu);
/* update the banking on a given CPU */
@ -428,123 +719,122 @@ void cpu_set_opbase(const device_config *cpu, offs_t val);
/* disassemble a line at a given PC on a given CPU */
offs_t cpu_dasm(const device_config *cpu, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram);
#define cpu_get_context_size(cpu) cpu_get_info_int(cpu, CPUINFO_INT_CONTEXT_SIZE)
#define cpu_get_input_lines(cpu) cpu_get_info_int(cpu, CPUINFO_INT_INPUT_LINES)
#define cpu_get_output_lines(cpu) cpu_get_info_int(cpu, CPUINFO_INT_OUTPUT_LINES)
#define cpu_get_default_irq_vector(cpu) cpu_get_info_int(cpu, CPUINFO_INT_DEFAULT_IRQ_VECTOR)
#define cpu_get_endianness(cpu) cpu_get_info_int(cpu, CPUINFO_INT_ENDIANNESS)
#define cpu_get_clock_multiplier(cpu) cpu_get_info_int(cpu, CPUINFO_INT_CLOCK_MULTIPLIER)
#define cpu_get_clock_divider(cpu) cpu_get_info_int(cpu, CPUINFO_INT_CLOCK_DIVIDER)
#define cpu_get_min_opcode_bytes(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MIN_INSTRUCTION_BYTES)
#define cpu_get_max_opcode_bytes(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MAX_INSTRUCTION_BYTES)
#define cpu_get_min_cycles(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MIN_CYCLES)
#define cpu_get_max_cycles(cpu) cpu_get_info_int(cpu, CPUINFO_INT_MAX_CYCLES)
#define cpu_get_databus_width(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_DATABUS_WIDTH + (space))
#define cpu_get_addrbus_width(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_ADDRBUS_WIDTH + (space))
#define cpu_get_addrbus_shift(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_ADDRBUS_SHIFT + (space))
#define cpu_get_logaddr_width(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_LOGADDR_WIDTH + (space))
#define cpu_get_page_shift(cpu, space) cpu_get_info_int(cpu, CPUINFO_INT_PAGE_SHIFT + (space))
#define cpu_get_reg(cpu, reg) cpu_get_info_int(cpu, CPUINFO_INT_REGISTER + (reg))
#define cpu_get_previouspc(cpu) ((offs_t)cpu_get_info_int(cpu, REG_PREVIOUSPC))
#define cpu_get_pc(cpu) ((offs_t)cpu_get_reg(cpu, REG_PC))
#define cpu_get_sp(cpu) cpu_get_reg(cpu, REG_SP)
#define cpu_get_debug_register_list(cpu) cpu_get_info_ptr(cpu, CPUINFO_PTR_DEBUG_REGISTER_LIST)
#define cpu_get_name(cpu) cpu_get_info_string(cpu, CPUINFO_STR_NAME)
#define cpu_get_core_family(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_FAMILY)
#define cpu_get_core_version(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_VERSION)
#define cpu_get_core_file(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_FILE)
#define cpu_get_core_credits(cpu) cpu_get_info_string(cpu, CPUINFO_STR_CORE_CREDITS)
#define cpu_get_flags_string(cpu) cpu_get_info_string(cpu, CPUINFO_STR_FLAGS)
#define cpu_get_irq_string(cpu, irq) cpu_get_info_string(cpu, CPUINFO_STR_IRQ_STATE + (irq))
#define cpu_get_reg_string(cpu, reg) cpu_get_info_string(cpu, CPUINFO_STR_REGISTER + (reg))
#define cpu_set_reg(cpu, reg, val) cpu_set_info_int(cpu, CPUINFO_INT_REGISTER + (reg), (val))
/* set a dasm override handler */
void cpu_set_dasm_override(const device_config *cpu, cpu_disassemble_func dasm_override);
/***************************************************************************
CPU TYPE ACCCESSORS
***************************************************************************/
/* ----- CPU type accessors ----- */
/* get info accessors */
/* return a header template for a given CPU type */
const cpu_class_header *cputype_get_header_template(cpu_type cputype);
/* return information about a given CPU type */
INT64 cputype_get_info_int(cpu_type cputype, UINT32 state);
void *cputype_get_info_ptr(cpu_type cputype, UINT32 state);
genf *cputype_get_info_fct(cpu_type cputype, UINT32 state);
const char *cputype_get_info_string(cpu_type cputype, UINT32 state);
#define cputype_context_size(cputype) cputype_get_info_int(cputype, CPUINFO_INT_CONTEXT_SIZE)
#define cputype_input_lines(cputype) cputype_get_info_int(cputype, CPUINFO_INT_INPUT_LINES)
#define cputype_output_lines(cputype) cputype_get_info_int(cputype, CPUINFO_INT_OUTPUT_LINES)
#define cputype_default_irq_vector(cputype) cputype_get_info_int(cputype, CPUINFO_INT_DEFAULT_IRQ_VECTOR)
#define cputype_endianness(cputype) cputype_get_info_int(cputype, CPUINFO_INT_ENDIANNESS)
#define cputype_clock_multiplier(cputype) cputype_get_info_int(cputype, CPUINFO_INT_CLOCK_MULTIPLIER)
#define cputype_clock_divider(cputype) cputype_get_info_int(cputype, CPUINFO_INT_CLOCK_DIVIDER)
#define cputype_min_instruction_bytes(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MIN_INSTRUCTION_BYTES)
#define cputype_max_instruction_bytes(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MAX_INSTRUCTION_BYTES)
#define cputype_min_cycles(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MIN_CYCLES)
#define cputype_max_cycles(cputype) cputype_get_info_int(cputype, CPUINFO_INT_MAX_CYCLES)
#define cputype_databus_width(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_DATABUS_WIDTH + (space))
#define cputype_addrbus_width(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_ADDRBUS_WIDTH + (space))
#define cputype_addrbus_shift(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_ADDRBUS_SHIFT + (space))
#define cputype_page_shift(cputype, space) cputype_get_info_int(cputype, CPUINFO_INT_PAGE_SHIFT + (space))
#define cputype_debug_register_list(cputype) cputype_get_info_ptr(cputype, CPUINFO_PTR_DEBUG_REGISTER_LIST)
#define cputype_name(cputype) cputype_get_info_string(cputype, CPUINFO_STR_NAME)
#define cputype_core_family(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_FAMILY)
#define cputype_core_version(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_VERSION)
#define cputype_core_file(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_FILE)
#define cputype_core_credits(cputype) cputype_get_info_string(cputype, CPUINFO_STR_CORE_CREDITS)
/***************************************************************************
CPU INTERFACE ACCESSORS
INLINE FUNCTIONS
***************************************************************************/
/* return a pointer to the interface struct for a given CPU type */
INLINE const cpu_interface *cputype_get_interface(cpu_type cputype)
{
extern cpu_interface cpuintrf[];
return &cpuintrf[cputype];
}
/*-------------------------------------------------
safe_cpu_get_pc - return the current PC or ~0
if the CPU is invalid
-------------------------------------------------*/
/* return the index of the active CPU */
INLINE int cpunum_get_active(void)
{
extern int activecpunum;
return activecpunum;
}
/* return a pointer to the executing CPU */
INLINE const device_config *cpu_get_executing(void)
{
extern const device_config *executingcpu;
return executingcpu;
}
/* return the index of the executing CPU */
INLINE int cpunum_get_executing(void)
{
extern int executingcpunum;
return executingcpunum;
}
/* return a the total number of registered CPUs */
INLINE int cpu_gettotalcpu(void)
{
extern int totalcpu;
return totalcpu;
}
/* return the current PC or ~0 if no CPU is active */
INLINE offs_t safe_cpu_get_pc(const device_config *cpu)
{
return (cpu != NULL) ? cpu_get_pc(cpu) : ~0;
}
/*-------------------------------------------------
cpu_get_index - return the index of the
specified CPU (deprecated soon)
-------------------------------------------------*/
INLINE int cpu_get_index(const device_config *cpu)
{
cpu_class_header *classheader = cpu->classtoken;
return classheader->index;
}
/*-------------------------------------------------
cpu_address_to_byte - convert an address in
the specified address space to a byte offset
-------------------------------------------------*/
INLINE offs_t cpu_address_to_byte(const device_config *cpu, int space, offs_t address)
{
cpu_class_header *classheader = cpu->classtoken;
int shift = classheader->address_shift[space];
return (shift < 0) ? (address << -shift) : (address >> shift);
}
/*-------------------------------------------------
cpu_address_to_byte_end - convert an address
in the specified address space to a byte
offset specifying the last byte covered by
the address
-------------------------------------------------*/
INLINE offs_t cpu_address_to_byte_end(const device_config *cpu, int space, offs_t address)
{
cpu_class_header *classheader = cpu->classtoken;
int shift = classheader->address_shift[space];
return (shift < 0) ? ((address << -shift) | ((1 << -shift) - 1)) : (address >> shift);
}
/*-------------------------------------------------
cpu_byte_to_address - convert a byte offset
to an address in the specified address space
-------------------------------------------------*/
INLINE offs_t cpu_byte_to_address(const device_config *cpu, int space, offs_t address)
{
cpu_class_header *classheader = cpu->classtoken;
int shift = classheader->address_shift[space];
return (shift < 0) ? (address >> -shift) : (address << shift);
}
/*-------------------------------------------------
cpu_byte_to_address_end - convert a byte offset
to an address in the specified address space
specifying the last address covered by the
byte
-------------------------------------------------*/
INLINE offs_t cpu_byte_to_address_end(const device_config *cpu, int space, offs_t address)
{
cpu_class_header *classheader = cpu->classtoken;
int shift = classheader->address_shift[space];
return (shift < 0) ? (address >> -shift) : ((address << shift) | ((1 << shift) - 1));
}
/*-------------------------------------------------
cpu_address_physical - return the physical
address corresponding to the given logical
address
-------------------------------------------------*/
INLINE offs_t cpu_address_physical(const device_config *cpu, int space, int intention, offs_t address)
{
cpu_class_header *classheader = cpu->classtoken;
if (classheader->translate != NULL)
(*classheader->translate)(cpu, space, intention, &address);
return address;
}
#endif /* __CPUINTRF_H__ */

38
src/emu/debug/debugcmd.c
View File

@ -245,13 +245,14 @@ void debug_command_init(running_machine *machine)
debug_console_register_command(machine, "hardreset", CMDFLAG_NONE, 0, 0, 1, execute_hardreset);
/* ask all the CPUs if they would like to register functions or symbols */
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
{
cpu_debug_init_func debug_init;
debug_init = (cpu_debug_init_func)cpu_get_info_fct(machine->cpu[cpunum], CPUINFO_PTR_DEBUG_INIT);
if (debug_init != NULL)
(*debug_init)(machine->cpu[cpunum]);
}
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL)
{
cpu_debug_init_func debug_init;
debug_init = (cpu_debug_init_func)cpu_get_info_fct(machine->cpu[cpunum], CPUINFO_PTR_DEBUG_INIT);
if (debug_init != NULL)
(*debug_init)(machine->cpu[cpunum]);
}
add_exit_callback(machine, debug_command_exit);
@ -271,8 +272,9 @@ static void debug_command_exit(running_machine *machine)
int cpunum;
/* turn off all traces */
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
debug_cpu_trace(cpunum, NULL, 0, NULL);
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL)
debug_cpu_trace(cpunum, NULL, 0, NULL);
}
@ -766,7 +768,7 @@ static void execute_focus(running_machine *machine, int ref, int params, const c
/* validate params */
if (!debug_command_parameter_number(param[0], &cpuwhich))
return;
if (cpuwhich >= cpu_gettotalcpu())
if (cpuwhich >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpuwhich] == NULL)
{
debug_console_printf("Invalid CPU number!\n");
return;
@ -827,7 +829,7 @@ static void execute_ignore(running_machine *machine, int ref, int params, const
{
if (!debug_command_parameter_number(param[paramnum], &cpuwhich[paramnum]))
return;
if (cpuwhich[paramnum] >= cpu_gettotalcpu())
if (cpuwhich[paramnum] >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpuwhich[paramnum]] == NULL)
{
debug_console_printf("Invalid CPU number! (%d)\n", (int)cpuwhich[paramnum]);
return;
@ -898,7 +900,7 @@ static void execute_observe(running_machine *machine, int ref, int params, const
{
if (!debug_command_parameter_number(param[paramnum], &cpuwhich[paramnum]))
return;
if (cpuwhich[paramnum] >= cpu_gettotalcpu())
if (cpuwhich[paramnum] >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpuwhich[paramnum]] == NULL)
{
debug_console_printf("Invalid CPU number! (%d)\n", (int)cpuwhich[paramnum]);
return;
@ -1453,7 +1455,7 @@ static void execute_dump(running_machine *machine, int ref, int params, const ch
return;
/* further validation */
if (cpunum >= cpu_gettotalcpu())
if (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL)
{
debug_console_printf("Invalid CPU number!\n");
return;
@ -1620,7 +1622,7 @@ static void execute_find(running_machine *machine, int ref, int params, const ch
return;
/* further validation */
if (cpunum >= cpu_gettotalcpu())
if (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL)
{
debug_console_printf("Invalid CPU number!\n");
return;
@ -1726,7 +1728,7 @@ static void execute_dasm(running_machine *machine, int ref, int params, const ch
return;
/* further validation */
if (cpunum >= cpu_gettotalcpu())
if (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL)
{
debug_console_printf("Invalid CPU number!\n");
return;
@ -1872,7 +1874,7 @@ static void execute_trace_internal(running_machine *machine, int ref, int params
/* further validation */
if (!mame_stricmp(filename, "off"))
filename = NULL;
if (cpunum >= cpu_gettotalcpu())
if (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL)
{
debug_console_printf("Invalid CPU number!\n");
return;
@ -1957,7 +1959,7 @@ static void execute_history(running_machine *machine, int ref, int params, const
return;
/* further validation */
if (cpunum >= cpu_gettotalcpu())
if (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL)
{
debug_console_printf("Invalid CPU number!\n");
return;
@ -2137,7 +2139,7 @@ static void execute_symlist(running_machine *machine, int ref, int params, const
/* validate parameters */
if (params > 0 && !debug_command_parameter_number(param[0], &cpunum))
return;
if (cpunum != 100000 && cpunum >= cpu_gettotalcpu())
if (cpunum != 100000 && (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL))
{
debug_console_printf("Invalid CPU number!\n");
return;

64
src/emu/debug/debugcmt.c
View File

@ -103,11 +103,16 @@ static void debug_comment_free(void);
int debug_comment_init(running_machine *machine)
{
if (cpu_gettotalcpu() > 0)
int numcpu;
for (numcpu = 0; numcpu < ARRAY_LENGTH(machine->cpu); numcpu++)
if (machine->cpu[numcpu] == NULL)
break;
if (numcpu > 0)
{
/* allocate enough comment groups for the total # of cpu's */
debug_comments = (comment_group*) auto_malloc(cpu_gettotalcpu() * sizeof(comment_group));
memset(debug_comments, 0, cpu_gettotalcpu() * sizeof(comment_group));
debug_comments = (comment_group*) auto_malloc(numcpu * sizeof(comment_group));
memset(debug_comments, 0, numcpu * sizeof(comment_group));
/* automatically load em up */
debug_comment_load(machine);
@ -287,8 +292,9 @@ UINT32 debug_comment_all_change_count(void)
int i ;
UINT32 retVal = 0;
for (i = 0; i < cpu_gettotalcpu(); i++)
retVal += debug_comments[i].change_count ;
for (i = 0; i < ARRAY_LENGTH(Machine->cpu); i++)
if (Machine->cpu[i] != NULL)
retVal += debug_comments[i].change_count ;
return retVal;
}
@ -404,25 +410,26 @@ int debug_comment_save(running_machine *machine)
xml_set_attribute(systemnode, "name", machine->gamedrv->name);
/* for each cpu */
for (i = 0; i < cpu_gettotalcpu(); i++)
{
xml_data_node *curnode = xml_add_child(systemnode, "cpu", NULL);
if (!curnode)
goto error;
xml_set_attribute_int(curnode, "num", i);
for (j = 0; j < debug_comments[i].comment_count; j++)
for (i = 0; i < ARRAY_LENGTH(machine->cpu); i++)
if (machine->cpu[i] != NULL)
{
xml_data_node *datanode = xml_add_child(curnode, "comment", xml_normalize_string(debug_comments[i].comment_info[j]->text));
if (!datanode)
xml_data_node *curnode = xml_add_child(systemnode, "cpu", NULL);
if (!curnode)
goto error;
xml_set_attribute_int(datanode, "address", debug_comments[i].comment_info[j]->address);
xml_set_attribute_int(datanode, "color", debug_comments[i].comment_info[j]->color);
sprintf(crc_buf, "%08X", debug_comments[i].comment_info[j]->crc);
xml_set_attribute(datanode, "crc", crc_buf);
total_comments++;
xml_set_attribute_int(curnode, "num", i);
for (j = 0; j < debug_comments[i].comment_count; j++)
{
xml_data_node *datanode = xml_add_child(curnode, "comment", xml_normalize_string(debug_comments[i].comment_info[j]->text));
if (!datanode)
goto error;
xml_set_attribute_int(datanode, "address", debug_comments[i].comment_info[j]->address);
xml_set_attribute_int(datanode, "color", debug_comments[i].comment_info[j]->color);
sprintf(crc_buf, "%08X", debug_comments[i].comment_info[j]->crc);
xml_set_attribute(datanode, "crc", crc_buf);
total_comments++;
}
}
}
/* flush the file */
if (total_comments > 0)
@ -557,13 +564,14 @@ static void debug_comment_free(void)
{
int i, j;
for (i = 0; i < cpu_gettotalcpu(); i++)
{
for (j = 0; j < debug_comments[i].comment_count; j++)
for (i = 0; i < ARRAY_LENGTH(Machine->cpu); i++)
if (Machine->cpu[i] != NULL)
{
free(debug_comments[i].comment_info[j]);
}
for (j = 0; j < debug_comments[i].comment_count; j++)
{
free(debug_comments[i].comment_info[j]);
}
debug_comments[i].comment_count = 0;
}
debug_comments[i].comment_count = 0;
}
}

15
src/emu/debug/debugcpu.c
View File

@ -1242,7 +1242,7 @@ int debug_cpu_breakpoint_set(running_machine *machine, int cpunum, offs_t addres
debug_cpu_info *info = &global.cpuinfo[cpunum];
debug_cpu_breakpoint *bp;
assert_always(cpunum >= 0 && cpunum < cpu_gettotalcpu(), "debug_cpu_breakpoint_set() called with invalid cpunum!");
assert_always(cpunum >= 0 && cpunum < ARRAY_LENGTH(machine->cpu) && machine->cpu[cpunum] != NULL, "debug_cpu_breakpoint_set() called with invalid cpunum!");
/* allocate breakpoint */
bp = malloc_or_die(sizeof(*bp));
@ -2726,11 +2726,12 @@ void debug_cpu_flush_traces(void)
{
int cpunum;
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
{
if (global.cpuinfo[cpunum].trace.file)
fflush(global.cpuinfo[cpunum].trace.file);
}
for (cpunum = 0; cpunum < ARRAY_LENGTH(Machine->cpu); cpunum++)
if (Machine->cpu[cpunum] != NULL)
{
if (global.cpuinfo[cpunum].trace.file)
fflush(global.cpuinfo[cpunum].trace.file);
}
}
@ -2768,7 +2769,7 @@ static UINT64 get_wpdata(void *ref)
static UINT64 get_cycles(void *ref)
{
return activecpu_get_icount();
return *cpu_get_icount_ptr(Machine->activecpu);
}

11
src/emu/debug/debugvw.c
View File

@ -1081,7 +1081,7 @@ static void registers_update(debug_view *view)
/* cannot update if no active CPU */
if (cpunum_get_active() < 0)
return;
total_cycles = activecpu_gettotalcycles();
total_cycles = cpu_get_total_cycles(Machine->activecpu);
/* if our assumptions changed, revisit them */
if (regdata->recompute)
@ -1119,8 +1119,8 @@ static void registers_update(debug_view *view)
break;
case MAX_REGS + 1:
sprintf(dummy, "cycles:%-8d", activecpu_get_icount());
reg->currval = activecpu_get_icount();
sprintf(dummy, "cycles:%-8d", *cpu_get_icount_ptr(Machine->activecpu));
reg->currval = *cpu_get_icount_ptr(Machine->activecpu);
break;
case MAX_REGS + 2:
@ -1270,8 +1270,9 @@ static int disasm_alloc(debug_view *view)
memset(dasmdata, 0, sizeof(*dasmdata));
/* count the number of comments */
for (i = 0; i < cpu_gettotalcpu(); i++)
total_comments += debug_comment_get_count(i);
for (i = 0; i < ARRAY_LENGTH(Machine->cpu); i++)
if (Machine->cpu[i] != NULL)
total_comments += debug_comment_get_count(i);
/* initialize */
dasmdata->recompute = TRUE;

3
src/emu/deprecat.h
View File

@ -16,6 +16,7 @@
#define __DEPRECAT_H__
#include "mamecore.h"
#include "devintrf.h"
/*************************************
@ -64,7 +65,7 @@ extern running_machine *Machine;
handlers to synchronize their operation. If you call this from outside
an interrupt handler, add 1 to the result, i.e. if it returns 0, it means
that the interrupt handler will be called once. */
int cpu_getiloops(void);
int cpu_getiloops(const device_config *device);
#endif /* __DEPRECAT_H__ */

1
src/emu/emu.mak
View File

@ -42,7 +42,6 @@ EMUOBJS = \
$(EMUOBJ)/clifront.o \
$(EMUOBJ)/config.o \
$(EMUOBJ)/cpuexec.o \
$(EMUOBJ)/cpuint.o \
$(EMUOBJ)/cpuintrf.o \
$(EMUOBJ)/crsshair.o \
$(EMUOBJ)/debugger.o \

2
src/emu/info.c
View File

@ -578,7 +578,7 @@ static void print_game_chips(FILE *out, const game_driver *game, const machine_c
fprintf(out, "\t\t<chip");
fprintf(out, " type=\"cpu\"");
fprintf(out, " tag=\"%s\"", xml_normalize_string(config->cpu[chipnum].tag));
fprintf(out, " name=\"%s\"", xml_normalize_string(cputype_name(config->cpu[chipnum].type)));
fprintf(out, " name=\"%s\"", xml_normalize_string(cputype_get_name(config->cpu[chipnum].type)));
fprintf(out, " clock=\"%d\"", config->cpu[chipnum].clock);
fprintf(out, "/>\n");
}

3
src/emu/machine/6522via.c
View File

@ -23,6 +23,7 @@
*/
#include "driver.h"
#include "deprecat.h"
#include "6522via.h"
//#define TRACE_VIA
@ -165,7 +166,7 @@ void via_config(int which, const struct via6522_interface *intf)
via[which].time2 = via[which].time1 = timer_get_time();
/* Default clock is from CPU1 */
via_set_clock (which, cpunum_get_clock(0));
via_set_clock (which, cpu_get_clock(Machine->cpu[0]));
}
/******************* external interrupt check *******************/

2
src/emu/machine/6526cia.c
View File

@ -158,7 +158,7 @@ void cia_config(running_machine *machine, int which, const cia6526_interface *in
memset(cia, 0, sizeof(*cia));
cia->active = TRUE;
cia->type = intf->type;
cia->clock = (intf->clock != 0) ? intf->clock : cpunum_get_clock(0);
cia->clock = (intf->clock != 0) ? intf->clock : cpu_get_clock(machine->cpu[0]);
cia->irq_func = intf->irq_func;
/* setup ports */

2
src/emu/machine/8042kbdc.c
View File

@ -584,7 +584,7 @@ WRITE8_HANDLER(kbdc8042_8_w)
* the bits low set in the command byte. The only pulse that has
* an effect currently is bit 0, which pulses the CPU's reset line
*/
cpunum_set_input_line(machine, 0, INPUT_LINE_RESET, PULSE_LINE);
cpu_set_input_line(machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
at_8042_set_outport(kbdc8042.outport | 0x02, 0);
break;
}

2
src/emu/machine/8237dma.c
View File

@ -176,7 +176,7 @@ static void dma8237_update_status(const device_config *device)
/* set the halt line */
if (dma8237->intf && dma8237->intf->cpunum >= 0)
{
cpunum_set_input_line(device->machine, dma8237->intf->cpunum, INPUT_LINE_HALT,
cpu_set_input_line(device->machine->cpu[dma8237->intf->cpunum], INPUT_LINE_HALT,
pending_transfer ? ASSERT_LINE : CLEAR_LINE);
}

2
src/emu/machine/8257dma.c
View File

@ -220,7 +220,7 @@ static void dma8257_update_status(const device_config *device)
/* set the halt line */
if (dma8257->intf && dma8257->intf->cpunum >= 0)
{
cpunum_set_input_line(device->machine, dma8257->intf->cpunum, INPUT_LINE_HALT,
cpu_set_input_line(device->machine->cpu[dma8257->intf->cpunum], INPUT_LINE_HALT,
pending_transfer ? ASSERT_LINE : CLEAR_LINE);
}

67
src/emu/machine/generic.c
View File

@ -10,6 +10,7 @@
*********************************************************************/
#include "driver.h"
#include "deprecat.h"
#include "config.h"
#include "generic.h"
@ -566,7 +567,7 @@ static void interrupt_reset(running_machine *machine)
int cpunum;
/* on a reset, enable all interrupts */
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
interrupt_enable[cpunum] = 1;
}
@ -583,9 +584,9 @@ static TIMER_CALLBACK( clear_all_lines )
int line;
/* clear NMI and all inputs */
cpunum_set_input_line(machine, cpunum, INPUT_LINE_NMI, CLEAR_LINE);
cpu_set_input_line(machine->cpu[cpunum], INPUT_LINE_NMI, CLEAR_LINE);
for (line = 0; line < inputcount; line++)
cpunum_set_input_line(machine, cpunum, line, CLEAR_LINE);
cpu_set_input_line(machine->cpu[cpunum], line, CLEAR_LINE);
}
@ -596,7 +597,7 @@ static TIMER_CALLBACK( clear_all_lines )
void cpu_interrupt_enable(int cpunum, int enabled)
{
assert_always(cpunum >= 0 && cpunum < cpu_gettotalcpu(), "cpu_interrupt_enable() called for invalid cpu num!");
assert_always(cpunum >= 0 && cpunum < ARRAY_LENGTH(Machine->cpu) && Machine->cpu[cpunum] != NULL, "cpu_interrupt_enable() called for invalid cpu num!");
/* set the new state */
interrupt_enable[cpunum] = enabled;
@ -643,10 +644,10 @@ READ8_HANDLER( interrupt_enable_r )
specified state on the active CPU
-------------------------------------------------*/
INLINE void irqn_line_set(running_machine *machine, int cpunum, int line, int state)
INLINE void irqn_line_set(const device_config *device, int line, int state)
{
if (interrupt_enable[cpunum])
cpunum_set_input_line(machine, cpunum, line, state);
if (interrupt_enable[cpu_get_index(device)])
cpu_set_input_line(device, line, state);
}
@ -654,45 +655,45 @@ INLINE void irqn_line_set(running_machine *machine, int cpunum, int line, int st
NMI callbacks
-------------------------------------------------*/
INTERRUPT_GEN( nmi_line_pulse ) { irqn_line_set(machine, cpunum, INPUT_LINE_NMI, PULSE_LINE); }
INTERRUPT_GEN( nmi_line_assert ) { irqn_line_set(machine, cpunum, INPUT_LINE_NMI, ASSERT_LINE); }
INTERRUPT_GEN( nmi_line_pulse ) { irqn_line_set(device, INPUT_LINE_NMI, PULSE_LINE); }
INTERRUPT_GEN( nmi_line_assert ) { irqn_line_set(device, INPUT_LINE_NMI, ASSERT_LINE); }
/*-------------------------------------------------
IRQn callbacks
-------------------------------------------------*/
INTERRUPT_GEN( irq0_line_hold ) { irqn_line_set(machine, cpunum, 0, HOLD_LINE); }
INTERRUPT_GEN( irq0_line_pulse ) { irqn_line_set(machine, cpunum, 0, PULSE_LINE); }
INTERRUPT_GEN( irq0_line_assert ) { irqn_line_set(machine, cpunum, 0, ASSERT_LINE); }
INTERRUPT_GEN( irq0_line_hold ) { irqn_line_set(device, 0, HOLD_LINE); }
INTERRUPT_GEN( irq0_line_pulse ) { irqn_line_set(device, 0, PULSE_LINE); }
INTERRUPT_GEN( irq0_line_assert ) { irqn_line_set(device, 0, ASSERT_LINE); }
INTERRUPT_GEN( irq1_line_hold ) { irqn_line_set(machine, cpunum, 1, HOLD_LINE); }
INTERRUPT_GEN( irq1_line_pulse ) { irqn_line_set(machine, cpunum, 1, PULSE_LINE); }
INTERRUPT_GEN( irq1_line_assert ) { irqn_line_set(machine, cpunum, 1, ASSERT_LINE); }
INTERRUPT_GEN( irq1_line_hold ) { irqn_line_set(device, 1, HOLD_LINE); }
INTERRUPT_GEN( irq1_line_pulse ) { irqn_line_set(device, 1, PULSE_LINE); }
INTERRUPT_GEN( irq1_line_assert ) { irqn_line_set(device, 1, ASSERT_LINE); }
INTERRUPT_GEN( irq2_line_hold ) { irqn_line_set(machine, cpunum, 2, HOLD_LINE); }
INTERRUPT_GEN( irq2_line_pulse ) { irqn_line_set(machine, cpunum, 2, PULSE_LINE); }
INTERRUPT_GEN( irq2_line_assert ) { irqn_line_set(machine, cpunum, 2, ASSERT_LINE); }
INTERRUPT_GEN( irq2_line_hold ) { irqn_line_set(device, 2, HOLD_LINE); }
INTERRUPT_GEN( irq2_line_pulse ) { irqn_line_set(device, 2, PULSE_LINE); }
INTERRUPT_GEN( irq2_line_assert ) { irqn_line_set(device, 2, ASSERT_LINE); }
INTERRUPT_GEN( irq3_line_hold ) { irqn_line_set(machine, cpunum, 3, HOLD_LINE); }
INTERRUPT_GEN( irq3_line_pulse ) { irqn_line_set(machine, cpunum, 3, PULSE_LINE); }
INTERRUPT_GEN( irq3_line_assert ) { irqn_line_set(machine, cpunum, 3, ASSERT_LINE); }
INTERRUPT_GEN( irq3_line_hold ) { irqn_line_set(device, 3, HOLD_LINE); }
INTERRUPT_GEN( irq3_line_pulse ) { irqn_line_set(device, 3, PULSE_LINE); }
INTERRUPT_GEN( irq3_line_assert ) { irqn_line_set(device, 3, ASSERT_LINE); }
INTERRUPT_GEN( irq4_line_hold ) { irqn_line_set(machine, cpunum, 4, HOLD_LINE); }
INTERRUPT_GEN( irq4_line_pulse ) { irqn_line_set(machine, cpunum, 4, PULSE_LINE); }
INTERRUPT_GEN( irq4_line_assert ) { irqn_line_set(machine, cpunum, 4, ASSERT_LINE); }
INTERRUPT_GEN( irq4_line_hold ) { irqn_line_set(device, 4, HOLD_LINE); }
INTERRUPT_GEN( irq4_line_pulse ) { irqn_line_set(device, 4, PULSE_LINE); }
INTERRUPT_GEN( irq4_line_assert ) { irqn_line_set(device, 4, ASSERT_LINE); }
INTERRUPT_GEN( irq5_line_hold ) { irqn_line_set(machine, cpunum, 5, HOLD_LINE); }
INTERRUPT_GEN( irq5_line_pulse ) { irqn_line_set(machine, cpunum, 5, PULSE_LINE); }
INTERRUPT_GEN( irq5_line_assert ) { irqn_line_set(machine, cpunum, 5, ASSERT_LINE); }
INTERRUPT_GEN( irq5_line_hold ) { irqn_line_set(device, 5, HOLD_LINE); }
INTERRUPT_GEN( irq5_line_pulse ) { irqn_line_set(device, 5, PULSE_LINE); }
INTERRUPT_GEN( irq5_line_assert ) { irqn_line_set(device, 5, ASSERT_LINE); }
INTERRUPT_GEN( irq6_line_hold ) { irqn_line_set(machine, cpunum, 6, HOLD_LINE); }
INTERRUPT_GEN( irq6_line_pulse ) { irqn_line_set(machine, cpunum, 6, PULSE_LINE); }
INTERRUPT_GEN( irq6_line_assert ) { irqn_line_set(machine, cpunum, 6, ASSERT_LINE); }
INTERRUPT_GEN( irq6_line_hold ) { irqn_line_set(device, 6, HOLD_LINE); }
INTERRUPT_GEN( irq6_line_pulse ) { irqn_line_set(device, 6, PULSE_LINE); }
INTERRUPT_GEN( irq6_line_assert ) { irqn_line_set(device, 6, ASSERT_LINE); }
INTERRUPT_GEN( irq7_line_hold ) { irqn_line_set(machine, cpunum, 7, HOLD_LINE); }
INTERRUPT_GEN( irq7_line_pulse ) { irqn_line_set(machine, cpunum, 7, PULSE_LINE); }
INTERRUPT_GEN( irq7_line_assert ) { irqn_line_set(machine, cpunum, 7, ASSERT_LINE); }
INTERRUPT_GEN( irq7_line_hold ) { irqn_line_set(device, 7, HOLD_LINE); }
INTERRUPT_GEN( irq7_line_pulse ) { irqn_line_set(device, 7, PULSE_LINE); }
INTERRUPT_GEN( irq7_line_assert ) { irqn_line_set(device, 7, ASSERT_LINE); }

2
src/emu/machine/idectrl.c
View File

@ -1266,7 +1266,7 @@ static UINT32 ide_controller_read(const device_config *device, offs_t offset, in
}
/* take a bit of time to speed up people who poll hard */
activecpu_adjust_icount(-100);
cpu_adjust_icount(device->machine->activecpu, -100);
break;
/* log anything else */

6
src/emu/machine/ldpr8210.c
View File

@ -857,7 +857,7 @@ static WRITE8_HANDLER( pr8210_port2_w )
player->slowtrg = timer_get_time();
/* bit 6 when low triggers an IRQ on the MCU */
cpunum_set_input_line(machine, player->cpunum, MCS48_INPUT_IRQ, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(machine->cpu[player->cpunum], MCS48_INPUT_IRQ, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
/* standby LED is set accordingl to bit 4 */
output_set_value("pr8210_standby", (data & 0x10) != 0);
@ -1109,7 +1109,7 @@ static TIMER_CALLBACK( irq_off )
{
laserdisc_state *ld = ptr;
ldplayer_data *player = ld->player;
cpunum_set_input_line(ld->device->machine, player->simutrek.cpunum, MCS48_INPUT_IRQ, CLEAR_LINE);
cpu_set_input_line(ld->device->machine->cpu[player->simutrek.cpunum], MCS48_INPUT_IRQ, CLEAR_LINE);
if (LOG_SIMUTREK)
printf("%3d:**** Simutrek IRQ clear\n", video_screen_get_vpos(ld->screen));
}
@ -1132,7 +1132,7 @@ static void simutrek_vsync(laserdisc_state *ld, const vbi_metadata *vbi, int fie
{
if (LOG_SIMUTREK)
printf("%3d:VSYNC IRQ\n", video_screen_get_vpos(ld->screen));
cpunum_set_input_line(ld->device->machine, player->simutrek.cpunum, MCS48_INPUT_IRQ, ASSERT_LINE);
cpu_set_input_line(ld->device->machine->cpu[player->simutrek.cpunum], MCS48_INPUT_IRQ, ASSERT_LINE);
timer_set(video_screen_get_scan_period(ld->screen), ld, 0, irq_off);
}
}

4
src/emu/machine/ldv1000.c
View File

@ -277,7 +277,7 @@ static void ldv1000_vsync(laserdisc_state *ld, const vbi_metadata *vbi, int fiel
timer_set(video_screen_get_time_until_pos(ld->screen, 19*2, 0), ld, 0, vbi_data_fetch);
/* boost interleave for the first 1ms to improve communications */
cpu_boost_interleave(ld->device->machine, attotime_zero, ATTOTIME_IN_MSEC(1));
cpuexec_boost_interleave(ld->device->machine, attotime_zero, ATTOTIME_IN_MSEC(1));
}
@ -437,7 +437,7 @@ static TIMER_DEVICE_CALLBACK( multijump_timer )
static void ctc_interrupt(const device_config *device, int state)
{
laserdisc_state *ld = find_ldv1000(device->machine);
cpunum_set_input_line(device->machine, ld->player->cpunum, 0, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(device->machine->cpu[ld->player->cpunum], 0, state ? ASSERT_LINE : CLEAR_LINE);
}

8
src/emu/machine/ldvp931.c
View File

@ -298,7 +298,7 @@ static UINT8 vp931_data_r(laserdisc_state *ld)
}
/* also boost interleave for 4 scanlines to ensure proper communications */
cpu_boost_interleave(ld->device->machine, attotime_zero, attotime_mul(video_screen_get_scan_period(ld->screen), 4));
cpuexec_boost_interleave(ld->device->machine, attotime_zero, attotime_mul(video_screen_get_scan_period(ld->screen), 4));
return player->tocontroller;
}
@ -350,7 +350,7 @@ static TIMER_CALLBACK( vbi_data_fetch )
/* at the start of each line, signal an interrupt and use a timer to turn it off */
if (which == 0)
{
cpunum_set_input_line(machine, player->cpunum, MCS48_INPUT_IRQ, ASSERT_LINE);
cpu_set_input_line(machine->cpu[player->cpunum], MCS48_INPUT_IRQ, ASSERT_LINE);
timer_set(ATTOTIME_IN_NSEC(5580), ld, 0, irq_off);
}
@ -406,7 +406,7 @@ static TIMER_CALLBACK( deferred_data_w )
static TIMER_CALLBACK( irq_off )
{
laserdisc_state *ld = ptr;
cpunum_set_input_line(machine, ld->player->cpunum, MCS48_INPUT_IRQ, CLEAR_LINE);
cpu_set_input_line(machine->cpu[ld->player->cpunum], MCS48_INPUT_IRQ, CLEAR_LINE);
}
@ -632,7 +632,7 @@ static WRITE8_HANDLER( to_controller_w )
(*player->data_ready_cb)(ld->device, TRUE);
/* also boost interleave for 4 scanlines to ensure proper communications */
cpu_boost_interleave(ld->device->machine, attotime_zero, attotime_mul(video_screen_get_scan_period(ld->screen), 4));
cpuexec_boost_interleave(ld->device->machine, attotime_zero, attotime_mul(video_screen_get_scan_period(ld->screen), 4));
}

8
src/emu/machine/tmp68301.c
View File

@ -47,7 +47,7 @@ static TIMER_CALLBACK( tmp68301_timer_callback )
tmp68301_irq_vector[level] = IVNR & 0x00e0;
tmp68301_irq_vector[level] += 4+i;
cpunum_set_input_line(machine, 0,level,HOLD_LINE);
cpu_set_input_line(machine->cpu[0],level,HOLD_LINE);
}
if (TCR & 0x0080) // N/1
@ -90,7 +90,7 @@ static void tmp68301_update_timer( running_machine *machine, int i )
{
int scale = (TCR & 0x3c00)>>10; // P4..1
if (scale > 8) scale = 8;
duration = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(0)), (1 << scale) * max);
duration = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(machine->cpu[0])), (1 << scale) * max);
}
break;
}
@ -115,7 +115,7 @@ MACHINE_RESET( tmp68301 )
for (i = 0; i < 3; i++)
tmp68301_IE[i] = 0;
cpunum_set_irq_callback(0, tmp68301_irq_callback);
cpu_set_irq_callback(machine->cpu[0], tmp68301_irq_callback);
}
/* Update the IRQ state based on all possible causes */
@ -145,7 +145,7 @@ static void update_irq_state(running_machine *machine)
tmp68301_IE[i] = 0; // Interrupts are edge triggerred
cpunum_set_input_line(machine, 0,level,HOLD_LINE);
cpu_set_input_line(machine->cpu[0],level,HOLD_LINE);
}
}
}

2
src/emu/machine/z80dma.c
View File

@ -257,7 +257,7 @@ static void z80dma_update_status(const device_config *device)
if (z80dma->intf && z80dma->intf->cpunum >= 0)
{
//FIXME: Synchronization is done by BUSREQ!
cpunum_set_input_line(device->machine, z80dma->intf->cpunum, INPUT_LINE_HALT,
cpu_set_input_line(device->machine->cpu[z80dma->intf->cpunum], INPUT_LINE_HALT,
pending_transfer ? ASSERT_LINE : CLEAR_LINE);
}
}

75
src/emu/mame.c
View File

@ -47,7 +47,6 @@
- calls memory_init() [memory.c] to process the game's memory maps
- calls cpuexec_init() [cpuexec.c] to initialize the CPUs
- calls watchdog_init() [watchdog.c] to initialize the watchdog system
- calls cpuint_init() [cpuint.c] to initialize the CPU interrupts
- calls the driver's DRIVER_INIT callback
- calls device_list_start() [devintrf.c] to start any devices
- calls video_init() [video.c] to start the video system
@ -560,8 +559,8 @@ void mame_schedule_exit(running_machine *machine)
mame->exit_pending = TRUE;
/* if we're executing, abort out immediately */
if (cpunum_get_active() >= 0)
activecpu_adjust_icount(-activecpu_get_icount() - 1);
if (machine->activecpu != NULL)
cpu_eat_cycles(machine->activecpu, 1000000000);
/* if we're autosaving on exit, schedule a save as well */
if (options_get_bool(mame_options(), OPTION_AUTOSAVE) && (machine->gamedrv->flags & GAME_SUPPORTS_SAVE))
@ -580,8 +579,8 @@ void mame_schedule_hard_reset(running_machine *machine)
mame->hard_reset_pending = TRUE;
/* if we're executing, abort out immediately */
if (cpunum_get_active() >= 0)
activecpu_adjust_icount(-activecpu_get_icount() - 1);
if (machine->activecpu != NULL)
cpu_eat_cycles(machine->activecpu, 1000000000);
}
@ -601,7 +600,7 @@ void mame_schedule_soft_reset(running_machine *machine)
/* if we're executing, abort out immediately */
if (cpunum_get_active() >= 0)
activecpu_adjust_icount(-activecpu_get_icount() - 1);
cpu_eat_cycles(machine->activecpu, 1000000000);
}
@ -618,7 +617,7 @@ void mame_schedule_new_driver(running_machine *machine, const game_driver *drive
/* if we're executing, abort out immediately */
if (cpunum_get_active() >= 0)
activecpu_adjust_icount(-activecpu_get_icount() - 1);
cpu_eat_cycles(machine->activecpu, 1000000000);
}
@ -1542,7 +1541,6 @@ static void init_machine(running_machine *machine)
memory_init(machine);
cpuexec_init(machine);
watchdog_init(machine);
cpuint_init(machine);
#ifdef MESS
/* first MESS initialization */
@ -1621,10 +1619,9 @@ static TIMER_CALLBACK( soft_reset )
/* allow save state registrations during the reset */
state_save_allow_registration(TRUE);
/* unfortunately, we can't rely on callbacks to reset the interrupt */
/* structures, as these need to happen before we call the reset */
/* functions registered by the drivers */
cpuint_reset(machine);
/* call all registered reset callbacks */
for (cb = machine->mame_data->reset_callback_list; cb; cb = cb->next)
(*cb->func.reset)(machine);
/* run the driver's reset callbacks */
if (machine->config->machine_reset != NULL)
@ -1634,10 +1631,6 @@ static TIMER_CALLBACK( soft_reset )
if (machine->config->video_reset != NULL)
(*machine->config->video_reset)(machine);
/* call all registered reset callbacks */
for (cb = machine->mame_data->reset_callback_list; cb; cb = cb->next)
(*cb->func.reset)(machine);
/* disallow save state registrations starting here */
state_save_allow_registration(FALSE);
@ -1737,20 +1730,21 @@ static void handle_save(running_machine *machine)
state_save_pop_tag();
/* loop over CPUs */
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
{
cpu_push_context(machine->cpu[cpunum]);
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL)
{
cpu_push_context(machine->cpu[cpunum]);
/* make sure banking is set */
activecpu_reset_banking();
/* make sure banking is set */
memory_set_opbase(cpu_get_physical_pc_byte(machine->activecpu));
/* save the CPU data */
state_save_push_tag(cpunum + 1);
state_save_save_continue(machine);
state_save_pop_tag();
/* save the CPU data */
state_save_push_tag(cpunum + 1);
state_save_save_continue(machine);
state_save_pop_tag();
cpu_pop_context();
}
cpu_pop_context();
}
/* finish and close */
state_save_save_finish(machine);
@ -1819,23 +1813,24 @@ static void handle_load(running_machine *machine)
state_save_pop_tag();
/* loop over CPUs */
for (cpunum = 0; cpunum < cpu_gettotalcpu(); cpunum++)
{
cpu_push_context(machine->cpu[cpunum]);
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL)
{
cpu_push_context(machine->cpu[cpunum]);
/* make sure banking is set */
activecpu_reset_banking();
/* make sure banking is set */
memory_set_opbase(cpu_get_physical_pc_byte(machine->activecpu));
/* load the CPU data */
state_save_push_tag(cpunum + 1);
state_save_load_continue(machine);
state_save_pop_tag();
/* load the CPU data */
state_save_push_tag(cpunum + 1);
state_save_load_continue(machine);
state_save_pop_tag();
/* make sure banking is set */
activecpu_reset_banking();
/* make sure banking is set */
memory_set_opbase(cpu_get_physical_pc_byte(machine->activecpu));
cpu_pop_context();
}
cpu_pop_context();
}
/* finish and close */
state_save_load_finish();

3
src/emu/mconfig.h
View File

@ -15,6 +15,7 @@
#define __MCONFIG_H__
#include "devintrf.h"
#include "cpuexec.h"
#include <stddef.h>
@ -170,7 +171,7 @@ union _machine_config_token
const gfx_decode_entry *gfxdecode;
const addrmap_token *addrmap;
device_type devtype;
void (*interrupt)(running_machine *machine, int cpunum);
void (*interrupt)(const device_config *device);
driver_init_func driver_init;
nvram_handler_func nvram_handler;
memcard_handler_func memcard_handler;

8
src/emu/memory.c
View File

@ -1668,10 +1668,10 @@ static void memory_init_cpudata(running_machine *machine)
/* determine the address and data bits */
space->cpunum = cpunum;
space->spacenum = spacenum;
space->endianness = cputype_endianness(cputype);
space->ashift = cputype_addrbus_shift(cputype, spacenum);
space->abits = cputype_addrbus_width(cputype, spacenum);
space->dbits = cputype_databus_width(cputype, spacenum);
space->endianness = cputype_get_endianness(cputype);
space->ashift = cputype_get_addrbus_shift(cputype, spacenum);
space->abits = cputype_get_addrbus_width(cputype, spacenum);
space->dbits = cputype_get_databus_width(cputype, spacenum);
space->addrmask = 0xffffffffUL >> (32 - space->abits);
space->bytemask = ADDR2BYTE_END(space, space->addrmask);
space->accessors = memory_get_accessors(spacenum, space->dbits, space->endianness);

4
src/emu/romload.c
View File

@ -1178,14 +1178,14 @@ static UINT32 normalize_flags_for_cpu(running_machine *machine, UINT32 startflag
/* set the endianness */
startflags &= ~ROMREGION_ENDIANMASK;
if (cputype_endianness(cputype) == CPU_IS_LE)
if (cputype_get_endianness(cputype) == CPU_IS_LE)
startflags |= ROMREGION_LE;
else
startflags |= ROMREGION_BE;
/* set the width */
startflags &= ~ROMREGION_WIDTHMASK;
buswidth = cputype_databus_width(cputype, ADDRESS_SPACE_PROGRAM);
buswidth = cputype_get_databus_width(cputype, ADDRESS_SPACE_PROGRAM);
if (buswidth <= 8)
startflags |= ROMREGION_8BIT;
else if (buswidth <= 16)

5
src/emu/sound/scsp.c
View File

@ -28,6 +28,7 @@
#include "sndintrf.h"
#include "streams.h"
#include "cpuintrf.h"
#include "cpuexec.h"
#include "deprecat.h"
#include "scsp.h"
#include "scspdsp.h"
@ -1198,7 +1199,7 @@ static void dma_scsp(running_machine *machine, struct _SCSP *SCSP)
/*Job done,request a dma end irq*/
if(scsp_regs[0x1e/2] & 0x10)
cpunum_set_input_line(machine, 2,dma_transfer_end,HOLD_LINE);
cpu_set_input_line(machine->cpu[2],dma_transfer_end,HOLD_LINE);
}
#ifdef UNUSED_FUNCTION
@ -1315,7 +1316,7 @@ WRITE16_HANDLER( scsp_0_w )
case 0x42a:
if(stv_scu && !(stv_scu[40] & 0x40) /*&& scsp_regs[0x42c/2] & 0x20*/)/*Main CPU allow sound irq*/
{
cpunum_set_input_line_and_vector(machine, 0, 9, HOLD_LINE , 0x46);
cpu_set_input_line_and_vector(machine->cpu[0], 9, HOLD_LINE , 0x46);
logerror("SCSP: Main CPU interrupt\n");
}
break;

12
src/emu/timer.c
View File

@ -11,6 +11,7 @@
***************************************************************************/
#include "driver.h"
#include "deprecat.h"
#include "profiler.h"
#include "pool.h"
@ -140,16 +141,13 @@ static void timer_remove(emu_timer *which);
INLINE attotime get_current_time(void)
{
int activecpu;
/* if we're currently in a callback, use the timer's expiration time as a base */
if (callback_timer != NULL)
return callback_timer_expire_time;
/* if we're executing as a particular CPU, use its local time as a base */
activecpu = cpunum_get_active();
if (activecpu >= 0)
return cpunum_get_localtime(activecpu);
if (Machine->activecpu != NULL)
return cpu_get_local_time(Machine->activecpu);
/* otherwise, return the current global base time */
return global_basetime;
@ -734,8 +732,8 @@ void timer_adjust_periodic(emu_timer *which, attotime start_delay, INT32 param,
/* if this was inserted as the head, abort the current timeslice and resync */
LOG(("timer_adjust_oneshot %s.%s:%d to expire @ %s\n", which->file, which->func, which->line, attotime_string(which->expire, 9)));
if (which == timer_head && cpunum_get_executing() >= 0)
activecpu_abort_timeslice();
if (which == timer_head && Machine->activecpu != NULL)
cpu_abort_timeslice(Machine->activecpu);
}

22
src/emu/ui.c
View File

@ -995,7 +995,7 @@ astring *game_info_astring(running_machine *machine, astring *string)
/* if more than one, prepend a #x in front of the CPU name */
if (count > 1)
astring_catprintf(string, "%d" UTF8_MULTIPLY, count);
astring_catc(string, cputype_name(type));
astring_catc(string, cputype_get_name(type));
/* display clock in kHz or MHz */
if (clock >= 1000000)
@ -1454,13 +1454,13 @@ static slider_state *slider_init(running_machine *machine)
/* add CPU overclocking (cheat only) */
if (options_get_bool(mame_options(), OPTION_CHEAT))
{
numitems = cpu_gettotalcpu();
for (item = 0; item < numitems; item++)
{
astring_printf(string, "Overclock CPU %s", machine->config->cpu[item].tag);
*tailptr = slider_alloc(astring_c(string), 10, 1000, 2000, 1, slider_overclock, (void *)(FPTR)item);
tailptr = &(*tailptr)->next;
}
for (item = 0; item < ARRAY_LENGTH(machine->cpu); item++)
if (machine->cpu[item] != NULL)
{
astring_printf(string, "Overclock CPU %s", machine->cpu[item]->tag);
*tailptr = slider_alloc(astring_c(string), 10, 1000, 2000, 1, slider_overclock, (void *)(FPTR)item);
tailptr = &(*tailptr)->next;
}
}
/* add screen parameters */
@ -1630,10 +1630,10 @@ static INT32 slider_overclock(running_machine *machine, void *arg, astring *stri
{
int which = (FPTR)arg;
if (newval != SLIDER_NOCHANGE)
cpunum_set_clockscale(machine, which, (float)newval * 0.001f);
cpu_set_clockscale(machine->cpu[which], (float)newval * 0.001f);
if (string != NULL)
astring_printf(string, "%3.0f%%", floor(cpunum_get_clockscale(which) * 100.0f + 0.5f));
return floor(cpunum_get_clockscale(which) * 1000.0f + 0.5f);
astring_printf(string, "%3.0f%%", floor(cpu_get_clockscale(machine->cpu[which]) * 100.0f + 0.5f));
return floor(cpu_get_clockscale(machine->cpu[which]) * 1000.0f + 0.5f);
}

7
src/emu/validity.c
View File

@ -720,7 +720,6 @@ static int validate_cpu(int drivnum, const machine_config *config, const input_p
/* loop over all the CPUs */
for (cpunum = 0; cpunum < MAX_CPU; cpunum++)
{
extern CPU_GET_INFO( dummy );
const cpu_config *cpu = &config->cpu[cpunum];
int spacenum, checknum;
@ -750,7 +749,7 @@ static int validate_cpu(int drivnum, const machine_config *config, const input_p
error |= validate_tag(driver, "CPU", cpu->tag);
/* checks to see if this driver is using a dummy CPU */
if (cputype_get_interface(cpu->type)->get_info == CPU_GET_INFO_NAME(dummy))
if (cpu->type == CPU_DUMMY)
{
mame_printf_error("%s: %s uses non-present CPU\n", driver->source_file, driver->name);
error = TRUE;
@ -781,8 +780,8 @@ static int validate_cpu(int drivnum, const machine_config *config, const input_p
{
#define SPACE_SHIFT(a) ((addr_shift < 0) ? ((a) << -addr_shift) : ((a) >> addr_shift))
#define SPACE_SHIFT_END(a) ((addr_shift < 0) ? (((a) << -addr_shift) | ((1 << -addr_shift) - 1)) : ((a) >> addr_shift))
int databus_width = cputype_databus_width(cpu->type, spacenum);
int addr_shift = cputype_addrbus_shift(cpu->type, spacenum);
int databus_width = cputype_get_databus_width(cpu->type, spacenum);
int addr_shift = cputype_get_addrbus_shift(cpu->type, spacenum);
int alignunit = databus_width/8;
address_map_entry *entry;
address_map *map;

10
src/emu/video/voodoo.c
View File

@ -2038,7 +2038,7 @@ static void check_stalled_cpu(voodoo_state *v, attotime current_time)
if (v->pci.stall_callback)
(*v->pci.stall_callback)(v->device, FALSE);
else
cpu_trigger(v->device->machine, v->trigger);
cpuexec_trigger(v->device->machine, v->trigger);
}
/* if not, set a timer for the next one */
@ -2062,7 +2062,7 @@ static void stall_cpu(voodoo_state *v, int state, attotime current_time)
if (v->pci.stall_callback)
(*v->pci.stall_callback)(v->device, TRUE);
else
cpu_spinuntil_trigger(v->trigger);
cpu_spinuntil_trigger(v->device->machine->activecpu, v->trigger);
/* set a timer to clear the stall */
timer_adjust_oneshot(v->pci.continue_timer, attotime_sub(v->pci.op_end_time, current_time), 0);
@ -3686,7 +3686,7 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
/* bit 31 is not used */
/* eat some cycles since people like polling here */
activecpu_eat_cycles(1000);
cpu_eat_cycles(v->device->machine->activecpu, 1000);
break;
/* bit 2 of the initEnable register maps this to dacRead */
@ -3699,7 +3699,7 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
case vRetrace:
/* eat some cycles since people like polling here */
activecpu_eat_cycles(10);
cpu_eat_cycles(v->device->machine->activecpu, 10);
result = video_screen_get_vpos(v->screen);
break;
@ -3714,7 +3714,7 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
result = v->fbi.cmdfifo[0].rdptr;
/* eat some cycles since people like polling here */
activecpu_eat_cycles(1000);
cpu_eat_cycles(v->device->machine->activecpu, 1000);
break;
case cmdFifoAMin:

4
src/mame/audio/aztarac.c
View File

@ -23,7 +23,7 @@ WRITE16_HANDLER( aztarac_sound_w )
soundlatch_w(machine, offset, data);
sound_status ^= 0x21;
if (sound_status & 0x20)
cpunum_set_input_line(machine, 1, 0, HOLD_LINE);
cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);
}
}
@ -49,7 +49,7 @@ INTERRUPT_GEN( aztarac_snd_timed_irq )
sound_status ^= 0x10;
if (sound_status & 0x10)
cpunum_set_input_line(machine, 1,0,HOLD_LINE);
cpu_set_input_line(device,0,HOLD_LINE);
}

18
src/mame/audio/cage.c
View File

@ -162,7 +162,7 @@ void cage_init(running_machine *machine, offs_t speedup)
memory_set_bankptr(11, memory_region(machine, "cage"));
cage_cpu = mame_find_cpu_index(machine, "cage");
cage_cpu_clock_period = ATTOTIME_IN_HZ(cpunum_get_clock(cage_cpu));
cage_cpu_clock_period = ATTOTIME_IN_HZ(cpu_get_clock(machine->cpu[cage_cpu]));
cage_cpu_h1_clock_period = attotime_mul(cage_cpu_clock_period, 2);
dma_timer = timer_alloc(dma_timer_callback, NULL);
@ -194,7 +194,7 @@ void cage_reset_w(int state)
{
if (state)
cage_control_w(Machine, 0);
cpunum_set_input_line(Machine, cage_cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(Machine->cpu[cage_cpu], INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -223,7 +223,7 @@ static TIMER_CALLBACK( dma_timer_callback )
tms32031_io_regs[DMA_SOURCE_ADDR] = param;
/* set the interrupt */
cpunum_set_input_line(machine, cage_cpu, TMS32031_DINT, ASSERT_LINE);
cpu_set_input_line(machine->cpu[cage_cpu], TMS32031_DINT, ASSERT_LINE);
dma_enabled = 0;
}
@ -292,7 +292,7 @@ static TIMER_CALLBACK( cage_timer_callback )
int which = param;
/* set the interrupt */
cpunum_set_input_line(machine, cage_cpu, TMS32031_TINT0 + which, ASSERT_LINE);
cpu_set_input_line(machine->cpu[cage_cpu], TMS32031_TINT0 + which, ASSERT_LINE);
cage_timer_enabled[which] = 0;
update_timer(which);
}
@ -477,7 +477,7 @@ static READ32_HANDLER( cage_from_main_r )
logerror("%06X:CAGE read command = %04X\n", cpu_get_pc(machine->activecpu), cage_from_main);
cpu_to_cage_ready = 0;
update_control_lines(machine);
cpunum_set_input_line(machine, cage_cpu, TMS32031_IRQ0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[cage_cpu], TMS32031_IRQ0, CLEAR_LINE);
return cage_from_main;
}
@ -525,7 +525,7 @@ static TIMER_CALLBACK( deferred_cage_w )
cage_from_main = param;
cpu_to_cage_ready = 1;
update_control_lines(machine);
cpunum_set_input_line(machine, cage_cpu, TMS32031_IRQ0, ASSERT_LINE);
cpu_set_input_line(machine->cpu[cage_cpu], TMS32031_IRQ0, ASSERT_LINE);
}
@ -557,7 +557,7 @@ void cage_control_w(running_machine *machine, UINT16 data)
/* CPU is reset if both control lines are 0 */
if (!(cage_control & 3))
{
cpunum_set_input_line(Machine, cage_cpu, INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(Machine->cpu[cage_cpu], INPUT_LINE_RESET, ASSERT_LINE);
dma_enabled = 0;
dma_timer_enabled = 0;
@ -574,7 +574,7 @@ void cage_control_w(running_machine *machine, UINT16 data)
cage_to_cpu_ready = 0;
}
else
cpunum_set_input_line(Machine, cage_cpu, INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(Machine->cpu[cage_cpu], INPUT_LINE_RESET, CLEAR_LINE);
/* update the control state */
update_control_lines(machine);
@ -590,7 +590,7 @@ void cage_control_w(running_machine *machine, UINT16 data)
static WRITE32_HANDLER( speedup_w )
{
activecpu_eat_cycles(100);
cpu_eat_cycles(machine->activecpu, 100);
COMBINE_DATA(&speedup_ram[offset]);
}

2
src/mame/audio/carnival.c
View File

@ -235,7 +235,7 @@ WRITE8_HANDLER( carnival_audio_2_w )
if ( bitsGoneHigh & OUT_PORT_2_MUSIC_RESET )
/* reset output is no longer asserted active low */
cpunum_set_input_line(machine, CPU_MUSIC_ID, INPUT_LINE_RESET, PULSE_LINE );
cpu_set_input_line(machine->cpu[CPU_MUSIC_ID], INPUT_LINE_RESET, PULSE_LINE );
}

6
src/mame/audio/cchasm.c
View File

@ -72,7 +72,7 @@ WRITE8_HANDLER( cchasm_snd_io_w )
case 0x41:
sound_flags |= 0x40;
soundlatch4_w (machine, offset, data);
cpunum_set_input_line(machine, 0, 1, HOLD_LINE);
cpu_set_input_line(machine->cpu[0], 1, HOLD_LINE);
break;
case 0x61:
@ -100,7 +100,7 @@ WRITE16_HANDLER( cchasm_io_w )
sound_flags |= 0x80;
soundlatch2_w (machine, offset, data);
z80ctc_trg2_w (ctc, 0, 1);
cpunum_set_input_line(machine, 1, INPUT_LINE_NMI, PULSE_LINE);
cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
break;
case 2:
led = data;
@ -134,7 +134,7 @@ static int output[2];
static void ctc_interrupt (const device_config *device, int state)
{
cpunum_set_input_line(device->machine, 1, 0, state);
cpu_set_input_line(device->machine->cpu[1], 0, state);
}
static WRITE8_DEVICE_HANDLER( ctc_timer_1_w )

2
src/mame/audio/cinemat.c
View File

@ -1494,7 +1494,7 @@ static const ay8910_interface demon_ay8910_interface_3 =
static void ctc_interrupt(const device_config *device, int state)
{
cpunum_set_input_line(device->machine, 1, 0, state);
cpu_set_input_line(device->machine->cpu[1], 0, state);
}

8
src/mame/audio/cyberbal.c
View File

@ -62,7 +62,7 @@ WRITE8_HANDLER( cyberbal_sound_bank_select_w )
memory_set_bankptr(8, &bank_base[0x1000 * ((data >> 6) & 3)]);
coin_counter_w(1, (data >> 5) & 1);
coin_counter_w(0, (data >> 4) & 1);
cpunum_set_input_line(machine, 3, INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(machine->cpu[3], INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
if (!(data & 0x01)) sndti_reset(SOUND_YM2151, 0);
}
@ -97,8 +97,8 @@ WRITE8_HANDLER( cyberbal_sound_68k_6502_w )
static void update_sound_68k_interrupts(running_machine *machine)
{
cpunum_set_input_line(machine, 3, 6, fast_68k_int ? ASSERT_LINE : CLEAR_LINE);
cpunum_set_input_line(machine, 3, 2, io_68k_int ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[3], 6, fast_68k_int ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[3], 2, io_68k_int ? ASSERT_LINE : CLEAR_LINE);
}
@ -107,7 +107,7 @@ INTERRUPT_GEN( cyberbal_sound_68k_irq_gen )
if (!fast_68k_int)
{
fast_68k_int = 1;
update_sound_68k_interrupts(machine);
update_sound_68k_interrupts(device->machine);
}
}

70
src/mame/audio/dcs.c
View File

@ -410,7 +410,7 @@ static void timer_enable_callback(int enable);
static TIMER_CALLBACK( internal_timer_callback );
static TIMER_CALLBACK( dcs_irq );
static TIMER_CALLBACK( sport0_irq );
static void recompute_sample_rate(void);
static void recompute_sample_rate(running_machine *machine);
static void sound_tx_callback(int port, INT32 data);
static READ16_HANDLER( dcs_polling_r );
@ -761,7 +761,7 @@ static void dcs_boot(void)
/* rev 3/4: HALT the ADSP-2181 until program is downloaded via IDMA */
case 3:
case 4:
cpunum_set_input_line(Machine, dcs.cpunum, INPUT_LINE_HALT, ASSERT_LINE);
cpu_set_input_line(Machine->cpu[dcs.cpunum], INPUT_LINE_HALT, ASSERT_LINE);
dsio.start_on_next_write = 0;
break;
}
@ -814,9 +814,9 @@ static TIMER_CALLBACK( dcs_reset )
memset(dcs.control_regs, 0, sizeof(dcs.control_regs));
/* clear all interrupts */
cpunum_set_input_line(machine, dcs.cpunum, ADSP2105_IRQ0, CLEAR_LINE);
cpunum_set_input_line(machine, dcs.cpunum, ADSP2105_IRQ1, CLEAR_LINE);
cpunum_set_input_line(machine, dcs.cpunum, ADSP2105_IRQ2, CLEAR_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2105_IRQ0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2105_IRQ1, CLEAR_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2105_IRQ2, CLEAR_LINE);
/* initialize the comm bits */
SET_INPUT_EMPTY();
@ -1379,7 +1379,7 @@ static WRITE16_HANDLER( denver_w )
dmadac_enable(0, dcs.channels, enable);
if (dcs.channels < 6)
dmadac_enable(dcs.channels, 6 - dcs.channels, FALSE);
recompute_sample_rate();
recompute_sample_rate(machine);
}
break;
@ -1436,7 +1436,7 @@ WRITE32_HANDLER( dsio_idma_data_w )
if (dsio.start_on_next_write && --dsio.start_on_next_write == 0)
{
logerror("Starting DSIO CPU\n");
cpunum_set_input_line(machine, dcs.cpunum, INPUT_LINE_HALT, CLEAR_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], INPUT_LINE_HALT, CLEAR_LINE);
}
}
@ -1476,7 +1476,7 @@ int dcs_control_r(void)
{
/* only boost for DCS2 boards */
if (!dcs.auto_ack && !transfer.hle_enabled)
cpu_boost_interleave(Machine, ATTOTIME_IN_NSEC(500), ATTOTIME_IN_USEC(5));
cpuexec_boost_interleave(Machine, ATTOTIME_IN_NSEC(500), ATTOTIME_IN_USEC(5));
return dcs.latch_control;
}
@ -1490,12 +1490,12 @@ void dcs_reset_w(int state)
/* just run through the init code again */
timer_call_after_resynch(NULL, 0, dcs_reset);
cpunum_set_input_line(Machine, dcs.cpunum, INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(Machine->cpu[dcs.cpunum], INPUT_LINE_RESET, ASSERT_LINE);
}
/* going low resets and reactivates the CPU */
else
cpunum_set_input_line(Machine, dcs.cpunum, INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(Machine->cpu[dcs.cpunum], INPUT_LINE_RESET, CLEAR_LINE);
}
@ -1534,10 +1534,10 @@ static void dcs_delayed_data_w(running_machine *machine, int data)
logerror("%08X:dcs_data_w(%04X)\n", cpu_get_pc(machine->activecpu), data);
/* boost the interleave temporarily */
cpu_boost_interleave(machine, ATTOTIME_IN_NSEC(500), ATTOTIME_IN_USEC(5));
cpuexec_boost_interleave(machine, ATTOTIME_IN_NSEC(500), ATTOTIME_IN_USEC(5));
/* set the IRQ line on the ADSP */
cpunum_set_input_line(machine, dcs.cpunum, ADSP2105_IRQ2, ASSERT_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2105_IRQ2, ASSERT_LINE);
/* indicate we are no longer empty */
if (dcs.last_input_empty && dcs.input_empty_cb)
@ -1574,7 +1574,7 @@ static WRITE16_HANDLER( input_latch_ack_w )
if (!dcs.last_input_empty && dcs.input_empty_cb)
(*dcs.input_empty_cb)(dcs.last_input_empty = 1);
SET_INPUT_EMPTY();
cpunum_set_input_line(machine, dcs.cpunum, ADSP2105_IRQ2, CLEAR_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2105_IRQ2, CLEAR_LINE);
}
@ -1666,7 +1666,7 @@ static WRITE16_HANDLER( output_control_w )
static READ16_HANDLER( output_control_r )
{
dcs.output_control_cycles = activecpu_gettotalcycles();
dcs.output_control_cycles = cpu_get_total_cycles(machine->activecpu);
return dcs.output_control;
}
@ -1684,7 +1684,7 @@ int dcs_data2_r(void)
*
*************************************/
static void update_timer_count(void)
static void update_timer_count(running_machine *machine)
{
UINT64 periods_since_start;
UINT64 elapsed_cycles;
@ -1695,7 +1695,7 @@ static void update_timer_count(void)
return;
/* count cycles */
elapsed_cycles = cpunum_gettotalcycles(dcs.cpunum) - dcs.timer_start_cycles;
elapsed_cycles = cpu_get_total_cycles(machine->cpu[dcs.cpunum]) - dcs.timer_start_cycles;
elapsed_clocks = elapsed_cycles / dcs.timer_scale;
/* if we haven't counted past the initial count yet, just do that */
@ -1721,23 +1721,23 @@ static TIMER_CALLBACK( internal_timer_callback )
/* we do this to avoid drifting */
dcs.timers_fired++;
target_cycles = dcs.timer_start_cycles + dcs.timer_scale * (dcs.timer_start_count + 1 + dcs.timers_fired * (dcs.timer_period + 1));
target_cycles -= cpunum_gettotalcycles(dcs.cpunum);
target_cycles -= cpu_get_total_cycles(machine->cpu[dcs.cpunum]);
/* set the next timer, but only if it's for a reasonable number */
if (!dcs.timer_ignore && (dcs.timer_period > 10 || dcs.timer_scale > 1))
timer_adjust_oneshot(dcs.internal_timer, ATTOTIME_IN_CYCLES(target_cycles, dcs.cpunum), 0);
cpunum_set_input_line(machine, dcs.cpunum, ADSP2105_TIMER, PULSE_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2105_TIMER, PULSE_LINE);
}
static void reset_timer(void)
static void reset_timer(running_machine *machine)
{
/* if not enabled, skip */
if (!dcs.timer_enable)
return;
/* compute the time until the first firing */
dcs.timer_start_cycles = cpunum_gettotalcycles(dcs.cpunum);
dcs.timer_start_cycles = cpu_get_total_cycles(machine->cpu[dcs.cpunum]);
dcs.timers_fired = 0;
/* if this is the first timer, check the IRQ routine for the DRAM refresh stub */
@ -1771,7 +1771,7 @@ static void timer_enable_callback(int enable)
if (enable)
{
// mame_printf_debug("Timer enabled @ %d cycles/int, or %f Hz\n", dcs.timer_scale * (dcs.timer_period + 1), 1.0 / ATTOTIME_IN_CYCLES(dcs.timer_scale * (dcs.timer_period + 1), dcs.cpunum));
reset_timer();
reset_timer(Machine);
}
else
{
@ -1822,7 +1822,7 @@ static READ16_HANDLER( adsp_control_r )
break;
case TIMER_COUNT_REG:
update_timer_count();
update_timer_count(machine);
result = dcs.control_regs[offset];
break;
@ -1845,7 +1845,7 @@ static WRITE16_HANDLER( adsp_control_w )
if (data & 0x0200)
{
logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", cpu_get_pc(machine->activecpu));
cpunum_set_input_line(machine, dcs.cpunum, INPUT_LINE_RESET, PULSE_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], INPUT_LINE_RESET, PULSE_LINE);
dcs_boot();
dcs.control_regs[SYSCONTROL_REG] = 0;
}
@ -1878,23 +1878,23 @@ static WRITE16_HANDLER( adsp_control_w )
data = (data & 0xff) + 1;
if (data != dcs.timer_scale)
{
update_timer_count();
update_timer_count(machine);
dcs.timer_scale = data;
reset_timer();
reset_timer(machine);
}
break;
case TIMER_COUNT_REG:
dcs.timer_start_count = data;
reset_timer();
reset_timer(machine);
break;
case TIMER_PERIOD_REG:
if (data != dcs.timer_period)
{
update_timer_count();
update_timer_count(machine);
dcs.timer_period = data;
reset_timer();
reset_timer(machine);
}
break;
@ -1939,7 +1939,7 @@ static TIMER_CALLBACK( dcs_irq )
reg = dcs.ireg_base;
/* generate the (internal, thats why the pulse) irq */
cpunum_set_input_line(machine, dcs.cpunum, ADSP2105_IRQ1, PULSE_LINE);
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2105_IRQ1, PULSE_LINE);
}
/* store it */
@ -1953,17 +1953,17 @@ static TIMER_CALLBACK( sport0_irq )
/* note that there is non-interrupt code that reads/modifies/writes the output_control */
/* register; if we don't interlock it, we will eventually lose sound (see CarnEvil) */
/* so we skip the SPORT interrupt if we read with output_control within the last 5 cycles */
if ((cpunum_gettotalcycles(dcs.cpunum) - dcs.output_control_cycles) > 5)
cpunum_set_input_line(machine, dcs.cpunum, ADSP2115_SPORT0_RX, PULSE_LINE);
if ((cpu_get_total_cycles(machine->cpu[dcs.cpunum]) - dcs.output_control_cycles) > 5)
cpu_set_input_line(machine->cpu[dcs.cpunum], ADSP2115_SPORT0_RX, PULSE_LINE);
}
static void recompute_sample_rate(void)
static void recompute_sample_rate(running_machine *machine)
{
/* calculate how long until we generate an interrupt */
/* frequency the time per each bit sent */
attotime sample_period = attotime_mul(ATTOTIME_IN_HZ(cpunum_get_clock(dcs.cpunum)), 2 * (dcs.control_regs[S1_SCLKDIV_REG] + 1));
attotime sample_period = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(machine->cpu[dcs.cpunum])), 2 * (dcs.control_regs[S1_SCLKDIV_REG] + 1));
/* now put it down to samples, so we know what the channel frequency has to be */
sample_period = attotime_mul(sample_period, 16 * dcs.channels);
@ -2016,7 +2016,7 @@ static void sound_tx_callback(int port, INT32 data)
dcs.ireg_base = source;
/* recompute the sample rate and timer */
recompute_sample_rate();
recompute_sample_rate(Machine);
return;
}
else
@ -2038,7 +2038,7 @@ static void sound_tx_callback(int port, INT32 data)
static READ16_HANDLER( dcs_polling_r )
{
activecpu_eat_cycles(1000);
cpu_eat_cycles(machine->activecpu, 1000);
return *dcs_polling_base;
}

4
src/mame/audio/dkong.c
View File

@ -1135,9 +1135,9 @@ static WRITE8_HANDLER( dkong_p1_w )
WRITE8_HANDLER( dkong_audio_irq_w )
{
if (data)
cpunum_set_input_line(machine, 1, 0, ASSERT_LINE);
cpu_set_input_line(machine->cpu[1], 0, ASSERT_LINE);
else
cpunum_set_input_line(machine, 1, 0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], 0, CLEAR_LINE);
}

4
src/mame/audio/exidy.c
View File

@ -114,7 +114,7 @@ static double freq_to_step;
static void update_irq_state(running_machine *machine, /* unused */ int state)
{
cpunum_set_input_line(machine, 1, M6502_IRQ_LINE, (pia_get_irq_b(1) | riot_irq_state) ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], M6502_IRQ_LINE, (pia_get_irq_b(1) | riot_irq_state) ? ASSERT_LINE : CLEAR_LINE);
}
@ -399,7 +399,7 @@ static void r6532_irq(const device_config *device, int state)
static void r6532_porta_w(const device_config *device, UINT8 newdata, UINT8 olddata)
{
if (has_mc3417)
cpunum_set_input_line(device->machine, 2, INPUT_LINE_RESET, (newdata & 0x10) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_RESET, (newdata & 0x10) ? CLEAR_LINE : ASSERT_LINE);
}

4
src/mame/audio/exidy440.c
View File

@ -340,7 +340,7 @@ static void channel_update(void *param, stream_sample_t **inputs, stream_sample_
static READ8_HANDLER( sound_command_r )
{
/* clear the FIRQ that got us here and acknowledge the read to the main CPU */
cpunum_set_input_line(machine, 1, 1, CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], 1, CLEAR_LINE);
exidy440_sound_command_ack = 1;
return exidy440_sound_command;
@ -376,7 +376,7 @@ static WRITE8_HANDLER( sound_volume_w )
static WRITE8_HANDLER( sound_interrupt_clear_w )
{
cpunum_set_input_line(machine, 1, 0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], 0, CLEAR_LINE);
}

6
src/mame/audio/gottlieb.c
View File

@ -96,7 +96,7 @@ static void gottlieb1_sh_w(const device_config *riot, UINT8 data)
static void snd_interrupt(const device_config *device, int state)
{
cpunum_set_input_line(device->machine, 1, M6502_IRQ_LINE, state);
cpu_set_input_line(device->machine->cpu[1], M6502_IRQ_LINE, state);
}
@ -109,7 +109,7 @@ static UINT8 r6532_portb_r(const device_config *device, UINT8 olddata)
static void r6532_portb_w(const device_config *device, UINT8 newdata, UINT8 olddata)
{
/* unsure if this is ever used, but the NMI is connected to the RIOT's PB7 */
cpunum_set_input_line(device->machine, 1, INPUT_LINE_NMI, (newdata & 0x80) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, (newdata & 0x80) ? CLEAR_LINE : ASSERT_LINE);
}
@ -221,7 +221,7 @@ void gottlieb_knocker(void)
/* callback for the timer */
static TIMER_CALLBACK( gottlieb_nmi_generate )
{
cpunum_set_input_line(machine, 1,INPUT_LINE_NMI,PULSE_LINE);
cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
}

16
src/mame/audio/harddriv.c
View File

@ -67,8 +67,8 @@ void hdsnd_init(running_machine *machine)
static void update_68k_interrupts(running_machine *machine)
{
cpunum_set_input_line(machine, hdcpu_sound, 1, mainflag ? ASSERT_LINE : CLEAR_LINE);
cpunum_set_input_line(machine, hdcpu_sound, 3, irq68k ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[hdcpu_sound], 1, mainflag ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[hdcpu_sound], 3, irq68k ? ASSERT_LINE : CLEAR_LINE);
}
@ -110,8 +110,8 @@ WRITE16_HANDLER( hd68k_snd_data_w )
WRITE16_HANDLER( hd68k_snd_reset_w )
{
cpunum_set_input_line(machine, hdcpu_sound, INPUT_LINE_RESET, ASSERT_LINE);
cpunum_set_input_line(machine, hdcpu_sound, INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(machine->cpu[hdcpu_sound], INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(machine->cpu[hdcpu_sound], INPUT_LINE_RESET, CLEAR_LINE);
mainflag = soundflag = 0;
update_68k_interrupts(machine);
logerror("%06X:Reset sound\n", cpu_get_previouspc(machine->activecpu));
@ -214,7 +214,7 @@ WRITE16_HANDLER( hdsnd68k_latches_w )
case 4: /* RES320 */
logerror("%06X:RES320=%d\n", cpu_get_previouspc(machine->activecpu), data);
if (hdcpu_sounddsp != -1)
cpunum_set_input_line(machine, hdcpu_sounddsp, INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(machine->cpu[hdcpu_sounddsp], INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
break;
case 7: /* LED */
@ -301,17 +301,17 @@ WRITE16_HANDLER( hdsnd68k_320com_w )
READ16_HANDLER( hdsnddsp_get_bio )
{
UINT64 cycles_since_last_bio = activecpu_gettotalcycles() - last_bio_cycles;
UINT64 cycles_since_last_bio = cpu_get_total_cycles(machine->activecpu) - last_bio_cycles;
INT32 cycles_until_bio = CYCLES_PER_BIO - cycles_since_last_bio;
/* if we're not at the next BIO yet, advance us there */
if (cycles_until_bio > 0)
{
activecpu_adjust_icount(-cycles_until_bio);
cpu_adjust_icount(machine->activecpu, -cycles_until_bio);
last_bio_cycles += CYCLES_PER_BIO;
}
else
last_bio_cycles = activecpu_gettotalcycles();
last_bio_cycles = cpu_get_total_cycles(machine->activecpu);
return ASSERT_LINE;
}

6
src/mame/audio/irem.c
View File

@ -40,7 +40,7 @@ WRITE8_HANDLER( irem_sound_cmd_w )
if ((data & 0x80) == 0)
soundlatch_w(machine, 0, data & 0x7f);
else
cpunum_set_input_line(machine, 1, 0, ASSERT_LINE);
cpu_set_input_line(machine->cpu[1], 0, ASSERT_LINE);
}
@ -147,7 +147,7 @@ static WRITE8_HANDLER( ay8910_1_porta_w )
static WRITE8_HANDLER( sound_irq_ack_w )
{
cpunum_set_input_line(machine, 1, 0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], 0, CLEAR_LINE);
}
@ -175,7 +175,7 @@ static WRITE8_HANDLER( m62_adpcm_w )
static void adpcm_int(running_machine *machine, int data)
{
cpunum_set_input_line(machine, 1, INPUT_LINE_NMI, PULSE_LINE);
cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
/* the first MSM5205 clocks the second */
if (sndti_exists(SOUND_MSM5205, 1))

24
src/mame/audio/jaguar.c
View File

@ -190,15 +190,15 @@ static TIMER_CALLBACK( serial_callback );
*
*************************************/
void jaguar_dsp_suspend(void)
void jaguar_dsp_suspend(running_machine *machine)
{
cpunum_suspend(2, SUSPEND_REASON_SPIN, 1);
cpu_suspend(machine->cpu[2], SUSPEND_REASON_SPIN, 1);
}
void jaguar_dsp_resume(void)
void jaguar_dsp_resume(running_machine *machine)
{
cpunum_resume(2, SUSPEND_REASON_SPIN);
cpu_resume(machine->cpu[2], SUSPEND_REASON_SPIN);
}
@ -213,11 +213,11 @@ static void update_gpu_irq(void)
{
if (gpu_irq_state & dsp_regs[JINTCTRL] & 0x1f)
{
cpunum_set_input_line(Machine, 1, 1, ASSERT_LINE);
jaguar_gpu_resume();
cpu_set_input_line(Machine->cpu[1], 1, ASSERT_LINE);
jaguar_gpu_resume(Machine);
}
else
cpunum_set_input_line(Machine, 1, 1, CLEAR_LINE);
cpu_set_input_line(Machine->cpu[1], 1, CLEAR_LINE);
}
@ -374,7 +374,7 @@ static WRITE32_HANDLER( dsp_flags_w )
{
UINT32 r30 = cpu_get_reg(machine->activecpu, JAGUAR_R30) & 0xffffff;
if (r30 >= 0xf1b124 && r30 <= 0xf1b126)
jaguar_dsp_suspend();
jaguar_dsp_suspend(machine);
}
}
}
@ -394,8 +394,8 @@ static WRITE32_HANDLER( dsp_flags_w )
static TIMER_CALLBACK( serial_chunky_callback )
{
/* assert the A2S IRQ on CPU #2 (DSP) */
cpunum_set_input_line(machine, 2, 1, ASSERT_LINE);
jaguar_dsp_resume();
cpu_set_input_line(machine->cpu[2], 1, ASSERT_LINE);
jaguar_dsp_resume(machine);
/* fix flaky code in interrupt handler which thwarts our speedup */
if ((jaguar_dsp_ram[0x3e/4] & 0xffff) == 0xbfbc &&
@ -413,8 +413,8 @@ static TIMER_CALLBACK( serial_chunky_callback )
static TIMER_CALLBACK( serial_callback )
{
/* assert the A2S IRQ on CPU #2 (DSP) */
cpunum_set_input_line(machine, 2, 1, ASSERT_LINE);
jaguar_dsp_resume();
cpu_set_input_line(machine->cpu[2], 1, ASSERT_LINE);
jaguar_dsp_resume(machine);
}
#endif

4
src/mame/audio/jedi.c
View File

@ -60,7 +60,7 @@ static SOUND_RESET( jedi )
static WRITE8_HANDLER( irq_ack_w )
{
cpunum_set_input_line(machine, 1, M6502_IRQ_LINE, CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], M6502_IRQ_LINE, CLEAR_LINE);
}
@ -73,7 +73,7 @@ static WRITE8_HANDLER( irq_ack_w )
WRITE8_HANDLER( jedi_audio_reset_w )
{
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
}

12
src/mame/audio/leland.c
View File

@ -616,7 +616,7 @@ static IRQ_CALLBACK(int_callback)
if (LOG_INTERRUPTS) logerror("(%f) **** Acknowledged interrupt vector %02X\n", attotime_to_double(timer_get_time()), i80186.intr.poll_status & 0x1f);
/* clear the interrupt */
cpu_set_info_int(machine->activecpu, CPUINFO_INT_INPUT_STATE + 0, CLEAR_LINE);
cpu_set_info_int(device->machine->activecpu, CPUINFO_INT_INPUT_STATE + 0, CLEAR_LINE);
i80186.intr.pending = 0;
/* clear the request and set the in-service bit */
@ -724,7 +724,7 @@ generate_int:
/* generate the appropriate interrupt */
i80186.intr.poll_status = 0x8000 | new_vector;
if (!i80186.intr.pending)
cpunum_set_input_line(Machine, 2, 0, ASSERT_LINE);
cpu_set_input_line(Machine->cpu[2], 0, ASSERT_LINE);
i80186.intr.pending = 1;
if (LOG_INTERRUPTS) logerror("(%f) **** Requesting interrupt vector %02X\n", attotime_to_double(timer_get_time()), new_vector);
}
@ -1093,7 +1093,7 @@ static READ16_HANDLER( i80186_internal_port_r )
case 0x24/2:
if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", cpu_get_pc(machine->activecpu));
if (i80186.intr.poll_status & 0x8000)
int_callback(machine, 0);
int_callback(machine->activecpu, 0);
return i80186.intr.poll_status;
case 0x26/2:
@ -1429,7 +1429,7 @@ static WRITE16_HANDLER( i80186_internal_port_w )
/* we need to do this at a time when the 80186 context is swapped in */
/* this register is generally set once at startup and never again, so it's a good */
/* time to set it up */
cpunum_set_irq_callback(cpunum_get_active(), int_callback);
cpu_set_irq_callback(machine->activecpu, int_callback);
break;
case 0xc0/2:
@ -1660,14 +1660,14 @@ WRITE8_HANDLER( leland_80186_control_w )
}
/* /RESET */
cpunum_set_input_line(machine, 2, INPUT_LINE_RESET, data & 0x80 ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, data & 0x80 ? CLEAR_LINE : ASSERT_LINE);
/* /NMI */
/* If the master CPU doesn't get a response by the time it's ready to send
the next command, it uses an NMI to force the issue; unfortunately, this
seems to really screw up the sound system. It turns out it's better to
just wait for the original interrupt to occur naturally */
/* cpunum_set_input_line(machine, 2, INPUT_LINE_NMI, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);*/
/* cpu_set_input_line(machine->cpu[2], INPUT_LINE_NMI, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);*/
/* INT0 */
if (data & 0x20)

30
src/mame/audio/mcr.c
View File

@ -315,14 +315,14 @@ static INTERRUPT_GEN( ssio_14024_clock )
/* if the low 5 bits clocked to 0, bit 6 has changed state */
if ((ssio_14024_count & 0x3f) == 0)
cpunum_set_input_line(machine, ssio_sound_cpu, 0, (ssio_14024_count & 0x40) ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(device, 0, (ssio_14024_count & 0x40) ? ASSERT_LINE : CLEAR_LINE);
}
static READ8_HANDLER( ssio_irq_clear )
{
/* a read here asynchronously resets the 14024 count, clearing /SINT */
ssio_14024_count = 0;
cpunum_set_input_line(machine, ssio_sound_cpu, 0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[ssio_sound_cpu], 0, CLEAR_LINE);
return 0xff;
}
@ -398,7 +398,7 @@ void ssio_reset_w(int state)
{
int i;
cpunum_set_input_line(Machine, ssio_sound_cpu, INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(Machine->cpu[ssio_sound_cpu], INPUT_LINE_RESET, ASSERT_LINE);
/* latches also get reset */
for (i = 0; i < 4; i++)
@ -408,7 +408,7 @@ void ssio_reset_w(int state)
}
/* going low resets and reactivates the CPU */
else
cpunum_set_input_line(Machine, ssio_sound_cpu, INPUT_LINE_RESET, CLEAR_LINE);
cpu_set_input_line(Machine->cpu[ssio_sound_cpu], INPUT_LINE_RESET, CLEAR_LINE);
}
READ8_HANDLER( ssio_input_port_r )
@ -534,7 +534,7 @@ static void csdeluxe_irq(running_machine *machine, int state)
{
int combined_state = pia_get_irq_a(0) | pia_get_irq_b(0);
cpunum_set_input_line(machine, csdeluxe_sound_cpu, 4, combined_state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[csdeluxe_sound_cpu], 4, combined_state ? ASSERT_LINE : CLEAR_LINE);
}
static TIMER_CALLBACK( csdeluxe_delayed_data_w )
@ -544,7 +544,7 @@ static TIMER_CALLBACK( csdeluxe_delayed_data_w )
/* oftentimes games will write one nibble at a time; the sync on this is very */
/* important, so we boost the interleave briefly while this happens */
cpu_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
}
static READ16_HANDLER( csdeluxe_pia_r )
@ -581,7 +581,7 @@ READ8_HANDLER( csdeluxe_status_r )
void csdeluxe_reset_w(int state)
{
cpunum_set_input_line(Machine, csdeluxe_sound_cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(Machine->cpu[csdeluxe_sound_cpu], INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -657,7 +657,7 @@ static void soundsgood_irq(running_machine *machine, int state)
{
int combined_state = pia_get_irq_a(1) | pia_get_irq_b(1);
cpunum_set_input_line(machine, soundsgood_sound_cpu, 4, combined_state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[soundsgood_sound_cpu], 4, combined_state ? ASSERT_LINE : CLEAR_LINE);
}
static TIMER_CALLBACK( soundsgood_delayed_data_w )
@ -667,7 +667,7 @@ static TIMER_CALLBACK( soundsgood_delayed_data_w )
/* oftentimes games will write one nibble at a time; the sync on this is very */
/* important, so we boost the interleave briefly while this happens */
cpu_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(250));
cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(250));
}
@ -685,7 +685,7 @@ READ8_HANDLER( soundsgood_status_r )
void soundsgood_reset_w(int state)
{
//if (state) mame_printf_debug("SG Reset\n");
cpunum_set_input_line(Machine, soundsgood_sound_cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(Machine->cpu[soundsgood_sound_cpu], INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -751,7 +751,7 @@ static void turbocs_irq(running_machine *machine, int state)
{
int combined_state = pia_get_irq_a(0) | pia_get_irq_b(0);
cpunum_set_input_line(machine, turbocs_sound_cpu, M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[turbocs_sound_cpu], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
}
static TIMER_CALLBACK( turbocs_delayed_data_w )
@ -761,7 +761,7 @@ static TIMER_CALLBACK( turbocs_delayed_data_w )
/* oftentimes games will write one nibble at a time; the sync on this is very */
/* important, so we boost the interleave briefly while this happens */
cpu_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
}
@ -778,7 +778,7 @@ READ8_HANDLER( turbocs_status_r )
void turbocs_reset_w(int state)
{
cpunum_set_input_line(Machine, turbocs_sound_cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(Machine->cpu[turbocs_sound_cpu], INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}
@ -884,7 +884,7 @@ static void squawkntalk_irq(running_machine *machine, int state)
{
int combined_state = pia_get_irq_a(0) | pia_get_irq_b(0) | pia_get_irq_a(1) | pia_get_irq_b(1);
cpunum_set_input_line(machine, squawkntalk_sound_cpu, M6808_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[squawkntalk_sound_cpu], M6808_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
}
static TIMER_CALLBACK( squawkntalk_delayed_data_w )
@ -902,7 +902,7 @@ WRITE8_HANDLER( squawkntalk_data_w )
void squawkntalk_reset_w(int state)
{
cpunum_set_input_line(Machine, squawkntalk_sound_cpu, INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(Machine->cpu[squawkntalk_sound_cpu], INPUT_LINE_RESET, state ? ASSERT_LINE : CLEAR_LINE);
}

6
src/mame/audio/n8080.c
View File

@ -201,7 +201,7 @@ static void spacefev_sound_pins_changed(void)
}
if (changes & ((1 << 0x2) | (1 << 0x3) | (1 << 0x5)))
{
cpunum_set_input_line(Machine, 1, 0, PULSE_LINE);
cpu_set_input_line(Machine->cpu[1], 0, PULSE_LINE);
}
}
@ -224,7 +224,7 @@ static void sheriff_sound_pins_changed(void)
}
if (changes & ((1 << 0x2) | (1 << 0x3) | (1 << 0x5)))
{
cpunum_set_input_line(Machine, 1, 0, PULSE_LINE);
cpu_set_input_line(Machine->cpu[1], 0, PULSE_LINE);
}
}
@ -239,7 +239,7 @@ static void helifire_sound_pins_changed(void)
if (changes & (1 << 6))
{
cpunum_set_input_line(Machine, 1, 0, PULSE_LINE);
cpu_set_input_line(Machine->cpu[1], 0, PULSE_LINE);
}
}

4
src/mame/audio/namco54.c
View File

@ -110,7 +110,7 @@ ADDRESS_MAP_END
static TIMER_CALLBACK( namco_54xx_irq_clear )
{
cpunum_set_input_line(machine, param, 0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[param], 0, CLEAR_LINE);
}
void namco_54xx_write(UINT8 data)
@ -122,7 +122,7 @@ void namco_54xx_write(UINT8 data)
timer_call_after_resynch(NULL, data, namco_54xx_latch_callback);
cpunum_set_input_line(Machine, cpunum, 0, ASSERT_LINE);
cpu_set_input_line(Machine->cpu[cpunum], 0, ASSERT_LINE);
// The execution time of one instruction is ~4us, so we must make sure to
// give the cpu time to poll the /IRQ input before we clear it.

8
src/mame/audio/namcoc7x.c
View File

@ -38,7 +38,7 @@ static READ16_HANDLER( speedup_r )
{
if ((cpu_get_pc(machine->activecpu) == 0xc12d) && (!(su_82 & 0xff00)))
{
cpu_spinuntil_int();
cpu_spinuntil_int(machine->activecpu);
}
return su_82;
@ -187,9 +187,9 @@ ADDRESS_MAP_END
INTERRUPT_GEN( namcoc7x_interrupt )
{
if (cpu_getiloops() == 0)
cpunum_set_input_line(machine, 1, M37710_LINE_IRQ0, HOLD_LINE);
if (cpu_getiloops(device) == 0)
cpu_set_input_line(device, M37710_LINE_IRQ0, HOLD_LINE);
else
cpunum_set_input_line(machine, 1, M37710_LINE_IRQ2, HOLD_LINE);
cpu_set_input_line(device, M37710_LINE_IRQ2, HOLD_LINE);
}

2
src/mame/audio/polepos.c
View File

@ -64,7 +64,7 @@ static void engine_sound_update(void *param, stream_sample_t **inputs, stream_sa
}
/* determine the effective clock rate */
clock = (cpunum_get_clock(0) / 16) * ((sample_msb + 1) * 64 + sample_lsb + 1) / (64*64);
clock = (cpu_get_clock(Machine->cpu[0]) / 16) * ((sample_msb + 1) * 64 + sample_lsb + 1) / (64*64);
step = (clock << 12) / OUTPUT_RATE;
/* determine the volume */

6
src/mame/audio/redalert.c
View File

@ -81,7 +81,7 @@ WRITE8_HANDLER( redalert_audio_command_w )
/* D7 is also connected to the NMI input of the CPU -
the NMI is actually toggled by a 74121 */
if ((data & 0x80) == 0x00)
cpunum_set_input_line(machine, 1, INPUT_LINE_NMI, PULSE_LINE);
cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
}
@ -165,7 +165,7 @@ static SOUND_START( redalert_audio )
WRITE8_HANDLER( redalert_voice_command_w )
{
soundlatch2_w(machine, 0, (data & 0x78) >> 3);
cpunum_set_input_line(machine, 2, I8085_RST75_LINE, (~data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[2], I8085_RST75_LINE, (~data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
}
@ -290,7 +290,7 @@ WRITE8_HANDLER( demoneye_audio_command_w )
{
/* the byte is connected to port A of the AY8910 */
soundlatch_w(machine, 0, data);
cpunum_set_input_line(machine, 1, INPUT_LINE_NMI, PULSE_LINE);
cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
}

16
src/mame/audio/scramble.c
View File

@ -47,7 +47,7 @@ static const int scramble_timer[10] =
READ8_HANDLER( scramble_portB_r )
{
return scramble_timer[(activecpu_gettotalcycles()/512) % 10];
return scramble_timer[(cpu_get_total_cycles(machine->activecpu)/512) % 10];
}
@ -76,7 +76,7 @@ static const int frogger_timer[10] =
READ8_HANDLER( frogger_portB_r )
{
return frogger_timer[(activecpu_gettotalcycles()/512) % 10];
return frogger_timer[(cpu_get_total_cycles(machine->activecpu)/512) % 10];
}
@ -145,24 +145,24 @@ static void scramble_sh_7474_callback(void)
{
/* the Q bar is connected to the Z80's INT line. But since INT is complemented, */
/* we need to complement Q bar */
cpunum_set_input_line(Machine, 1, 0, !TTL7474_output_comp_r(2) ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(Machine->cpu[1], 0, !TTL7474_output_comp_r(2) ? ASSERT_LINE : CLEAR_LINE);
}
static void sfx_sh_7474_callback(void)
{
/* the Q bar is connected to the Z80's INT line. But since INT is complemented, */
/* we need to complement Q bar */
cpunum_set_input_line(Machine, 2, 0, !TTL7474_output_comp_r(3) ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(Machine->cpu[2], 0, !TTL7474_output_comp_r(3) ? ASSERT_LINE : CLEAR_LINE);
}
WRITE8_HANDLER( hotshock_sh_irqtrigger_w )
{
cpunum_set_input_line(machine, 1, 0, ASSERT_LINE);
cpu_set_input_line(machine->cpu[1], 0, ASSERT_LINE);
}
READ8_HANDLER( hotshock_soundlatch_r )
{
cpunum_set_input_line(machine, 1, 0, CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], 0, CLEAR_LINE);
return soundlatch_r(machine,0);
}
@ -211,7 +211,7 @@ static const struct TTL7474_interface sfx_sh_7474_intf =
void scramble_sh_init(void)
{
cpunum_set_irq_callback(1, scramble_sh_irq_callback);
cpu_set_irq_callback(Machine->cpu[1], scramble_sh_irq_callback);
TTL7474_config(2, &scramble_sh_7474_intf);
@ -221,7 +221,7 @@ void scramble_sh_init(void)
void sfx_sh_init(void)
{
cpunum_set_irq_callback(2, sfx_sh_irq_callback);
cpu_set_irq_callback(Machine->cpu[2], sfx_sh_irq_callback);
TTL7474_config(3, &sfx_sh_7474_intf);

4
src/mame/audio/segag80r.c
View File

@ -933,8 +933,8 @@ static WRITE8_DEVICE_HANDLER( n7751_command_w )
D3 = /INT line
*/
n7751_command = data & 0x07;
cpunum_set_input_line(device->machine, 1, 0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
cpu_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(100));
cpu_set_input_line(device->machine->cpu[1], 0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(100));
}

10
src/mame/audio/segasnd.c
View File

@ -215,7 +215,7 @@ static TIMER_CALLBACK( delayed_speech_w )
speech_latch = data;
/* the high bit goes directly to the INT line */
cpunum_set_input_line(machine, 1, 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(machine->cpu[1], 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
/* a clock on the high bit clocks a 1 into T0 */
if (!(old & 0x80) && (data & 0x80))
@ -314,7 +314,7 @@ static TIMER_CALLBACK( increment_t1_clock )
void sega_usb_reset(UINT8 t1_clock_mask)
{
/* halt the USB CPU at reset time */
cpunum_set_input_line(Machine, usb.cpunum, INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(Machine->cpu[usb.cpunum], INPUT_LINE_RESET, ASSERT_LINE);
/* start the clock timer */
timer_pulse(attotime_mul(ATTOTIME_IN_HZ(USB_2MHZ_CLOCK), 256), NULL, 0, increment_t1_clock);
@ -333,7 +333,7 @@ READ8_HANDLER( sega_usb_status_r )
{
LOG(("%04X:usb_data_r = %02X\n", cpu_get_pc(machine->activecpu), (usb.out_latch & 0x81) | (usb.in_latch & 0x7e)));
activecpu_adjust_icount(-200);
cpu_adjust_icount(machine->activecpu, -200);
/* only bits 0 and 7 are controlled by the I8035; the remaining */
/* bits 1-6 reflect the current input latch values */
@ -346,7 +346,7 @@ static TIMER_CALLBACK( delayed_usb_data_w )
int data = param;
/* look for rising/falling edges of bit 7 to control the RESET line */
cpunum_set_input_line(machine, usb.cpunum, INPUT_LINE_RESET, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
cpu_set_input_line(machine->cpu[usb.cpunum], INPUT_LINE_RESET, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
/* if the CLEAR line is set, the low 7 bits of the input are ignored */
if ((usb.last_p2_value & 0x40) == 0)
@ -363,7 +363,7 @@ WRITE8_HANDLER( sega_usb_data_w )
timer_call_after_resynch(NULL, data, delayed_usb_data_w);
/* boost the interleave so that sequences can be sent */
cpu_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(250));
cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(250));
}

4
src/mame/audio/seibu.c
View File

@ -317,9 +317,9 @@ static void update_irq_lines(running_machine *machine, int param)
}
if ((irq1 & irq2) == 0xff) /* no IRQs pending */
cpunum_set_input_line(machine, sound_cpu,0,CLEAR_LINE);
cpu_set_input_line(machine->cpu[sound_cpu],0,CLEAR_LINE);
else /* IRQ pending */
cpunum_set_input_line_and_vector(machine, sound_cpu,0,ASSERT_LINE,irq1 & irq2);
cpu_set_input_line_and_vector(machine->cpu[sound_cpu],0,ASSERT_LINE,irq1 & irq2);
}
WRITE8_HANDLER( seibu_irq_clear_w )

2
src/mame/audio/snes.c
View File

@ -1311,7 +1311,7 @@ WRITE8_HANDLER( spc_io_w )
case 0x7: /* Port 3 */
// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset&3, cpu_get_pc(machine->activecpu));
spc_port_out[offset - 4] = data;
cpu_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(20));
cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(20));
break;
case 0xA: /* Timer 0 */
case 0xB: /* Timer 1 */

2
src/mame/audio/spacefb.c
View File

@ -36,7 +36,7 @@ READ8_HANDLER( spacefb_audio_t1_r )
WRITE8_HANDLER( spacefb_port_1_w )
{
cpunum_set_input_line(machine, 1, 0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
cpu_set_input_line(machine->cpu[1], 0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
/* enemy killed */
if (!(data & 0x01) && (spacefb_sound_latch & 0x01)) sample_start(0,0,0);

8
src/mame/audio/starwars.c
View File

@ -63,7 +63,7 @@ static void r6532_porta_w(const device_config *device, UINT8 newdata, UINT8 oldd
static void snd_interrupt(const device_config *device, int state)
{
cpunum_set_input_line(device->machine, 1, M6809_IRQ_LINE, state);
cpu_set_input_line(device->machine->cpu[1], M6809_IRQ_LINE, state);
}
@ -89,7 +89,7 @@ static TIMER_CALLBACK( sound_callback )
{
riot6532_porta_in_set(riot, 0x40, 0x40);
main_data = param;
cpu_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
}
@ -132,7 +132,7 @@ static TIMER_CALLBACK( main_callback )
riot6532_porta_in_set(riot, 0x80, 0x80);
sound_data = param;
cpu_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
}
WRITE8_HANDLER( starwars_main_wr_w )
@ -146,5 +146,5 @@ WRITE8_HANDLER( starwars_soundrst_w )
riot6532_porta_in_set(riot, 0x00, 0xc0);
/* reset sound CPU here */
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, PULSE_LINE);
cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
}

4
src/mame/audio/t5182.c
View File

@ -197,9 +197,9 @@ static TIMER_CALLBACK( setirq_callback )
return;
if (irqstate == 0) /* no IRQs pending */
cpunum_set_input_line(machine, cpunum,0,CLEAR_LINE);
cpu_set_input_line(machine->cpu[cpunum],0,CLEAR_LINE);
else /* IRQ pending */
cpunum_set_input_line(machine, cpunum,0,ASSERT_LINE);
cpu_set_input_line(machine->cpu[cpunum],0,ASSERT_LINE);
}

8
src/mame/audio/taito_en.c
View File

@ -73,8 +73,8 @@ static TIMER_CALLBACK( taito_en_timer_callback )
{
/* Only cause IRQ if the mask is set to allow it */
if (m68681_imr&8) {
cpunum_set_input_line_vector(1, 6, vector_reg);
cpunum_set_input_line(machine, 1, 6, ASSERT_LINE);
cpu_set_input_line_vector(machine->cpu[1], 6, vector_reg);
cpu_set_input_line(machine->cpu[1], 6, ASSERT_LINE);
imr_status|=0x8;
}
}
@ -97,7 +97,7 @@ READ16_HANDLER(f3_68681_r)
/* IRQ ack */
if (offset==0xf) {
cpunum_set_input_line(machine, 1, 6, CLEAR_LINE);
cpu_set_input_line(machine->cpu[1], 6, CLEAR_LINE);
return 0;
}
@ -258,7 +258,7 @@ void taito_f3_soundsystem_reset(running_machine *machine)
sound_ram[2]=ROM[0x80002];
sound_ram[3]=ROM[0x80003];
//cpunum_set_input_line(Machine, 1, INPUT_LINE_RESET, ASSERT_LINE);
//cpu_set_input_line(Machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
}
const es5505_interface es5505_taito_f3_config =

12
src/mame/audio/taitosnd.c
View File

@ -45,7 +45,7 @@ static void Interrupt_Controller(void)
{
if ( tc0140syt.nmi_req && tc0140syt.nmi_enabled )
{
cpunum_set_input_line(Machine, 1, INPUT_LINE_NMI, PULSE_LINE );
cpu_set_input_line(Machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
tc0140syt.nmi_req = 0;
}
}
@ -99,11 +99,11 @@ WRITE8_HANDLER( taitosound_comm_w )
//#endif
/* this does a hi-lo transition to reset the sound cpu */
if (data)
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, ASSERT_LINE);
cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
else
{
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, CLEAR_LINE);
cpu_spin(); /* otherwise no sound in driftout */
cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
cpu_spin(machine->activecpu); /* otherwise no sound in driftout */
}
break;
@ -176,7 +176,7 @@ WRITE8_HANDLER( taitosound_slave_comm_w )
tc0140syt.masterdata[tc0140syt.submode ++] = data;
tc0140syt.status |= TC0140SYT_PORT01_FULL_MASTER;
//logerror("taitosnd: Slave cpu sends 0/1 : %01x%01x\n",tc0140syt.masterdata[1],tc0140syt.masterdata[0]);
cpu_spin(); /* writing should take longer than emulated, so spin */
cpu_spin(machine->activecpu); /* writing should take longer than emulated, so spin */
break;
case 0x02: // mode #2
@ -188,7 +188,7 @@ WRITE8_HANDLER( taitosound_slave_comm_w )
tc0140syt.masterdata[tc0140syt.submode ++] = data;
tc0140syt.status |= TC0140SYT_PORT23_FULL_MASTER;
//logerror("taitosnd: Slave cpu sends 2/3 : %01x%01x\n",tc0140syt.masterdata[3],tc0140syt.masterdata[2]);
cpu_spin(); /* writing should take longer than emulated, so spin */
cpu_spin(machine->activecpu); /* writing should take longer than emulated, so spin */
break;
case 0x04: // port status

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