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removed more dummy_space() and other miscellaneous space passing (nw)

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This commit is contained in:
smf- 2020-04-02 10:30:47 +01:00
parent 013fb15728
commit 63d3becad6
58 changed files with 138 additions and 146 deletions
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2
src/devices/bus/a2bus/mouse.cpp
View File

@ -231,7 +231,7 @@ WRITE8_MEMBER(a2bus_mouse_device::pia_out_a)
WRITE8_MEMBER(a2bus_mouse_device::pia_out_b)
{
m_mcu->pc_w(space, 0, 0xf0 | ((data >> 4) & 0x0f));
m_mcu->pc_w(0xf0 | ((data >> 4) & 0x0f));
m_rom_bank = (data & 0xe) << 7;
}

2
src/devices/bus/plus4/sid.cpp
View File

@ -122,7 +122,7 @@ uint8_t plus4_sid_cartridge_device::plus4_cd_r(offs_t offset, uint8_t data, int
}
else if (offset >= 0xfd80 && offset < 0xfd90)
{
data = m_joy->joy_r(machine().dummy_space(), 0);
data = m_joy->read_joy();
}
return data;

3
src/devices/bus/vcs_ctrl/ctrl.h
View File

@ -79,11 +79,8 @@ public:
// bit 6 - pin 9 -
//
uint8_t read_joy() { return exists() ? m_device->vcs_joy_r() : 0xff; }
DECLARE_READ8_MEMBER( joy_r ) { return read_joy(); }
uint8_t read_pot_x() { return exists() ? m_device->vcs_pot_x_r() : 0xff; }
DECLARE_READ8_MEMBER( pot_x_r ) { return read_pot_x(); }
uint8_t read_pot_y() { return exists() ? m_device->vcs_pot_y_r() : 0xff; }
DECLARE_READ8_MEMBER( pot_y_r ) { return read_pot_y(); }
void joy_w(uint8_t data) { if (exists()) m_device->vcs_joy_w(data); }

16
src/devices/cpu/m6805/m68705.h
View File

@ -171,7 +171,7 @@ protected:
template <std::size_t N> void set_port_open_drain(bool value);
template <std::size_t N> void set_port_mask(u8 mask);
template <std::size_t N> DECLARE_WRITE8_MEMBER(port_input_w) { m_port_input[N] = data & ~m_port_mask[N]; }
template <std::size_t N> void port_input_w(uint8_t data) { m_port_input[N] = data & ~m_port_mask[N]; }
template <std::size_t N> DECLARE_READ8_MEMBER(port_r);
template <std::size_t N> DECLARE_WRITE8_MEMBER(port_latch_w);
template <std::size_t N> DECLARE_WRITE8_MEMBER(port_ddr_w);
@ -283,9 +283,9 @@ private:
class m68705p_device : public m68705_device
{
public:
DECLARE_WRITE8_MEMBER(pa_w) { port_input_w<0>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pb_w) { port_input_w<1>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pc_w) { port_input_w<2>(space, offset, data, mem_mask); }
void pa_w(u8 data) { port_input_w<0>(data); }
void pb_w(u8 data) { port_input_w<1>(data); }
void pc_w(u8 data) { port_input_w<2>(data); }
protected:
virtual void internal_map(address_map &map) override;
@ -300,10 +300,10 @@ protected:
class m68705u_device : public m68705_device
{
public:
DECLARE_WRITE8_MEMBER(pa_w) { port_input_w<0>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pb_w) { port_input_w<1>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pc_w) { port_input_w<2>(space, offset, data, mem_mask); }
DECLARE_WRITE8_MEMBER(pd_w) { port_input_w<3>(space, offset, data, mem_mask); } // TODO: PD6 is also /INT2
void pa_w(u8 data) { port_input_w<0>(data); }
void pb_w(u8 data) { port_input_w<1>(data); }
void pc_w(u8 data) { port_input_w<2>(data); }
void pd_w(u8 data) { port_input_w<3>(data); } // TODO: PD6 is also /INT2
protected:
virtual void internal_map(address_map &map) override;

2
src/devices/machine/8364_paula.cpp
View File

@ -89,7 +89,7 @@ READ16_MEMBER( paula_8364_device::reg_r )
return 0xffff;
}
WRITE16_MEMBER( paula_8364_device::reg_w )
void paula_8364_device::reg_w(offs_t offset, uint16_t data)
{
if (offset >= 0xa0 && offset <= 0xdf)
m_stream->update();

2
src/devices/machine/8364_paula.h
View File

@ -59,7 +59,7 @@ public:
auto int_cb() { return m_int_w.bind(); }
DECLARE_READ16_MEMBER(reg_r);
DECLARE_WRITE16_MEMBER(reg_w);
void reg_w(offs_t offset, uint16_t data);
void update();

8
src/mame/audio/dcs.cpp
View File

@ -1610,7 +1610,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::latch_delayed_w )
}
WRITE16_MEMBER( dcs_audio_device::output_latch_w )
void dcs_audio_device::output_latch_w(uint16_t data)
{
m_pre_output_data = data;
if (LOG_DCS_IO)
@ -2212,7 +2212,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback2 )
machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s1_ack_callback2),this), param);
return;
}
output_latch_w(m_cpu->space(AS_PROGRAM), 0, 0x000a, 0xffff);
output_latch_w(0x000a);
}
@ -2224,7 +2224,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::s1_ack_callback1 )
machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s1_ack_callback1),this), param);
return;
}
output_latch_w(m_cpu->space(AS_PROGRAM), 0, param, 0xffff);
output_latch_w(param);
/* chain to the next word we need to write back */
machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s1_ack_callback2),this));
@ -2364,7 +2364,7 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::s2_ack_callback )
machine().scheduler().timer_set(attotime::from_usec(1), timer_expired_delegate(FUNC(dcs_audio_device::s2_ack_callback),this), param);
return;
}
output_latch_w(space, 0, param, 0xffff);
output_latch_w(param);
output_control_w(space, 0, (m_output_control & ~0xff00) | 0x0300, 0xffff);
}

2
src/mame/audio/dcs.h
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@ -75,7 +75,7 @@ public:
DECLARE_READ16_MEMBER( input_latch_r );
DECLARE_READ32_MEMBER( input_latch32_r );
TIMER_CALLBACK_MEMBER( latch_delayed_w );
DECLARE_WRITE16_MEMBER( output_latch_w );
void output_latch_w(uint16_t data);
DECLARE_WRITE32_MEMBER( output_latch32_w );
void delayed_ack_w();
TIMER_CALLBACK_MEMBER( delayed_ack_w_callback );

2
src/mame/drivers/abc80x.cpp
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@ -981,7 +981,7 @@ void abc806_state::machine_reset()
// clear STO lines
for (int i = 0; i < 8; i++) {
sto_w(m_maincpu->space(AS_PROGRAM), 0, i);
sto_w(i);
}
}

4
src/mame/drivers/apexc.cpp
View File

@ -25,9 +25,9 @@ void apexc_state::machine_start()
Punch a tape character
*/
WRITE8_MEMBER(apexc_state::tape_write)
void apexc_state::tape_write(uint8_t data)
{
m_tape_puncher->write(m_maincpu->space(AS_PROGRAM), 0, data);
m_tape_puncher->write(data);
teletyper_putchar(data & 0x1f); /* display on 'screen' */
}

10
src/mame/drivers/bublbobl.cpp
View File

@ -843,8 +843,8 @@ MACHINE_START_MEMBER(bublbobl_state,tokio)
MACHINE_RESET_MEMBER(bublbobl_state,tokio)
{
MACHINE_RESET_CALL_MEMBER(common);
tokio_bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, 0x00, 0xFF); // force a bankswitch write of all zeroes, as /RESET clears the latch
tokio_videoctrl_w(m_maincpu->space(AS_PROGRAM), 0, 0x00, 0xFF); // TODO: does /RESET clear this the same as above? probably yes, needs tracing...
tokio_bankswitch_w(0x00); // force a bankswitch write of all zeroes, as /RESET clears the latch
tokio_videoctrl_w(0x00); // TODO: does /RESET clear this the same as above? probably yes, needs tracing...
}
void bublbobl_state::tokio(machine_config &config)
@ -943,7 +943,7 @@ MACHINE_START_MEMBER(bublbobl_state,bublbobl)
MACHINE_RESET_MEMBER(bublbobl_state,bublbobl)
{
MACHINE_RESET_CALL_MEMBER(common);
bublbobl_bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, 0x00, 0xFF); // force a bankswitch write of all zeroes, as /RESET clears the latch
bublbobl_bankswitch_w(0x00); // force a bankswitch write of all zeroes, as /RESET clears the latch
m_ddr1 = 0;
m_ddr2 = 0;
@ -1026,7 +1026,7 @@ MACHINE_START_MEMBER(bublbobl_state,boblbobl)
MACHINE_RESET_MEMBER(bublbobl_state,boblbobl)
{
MACHINE_RESET_CALL_MEMBER(common);
bublbobl_bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, 0x00, 0xff); // force a bankswitch write of all zeroes, as /RESET clears the latch
bublbobl_bankswitch_w(0x00); // force a bankswitch write of all zeroes, as /RESET clears the latch
m_ic43_a = 0;
m_ic43_b = 0;
@ -1061,7 +1061,7 @@ MACHINE_START_MEMBER(bub68705_state, bub68705)
MACHINE_RESET_MEMBER(bub68705_state, bub68705)
{
MACHINE_RESET_CALL_MEMBER(common);
bublbobl_bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, 0x00, 0xff); // force a bankswitch write of all zeroes, as /RESET clears the latch
bublbobl_bankswitch_w(0x00); // force a bankswitch write of all zeroes, as /RESET clears the latch
m_address = 0;
m_latch = 0;

6
src/mame/drivers/changela.cpp
View File

@ -33,7 +33,7 @@ WRITE8_MEMBER(changela_state::mcu_w)
{
m_mcu_in = data;
if (!BIT(m_port_c_out, 2))
m_mcu->pa_w(space, 0, data);
m_mcu->pa_w(data);
}
@ -54,7 +54,7 @@ WRITE8_MEMBER(changela_state::changela_68705_port_c_w)
/* PC2 is connected to the /OE input of the LS374 */
if (BIT(data, 2))
m_mcu->pa_w(space, 0, BIT(data, 2) ? 0xff : m_mcu_in);
m_mcu->pa_w(BIT(data, 2) ? 0xff : m_mcu_in);
m_port_c_out = data;
}
@ -135,7 +135,7 @@ READ8_MEMBER(changela_state::changela_2d_r)
WRITE_LINE_MEMBER(changela_state::mcu_pc_0_w)
{
m_mcu->pc_w(machine().dummy_space(), 0, 0xfe | state);
m_mcu->pc_w(0xfe | state);
}
WRITE_LINE_MEMBER(changela_state::collision_reset_0_w)

2
src/mame/drivers/ddragon.cpp
View File

@ -233,7 +233,7 @@ WRITE8_MEMBER(darktowr_state::darktowr_mcu_bank_w)
if (offset == 0x1400 || offset == 0)
{
uint8_t const value(bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7));
m_mcu->pb_w(space, 0, value);
m_mcu->pb_w(value);
logerror("MCU PORT 1 -> %04x (from %04x)\n", value, data);
}
}

6
src/mame/drivers/deshoros.cpp
View File

@ -61,7 +61,7 @@ private:
DECLARE_READ8_MEMBER(display_ready_r);
DECLARE_WRITE8_MEMBER(display_w);
DECLARE_WRITE8_MEMBER(out_w);
DECLARE_WRITE8_MEMBER(bank_select_w);
void bank_select_w(uint8_t data);
DECLARE_WRITE8_MEMBER(sound_w);
void main_map(address_map &map);
@ -149,7 +149,7 @@ WRITE8_MEMBER(destiny_state::out_w)
// other bits: N/C?
}
WRITE8_MEMBER(destiny_state::bank_select_w)
void destiny_state::bank_select_w(uint8_t data)
{
// d0-d2 and d4: bank (but only up to 4 banks supported)
membank("bank1")->set_base(memregion("answers")->base() + 0x6000 * (data & 3));
@ -263,7 +263,7 @@ void destiny_state::machine_start()
void destiny_state::machine_reset()
{
bank_select_w(m_maincpu->space(AS_PROGRAM), 0, 0);
bank_select_w(0);
}
void destiny_state::destiny(machine_config &config)

2
src/mame/drivers/goldnpkr.cpp
View File

@ -4901,7 +4901,7 @@ READ8_MEMBER(blitz_state::cpubank_decrypt_r)
WRITE8_MEMBER(blitz_state::mcu_command_w)
{
m_mcu->pa_w(space, 0, data);
m_mcu->pa_w(data);
if (BIT(m_portc_data, 0))
{
m_mcu->set_input_line(M6805_IRQ_LINE, ASSERT_LINE);

4
src/mame/drivers/jack.cpp
View File

@ -146,7 +146,7 @@ READ8_MEMBER(jack_state::striv_question_r)
}
WRITE8_MEMBER(jack_state::joinem_control_w)
void jack_state::joinem_control_w(uint8_t data)
{
// d0: related to test mode?
// d1: unused?
@ -904,7 +904,7 @@ MACHINE_START_MEMBER(jack_state,joinem)
MACHINE_RESET_MEMBER(jack_state,joinem)
{
joinem_control_w(m_maincpu->space(AS_PROGRAM), 0, 0, 0xff);
joinem_control_w(0);
}

2
src/mame/drivers/m68705prg.cpp
View File

@ -168,7 +168,7 @@ protected:
m_pb_val = data;
u8 const *const ptr(m_eprom_image->get_rom_base());
m_mcu->pa_w(space, 0, ptr ? ptr[m_addr & m_mcu_region.mask()] : 0xff);
m_mcu->pa_w(ptr ? ptr[m_addr & m_mcu_region.mask()] : 0xff);
m_digits[0] = s_7seg[(m_addr >> 0) & 0x0f];
m_digits[1] = s_7seg[(m_addr >> 4) & 0x0f];

2
src/mame/drivers/missb2.cpp
View File

@ -463,7 +463,7 @@ void missb2_state::machine_reset()
MACHINE_RESET_CALL_MEMBER(common);
m_oki->reset();
bublbobl_bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, 0x00, 0xFF); // force a bankswitch write of all zeroes, as /RESET clears the latch
bublbobl_bankswitch_w(0x00); // force a bankswitch write of all zeroes, as /RESET clears the latch
}
void missb2_state::missb2(machine_config &config)

18
src/mame/drivers/notetaker.cpp
View File

@ -163,11 +163,11 @@ private:
// screen
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
// basic io
DECLARE_WRITE16_MEMBER(IPConReg_w);
void IPConReg_w(uint16_t data);
DECLARE_WRITE16_MEMBER(EPConReg_w);
DECLARE_WRITE16_MEMBER(FIFOReg_w);
void FIFOReg_w(uint16_t data);
DECLARE_WRITE16_MEMBER(FIFOBus_w);
DECLARE_WRITE16_MEMBER(DiskReg_w);
void DiskReg_w(uint16_t data);
DECLARE_WRITE16_MEMBER(LoadDispAddr_w);
// uarts
@ -310,7 +310,7 @@ uint32_t notetaker_state::screen_update(screen_device &screen, bitmap_ind16 &bit
return 0;
}
WRITE16_MEMBER(notetaker_state::IPConReg_w)
void notetaker_state::IPConReg_w(uint16_t data)
{
m_BootSeqDone = (data&0x80)?1:0;
m_ProcLock = (data&0x40)?1:0; // bus lock for this processor (hold other processor in wait state)
@ -363,7 +363,7 @@ WRITE16_MEMBER( notetaker_state::KeyChipReset_w )
}
/* FIFO (DAC) Stuff and ADC stuff */
WRITE16_MEMBER(notetaker_state::FIFOReg_w)
void notetaker_state::FIFOReg_w(uint16_t data)
{
m_SetSH = (data&0x8000)?1:0;
m_SHConA = (data&0x4000)?1:0;
@ -397,7 +397,7 @@ WRITE16_MEMBER(notetaker_state::FIFOBus_w)
m_outfifo_head_ptr&=0xF;
}
WRITE16_MEMBER( notetaker_state::DiskReg_w )
void notetaker_state::DiskReg_w(uint16_t data)
{
/* See http://bitsavers.trailing-edge.com/pdf/xerox/notetaker/memos/19781023_More_NoteTaker_IO_Information.pdf
but note that bit 12 (called bit 3 in documentation) was changed between
@ -793,14 +793,14 @@ void notetaker_state::iop_reset()
m_eiauart->write_xr(0); // MR - pin 21
m_eiauart->write_xr(1); // ''
// reset the IPConReg ls273 latch at #f1
IPConReg_w(m_iop_cpu->space(AS_PROGRAM), 0, 0x0000, 0xffff);
IPConReg_w(0x0000);
// Clear the DAC FIFO
for (int i=0; i<16; i++) m_outfifo[i] = 0;
m_outfifo_count = m_outfifo_tail_ptr = m_outfifo_head_ptr = 0;
// reset the FIFOReg latch at #h9
FIFOReg_w(m_iop_cpu->space(AS_PROGRAM), 0, 0x0000, 0xffff);
FIFOReg_w(0x0000);
// reset the DiskReg latches at #c4 and #b4 on the disk/display/eia controller board
DiskReg_w(m_iop_cpu->space(AS_PROGRAM), 0, 0x0000, 0xffff);
DiskReg_w(0x0000);
// reset the framebuffer display address counter:
m_DispAddr = 0;
}

6
src/mame/drivers/nyny.cpp
View File

@ -145,7 +145,7 @@ private:
DECLARE_WRITE8_MEMBER(audio_1_command_w);
DECLARE_WRITE8_MEMBER(audio_1_answer_w);
DECLARE_WRITE8_MEMBER(audio_2_command_w);
void audio_2_command_w(uint8_t data);
DECLARE_READ8_MEMBER(nyny_pia_1_2_r);
DECLARE_WRITE8_MEMBER(nyny_pia_1_2_w);
DECLARE_WRITE_LINE_MEMBER(main_cpu_irq);
@ -233,7 +233,7 @@ WRITE8_MEMBER(nyny_state::pia_2_port_b_w)
m_star_enable = data & 0x10;
/* bits 5-7 go to the music board connector */
audio_2_command_w(m_maincpu->space(AS_PROGRAM), 0, data & 0xe0);
audio_2_command_w(data & 0xe0);
}
@ -396,7 +396,7 @@ WRITE8_MEMBER(nyny_state::nyny_ay8910_37_port_a_w)
*
*************************************/
WRITE8_MEMBER(nyny_state::audio_2_command_w)
void nyny_state::audio_2_command_w(uint8_t data)
{
m_soundlatch2->write((data & 0x60) >> 5);
m_audiocpu2->set_input_line(M6802_IRQ_LINE, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);

4
src/mame/drivers/pacman.cpp
View File

@ -390,7 +390,7 @@ MACHINE_RESET_MEMBER(pacman_state,mschamp)
MACHINE_RESET_MEMBER(pacman_state,superabc)
{
superabc_bank_w(m_maincpu->space(AS_PROGRAM), 0, 0);
superabc_bank_w(0);
}
MACHINE_RESET_MEMBER(pacman_state,maketrax)
@ -844,7 +844,7 @@ READ8_MEMBER(pacman_state::rocktrv2_question_r)
The two PROMs on the main board at 7F and 4A are also replaced with PROMs from the kit
*/
WRITE8_MEMBER(pacman_state::superabc_bank_w)
void pacman_state::superabc_bank_w(uint8_t data)
{
// d4-d6: bank
int bank = data >> 4 & 7;

2
src/mame/drivers/pipeline.cpp
View File

@ -213,7 +213,7 @@ READ8_MEMBER(pipeline_state::protection_r)
TIMER_CALLBACK_MEMBER(pipeline_state::protection_deferred_w)
{
m_mcu->pa_w(m_mcu->space(AS_PROGRAM), 0, param);
m_mcu->pa_w(param);
}
WRITE8_MEMBER(pipeline_state::protection_w)

6
src/mame/drivers/pv1000.cpp
View File

@ -150,7 +150,7 @@ public:
private:
DECLARE_WRITE8_MEMBER(io_w);
DECLARE_READ8_MEMBER(io_r);
DECLARE_WRITE8_MEMBER(gfxram_w);
void gfxram_w(offs_t offset, uint8_t data);
uint8_t m_io_regs[8];
uint8_t m_fd_data;
@ -197,7 +197,7 @@ void pv1000_state::pv1000_io(address_map &map)
}
WRITE8_MEMBER( pv1000_state::gfxram_w )
void pv1000_state::gfxram_w(offs_t offset, uint8_t data)
{
uint8_t *gfxram = memregion( "gfxram" )->base();
@ -382,7 +382,7 @@ void pv1000_state::pv1000_postload()
{
// restore GFX ram
for (int i = 0; i < 0x400; i++)
gfxram_w(m_maincpu->space(AS_PROGRAM), i, m_gfxram[i]);
gfxram_w(i, m_gfxram[i]);
}
void pv1000_state::machine_start()

26
src/mame/drivers/seattle.cpp
View File

@ -381,8 +381,8 @@ private:
DECLARE_READ32_MEMBER(seattle_interrupt_enable_r);
DECLARE_WRITE32_MEMBER(seattle_interrupt_enable_w);
DECLARE_WRITE32_MEMBER(vblank_clear_w);
DECLARE_READ32_MEMBER(analog_port_r);
DECLARE_WRITE32_MEMBER(analog_port_w);
uint32_t analog_port_r();
void analog_port_w(uint32_t data);
DECLARE_READ32_MEMBER(carnevil_gun_r);
DECLARE_WRITE32_MEMBER(carnevil_gun_w);
DECLARE_WRITE32_MEMBER(cmos_w);
@ -397,8 +397,8 @@ private:
DECLARE_WRITE32_MEMBER(status_leds_w);
DECLARE_READ32_MEMBER(ethernet_r);
DECLARE_WRITE32_MEMBER(ethernet_w);
DECLARE_READ32_MEMBER(output_r);
DECLARE_WRITE32_MEMBER(output_w);
uint32_t output_r();
void output_w(uint32_t data);
DECLARE_READ32_MEMBER(widget_r);
DECLARE_WRITE32_MEMBER(widget_w);
DECLARE_WRITE32_MEMBER(wheel_board_w);
@ -663,13 +663,13 @@ WRITE_LINE_MEMBER(seattle_state::vblank_assert)
*
*************************************/
READ32_MEMBER(seattle_state::analog_port_r)
uint32_t seattle_state::analog_port_r()
{
return m_pending_analog_read;
}
WRITE32_MEMBER(seattle_state::analog_port_w)
void seattle_state::analog_port_w(uint32_t data)
{
if (data < 8 || data > 15)
logerror("%08X:Unexpected analog port select = %08X\n", m_maincpu->pc(), data);
@ -856,14 +856,14 @@ void seattle_state::update_widget_irq()
}
READ32_MEMBER(seattle_state::output_r)
uint32_t seattle_state::output_r()
{
logerror("%08X:output_r(%d)\n", m_maincpu->pc(), offset);
logerror("%08X:output_r\n", m_maincpu->pc());
return 0;
}
WRITE32_MEMBER(seattle_state::output_w)
void seattle_state::output_w(uint32_t data)
{
uint8_t arg = data & 0xFF;
@ -929,11 +929,11 @@ READ32_MEMBER(seattle_state::widget_r)
break;
case WREG_OUTPUT:
result = output_r(m_maincpu->space(AS_PROGRAM), 0, mem_mask);
result = output_r();
break;
case WREG_ANALOG:
result = analog_port_r(m_maincpu->space(AS_PROGRAM), 0, mem_mask);
result = analog_port_r();
break;
case WREG_ETHER_DATA:
@ -964,11 +964,11 @@ WRITE32_MEMBER(seattle_state::widget_w)
break;
case WREG_OUTPUT:
output_w(m_maincpu->space(AS_PROGRAM), 0, data, mem_mask);
output_w(data);
break;
case WREG_ANALOG:
analog_port_w(m_maincpu->space(AS_PROGRAM), 0, data, mem_mask);
analog_port_w(data);
break;
case WREG_ETHER_DATA:

14
src/mame/drivers/segag80r.cpp
View File

@ -181,7 +181,7 @@ READ8_MEMBER(segag80r_state::g80r_opcode_r)
return op;
}
offs_t segag80r_state::decrypt_offset(address_space &space, offs_t offset)
offs_t segag80r_state::decrypt_offset(offs_t offset)
{
if (m_scrambled_write_pc == 0xffff)
return offset;
@ -195,14 +195,14 @@ offs_t segag80r_state::decrypt_offset(address_space &space, offs_t offset)
WRITE8_MEMBER(segag80r_state::mainram_w)
{
m_mainram[decrypt_offset(space, offset)] = data;
m_mainram[decrypt_offset(offset)] = data;
}
WRITE8_MEMBER(segag80r_state::vidram_w){ segag80r_videoram_w(space, decrypt_offset(space, offset), data); }
WRITE8_MEMBER(segag80r_state::monsterb_vidram_w){ monsterb_videoram_w(space, decrypt_offset(space, offset), data); }
WRITE8_MEMBER(segag80r_state::pignewt_vidram_w){ pignewt_videoram_w(space, decrypt_offset(space, offset), data); }
WRITE8_MEMBER(segag80r_state::sindbadm_vidram_w){ sindbadm_videoram_w(space, decrypt_offset(space, offset), data); }
WRITE8_MEMBER(segag80r_state::usb_ram_w){ m_usbsnd->ram_w(space, decrypt_offset(m_maincpu->space(AS_PROGRAM), offset), data); }
WRITE8_MEMBER(segag80r_state::vidram_w){ segag80r_videoram_w(space, decrypt_offset(offset), data); }
WRITE8_MEMBER(segag80r_state::monsterb_vidram_w){ monsterb_videoram_w(space, decrypt_offset(offset), data); }
WRITE8_MEMBER(segag80r_state::pignewt_vidram_w){ pignewt_videoram_w(space, decrypt_offset(offset), data); }
WRITE8_MEMBER(segag80r_state::sindbadm_vidram_w){ sindbadm_videoram_w(space, decrypt_offset(offset), data); }
WRITE8_MEMBER(segag80r_state::usb_ram_w){ m_usbsnd->ram_w(space, decrypt_offset(offset), data); }

8
src/mame/drivers/segag80v.cpp
View File

@ -201,7 +201,7 @@ READ8_MEMBER(segag80v_state::g80v_opcode_r)
return op;
}
offs_t segag80v_state::decrypt_offset(address_space &space, offs_t offset)
offs_t segag80v_state::decrypt_offset(offs_t offset)
{
if (m_scrambled_write_pc == 0xffff)
return offset;
@ -215,13 +215,13 @@ offs_t segag80v_state::decrypt_offset(address_space &space, offs_t offset)
WRITE8_MEMBER(segag80v_state::mainram_w)
{
m_mainram[decrypt_offset(space, offset)] = data;
m_mainram[decrypt_offset(offset)] = data;
}
WRITE8_MEMBER(segag80v_state::usb_ram_w){ m_usb->ram_w(space, decrypt_offset(m_maincpu->space(AS_PROGRAM), offset), data); }
WRITE8_MEMBER(segag80v_state::usb_ram_w){ m_usb->ram_w(space, decrypt_offset(offset), data); }
WRITE8_MEMBER(segag80v_state::vectorram_w)
{
m_vectorram[decrypt_offset(space, offset)] = data;
m_vectorram[decrypt_offset(offset)] = data;
}

4
src/mame/drivers/snes.cpp
View File

@ -98,7 +98,7 @@ private:
// input related
SNESCTRL_ONSCREEN_CB(onscreen_cb);
SNESCTRL_GUNLATCH_CB(gun_latch_cb);
virtual DECLARE_WRITE8_MEMBER(io_read) override;
virtual void io_read() override;
virtual uint8_t oldjoy1_read(int latched) override;
virtual uint8_t oldjoy2_read(int latched) override;
virtual void write_joy_latch(uint8_t data) override;
@ -1101,7 +1101,7 @@ INPUT_PORTS_END
*
*************************************/
WRITE8_MEMBER(snes_console_state::io_read)
void snes_console_state::io_read()
{
// is automatic reading on? if so, read 16bits from oldjoy1/2
if (SNES_CPU_REG(NMITIMEN) & 1)

4
src/mame/drivers/srumbler.cpp
View File

@ -23,7 +23,7 @@
#include "speaker.h"
WRITE8_MEMBER(srumbler_state::bankswitch_w)
void srumbler_state::bankswitch_w(uint8_t data)
{
/*
banking is controlled by two PROMs. 0000-4fff is mapped to the same
@ -57,7 +57,7 @@ void srumbler_state::machine_start()
}
/* initialize banked ROM pointers */
bankswitch_w(m_maincpu->space(AS_PROGRAM), 0, 0);
bankswitch_w(0);
}
TIMER_DEVICE_CALLBACK_MEMBER(srumbler_state::interrupt)

6
src/mame/drivers/superqix.cpp
View File

@ -355,7 +355,7 @@ TIMER_CALLBACK_MEMBER(superqix_state::bootleg_mcu_port1_w_cb)
//already after a synchronize, and doing another one would be redundant
}
mcu_port2_w(m_mcu->space(AS_PROGRAM), 0, m_bl_fake_port2, 0xff); // finally write to port 2, which will do another synchronize
mcu_port2_w(m_bl_fake_port2); // finally write to port 2, which will do another synchronize
}
WRITE8_MEMBER(superqix_state::bootleg_mcu_port1_w)
@ -395,7 +395,7 @@ WRITE8_MEMBER(superqix_state::bootleg_mcu_port3_w)
m_bl_port3_out = data;
}
WRITE8_MEMBER(superqix_state::mcu_port2_w)
void superqix_state::mcu_port2_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(superqix_state::mcu_port2_w_cb), this), data);
}
@ -955,7 +955,7 @@ MACHINE_RESET_MEMBER(superqix_state, superqix)
// the act of clearing this latch asserts the z80 reset, and the mcu must clear it itself by writing
// to the p2 latch with bit 5 set.
m_port2_raw = 0x01; // force the following function into latching a zero write by having bit 0 falling edge
mcu_port2_w(m_mcu->space(AS_PROGRAM), 0, 0x00, 0xff);
mcu_port2_w(0x00);
m_mcu->pulse_input_line(INPUT_LINE_RESET, attotime::zero);
}
}

4
src/mame/drivers/vic20.cpp
View File

@ -809,8 +809,8 @@ void vic20_state::vic20(machine_config &config, const char* softlist_filter)
m_vic->set_addrmap(0, &vic20_state::vic_videoram_map);
m_vic->set_addrmap(1, &vic20_state::vic_colorram_map);
m_vic->potx_rd_callback().set(m_joy, FUNC(vcs_control_port_device::pot_x_r));
m_vic->poty_rd_callback().set(m_joy, FUNC(vcs_control_port_device::pot_y_r));
m_vic->potx_rd_callback().set(m_joy, FUNC(vcs_control_port_device::read_pot_x));
m_vic->poty_rd_callback().set(m_joy, FUNC(vcs_control_port_device::read_pot_y));
m_vic->add_route(ALL_OUTPUTS, "mono", 0.25);
PET_DATASSETTE_PORT(config, m_cassette, 0);

2
src/mame/includes/abc80x.h
View File

@ -306,7 +306,7 @@ public:
DECLARE_READ8_MEMBER( cli_r );
DECLARE_WRITE8_MEMBER( sso_w );
DECLARE_READ8_MEMBER( sti_r );
DECLARE_WRITE8_MEMBER( sto_w );
void sto_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER( keydtr_w );
DECLARE_WRITE_LINE_MEMBER( hs_w );
DECLARE_WRITE_LINE_MEMBER( vs_w );

7
src/mame/includes/amiga.h
View File

@ -454,7 +454,7 @@ public:
DECLARE_WRITE_LINE_MEMBER( centronics_select_w );
DECLARE_READ16_MEMBER( custom_chip_r );
DECLARE_WRITE16_MEMBER( custom_chip_w );
void custom_chip_w(offs_t offset, uint16_t data);
DECLARE_WRITE_LINE_MEMBER( paula_int_w );
@ -491,11 +491,6 @@ public:
uint16_t m_agnus_id;
uint16_t m_denise_id;
void write_custom_chip(uint16_t offset, uint16_t data, uint16_t mem_mask = 0xffff)
{
custom_chip_w(m_maincpu->space(AS_PROGRAM), offset, data, mem_mask);
}
void blitter_setup();
void amiga_base(machine_config &config);

2
src/mame/includes/apexc.h
View File

@ -43,7 +43,7 @@ private:
void apexc_palette(palette_device &palette) const;
uint32_t screen_update_apexc(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(apexc_interrupt);
DECLARE_WRITE8_MEMBER(tape_write);
void tape_write(uint8_t data);
void draw_led(bitmap_ind16 &bitmap, int x, int y, int state);
void draw_char(bitmap_ind16 &bitmap, char character, int x, int y, int color);
void draw_string(bitmap_ind16 &bitmap, const char *buf, int x, int y, int color);

6
src/mame/includes/bublbobl.h
View File

@ -91,9 +91,9 @@ public:
void common_sreset(int state);
DECLARE_WRITE8_MEMBER(bublbobl_bankswitch_w);
DECLARE_WRITE8_MEMBER(tokio_bankswitch_w);
DECLARE_WRITE8_MEMBER(tokio_videoctrl_w);
void bublbobl_bankswitch_w(uint8_t data);
void tokio_bankswitch_w(uint8_t data);
void tokio_videoctrl_w(uint8_t data);
DECLARE_WRITE8_MEMBER(bublbobl_nmitrigger_w);
DECLARE_READ8_MEMBER(tokiob_mcu_r);
DECLARE_WRITE8_MEMBER(bublbobl_soundcpu_reset_w);

2
src/mame/includes/gb.h
View File

@ -65,7 +65,7 @@ public:
bool m_bios_disable;
DECLARE_WRITE8_MEMBER(gb_io_w);
void gb_io_w(offs_t offset, uint8_t data);
DECLARE_WRITE8_MEMBER(gb_io2_w);
DECLARE_WRITE8_MEMBER(sgb_io_w);
DECLARE_READ8_MEMBER(gb_ie_r);

2
src/mame/includes/jack.h
View File

@ -69,7 +69,7 @@ private:
int m_remap_address[16];
IRQ_CALLBACK_MEMBER(jack_sh_irq_ack);
DECLARE_WRITE8_MEMBER(joinem_control_w);
void joinem_control_w(uint8_t data);
DECLARE_WRITE8_MEMBER(joinem_scroll_w);
DECLARE_READ8_MEMBER(striv_question_r);
DECLARE_WRITE8_MEMBER(jack_videoram_w);

2
src/mame/includes/lynx.h
View File

@ -178,7 +178,7 @@ private:
DECLARE_READ8_MEMBER(mikey_read);
DECLARE_WRITE8_MEMBER(mikey_write);
DECLARE_READ8_MEMBER(lynx_memory_config_r);
DECLARE_WRITE8_MEMBER(lynx_memory_config_w);
void lynx_memory_config_w(uint8_t data);
void lynx_divide();
void lynx_multiply();
uint8_t lynx_timer_read(int which, int offset);

2
src/mame/includes/pacman.h
View File

@ -154,7 +154,7 @@ protected:
DECLARE_WRITE_LINE_MEMBER(jrpacman_spritebank_w);
DECLARE_WRITE8_MEMBER(jrpacman_scroll_w);
DECLARE_WRITE_LINE_MEMBER(jrpacman_bgpriority_w);
DECLARE_WRITE8_MEMBER(superabc_bank_w);
void superabc_bank_w(uint8_t data);
public:
void init_maketrax();

2
src/mame/includes/segag80r.h
View File

@ -174,7 +174,7 @@ private:
void draw_background_spaceod(bitmap_ind16 &bitmap, const rectangle &cliprect);
void draw_background_page_scroll(bitmap_ind16 &bitmap, const rectangle &cliprect);
void draw_background_full_scroll(bitmap_ind16 &bitmap, const rectangle &cliprect);
offs_t decrypt_offset(address_space &space, offs_t offset);
offs_t decrypt_offset(offs_t offset);
inline uint8_t demangle(uint8_t d7d6, uint8_t d5d4, uint8_t d3d2, uint8_t d1d0);
void monsterb_expand_gfx(const char *region);

2
src/mame/includes/segag80v.h
View File

@ -95,7 +95,7 @@ private:
uint32_t screen_update_segag80v(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
inline bool adjust_xy(int rawx, int rawy, int *outx, int *outy);
void sega_generate_vector_list();
offs_t decrypt_offset(address_space &space, offs_t offset);
offs_t decrypt_offset(offs_t offset);
inline uint8_t demangle(uint8_t d7d6, uint8_t d5d4, uint8_t d3d2, uint8_t d1d0);
void main_map(address_map &map);

2
src/mame/includes/snes.h
View File

@ -408,7 +408,7 @@ protected:
void snes_init_ram();
// input related
virtual DECLARE_WRITE8_MEMBER(io_read);
virtual void io_read();
virtual uint8_t oldjoy1_read(int latched);
virtual uint8_t oldjoy2_read(int latched);

2
src/mame/includes/srumbler.h
View File

@ -33,7 +33,7 @@ private:
tilemap_t *m_fg_tilemap;
int m_scroll[4];
DECLARE_WRITE8_MEMBER(bankswitch_w);
void bankswitch_w(uint8_t data);
DECLARE_WRITE8_MEMBER(foreground_w);
DECLARE_WRITE8_MEMBER(background_w);
DECLARE_WRITE8_MEMBER(_4009_w);

2
src/mame/includes/superqix.h
View File

@ -111,7 +111,7 @@ private:
DECLARE_READ8_MEMBER(z80_semaphore_assert_r);
DECLARE_WRITE8_MEMBER(bootleg_mcu_port1_w);
DECLARE_WRITE8_MEMBER(mcu_port2_w);
void mcu_port2_w(uint8_t data);
DECLARE_WRITE8_MEMBER(mcu_port3_w);
DECLARE_READ8_MEMBER(mcu_port3_r);
DECLARE_READ8_MEMBER(bootleg_mcu_port3_r);

2
src/mame/includes/z80ne.h
View File

@ -113,7 +113,7 @@ protected:
DECLARE_READ8_MEMBER(lx383_r);
DECLARE_WRITE8_MEMBER(lx383_w);
DECLARE_READ8_MEMBER(lx385_ctrl_r);
DECLARE_WRITE8_MEMBER(lx385_ctrl_w);
void lx385_ctrl_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER(lx385_uart_tx_clock_w);
TIMER_CALLBACK_MEMBER(z80ne_cassette_tc);

6
src/mame/machine/amiga.cpp
View File

@ -326,7 +326,7 @@ TIMER_CALLBACK_MEMBER( amiga_state::scanline_callback )
void amiga_state::set_interrupt(int interrupt)
{
custom_chip_w(m_maincpu->space(AS_PROGRAM), REG_INTREQ, interrupt, 0xffff);
custom_chip_w(REG_INTREQ, interrupt);
}
bool amiga_state::int2_pending()
@ -1256,7 +1256,7 @@ READ16_MEMBER( amiga_state::custom_chip_r )
return 0xffff;
}
WRITE16_MEMBER( amiga_state::custom_chip_w )
void amiga_state::custom_chip_w(offs_t offset, uint16_t data)
{
uint16_t temp;
offset &= 0xff;
@ -1265,7 +1265,7 @@ WRITE16_MEMBER( amiga_state::custom_chip_w )
logerror("%06X:write to custom %s = %04X\n", m_maincpu->pc(), s_custom_reg_names[offset & 0xff], data);
// paula will handle some of those registers
m_paula->reg_w(space, offset, data, mem_mask);
m_paula->reg_w(offset, data);
switch (offset)
{

2
src/mame/machine/apexc.cpp
View File

@ -75,7 +75,7 @@ apexc_tape_puncher_image_device::apexc_tape_puncher_image_device(const machine_c
Punch a tape character
*/
WRITE8_MEMBER(apexc_tape_puncher_image_device::write)
void apexc_tape_puncher_image_device::write(uint8_t data)
{
if (exists())
{

2
src/mame/machine/apexc.h
View File

@ -111,7 +111,7 @@ public:
virtual bool is_reset_on_load() const noexcept override { return false; }
virtual const char *file_extensions() const noexcept override { return "tap"; }
DECLARE_WRITE8_MEMBER(write);
void write(uint8_t data);
private:
virtual void device_start() override { }

8
src/mame/machine/bublbobl.cpp
View File

@ -40,7 +40,7 @@ void bublbobl_state::common_sreset(int state)
// 44 74 74 76 or 76 36 76 once or more per frame...
*/
WRITE8_MEMBER(bublbobl_state::bublbobl_bankswitch_w)
void bublbobl_state::bublbobl_bankswitch_w(uint8_t data)
{
//logerror("bankswitch_w: write of %02X\n", data);
/* bits 0-2 select ROM bank */
@ -72,7 +72,7 @@ WRITE8_MEMBER(bublbobl_state::bublbobl_bankswitch_w)
\-------- ? used (idle high, /SRESET?)
// bublboblp: test and main: 00 C8 C9 C8 C9...; tokio: test 00 09 09 49 main 00 09 C8 CF
*/
WRITE8_MEMBER(bublbobl_state::tokio_bankswitch_w)
void bublbobl_state::tokio_bankswitch_w(uint8_t data)
{
/* bits 0-2 select ROM bank */
membank("bank1")->set_entry(data & 7);
@ -99,7 +99,7 @@ WRITE8_MEMBER(bublbobl_state::tokio_bankswitch_w)
|\------- ? used (idle high, /SBRES? or /SBINT?)
\-------- VHINV (flip screen)
*/
WRITE8_MEMBER(bublbobl_state::tokio_videoctrl_w)
void bublbobl_state::tokio_videoctrl_w(uint8_t data)
{
//logerror("tokio_videoctrl_w: write of %02X\n", data);
/* bits 0-3 not used? */
@ -424,7 +424,7 @@ WRITE8_MEMBER(bub68705_state::port_b_w)
//logerror("%04x: 68705 port B write %02x\n", m_mcu->pc(), data);
if (BIT(mem_mask, 0) && !BIT(data, 0) && BIT(m_port_b_out, 0))
m_mcu->pa_w(space, 0, m_latch);
m_mcu->pa_w(m_latch);
if (BIT(mem_mask, 1) && BIT(data, 1) && !BIT(m_port_b_out, 1)) /* positive edge trigger */
{

10
src/mame/machine/gb.cpp
View File

@ -143,8 +143,8 @@ void gb_state::gb_init_regs()
SIODATA = 0x00;
SIOCONT = 0x7E;
gb_io_w(m_maincpu->space(AS_PROGRAM), 0x05, 0x00); /* TIMECNT */
gb_io_w(m_maincpu->space(AS_PROGRAM), 0x06, 0x00); /* TIMEMOD */
gb_io_w(0x05, 0x00); /* TIMECNT */
gb_io_w(0x06, 0x00); /* TIMEMOD */
}
@ -223,7 +223,7 @@ MACHINE_RESET_MEMBER(gb_state,sgb)
}
WRITE8_MEMBER(gb_state::gb_io_w)
void gb_state::gb_io_w(offs_t offset, uint8_t data)
{
static const uint8_t timer_shifts[4] = {10, 4, 6, 8};
@ -462,7 +462,7 @@ WRITE8_MEMBER(gb_state::sgb_io_w)
return;
default:
/* we didn't handle the write, so pass it to the GB handler */
gb_io_w(space, offset, data);
gb_io_w(offset, data);
return;
}
@ -605,7 +605,7 @@ WRITE8_MEMBER(gb_state::gb_timer_callback)
WRITE8_MEMBER(gb_state::gbc_io_w)
{
gb_io_w(space, offset, data);
gb_io_w(offset, data);
// On CGB the internal serial transfer clock is selectable
if (offset == 0x02)

6
src/mame/machine/lynx.cpp
View File

@ -1877,7 +1877,7 @@ READ8_MEMBER(lynx_state::lynx_memory_config_r)
return m_memory_config;
}
WRITE8_MEMBER(lynx_state::lynx_memory_config_w)
void lynx_state::lynx_memory_config_w(uint8_t data)
{
/* bit 7: hispeed, uses page mode accesses (4 instead of 5 cycles )
* when these are safe in the cpu */
@ -1891,7 +1891,7 @@ WRITE8_MEMBER(lynx_state::lynx_memory_config_w)
void lynx_state::machine_reset()
{
lynx_memory_config_w(m_maincpu->space(AS_PROGRAM), 0, 0);
lynx_memory_config_w(0);
m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
m_maincpu->set_input_line(M65SC02_IRQ_LINE, CLEAR_LINE);
@ -1926,7 +1926,7 @@ void lynx_state::machine_reset()
void lynx_state::lynx_postload()
{
lynx_memory_config_w(m_maincpu->space(AS_PROGRAM), 0, m_memory_config);
lynx_memory_config_w(m_memory_config);
}
void lynx_state::machine_start()

2
src/mame/machine/mexico86.cpp
View File

@ -302,7 +302,7 @@ WRITE8_MEMBER(mexico86_state::mexico86_68705_port_b_w)
}
}
m_mcu->pa_w(space, 0, (BIT(mem_mask, 0) && !BIT(data, 0)) ? m_latch : 0xff);
m_mcu->pa_w((BIT(mem_mask, 0) && !BIT(data, 0)) ? m_latch : 0xff);
if (BIT(mem_mask, 1) && !BIT(data, 1) && BIT(m_port_b_out, 1))
{

2
src/mame/machine/qix.cpp
View File

@ -157,7 +157,7 @@ WRITE8_MEMBER(qixmcu_state::coin_w)
logerror("qixmcu_state, coin_w = %02X\n", data);
/* this is a callback called by pia6821_device::write(), so I don't need to synchronize */
/* the CPUs - they have already been synchronized by qix_pia_w() */
m_mcu->pa_w(space, 0, data, mem_mask);
m_mcu->pa_w(data);
}

4
src/mame/machine/snes.cpp
View File

@ -114,7 +114,7 @@ TIMER_CALLBACK_MEMBER(snes_state::snes_reset_hdma)
TIMER_CALLBACK_MEMBER(snes_state::snes_update_io)
{
io_read(m_maincpu->space(AS_PROGRAM),0,0,0);
io_read();
SNES_CPU_REG(HVBJOY) &= 0xfe; /* Clear busy bit */
m_io_timer->adjust(attotime::never);
@ -928,7 +928,7 @@ WRITE8_MEMBER(snes_state::snes_w_bank2)
*************************************/
WRITE8_MEMBER(snes_state::io_read)
void snes_state::io_read()
{
static const char *const portnames[2][2] =
{

6
src/mame/machine/taito68705interface.cpp
View File

@ -70,7 +70,7 @@ WRITE8_MEMBER(taito68705_mcu_device_base::data_w)
m_host_flag = true;
m_host_latch = data;
if (m_latch_driven)
m_mcu->pa_w(space, 0, data);
m_mcu->pa_w(data);
m_mcu->set_input_line(M68705_IRQ_LINE, m_host_flag ? ASSERT_LINE : CLEAR_LINE);
}
@ -147,7 +147,7 @@ void taito68705_mcu_device_base::latch_control(u8 data, u8 &value, unsigned host
if (BIT(data, host_bit))
{
m_latch_driven = false;
m_mcu->pa_w(m_mcu->space(AS_PROGRAM), 0, 0xff);
m_mcu->pa_w(0xff);
if (!BIT(value, host_bit))
{
m_host_flag = false;
@ -157,7 +157,7 @@ void taito68705_mcu_device_base::latch_control(u8 data, u8 &value, unsigned host
else
{
m_latch_driven = true;
m_mcu->pa_w(m_mcu->space(AS_PROGRAM), 0, m_host_latch);
m_mcu->pa_w(m_host_latch);
}
// PB2 sets the MCU semaphore when low

10
src/mame/machine/tigeroad.cpp
View File

@ -28,7 +28,7 @@ WRITE16_MEMBER(pushman_state::pushman_mcu_comm_w)
m_host_latch = swapendian_int16(data);
break;
case 1:
m_mcu->pd_w(space, 0, data & 0x00ff);
m_mcu->pd_w(data & 0x00ff);
m_host_semaphore = true;
m_mcu->set_input_line(M68705_IRQ_LINE, ASSERT_LINE);
break;
@ -56,15 +56,15 @@ WRITE8_MEMBER(pushman_state::mcu_pc_w)
{
if (BIT(data, 0))
{
m_mcu->pa_w(space, 0, 0xff);
m_mcu->pb_w(space, 0, 0xff);
m_mcu->pa_w(0xff);
m_mcu->pb_w(0xff);
}
else
{
m_host_semaphore = false;
m_mcu->set_input_line(M68705_IRQ_LINE, CLEAR_LINE);
m_mcu->pa_w(space, 0, (m_host_latch >> 0) & 0x00ff);
m_mcu->pb_w(space, 0, (m_host_latch >> 8) & 0x00ff);
m_mcu->pa_w((m_host_latch >> 0) & 0x00ff);
m_mcu->pb_w((m_host_latch >> 8) & 0x00ff);
}
if (BIT(m_mcu_latch_ctl, 1) && !BIT(data, 1))

4
src/mame/machine/z80ne.cpp
View File

@ -270,7 +270,7 @@ void z80ne_state::base_reset()
m_uart->write_cs(1);
m_uart_clock->set_unscaled_clock(m_cass_data.speed * 16);
lx385_ctrl_w(m_maincpu->space(AS_PROGRAM), 0, 0);
lx385_ctrl_w(0);
}
@ -473,7 +473,7 @@ READ8_MEMBER(z80ne_state::lx385_ctrl_r)
#define LX385_CASSETTE_MOTOR_MASK ((1<<3)|(1<<4))
WRITE8_MEMBER(z80ne_state::lx385_ctrl_w)
void z80ne_state::lx385_ctrl_w(uint8_t data)
{
/* Translate data to control signals
* 0 bit1=0, bit0=0 UART Reset pulse

2
src/mame/video/abc806.cpp
View File

@ -163,7 +163,7 @@ READ8_MEMBER( abc806_state::sti_r )
// sto_w -
//-------------------------------------------------
WRITE8_MEMBER( abc806_state::sto_w )
void abc806_state::sto_w(uint8_t data)
{
int level = BIT(data, 7);

4
src/mame/video/amiga.cpp
View File

@ -217,7 +217,7 @@ int amiga_state::copper_execute_next(int xpos)
{
if (LOG_COPPER)
logerror("%02X.%02X: Write to %s = %04x\n", m_last_scanline, xpos / 2, s_custom_reg_names[m_copper_pending_offset & 0xff], m_copper_pending_data);
write_custom_chip(m_copper_pending_offset, m_copper_pending_data);
custom_chip_w(m_copper_pending_offset, m_copper_pending_data);
m_copper_pending_offset = 0;
}
@ -273,7 +273,7 @@ int amiga_state::copper_execute_next(int xpos)
{
if (LOG_COPPER)
logerror("%02X.%02X: Write to %s = %04x\n", m_last_scanline, xpos / 2, s_custom_reg_names[word0 & 0xff], word1);
write_custom_chip(word0, word1);
custom_chip_w(word0, word1);
}
else // additional 2 cycles needed for non-Agnus registers
{