diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c index 661b163543c..7730939caf3 100644 --- a/src/emu/cpu/sh2/sh2comn.c +++ b/src/emu/cpu/sh2/sh2comn.c @@ -536,6 +536,13 @@ WRITE32_HANDLER( sh2_internal_w ) switch( offset ) { + case 0x00: + //if(mem_mask == 0xff) + // printf("%c",data & 0xff); + break; + case 0x01: + //printf("%08x %02x %02x\n",mem_mask,offset,data); + break; // Timers case 0x04: // TIER, FTCSR, FRC if((mem_mask & 0x00ffffff) != 0) @@ -747,6 +754,11 @@ READ32_HANDLER( sh2_internal_r ) // logerror("sh2_internal_r: Read %08x (%x) @ %08x\n", 0xfffffe00+offset*4, offset, mem_mask); switch( offset ) { + case 0x00: + break; + case 0x01: + return sh2->m[1] | 0x80000000; // TDRE: Trasmit Data Register Empty. Force it to be '1' for the time being. + case 0x04: // TIER, FTCSR, FRC if ( mem_mask == 0x00ff0000 ) { diff --git a/src/mame/drivers/namcos23.c b/src/mame/drivers/namcos23.c index 9496ceafff3..858624211ba 100644 --- a/src/mame/drivers/namcos23.c +++ b/src/mame/drivers/namcos23.c @@ -1400,7 +1400,7 @@ public: required_device m_screen; required_device m_palette; - + c404_t m_c404; c361_t m_c361; c417_t m_c417; @@ -2765,14 +2765,19 @@ WRITE32_MEMBER(namcos23_state::sh2_shared_w) static ADDRESS_MAP_START( gmen_mips_map, AS_PROGRAM, 32, namcos23_state ) AM_IMPORT_FROM(s23_map) AM_RANGE(0x0e400000, 0x0e400003) AM_READ(gmen_trigger_sh2) - AM_RANGE(0x0e700000, 0x0e707fff) AM_READWRITE(sh2_shared_r, sh2_shared_w) + AM_RANGE(0x0e700000, 0x0e70ffff) AM_READWRITE(sh2_shared_r, sh2_shared_w) ADDRESS_MAP_END // SH2 memmap +/* TODO: of course, I believe that area 0x008***** is actually a bank of some sort ... */ static ADDRESS_MAP_START( gmen_sh2_map, AS_PROGRAM, 32, namcos23_state ) - AM_RANGE(0x00000000, 0x00007fff) AM_RAM AM_SHARE("gmen_sh2_shared") - AM_RANGE(0x04000000, 0x043fffff) AM_RAM // SH-2 main work RAM + AM_RANGE(0x00000000, 0x0000ffff) AM_RAM AM_SHARE("gmen_sh2_shared") + AM_RANGE(0x00800000, 0x008fffff) AM_ROM AM_REGION("data", 0xc00000) //c00000 "data" for final furlong 2. 0x1b6bc0 "user1" for gunmen wars + AM_RANGE(0x01800000, 0x0183ffff) AM_RAM // ??? + //AM_RANGE(0x02800000, 0x02800003) AM_RAM // probably transfer status related, reads/writes after each end of flash transfer, TBD + AM_RANGE(0x04000000, 0x043fffff) AM_RAM // SH-2 main work RAM (SDRAM) + AM_RANGE(0x06000000, 0x06000003) AM_NOP // serial port for camera? ADDRESS_MAP_END @@ -3350,7 +3355,7 @@ static MACHINE_CONFIG_START( gorgon, namcos23_state ) MCFG_LINE_DISPATCH_ADD("clk_dispatch", 2) MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(":namco_settings", namco_settings_device, clk_w)) - + MCFG_DEVICE_MODIFY("subcpu:sci1") MCFG_H8_SCI_TX_CALLBACK(DEVWRITELINE(":namco_settings", namco_settings_device, data_w)) MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":clk_dispatch", devcb2_line_dispatch_device<2>, in_w)) @@ -3418,7 +3423,7 @@ static MACHINE_CONFIG_START( s23, namcos23_state ) MCFG_LINE_DISPATCH_ADD("clk_dispatch", 2) MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(":namco_settings", namco_settings_device, clk_w)) - + MCFG_DEVICE_MODIFY("subcpu:sci1") MCFG_H8_SCI_TX_CALLBACK(DEVWRITELINE(":namco_settings", namco_settings_device, data_w)) MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":clk_dispatch", devcb2_line_dispatch_device<2>, in_w)) @@ -3497,7 +3502,7 @@ static MACHINE_CONFIG_START( ss23, namcos23_state ) MCFG_LINE_DISPATCH_ADD("clk_dispatch", 2) MCFG_LINE_DISPATCH_FWD_CB(0, 2, DEVWRITELINE(":rtc", rtc4543_device, clk_w)) MCFG_DEVCB_INVERT MCFG_LINE_DISPATCH_FWD_CB(1, 2, DEVWRITELINE(":namco_settings", namco_settings_device, clk_w)) - + MCFG_DEVICE_MODIFY("subcpu:sci1") MCFG_H8_SCI_TX_CALLBACK(DEVWRITELINE(":namco_settings", namco_settings_device, data_w)) MCFG_H8_SCI_CLK_CALLBACK(DEVWRITELINE(":clk_dispatch", devcb2_line_dispatch_device<2>, in_w))