diff --git a/src/emu/cpu/tms34010/34010fld.c b/src/emu/cpu/tms34010/34010fld.c index 005a64216bb..4dbe2fde4ca 100644 --- a/src/emu/cpu/tms34010/34010fld.c +++ b/src/emu/cpu/tms34010/34010fld.c @@ -13,182 +13,182 @@ FIELD WRITE FUNCTIONS ***************************************************************************/ -static void wfield_01(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_01(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x01,16); + WFIELDMAC(0x01,16); } -static void wfield_02(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_02(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x03,15); + WFIELDMAC(0x03,15); } -static void wfield_03(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_03(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x07,14); + WFIELDMAC(0x07,14); } -static void wfield_04(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_04(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x0f,13); + WFIELDMAC(0x0f,13); } -static void wfield_05(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_05(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x1f,12); + WFIELDMAC(0x1f,12); } -static void wfield_06(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_06(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x3f,11); + WFIELDMAC(0x3f,11); } -static void wfield_07(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_07(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x7f,10); + WFIELDMAC(0x7f,10); } -static void wfield_08(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_08(offs_t offset, UINT32 data) { - WFIELDMAC_8(tms); + WFIELDMAC_8(); } -static void wfield_09(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_09(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x1ff,8); + WFIELDMAC(0x1ff,8); } -static void wfield_10(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_10(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x3ff,7); + WFIELDMAC(0x3ff,7); } -static void wfield_11(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_11(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x7ff,6); + WFIELDMAC(0x7ff,6); } -static void wfield_12(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_12(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0xfff,5); + WFIELDMAC(0xfff,5); } -static void wfield_13(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_13(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x1fff,4); + WFIELDMAC(0x1fff,4); } -static void wfield_14(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_14(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x3fff,3); + WFIELDMAC(0x3fff,3); } -static void wfield_15(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_15(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x7fff,2); + WFIELDMAC(0x7fff,2); } -static void wfield_16(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_16(offs_t offset, UINT32 data) { if (offset & 0x0f) { - WFIELDMAC(tms,0xffff,1); + WFIELDMAC(0xffff,1); } else { - TMS34010_WRMEM_WORD(tms,TOBYTE(offset),data); + TMS34010_WRMEM_WORD(TOBYTE(offset),data); } } -static void wfield_17(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_17(offs_t offset, UINT32 data) { - WFIELDMAC(tms,0x1ffff,0); + WFIELDMAC(0x1ffff,0); } -static void wfield_18(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_18(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x3ffff,15); + WFIELDMAC_BIG(0x3ffff,15); } -static void wfield_19(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_19(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x7ffff,14); + WFIELDMAC_BIG(0x7ffff,14); } -static void wfield_20(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_20(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0xfffff,13); + WFIELDMAC_BIG(0xfffff,13); } -static void wfield_21(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_21(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x1fffff,12); + WFIELDMAC_BIG(0x1fffff,12); } -static void wfield_22(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_22(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x3fffff,11); + WFIELDMAC_BIG(0x3fffff,11); } -static void wfield_23(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_23(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x7fffff,10); + WFIELDMAC_BIG(0x7fffff,10); } -static void wfield_24(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_24(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0xffffff,9); + WFIELDMAC_BIG(0xffffff,9); } -static void wfield_25(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_25(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x1ffffff,8); + WFIELDMAC_BIG(0x1ffffff,8); } -static void wfield_26(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_26(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x3ffffff,7); + WFIELDMAC_BIG(0x3ffffff,7); } -static void wfield_27(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_27(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x7ffffff,6); + WFIELDMAC_BIG(0x7ffffff,6); } -static void wfield_28(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_28(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0xfffffff,5); + WFIELDMAC_BIG(0xfffffff,5); } -static void wfield_29(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_29(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x1fffffff,4); + WFIELDMAC_BIG(0x1fffffff,4); } -static void wfield_30(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_30(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x3fffffff,3); + WFIELDMAC_BIG(0x3fffffff,3); } -static void wfield_31(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_31(offs_t offset, UINT32 data) { - WFIELDMAC_BIG(tms,0x7fffffff,2); + WFIELDMAC_BIG(0x7fffffff,2); } -static void wfield_32(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::wfield_32(offs_t offset, UINT32 data) { - WFIELDMAC_32(tms); + WFIELDMAC_32(); } -static void (*const tms34010_wfield_functions[32])(tms34010_state *tms, offs_t offset, UINT32 data) = +const tms340x0_device::wfield_func tms340x0_device::s_wfield_functions[32] = { - wfield_32, wfield_01, wfield_02, wfield_03, wfield_04, wfield_05, - wfield_06, wfield_07, wfield_08, wfield_09, wfield_10, wfield_11, - wfield_12, wfield_13, wfield_14, wfield_15, wfield_16, wfield_17, - wfield_18, wfield_19, wfield_20, wfield_21, wfield_22, wfield_23, - wfield_24, wfield_25, wfield_26, wfield_27, wfield_28, wfield_29, - wfield_30, wfield_31 + &tms340x0_device::wfield_32, &tms340x0_device::wfield_01, &tms340x0_device::wfield_02, &tms340x0_device::wfield_03, &tms340x0_device::wfield_04, &tms340x0_device::wfield_05, + &tms340x0_device::wfield_06, &tms340x0_device::wfield_07, &tms340x0_device::wfield_08, &tms340x0_device::wfield_09, &tms340x0_device::wfield_10, &tms340x0_device::wfield_11, + &tms340x0_device::wfield_12, &tms340x0_device::wfield_13, &tms340x0_device::wfield_14, &tms340x0_device::wfield_15, &tms340x0_device::wfield_16, &tms340x0_device::wfield_17, + &tms340x0_device::wfield_18, &tms340x0_device::wfield_19, &tms340x0_device::wfield_20, &tms340x0_device::wfield_21, &tms340x0_device::wfield_22, &tms340x0_device::wfield_23, + &tms340x0_device::wfield_24, &tms340x0_device::wfield_25, &tms340x0_device::wfield_26, &tms340x0_device::wfield_27, &tms340x0_device::wfield_28, &tms340x0_device::wfield_29, + &tms340x0_device::wfield_30, &tms340x0_device::wfield_31 }; @@ -197,232 +197,232 @@ static void (*const tms34010_wfield_functions[32])(tms34010_state *tms, offs_t o FIELD READ FUNCTIONS (ZERO-EXTEND) ***************************************************************************/ -static UINT32 rfield_z_01(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_01(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x01,16); + RFIELDMAC(0x01,16); return ret; } -static UINT32 rfield_z_02(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_02(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x03,15); + RFIELDMAC(0x03,15); return ret; } -static UINT32 rfield_z_03(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_03(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x07,14); + RFIELDMAC(0x07,14); return ret; } -static UINT32 rfield_z_04(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_04(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x0f,13); + RFIELDMAC(0x0f,13); return ret; } -static UINT32 rfield_z_05(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_05(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1f,12); + RFIELDMAC(0x1f,12); return ret; } -static UINT32 rfield_z_06(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_06(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x3f,11); + RFIELDMAC(0x3f,11); return ret; } -static UINT32 rfield_z_07(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_07(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x7f,10); + RFIELDMAC(0x7f,10); return ret; } -static UINT32 rfield_z_08(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_08(offs_t offset) { UINT32 ret; - RFIELDMAC_8(tms); + RFIELDMAC_8(); return ret; } -static UINT32 rfield_z_09(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_09(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1ff,8); + RFIELDMAC(0x1ff,8); return ret; } -static UINT32 rfield_z_10(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_10(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x3ff,7); + RFIELDMAC(0x3ff,7); return ret; } -static UINT32 rfield_z_11(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_11(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x7ff,6); + RFIELDMAC(0x7ff,6); return ret; } -static UINT32 rfield_z_12(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_12(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0xfff,5); + RFIELDMAC(0xfff,5); return ret; } -static UINT32 rfield_z_13(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_13(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1fff,4); + RFIELDMAC(0x1fff,4); return ret; } -static UINT32 rfield_z_14(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_14(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x3fff,3); + RFIELDMAC(0x3fff,3); return ret; } -static UINT32 rfield_z_15(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_15(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x7fff,2); + RFIELDMAC(0x7fff,2); return ret; } -static UINT32 rfield_z_16(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_16(offs_t offset) { UINT32 ret; if (offset & 0x0f) { - RFIELDMAC(tms,0xffff,1); + RFIELDMAC(0xffff,1); } else - ret = TMS34010_RDMEM_WORD(tms,TOBYTE(offset)); + ret = TMS34010_RDMEM_WORD(TOBYTE(offset)); return ret; } -static UINT32 rfield_z_17(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_17(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1ffff,0); + RFIELDMAC(0x1ffff,0); return ret; } -static UINT32 rfield_z_18(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_18(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3ffff,15); + RFIELDMAC_BIG(0x3ffff,15); return ret; } -static UINT32 rfield_z_19(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_19(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7ffff,14); + RFIELDMAC_BIG(0x7ffff,14); return ret; } -static UINT32 rfield_z_20(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_20(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0xfffff,13); + RFIELDMAC_BIG(0xfffff,13); return ret; } -static UINT32 rfield_z_21(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_21(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x1fffff,12); + RFIELDMAC_BIG(0x1fffff,12); return ret; } -static UINT32 rfield_z_22(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_22(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3fffff,11); + RFIELDMAC_BIG(0x3fffff,11); return ret; } -static UINT32 rfield_z_23(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_23(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7fffff,10); + RFIELDMAC_BIG(0x7fffff,10); return ret; } -static UINT32 rfield_z_24(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_24(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0xffffff,9); + RFIELDMAC_BIG(0xffffff,9); return ret; } -static UINT32 rfield_z_25(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_25(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x1ffffff,8); + RFIELDMAC_BIG(0x1ffffff,8); return ret; } -static UINT32 rfield_z_26(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_26(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3ffffff,7); + RFIELDMAC_BIG(0x3ffffff,7); return ret; } -static UINT32 rfield_z_27(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_27(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7ffffff,6); + RFIELDMAC_BIG(0x7ffffff,6); return ret; } -static UINT32 rfield_z_28(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_28(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0xfffffff,5); + RFIELDMAC_BIG(0xfffffff,5); return ret; } -static UINT32 rfield_z_29(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_29(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x1fffffff,4); + RFIELDMAC_BIG(0x1fffffff,4); return ret; } -static UINT32 rfield_z_30(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_30(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3fffffff,3); + RFIELDMAC_BIG(0x3fffffff,3); return ret; } -static UINT32 rfield_z_31(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_z_31(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7fffffff,2); + RFIELDMAC_BIG(0x7fffffff,2); return ret; } -static UINT32 rfield_32(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_32(offs_t offset) { - RFIELDMAC_32(tms); + RFIELDMAC_32(); } @@ -430,250 +430,250 @@ static UINT32 rfield_32(tms34010_state *tms, offs_t offset) FIELD READ FUNCTIONS (SIGN-EXTEND) ***************************************************************************/ -static UINT32 rfield_s_01(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_01(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x01,16); + RFIELDMAC(0x01,16); return ((INT32)(ret << 31)) >> 31; } -static UINT32 rfield_s_02(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_02(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x03,15); + RFIELDMAC(0x03,15); return ((INT32)(ret << 30)) >> 30; } -static UINT32 rfield_s_03(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_03(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x07,14); + RFIELDMAC(0x07,14); return ((INT32)(ret << 29)) >> 29; } -static UINT32 rfield_s_04(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_04(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x0f,13); + RFIELDMAC(0x0f,13); return ((INT32)(ret << 28)) >> 28; } -static UINT32 rfield_s_05(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_05(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1f,12); + RFIELDMAC(0x1f,12); return ((INT32)(ret << 27)) >> 27; } -static UINT32 rfield_s_06(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_06(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x3f,11); + RFIELDMAC(0x3f,11); return ((INT32)(ret << 26)) >> 26; } -static UINT32 rfield_s_07(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_07(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x7f,10); + RFIELDMAC(0x7f,10); return ((INT32)(ret << 25)) >> 25; } -static UINT32 rfield_s_08(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_08(offs_t offset) { UINT32 ret; if (offset & 0x07) { - RFIELDMAC(tms,0xff,9); + RFIELDMAC(0xff,9); } else - ret = TMS34010_RDMEM(tms,TOBYTE(offset)); + ret = TMS34010_RDMEM(TOBYTE(offset)); return (INT32)(INT8)ret; } -static UINT32 rfield_s_09(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_09(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1ff,8); + RFIELDMAC(0x1ff,8); return ((INT32)(ret << 23)) >> 23; } -static UINT32 rfield_s_10(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_10(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x3ff,7); + RFIELDMAC(0x3ff,7); return ((INT32)(ret << 22)) >> 22; } -static UINT32 rfield_s_11(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_11(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x7ff,6); + RFIELDMAC(0x7ff,6); return ((INT32)(ret << 21)) >> 21; } -static UINT32 rfield_s_12(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_12(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0xfff,5); + RFIELDMAC(0xfff,5); return ((INT32)(ret << 20)) >> 20; } -static UINT32 rfield_s_13(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_13(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1fff,4); + RFIELDMAC(0x1fff,4); return ((INT32)(ret << 19)) >> 19; } -static UINT32 rfield_s_14(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_14(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x3fff,3); + RFIELDMAC(0x3fff,3); return ((INT32)(ret << 18)) >> 18; } -static UINT32 rfield_s_15(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_15(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x7fff,2); + RFIELDMAC(0x7fff,2); return ((INT32)(ret << 17)) >> 17; } -static UINT32 rfield_s_16(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_16(offs_t offset) { UINT32 ret; if (offset & 0x0f) { - RFIELDMAC(tms,0xffff,1); + RFIELDMAC(0xffff,1); } else { - ret = TMS34010_RDMEM_WORD(tms,TOBYTE(offset)); + ret = TMS34010_RDMEM_WORD(TOBYTE(offset)); } return (INT32)(INT16)ret; } -static UINT32 rfield_s_17(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_17(offs_t offset) { UINT32 ret; - RFIELDMAC(tms,0x1ffff,0); + RFIELDMAC(0x1ffff,0); return ((INT32)(ret << 15)) >> 15; } -static UINT32 rfield_s_18(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_18(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3ffff,15); + RFIELDMAC_BIG(0x3ffff,15); return ((INT32)(ret << 14)) >> 14; } -static UINT32 rfield_s_19(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_19(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7ffff,14); + RFIELDMAC_BIG(0x7ffff,14); return ((INT32)(ret << 13)) >> 13; } -static UINT32 rfield_s_20(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_20(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0xfffff,13); + RFIELDMAC_BIG(0xfffff,13); return ((INT32)(ret << 12)) >> 12; } -static UINT32 rfield_s_21(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_21(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x1fffff,12); + RFIELDMAC_BIG(0x1fffff,12); return ((INT32)(ret << 11)) >> 11; } -static UINT32 rfield_s_22(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_22(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3fffff,11); + RFIELDMAC_BIG(0x3fffff,11); return ((INT32)(ret << 10)) >> 10; } -static UINT32 rfield_s_23(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_23(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7fffff,10); + RFIELDMAC_BIG(0x7fffff,10); return ((INT32)(ret << 9)) >> 9; } -static UINT32 rfield_s_24(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_24(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0xffffff,9); + RFIELDMAC_BIG(0xffffff,9); return ((INT32)(ret << 8)) >> 8; } -static UINT32 rfield_s_25(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_25(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x1ffffff,8); + RFIELDMAC_BIG(0x1ffffff,8); return ((INT32)(ret << 7)) >> 7; } -static UINT32 rfield_s_26(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_26(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3ffffff,7); + RFIELDMAC_BIG(0x3ffffff,7); return ((INT32)(ret << 6)) >> 6; } -static UINT32 rfield_s_27(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_27(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7ffffff,6); + RFIELDMAC_BIG(0x7ffffff,6); return ((INT32)(ret << 5)) >> 5; } -static UINT32 rfield_s_28(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_28(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0xfffffff,5); + RFIELDMAC_BIG(0xfffffff,5); return ((INT32)(ret << 4)) >> 4; } -static UINT32 rfield_s_29(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_29(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x1fffffff,4); + RFIELDMAC_BIG(0x1fffffff,4); return ((INT32)(ret << 3)) >> 3; } -static UINT32 rfield_s_30(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_30(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x3fffffff,3); + RFIELDMAC_BIG(0x3fffffff,3); return ((INT32)(ret << 2)) >> 2; } -static UINT32 rfield_s_31(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::rfield_s_31(offs_t offset) { UINT32 ret; - RFIELDMAC_BIG(tms,0x7fffffff,2); + RFIELDMAC_BIG(0x7fffffff,2); return ((INT32)(ret << 1)) >> 1; } -static UINT32 (*const tms34010_rfield_functions[64])(tms34010_state *tms, offs_t offset) = +const tms340x0_device::rfield_func tms340x0_device::s_rfield_functions[64] = { - rfield_32 , rfield_z_01, rfield_z_02, rfield_z_03, rfield_z_04, rfield_z_05, - rfield_z_06, rfield_z_07, rfield_z_08, rfield_z_09, rfield_z_10, rfield_z_11, - rfield_z_12, rfield_z_13, rfield_z_14, rfield_z_15, rfield_z_16, rfield_z_17, - rfield_z_18, rfield_z_19, rfield_z_20, rfield_z_21, rfield_z_22, rfield_z_23, - rfield_z_24, rfield_z_25, rfield_z_26, rfield_z_27, rfield_z_28, rfield_z_29, - rfield_z_30, rfield_z_31, - rfield_32 , rfield_s_01, rfield_s_02, rfield_s_03, rfield_s_04, rfield_s_05, - rfield_s_06, rfield_s_07, rfield_s_08, rfield_s_09, rfield_s_10, rfield_s_11, - rfield_s_12, rfield_s_13, rfield_s_14, rfield_s_15, rfield_s_16, rfield_s_17, - rfield_s_18, rfield_s_19, rfield_s_20, rfield_s_21, rfield_s_22, rfield_s_23, - rfield_s_24, rfield_s_25, rfield_s_26, rfield_s_27, rfield_s_28, rfield_s_29, - rfield_s_30, rfield_s_31 + &tms340x0_device::rfield_32 , &tms340x0_device::rfield_z_01, &tms340x0_device::rfield_z_02, &tms340x0_device::rfield_z_03, &tms340x0_device::rfield_z_04, &tms340x0_device::rfield_z_05, + &tms340x0_device::rfield_z_06, &tms340x0_device::rfield_z_07, &tms340x0_device::rfield_z_08, &tms340x0_device::rfield_z_09, &tms340x0_device::rfield_z_10, &tms340x0_device::rfield_z_11, + &tms340x0_device::rfield_z_12, &tms340x0_device::rfield_z_13, &tms340x0_device::rfield_z_14, &tms340x0_device::rfield_z_15, &tms340x0_device::rfield_z_16, &tms340x0_device::rfield_z_17, + &tms340x0_device::rfield_z_18, &tms340x0_device::rfield_z_19, &tms340x0_device::rfield_z_20, &tms340x0_device::rfield_z_21, &tms340x0_device::rfield_z_22, &tms340x0_device::rfield_z_23, + &tms340x0_device::rfield_z_24, &tms340x0_device::rfield_z_25, &tms340x0_device::rfield_z_26, &tms340x0_device::rfield_z_27, &tms340x0_device::rfield_z_28, &tms340x0_device::rfield_z_29, + &tms340x0_device::rfield_z_30, &tms340x0_device::rfield_z_31, + &tms340x0_device::rfield_32 , &tms340x0_device::rfield_s_01, &tms340x0_device::rfield_s_02, &tms340x0_device::rfield_s_03, &tms340x0_device::rfield_s_04, &tms340x0_device::rfield_s_05, + &tms340x0_device::rfield_s_06, &tms340x0_device::rfield_s_07, &tms340x0_device::rfield_s_08, &tms340x0_device::rfield_s_09, &tms340x0_device::rfield_s_10, &tms340x0_device::rfield_s_11, + &tms340x0_device::rfield_s_12, &tms340x0_device::rfield_s_13, &tms340x0_device::rfield_s_14, &tms340x0_device::rfield_s_15, &tms340x0_device::rfield_s_16, &tms340x0_device::rfield_s_17, + &tms340x0_device::rfield_s_18, &tms340x0_device::rfield_s_19, &tms340x0_device::rfield_s_20, &tms340x0_device::rfield_s_21, &tms340x0_device::rfield_s_22, &tms340x0_device::rfield_s_23, + &tms340x0_device::rfield_s_24, &tms340x0_device::rfield_s_25, &tms340x0_device::rfield_s_26, &tms340x0_device::rfield_s_27, &tms340x0_device::rfield_s_28, &tms340x0_device::rfield_s_29, + &tms340x0_device::rfield_s_30, &tms340x0_device::rfield_s_31 }; diff --git a/src/emu/cpu/tms34010/34010gfx.c b/src/emu/cpu/tms34010/34010gfx.c index 6ebb5932e2f..392847dba52 100644 --- a/src/emu/cpu/tms34010/34010gfx.c +++ b/src/emu/cpu/tms34010/34010gfx.c @@ -11,53 +11,53 @@ #define LOG_GFX_OPS 0 -#define LOGGFX(x) do { if (LOG_GFX_OPS && tms->device->machine().input().code_pressed(KEYCODE_L)) logerror x; } while (0) +#define LOGGFX(x) do { if (LOG_GFX_OPS && machine().input().code_pressed(KEYCODE_L)) logerror x; } while (0) /* Graphics Instructions */ -static void line(tms34010_state *tms, UINT16 op) +void tms340x0_device::line(UINT16 op) { - if (!P_FLAG(tms)) + if (!P_FLAG()) { - if (WINDOW_CHECKING(tms) != 0 && WINDOW_CHECKING(tms) != 3) - logerror("LINE XY %08X - Window Checking Mode %d not supported\n", tms->pc, WINDOW_CHECKING(tms)); + if (WINDOW_CHECKING() != 0 && WINDOW_CHECKING() != 3) + logerror("LINE XY %08X - Window Checking Mode %d not supported\n", m_pc, WINDOW_CHECKING()); - tms->st |= STBIT_P; - TEMP(tms) = (op & 0x80) ? 1 : 0; /* boundary value depends on the algorithm */ - LOGGFX(("%08X(%3d):LINE (%d,%d)-(%d,%d)\n", tms->pc, tms->screen->vpos(), DADDR_X(tms), DADDR_Y(tms), DADDR_X(tms) + DYDX_X(tms), DADDR_Y(tms) + DYDX_Y(tms))); + m_st |= STBIT_P; + TEMP() = (op & 0x80) ? 1 : 0; /* boundary value depends on the algorithm */ + LOGGFX(("%08X(%3d):LINE (%d,%d)-(%d,%d)\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DADDR_X() + DYDX_X(), DADDR_Y() + DYDX_Y())); } - if (COUNT(tms) > 0) + if (COUNT() > 0) { INT16 x1,y1; - COUNT(tms)--; - if (WINDOW_CHECKING(tms) != 3 || - (DADDR_X(tms) >= WSTART_X(tms) && DADDR_X(tms) <= WEND_X(tms) && - DADDR_Y(tms) >= WSTART_Y(tms) && DADDR_Y(tms) <= WEND_Y(tms))) - WPIXEL(tms,DXYTOL(tms,DADDR_XY(tms)),COLOR1(tms)); + COUNT()--; + if (WINDOW_CHECKING() != 3 || + (DADDR_X() >= WSTART_X() && DADDR_X() <= WEND_X() && + DADDR_Y() >= WSTART_Y() && DADDR_Y() <= WEND_Y())) + WPIXEL(DXYTOL(DADDR_XY()),COLOR1()); - if (SADDR(tms) >= TEMP(tms)) + if (SADDR() >= TEMP()) { - SADDR(tms) += DYDX_Y(tms)*2 - DYDX_X(tms)*2; - x1 = INC1_X(tms); - y1 = INC1_Y(tms); + SADDR() += DYDX_Y()*2 - DYDX_X()*2; + x1 = INC1_X(); + y1 = INC1_Y(); } else { - SADDR(tms) += DYDX_Y(tms)*2; - x1 = INC2_X(tms); - y1 = INC2_Y(tms); + SADDR() += DYDX_Y()*2; + x1 = INC2_X(); + y1 = INC2_Y(); } - DADDR_X(tms) += x1; - DADDR_Y(tms) += y1; + DADDR_X() += x1; + DADDR_Y() += y1; - COUNT_UNKNOWN_CYCLES(tms,2); - tms->pc -= 0x10; /* not done yet, check for interrupts and restart instruction */ + COUNT_UNKNOWN_CYCLES(2); + m_pc -= 0x10; /* not done yet, check for interrupts and restart instruction */ return; } - tms->st &= ~STBIT_P; + m_st &= ~STBIT_P; } @@ -70,10 +70,10 @@ cases: * directions (left->right/right->left, top->bottom/bottom->top) */ -static int apply_window(tms34010_state *tms, const char *inst_name,int srcbpp, UINT32 *srcaddr, XY *dst, int *dx, int *dy) +int tms340x0_device::apply_window(const char *inst_name,int srcbpp, UINT32 *srcaddr, XY *dst, int *dx, int *dy) { /* apply the window */ - if (WINDOW_CHECKING(tms) == 0) + if (WINDOW_CHECKING() == 0) return 0; else { @@ -83,45 +83,45 @@ static int apply_window(tms34010_state *tms, const char *inst_name,int srcbpp, U int ey = sy + *dy - 1; int diff, cycles = 3; - if (WINDOW_CHECKING(tms) == 2) - logerror("%08x: %s apply_window window mode %d not supported!\n", tms->device->pc(), inst_name, WINDOW_CHECKING(tms)); + if (WINDOW_CHECKING() == 2) + logerror("%08x: %s apply_window window mode %d not supported!\n", pc(), inst_name, WINDOW_CHECKING()); - CLR_V(tms); - if (WINDOW_CHECKING(tms) == 1) - SET_V_LOG(tms, 1); + CLR_V(); + if (WINDOW_CHECKING() == 1) + SET_V_LOG(1); /* clip X */ - diff = WSTART_X(tms) - sx; + diff = WSTART_X() - sx; if (diff > 0) { if (srcaddr) *srcaddr += diff * srcbpp; sx += diff; - SET_V_LOG(tms, 1); + SET_V_LOG(1); } - diff = ex - WEND_X(tms); + diff = ex - WEND_X(); if (diff > 0) { ex -= diff; - SET_V_LOG(tms, 1); + SET_V_LOG(1); } /* clip Y */ - diff = WSTART_Y(tms) - sy; + diff = WSTART_Y() - sy; if (diff > 0) { if (srcaddr) - *srcaddr += diff * tms->convsp; + *srcaddr += diff * m_convsp; sy += diff; - SET_V_LOG(tms, 1); + SET_V_LOG(1); } - diff = ey - WEND_Y(tms); + diff = ey - WEND_Y(); if (diff > 0) { ey -= diff; - SET_V_LOG(tms, 1); + SET_V_LOG(1); } /* compute cycles */ @@ -166,7 +166,7 @@ static int apply_window(tms34010_state *tms, const char *inst_name,int srcbpp, U *******************************************************************/ -static int compute_fill_cycles(int left_partials, int right_partials, int full_words, int op_timing) +int tms340x0_device::compute_fill_cycles(int left_partials, int right_partials, int full_words, int op_timing) { int dstwords; @@ -177,7 +177,7 @@ static int compute_fill_cycles(int left_partials, int right_partials, int full_w return (dstwords * op_timing); } -static int compute_pixblt_cycles(int left_partials, int right_partials, int full_words, int op_timing) +int tms340x0_device::compute_pixblt_cycles(int left_partials, int right_partials, int full_words, int op_timing) { int srcwords, dstwords; @@ -189,7 +189,7 @@ static int compute_pixblt_cycles(int left_partials, int right_partials, int full return (dstwords * op_timing + srcwords * 2) + 2; } -static int compute_pixblt_b_cycles(int left_partials, int right_partials, int full_words, int rows, int op_timing, int bpp) +int tms340x0_device::compute_pixblt_b_cycles(int left_partials, int right_partials, int full_words, int rows, int op_timing, int bpp) { int srcwords, dstwords; @@ -203,519 +203,428 @@ static int compute_pixblt_b_cycles(int left_partials, int right_partials, int fu /* Shift register handling */ -static void memory_w(address_space &space, offs_t offset,UINT16 data) +void tms340x0_device::memory_w(address_space &space, offs_t offset,UINT16 data) { space.write_word(offset, data); } -static UINT16 memory_r(address_space &space, offs_t offset) +UINT16 tms340x0_device::memory_r(address_space &space, offs_t offset) { return space.read_word(offset); } -static void shiftreg_w(address_space &space, offs_t offset,UINT16 data) +void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,UINT16 data) { - tms34010_state *tms = get_safe_token(&space.device()); - if (tms->config->from_shiftreg) - (*tms->config->from_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]); + if (m_config->from_shiftreg) + (*m_config->from_shiftreg)(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]); else - logerror("From ShiftReg function not set. PC = %08X\n", tms->pc); + logerror("From ShiftReg function not set. PC = %08X\n", m_pc); } -static UINT16 shiftreg_r(address_space &space, offs_t offset) +UINT16 tms340x0_device::shiftreg_r(address_space &space, offs_t offset) { - tms34010_state *tms = get_safe_token(&space.device()); - if (tms->config->to_shiftreg) - (*tms->config->to_shiftreg)(space, (UINT32)(offset << 3) & ~15, &tms->shiftreg[0]); + if (m_config->to_shiftreg) + (*m_config->to_shiftreg)(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]); else - logerror("To ShiftReg function not set. PC = %08X\n", tms->pc); - return tms->shiftreg[0]; + logerror("To ShiftReg function not set. PC = %08X\n", m_pc); + return m_shiftreg[0]; } -static UINT16 dummy_shiftreg_r(address_space &space, offs_t offset) +UINT16 tms340x0_device::dummy_shiftreg_r(address_space &space, offs_t offset) { - tms34010_state *tms = get_safe_token(&space.device()); - return tms->shiftreg[0]; + return m_shiftreg[0]; } /* Pixel operations */ -static UINT32 pixel_op00(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix; } -static UINT32 pixel_op01(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & dstpix; } -static UINT32 pixel_op02(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & ~dstpix; } -static UINT32 pixel_op03(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return 0; } -static UINT32 pixel_op04(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | ~dstpix) & mask; } -static UINT32 pixel_op05(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix ^ dstpix) & mask; } -static UINT32 pixel_op06(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~dstpix & mask; } -static UINT32 pixel_op07(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix | dstpix) & mask; } -static UINT32 pixel_op08(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | dstpix) & mask; } -static UINT32 pixel_op09(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return dstpix & mask; } -static UINT32 pixel_op10(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix ^ dstpix) & mask; } -static UINT32 pixel_op11(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; } -static UINT32 pixel_op12(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return mask; } -static UINT32 pixel_op13(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; } -static UINT32 pixel_op14(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix & dstpix) & mask; } -static UINT32 pixel_op15(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix ^ mask; } -static UINT32 pixel_op16(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix + dstpix) & mask; } -static UINT32 pixel_op17(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix + (dstpix & mask); return (tmp > mask) ? mask : tmp; } -static UINT32 pixel_op18(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (dstpix - srcpix) & mask; } -static UINT32 pixel_op19(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix - (dstpix & mask); return (tmp < 0) ? 0 : tmp; } -static UINT32 pixel_op20(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix > dstpix) ? srcpix : dstpix; } -static UINT32 pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix < dstpix) ? srcpix : dstpix; } +UINT32 tms340x0_device::pixel_op00(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix; } +UINT32 tms340x0_device::pixel_op01(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & dstpix; } +UINT32 tms340x0_device::pixel_op02(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix & ~dstpix; } +UINT32 tms340x0_device::pixel_op03(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return 0; } +UINT32 tms340x0_device::pixel_op04(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | ~dstpix) & mask; } +UINT32 tms340x0_device::pixel_op05(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix ^ dstpix) & mask; } +UINT32 tms340x0_device::pixel_op06(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~dstpix & mask; } +UINT32 tms340x0_device::pixel_op07(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix | dstpix) & mask; } +UINT32 tms340x0_device::pixel_op08(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix | dstpix) & mask; } +UINT32 tms340x0_device::pixel_op09(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return dstpix & mask; } +UINT32 tms340x0_device::pixel_op10(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix ^ dstpix) & mask; } +UINT32 tms340x0_device::pixel_op11(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; } +UINT32 tms340x0_device::pixel_op12(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return mask; } +UINT32 tms340x0_device::pixel_op13(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (~srcpix & dstpix) & mask; } +UINT32 tms340x0_device::pixel_op14(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return ~(srcpix & dstpix) & mask; } +UINT32 tms340x0_device::pixel_op15(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return srcpix ^ mask; } +UINT32 tms340x0_device::pixel_op16(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (srcpix + dstpix) & mask; } +UINT32 tms340x0_device::pixel_op17(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix + (dstpix & mask); return (tmp > mask) ? mask : tmp; } +UINT32 tms340x0_device::pixel_op18(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { return (dstpix - srcpix) & mask; } +UINT32 tms340x0_device::pixel_op19(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { INT32 tmp = srcpix - (dstpix & mask); return (tmp < 0) ? 0 : tmp; } +UINT32 tms340x0_device::pixel_op20(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix > dstpix) ? srcpix : dstpix; } +UINT32 tms340x0_device::pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &= mask; return (srcpix < dstpix) ? srcpix : dstpix; } -static UINT32 (*const pixel_op_table[])(UINT32, UINT32, UINT32) = +const tms340x0_device::pixel_op_func tms340x0_device::s_pixel_op_table[32] = { - pixel_op00, pixel_op01, pixel_op02, pixel_op03, pixel_op04, pixel_op05, pixel_op06, pixel_op07, - pixel_op08, pixel_op09, pixel_op10, pixel_op11, pixel_op12, pixel_op13, pixel_op14, pixel_op15, - pixel_op16, pixel_op17, pixel_op18, pixel_op19, pixel_op20, pixel_op21, pixel_op00, pixel_op00, - pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00 + &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op01, &tms340x0_device::pixel_op02, &tms340x0_device::pixel_op03, &tms340x0_device::pixel_op04, &tms340x0_device::pixel_op05, &tms340x0_device::pixel_op06, &tms340x0_device::pixel_op07, + &tms340x0_device::pixel_op08, &tms340x0_device::pixel_op09, &tms340x0_device::pixel_op10, &tms340x0_device::pixel_op11, &tms340x0_device::pixel_op12, &tms340x0_device::pixel_op13, &tms340x0_device::pixel_op14, &tms340x0_device::pixel_op15, + &tms340x0_device::pixel_op16, &tms340x0_device::pixel_op17, &tms340x0_device::pixel_op18, &tms340x0_device::pixel_op19, &tms340x0_device::pixel_op20, &tms340x0_device::pixel_op21, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, + &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00, &tms340x0_device::pixel_op00 }; -static const UINT8 pixel_op_timing_table[] = +const UINT8 tms340x0_device::s_pixel_op_timing_table[33] = { 2,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,5,5,6,5,5,2,2,2,2,2,2,2,2,2,2,2 }; -static UINT32 (*pixel_op)(UINT32, UINT32, UINT32); -static UINT32 pixel_op_timing; - - -/* Blitters/fillers */ -static void pixblt_1_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_2_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_4_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_8_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_16_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_1_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_2_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_4_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_8_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_16_op0(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_b_1_op0(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_2_op0(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_4_op0(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_8_op0(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_16_op0(tms34010_state *tms, int dst_is_linear); -static void fill_1_op0(tms34010_state *tms, int dst_is_linear); -static void fill_2_op0(tms34010_state *tms, int dst_is_linear); -static void fill_4_op0(tms34010_state *tms, int dst_is_linear); -static void fill_8_op0(tms34010_state *tms, int dst_is_linear); -static void fill_16_op0(tms34010_state *tms, int dst_is_linear); - -static void pixblt_1_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_2_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_4_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_8_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_16_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_1_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_2_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_4_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_8_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_16_op0_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_b_1_op0_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_2_op0_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_4_op0_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_8_op0_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_16_op0_trans(tms34010_state *tms, int dst_is_linear); -static void fill_1_op0_trans(tms34010_state *tms, int dst_is_linear); -static void fill_2_op0_trans(tms34010_state *tms, int dst_is_linear); -static void fill_4_op0_trans(tms34010_state *tms, int dst_is_linear); -static void fill_8_op0_trans(tms34010_state *tms, int dst_is_linear); -static void fill_16_op0_trans(tms34010_state *tms, int dst_is_linear); - -static void pixblt_1_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_2_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_4_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_8_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_16_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_1_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_2_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_4_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_8_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_16_opx(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_b_1_opx(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_2_opx(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_4_opx(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_8_opx(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_16_opx(tms34010_state *tms, int dst_is_linear); -static void fill_1_opx(tms34010_state *tms, int dst_is_linear); -static void fill_2_opx(tms34010_state *tms, int dst_is_linear); -static void fill_4_opx(tms34010_state *tms, int dst_is_linear); -static void fill_8_opx(tms34010_state *tms, int dst_is_linear); -static void fill_16_opx(tms34010_state *tms, int dst_is_linear); - -static void pixblt_1_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_2_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_4_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_8_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_16_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_1_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_2_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_4_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_8_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_r_16_opx_trans(tms34010_state *tms, int src_is_linear, int dst_is_linear); -static void pixblt_b_1_opx_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_2_opx_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_4_opx_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_8_opx_trans(tms34010_state *tms, int dst_is_linear); -static void pixblt_b_16_opx_trans(tms34010_state *tms, int dst_is_linear); -static void fill_1_opx_trans(tms34010_state *tms, int dst_is_linear); -static void fill_2_opx_trans(tms34010_state *tms, int dst_is_linear); -static void fill_4_opx_trans(tms34010_state *tms, int dst_is_linear); -static void fill_8_opx_trans(tms34010_state *tms, int dst_is_linear); -static void fill_16_opx_trans(tms34010_state *tms, int dst_is_linear); /* tables */ -static void (*const pixblt_op_table[])(tms34010_state *, int, int) = +const tms340x0_device::pixblt_op_func tms340x0_device::s_pixblt_op_table[] = { - pixblt_1_op0, pixblt_1_op0_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, - pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_op0, &tms340x0_device::pixblt_1_op0_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, + &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, &tms340x0_device::pixblt_1_opx, &tms340x0_device::pixblt_1_opx_trans, - pixblt_2_op0, pixblt_2_op0_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, - pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_op0, &tms340x0_device::pixblt_2_op0_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, + &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, &tms340x0_device::pixblt_2_opx, &tms340x0_device::pixblt_2_opx_trans, - pixblt_4_op0, pixblt_4_op0_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, - pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_op0, &tms340x0_device::pixblt_4_op0_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, + &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, &tms340x0_device::pixblt_4_opx, &tms340x0_device::pixblt_4_opx_trans, - pixblt_8_op0, pixblt_8_op0_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, - pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_op0, &tms340x0_device::pixblt_8_op0_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, + &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, &tms340x0_device::pixblt_8_opx, &tms340x0_device::pixblt_8_opx_trans, - pixblt_16_op0, pixblt_16_op0_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans, - pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans + &tms340x0_device::pixblt_16_op0, &tms340x0_device::pixblt_16_op0_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, + &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans, &tms340x0_device::pixblt_16_opx, &tms340x0_device::pixblt_16_opx_trans }; -static void (*const pixblt_r_op_table[])(tms34010_state *, int, int) = +const tms340x0_device::pixblt_op_func tms340x0_device::s_pixblt_r_op_table[] = { - pixblt_r_1_op0, pixblt_r_1_op0_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, - pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_op0, &tms340x0_device::pixblt_r_1_op0_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, + &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, &tms340x0_device::pixblt_r_1_opx, &tms340x0_device::pixblt_r_1_opx_trans, - pixblt_r_2_op0, pixblt_r_2_op0_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, - pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_op0, &tms340x0_device::pixblt_r_2_op0_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, + &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, &tms340x0_device::pixblt_r_2_opx, &tms340x0_device::pixblt_r_2_opx_trans, - pixblt_r_4_op0, pixblt_r_4_op0_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, - pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_op0, &tms340x0_device::pixblt_r_4_op0_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, + &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, &tms340x0_device::pixblt_r_4_opx, &tms340x0_device::pixblt_r_4_opx_trans, - pixblt_r_8_op0, pixblt_r_8_op0_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, - pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_op0, &tms340x0_device::pixblt_r_8_op0_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, + &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, &tms340x0_device::pixblt_r_8_opx, &tms340x0_device::pixblt_r_8_opx_trans, - pixblt_r_16_op0,pixblt_r_16_op0_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans, - pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans + &tms340x0_device::pixblt_r_16_op0,&tms340x0_device::pixblt_r_16_op0_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, + &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans, &tms340x0_device::pixblt_r_16_opx,&tms340x0_device::pixblt_r_16_opx_trans }; -static void (*const pixblt_b_op_table[])(tms34010_state *, int) = +const tms340x0_device::pixblt_b_op_func tms340x0_device::s_pixblt_b_op_table[] = { - pixblt_b_1_op0, pixblt_b_1_op0_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, - pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_op0, &tms340x0_device::pixblt_b_1_op0_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, + &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, &tms340x0_device::pixblt_b_1_opx, &tms340x0_device::pixblt_b_1_opx_trans, - pixblt_b_2_op0, pixblt_b_2_op0_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, - pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_op0, &tms340x0_device::pixblt_b_2_op0_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, + &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, &tms340x0_device::pixblt_b_2_opx, &tms340x0_device::pixblt_b_2_opx_trans, - pixblt_b_4_op0, pixblt_b_4_op0_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, - pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_op0, &tms340x0_device::pixblt_b_4_op0_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, + &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, &tms340x0_device::pixblt_b_4_opx, &tms340x0_device::pixblt_b_4_opx_trans, - pixblt_b_8_op0, pixblt_b_8_op0_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, - pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_op0, &tms340x0_device::pixblt_b_8_op0_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, + &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, &tms340x0_device::pixblt_b_8_opx, &tms340x0_device::pixblt_b_8_opx_trans, - pixblt_b_16_op0,pixblt_b_16_op0_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans, - pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans + &tms340x0_device::pixblt_b_16_op0,&tms340x0_device::pixblt_b_16_op0_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, + &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans, &tms340x0_device::pixblt_b_16_opx,&tms340x0_device::pixblt_b_16_opx_trans }; -static void (*const fill_op_table[])(tms34010_state *tms, int) = +const tms340x0_device::pixblt_b_op_func tms340x0_device::s_fill_op_table[] = { - fill_1_op0, fill_1_op0_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, - fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans, + &tms340x0_device::fill_1_op0, &tms340x0_device::fill_1_op0_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, + &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, &tms340x0_device::fill_1_opx, &tms340x0_device::fill_1_opx_trans, - fill_2_op0, fill_2_op0_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, - fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans, + &tms340x0_device::fill_2_op0, &tms340x0_device::fill_2_op0_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, + &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, &tms340x0_device::fill_2_opx, &tms340x0_device::fill_2_opx_trans, - fill_4_op0, fill_4_op0_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, - fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans, + &tms340x0_device::fill_4_op0, &tms340x0_device::fill_4_op0_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, + &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, &tms340x0_device::fill_4_opx, &tms340x0_device::fill_4_opx_trans, - fill_8_op0, fill_8_op0_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, - fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans, + &tms340x0_device::fill_8_op0, &tms340x0_device::fill_8_op0_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, + &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, &tms340x0_device::fill_8_opx, &tms340x0_device::fill_8_opx_trans, - fill_16_op0, fill_16_op0_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans, - fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans + &tms340x0_device::fill_16_op0, &tms340x0_device::fill_16_op0_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, + &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans, &tms340x0_device::fill_16_opx, &tms340x0_device::fill_16_opx_trans }; @@ -768,8 +677,8 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) = #undef PIXEL_OP -#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel) -#define PIXEL_OP_TIMING pixel_op_timing +#define PIXEL_OP(src, mask, pixel) pixel = (this->*m_pixel_op)(src, mask, pixel) +#define PIXEL_OP_TIMING m_pixel_op_timing #define PIXEL_OP_REQUIRES_SOURCE 1 #define TRANSPARENCY 0 @@ -861,9 +770,9 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) = #undef PIXEL_OP -#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel) +#define PIXEL_OP(src, mask, pixel) pixel = (this->*m_pixel_op)(src, mask, pixel) #define PIXEL_OP_REQUIRES_SOURCE 1 -#define PIXEL_OP_TIMING (2+pixel_op_timing) +#define PIXEL_OP_TIMING (2+m_pixel_op_timing) #define TRANSPARENCY 1 /* 1bpp cases */ @@ -912,116 +821,116 @@ static const UINT8 pixelsize_lookup[32] = }; -static void pixblt_b_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::pixblt_b_l(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):PIXBLT B,L (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; - (*pixblt_b_op_table[ix])(tms, 1); + if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT B,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; + (this->*s_pixblt_b_op_table[ix])(1); } -static void pixblt_b_xy(tms34010_state *tms, UINT16 op) +void tms340x0_device::pixblt_b_xy(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):PIXBLT B,XY (%d,%d) (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DADDR_X(tms), DADDR_Y(tms), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; - (*pixblt_b_op_table[ix])(tms, 0); + if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT B,XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; + (this->*s_pixblt_b_op_table[ix])(0); } -static void pixblt_l_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::pixblt_l_l(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; - int pbh = (IOREG(tms, REG_CONTROL) >> 8) & 1; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; + int pbh = (IOREG(REG_CONTROL) >> 8) & 1; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):PIXBLT L,L (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; + if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT L,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; if (!pbh) - (*pixblt_op_table[ix])(tms, 1, 1); + (this->*s_pixblt_op_table[ix])(1, 1); else - (*pixblt_r_op_table[ix])(tms, 1, 1); + (this->*s_pixblt_r_op_table[ix])(1, 1); } -static void pixblt_l_xy(tms34010_state *tms, UINT16 op) +void tms340x0_device::pixblt_l_xy(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; - int pbh = (IOREG(tms, REG_CONTROL) >> 8) & 1; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; + int pbh = (IOREG(REG_CONTROL) >> 8) & 1; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):PIXBLT L,XY (%d,%d) (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DADDR_X(tms), DADDR_Y(tms), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; + if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT L,XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; if (!pbh) - (*pixblt_op_table[ix])(tms, 1, 0); + (this->*s_pixblt_op_table[ix])(1, 0); else - (*pixblt_r_op_table[ix])(tms, 1, 0); + (this->*s_pixblt_r_op_table[ix])(1, 0); } -static void pixblt_xy_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::pixblt_xy_l(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; - int pbh = (IOREG(tms, REG_CONTROL) >> 8) & 1; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; + int pbh = (IOREG(REG_CONTROL) >> 8) & 1; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):PIXBLT XY,L (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; + if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT XY,L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; if (!pbh) - (*pixblt_op_table[ix])(tms, 0, 1); + (this->*s_pixblt_op_table[ix])(0, 1); else - (*pixblt_r_op_table[ix])(tms, 0, 1); + (this->*s_pixblt_r_op_table[ix])(0, 1); } -static void pixblt_xy_xy(tms34010_state *tms, UINT16 op) +void tms340x0_device::pixblt_xy_xy(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; - int pbh = (IOREG(tms, REG_CONTROL) >> 8) & 1; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; + int pbh = (IOREG(REG_CONTROL) >> 8) & 1; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):PIXBLT XY,XY (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; + if (!P_FLAG()) LOGGFX(("%08X(%3d):PIXBLT XY,XY (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; if (!pbh) - (*pixblt_op_table[ix])(tms, 0, 0); + (this->*s_pixblt_op_table[ix])(0, 0); else - (*pixblt_r_op_table[ix])(tms, 0, 0); + (this->*s_pixblt_r_op_table[ix])(0, 0); } -static void fill_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::fill_l(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):FILL L (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; - (*fill_op_table[ix])(tms, 1); + if (!P_FLAG()) LOGGFX(("%08X(%3d):FILL L (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; + (this->*s_fill_op_table[ix])(1); } -static void fill_xy(tms34010_state *tms, UINT16 op) +void tms340x0_device::fill_xy(UINT16 op) { - int psize = pixelsize_lookup[IOREG(tms, REG_PSIZE) & 0x1f]; - int trans = (IOREG(tms, REG_CONTROL) & 0x20) >> 5; - int rop = (IOREG(tms, REG_CONTROL) >> 10) & 0x1f; + int psize = pixelsize_lookup[IOREG(REG_PSIZE) & 0x1f]; + int trans = (IOREG(REG_CONTROL) & 0x20) >> 5; + int rop = (IOREG(REG_CONTROL) >> 10) & 0x1f; int ix = trans | (rop << 1) | (psize << 6); - if (!P_FLAG(tms)) LOGGFX(("%08X(%3d):FILL XY (%d,%d) (%dx%d) depth=%d\n", tms->pc, tms->screen->vpos(), DADDR_X(tms), DADDR_Y(tms), DYDX_X(tms), DYDX_Y(tms), IOREG(tms, REG_PSIZE) ? IOREG(tms, REG_PSIZE) : 32)); - pixel_op = pixel_op_table[rop]; - pixel_op_timing = pixel_op_timing_table[rop]; - (*fill_op_table[ix])(tms, 0); + if (!P_FLAG()) LOGGFX(("%08X(%3d):FILL XY (%d,%d) (%dx%d) depth=%d\n", m_pc, m_screen->vpos(), DADDR_X(), DADDR_Y(), DYDX_X(), DYDX_Y(), IOREG(REG_PSIZE) ? IOREG(REG_PSIZE) : 32)); + m_pixel_op = s_pixel_op_table[rop]; + m_pixel_op_timing = s_pixel_op_timing_table[rop]; + (this->*s_fill_op_table[ix])(0); } @@ -1034,78 +943,78 @@ static void fill_xy(tms34010_state *tms, UINT16 op) #define PIXELS_PER_WORD (16 / BITS_PER_PIXEL) #define PIXEL_MASK ((1 << BITS_PER_PIXEL) - 1) -static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int dst_is_linear) +void FUNCTION_NAME(tms340x0_device::pixblt)(int src_is_linear, int dst_is_linear) { /* if this is the first time through, perform the operation */ - if (!P_FLAG(tms)) + if (!P_FLAG()) { int dx, dy, x, y, /*words,*/ yreverse; - void (*word_write)(address_space &space,offs_t address,UINT16 data); - UINT16 (*word_read)(address_space &space,offs_t address); + word_write_func word_write; + word_read_func word_read; UINT32 readwrites = 0; UINT32 saddr, daddr; XY dstxy = { 0 }; /* determine read/write functions */ - if (IOREG(tms, REG_DPYCTL) & 0x0800) + if (IOREG(REG_DPYCTL) & 0x0800) { - word_write = shiftreg_w; - word_read = shiftreg_r; + word_write = &tms340x0_device::shiftreg_w; + word_read = &tms340x0_device::shiftreg_r; } else { - word_write = memory_w; - word_read = memory_r; + word_write = &tms340x0_device::memory_w; + word_read = &tms340x0_device::memory_r; } /* compute the starting addresses */ - saddr = src_is_linear ? SADDR(tms) : SXYTOL(tms,SADDR_XY(tms)); + saddr = src_is_linear ? SADDR() : SXYTOL(SADDR_XY()); /* compute the bounds of the operation */ - dx = (INT16)DYDX_X(tms); - dy = (INT16)DYDX_Y(tms); + dx = (INT16)DYDX_X(); + dy = (INT16)DYDX_Y(); /* apply the window for non-linear destinations */ - tms->gfxcycles = 7 + (src_is_linear ? 0 : 2); + m_gfxcycles = 7 + (src_is_linear ? 0 : 2); if (!dst_is_linear) { - dstxy = DADDR_XY(tms); - tms->gfxcycles += 2 + (!src_is_linear) + apply_window(tms, "PIXBLT", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy); - daddr = DXYTOL(tms,dstxy); + dstxy = DADDR_XY(); + m_gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy); + daddr = DXYTOL(dstxy); } else - daddr = DADDR(tms); + daddr = DADDR(); daddr &= ~(BITS_PER_PIXEL - 1); - LOGGFX((" saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(tms), DPTCH(tms))); + LOGGFX((" saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH())); /* bail if we're clipped */ if (dx <= 0 || dy <= 0) return; /* window mode 1: just return and interrupt if we are within the window */ - if (WINDOW_CHECKING(tms) == 1 && !dst_is_linear) + if (WINDOW_CHECKING() == 1 && !dst_is_linear) { - CLR_V(tms); - DADDR_XY(tms) = dstxy; - DYDX_X(tms) = dx; - DYDX_Y(tms) = dy; - IOREG(tms, REG_INTPEND) |= TMS34010_WV; - check_interrupt(tms); + CLR_V(); + DADDR_XY() = dstxy; + DYDX_X() = dx; + DYDX_Y() = dy; + IOREG(REG_INTPEND) |= TMS34010_WV; + check_interrupt(); return; } /* handle flipping the addresses */ - yreverse = (IOREG(tms, REG_CONTROL) >> 9) & 1; + yreverse = (IOREG(REG_CONTROL) >> 9) & 1; if (!src_is_linear || !dst_is_linear) { if (yreverse) { - saddr += (dy - 1) * tms->convsp; - daddr += (dy - 1) * tms->convdp; + saddr += (dy - 1) * m_convsp; + daddr += (dy - 1) * m_convdp; } } - tms->st |= STBIT_P; + m_st |= STBIT_P; /* loop over rows */ for (y = 0; y < dy; y++) @@ -1117,13 +1026,13 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds UINT32 srcword, dstword = 0; /* fetch the initial source word */ - srcword = (*word_read)(*tms->program, srcwordaddr++ << 1); + srcword = (this->*word_read)(*m_program, srcwordaddr++ << 1); readwrites++; /* fetch the initial dest word */ if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY || (daddr & 0x0f) != 0) { - dstword = (*word_read)(*tms->program, dstwordaddr << 1); + dstword = (this->*word_read)(*m_program, dstwordaddr << 1); readwrites++; } @@ -1136,7 +1045,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds /* fetch more words if necessary */ if (srcbit + BITS_PER_PIXEL > 16) { - srcword |= (*word_read)(*tms->program, srcwordaddr++ << 1) << 16; + srcword |= (this->*word_read)(*m_program, srcwordaddr++ << 1) << 16; readwrites++; } @@ -1153,7 +1062,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY) if (dstbit + BITS_PER_PIXEL > 16) { - dstword |= (*word_read)(*tms->program, (dstwordaddr + 1) << 1) << 16; + dstword |= (this->*word_read)(*m_program, (dstwordaddr + 1) << 1) << 16; readwrites++; } @@ -1168,7 +1077,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds dstbit += BITS_PER_PIXEL; if (dstbit > 16) { - (*word_write)(*tms->program, dstwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dstwordaddr++ << 1, dstword); readwrites++; dstbit -= 16; dstword >>= 16; @@ -1181,13 +1090,13 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds /* if we're right-partial, read and mask the remaining bits */ if (dstbit != 16) { - UINT16 origdst = (*word_read)(*tms->program, dstwordaddr << 1); + UINT16 origdst = (this->*word_read)(*m_program, dstwordaddr << 1); UINT16 mask = 0xffff << dstbit; dstword = (dstword & ~mask) | (origdst & mask); readwrites++; } - (*word_write)(*tms->program, dstwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dstwordaddr++ << 1, dstword); readwrites++; } @@ -1212,21 +1121,21 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds full_words /= PIXELS_PER_WORD; /* compute cycles */ - tms->gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING); + m_gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING); /* use word addresses each row */ swordaddr = saddr >> 4; dwordaddr = daddr >> 4; /* fetch the initial source word */ - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = PIXEL_MASK << (saddr & 15); /* handle the left partial word */ if (left_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); dstmask = PIXEL_MASK << (daddr & 15); /* loop over partials */ @@ -1235,7 +1144,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds /* fetch another word if necessary */ if (srcmask == 0) { - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = PIXEL_MASK; } @@ -1257,7 +1166,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* loop over full words */ @@ -1265,7 +1174,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds { /* fetch the destination word (if necessary) */ if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY) - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); else dstword = 0; dstmask = PIXEL_MASK; @@ -1276,7 +1185,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds /* fetch another word if necessary */ if (srcmask == 0) { - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = PIXEL_MASK; } @@ -1298,14 +1207,14 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* handle the right partial word */ if (right_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); dstmask = PIXEL_MASK; /* loop over partials */ @@ -1315,7 +1224,7 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds if (srcmask == 0) { LOGGFX((" right fetch @ %08x\n", swordaddr)); - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = PIXEL_MASK; } @@ -1337,128 +1246,128 @@ static void FUNCTION_NAME(pixblt)(tms34010_state *tms, int src_is_linear, int ds } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } #endif /* update for next row */ if (!yreverse) { - saddr += SPTCH(tms); - daddr += DPTCH(tms); + saddr += SPTCH(); + daddr += DPTCH(); } else { - saddr -= SPTCH(tms); - daddr -= DPTCH(tms); + saddr -= SPTCH(); + daddr -= DPTCH(); } } - tms->gfxcycles += readwrites * 2 + dx * dy * (PIXEL_OP_TIMING - 2); + m_gfxcycles += readwrites * 2 + dx * dy * (PIXEL_OP_TIMING - 2); - LOGGFX((" (%d cycles)\n", tms->gfxcycles)); + LOGGFX((" (%d cycles)\n", m_gfxcycles)); } /* eat cycles */ - if (tms->gfxcycles > tms->icount) + if (m_gfxcycles > m_icount) { - tms->gfxcycles -= tms->icount; - tms->icount = 0; - tms->pc -= 0x10; + m_gfxcycles -= m_icount; + m_icount = 0; + m_pc -= 0x10; } else { - tms->icount -= tms->gfxcycles; - tms->st &= ~STBIT_P; + m_icount -= m_gfxcycles; + m_st &= ~STBIT_P; if (src_is_linear && dst_is_linear) - SADDR(tms) += DYDX_Y(tms) * SPTCH(tms); + SADDR() += DYDX_Y() * SPTCH(); else if (src_is_linear) - SADDR(tms) += DYDX_Y(tms) * SPTCH(tms); + SADDR() += DYDX_Y() * SPTCH(); else - SADDR_Y(tms) += DYDX_Y(tms); + SADDR_Y() += DYDX_Y(); if (dst_is_linear) - DADDR(tms) += DYDX_Y(tms) * DPTCH(tms); + DADDR() += DYDX_Y() * DPTCH(); else - DADDR_Y(tms) += DYDX_Y(tms); + DADDR_Y() += DYDX_Y(); } } -static void FUNCTION_NAME(pixblt_r)(tms34010_state *tms, int src_is_linear, int dst_is_linear) +void FUNCTION_NAME(tms340x0_device::pixblt_r)(int src_is_linear, int dst_is_linear) { /* if this is the first time through, perform the operation */ - if (!P_FLAG(tms)) + if (!P_FLAG()) { int dx, dy, x, y, words, yreverse; - void (*word_write)(address_space &space,offs_t address,UINT16 data); - UINT16 (*word_read)(address_space &space,offs_t address); + word_write_func word_write; + word_read_func word_read; UINT32 saddr, daddr; XY dstxy = { 0 }; /* determine read/write functions */ - if (IOREG(tms, REG_DPYCTL) & 0x0800) + if (IOREG(REG_DPYCTL) & 0x0800) { - word_write = shiftreg_w; - word_read = shiftreg_r; + word_write = &tms340x0_device::shiftreg_w; + word_read = &tms340x0_device::shiftreg_r; } else { - word_write = memory_w; - word_read = memory_r; + word_write = &tms340x0_device::memory_w; + word_read = &tms340x0_device::memory_r; } /* compute the starting addresses */ - saddr = src_is_linear ? SADDR(tms) : SXYTOL(tms,SADDR_XY(tms)); + saddr = src_is_linear ? SADDR() : SXYTOL(SADDR_XY()); if ((saddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd saddr\n", BITS_PER_PIXEL); saddr &= ~(BITS_PER_PIXEL - 1); /* compute the bounds of the operation */ - dx = (INT16)DYDX_X(tms); - dy = (INT16)DYDX_Y(tms); + dx = (INT16)DYDX_X(); + dy = (INT16)DYDX_Y(); /* apply the window for non-linear destinations */ - tms->gfxcycles = 7 + (src_is_linear ? 0 : 2); + m_gfxcycles = 7 + (src_is_linear ? 0 : 2); if (!dst_is_linear) { - dstxy = DADDR_XY(tms); - tms->gfxcycles += 2 + (!src_is_linear) + apply_window(tms, "PIXBLT R", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy); - daddr = DXYTOL(tms,dstxy); + dstxy = DADDR_XY(); + m_gfxcycles += 2 + (!src_is_linear) + apply_window("PIXBLT R", BITS_PER_PIXEL, &saddr, &dstxy, &dx, &dy); + daddr = DXYTOL(dstxy); } else - daddr = DADDR(tms); + daddr = DADDR(); if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd daddr\n", BITS_PER_PIXEL); daddr &= ~(BITS_PER_PIXEL - 1); - LOGGFX((" saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(tms), DPTCH(tms))); + LOGGFX((" saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH())); /* bail if we're clipped */ if (dx <= 0 || dy <= 0) return; /* window mode 1: just return and interrupt if we are within the window */ - if (WINDOW_CHECKING(tms) == 1 && !dst_is_linear) + if (WINDOW_CHECKING() == 1 && !dst_is_linear) { - CLR_V(tms); - DADDR_XY(tms) = dstxy; - DYDX_X(tms) = dx; - DYDX_Y(tms) = dy; - IOREG(tms, REG_INTPEND) |= TMS34010_WV; - check_interrupt(tms); + CLR_V(); + DADDR_XY() = dstxy; + DYDX_X() = dx; + DYDX_Y() = dy; + IOREG(REG_INTPEND) |= TMS34010_WV; + check_interrupt(); return; } /* handle flipping the addresses */ - yreverse = (IOREG(tms, REG_CONTROL) >> 9) & 1; + yreverse = (IOREG(REG_CONTROL) >> 9) & 1; if (!src_is_linear || !dst_is_linear) { saddr += dx * BITS_PER_PIXEL; daddr += dx * BITS_PER_PIXEL; if (yreverse) { - saddr += (dy - 1) * tms->convsp; - daddr += (dy - 1) * tms->convdp; + saddr += (dy - 1) * m_convsp; + daddr += (dy - 1) * m_convdp; } } - tms->st |= STBIT_P; + m_st |= STBIT_P; /* loop over rows */ for (y = 0; y < dy; y++) @@ -1481,21 +1390,21 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d full_words /= PIXELS_PER_WORD; /* compute cycles */ - tms->gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING); + m_gfxcycles += compute_pixblt_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING); /* use word addresses each row */ swordaddr = (saddr + 15) >> 4; dwordaddr = (daddr + 15) >> 4; /* fetch the initial source word */ - srcword = (*word_read)(*tms->program, --swordaddr << 1); + srcword = (this->*word_read)(*m_program, --swordaddr << 1); srcmask = PIXEL_MASK << ((saddr - BITS_PER_PIXEL) & 15); /* handle the right partial word */ if (right_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, --dwordaddr << 1); + dstword = (this->*word_read)(*m_program, --dwordaddr << 1); dstmask = PIXEL_MASK << ((daddr - BITS_PER_PIXEL) & 15); /* loop over partials */ @@ -1504,7 +1413,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d /* fetch source pixel if necessary */ if (srcmask == 0) { - srcword = (*word_read)(*tms->program, --swordaddr << 1); + srcword = (this->*word_read)(*m_program, --swordaddr << 1); srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL); } @@ -1526,7 +1435,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d } /* write the result */ - (*word_write)(*tms->program, dwordaddr << 1, dstword); + (this->*word_write)(*m_program, dwordaddr << 1, dstword); } /* loop over full words */ @@ -1535,7 +1444,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d /* fetch the destination word (if necessary) */ dwordaddr--; if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY) - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); else dstword = 0; dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL); @@ -1546,7 +1455,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d /* fetch source pixel if necessary */ if (srcmask == 0) { - srcword = (*word_read)(*tms->program, --swordaddr << 1); + srcword = (this->*word_read)(*m_program, --swordaddr << 1); srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL); } @@ -1568,14 +1477,14 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d } /* write the result */ - (*word_write)(*tms->program, dwordaddr << 1, dstword); + (this->*word_write)(*m_program, dwordaddr << 1, dstword); } /* handle the left partial word */ if (left_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, --dwordaddr << 1); + dstword = (this->*word_read)(*m_program, --dwordaddr << 1); dstmask = PIXEL_MASK << (16 - BITS_PER_PIXEL); /* loop over partials */ @@ -1584,7 +1493,7 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d /* fetch the source pixel if necessary */ if (srcmask == 0) { - srcword = (*word_read)(*tms->program, --swordaddr << 1); + srcword = (this->*word_read)(*m_program, --swordaddr << 1); srcmask = PIXEL_MASK << (16 - BITS_PER_PIXEL); } @@ -1606,104 +1515,104 @@ if ((daddr & (BITS_PER_PIXEL - 1)) != 0) osd_printf_debug("PIXBLT_R%d with odd d } /* write the result */ - (*word_write)(*tms->program, dwordaddr << 1, dstword); + (this->*word_write)(*m_program, dwordaddr << 1, dstword); } /* update for next row */ if (!yreverse) { - saddr += SPTCH(tms); - daddr += DPTCH(tms); + saddr += SPTCH(); + daddr += DPTCH(); } else { - saddr -= SPTCH(tms); - daddr -= DPTCH(tms); + saddr -= SPTCH(); + daddr -= DPTCH(); } } - LOGGFX((" (%d cycles)\n", tms->gfxcycles)); + LOGGFX((" (%d cycles)\n", m_gfxcycles)); } /* eat cycles */ - if (tms->gfxcycles > tms->icount) + if (m_gfxcycles > m_icount) { - tms->gfxcycles -= tms->icount; - tms->icount = 0; - tms->pc -= 0x10; + m_gfxcycles -= m_icount; + m_icount = 0; + m_pc -= 0x10; } else { - tms->icount -= tms->gfxcycles; - tms->st &= ~STBIT_P; + m_icount -= m_gfxcycles; + m_st &= ~STBIT_P; if (src_is_linear && dst_is_linear) - SADDR(tms) += DYDX_Y(tms) * SPTCH(tms); + SADDR() += DYDX_Y() * SPTCH(); else if (src_is_linear) - SADDR(tms) += DYDX_Y(tms) * SPTCH(tms); + SADDR() += DYDX_Y() * SPTCH(); else - SADDR_Y(tms) += DYDX_Y(tms); + SADDR_Y() += DYDX_Y(); if (dst_is_linear) - DADDR(tms) += DYDX_Y(tms) * DPTCH(tms); + DADDR() += DYDX_Y() * DPTCH(); else - DADDR_Y(tms) += DYDX_Y(tms); + DADDR_Y() += DYDX_Y(); } } -static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) +void FUNCTION_NAME(tms340x0_device::pixblt_b)(int dst_is_linear) { /* if this is the first time through, perform the operation */ - if (!P_FLAG(tms)) + if (!P_FLAG()) { int dx, dy, x, y, words, left_partials, right_partials, full_words; - void (*word_write)(address_space &space,offs_t address,UINT16 data); - UINT16 (*word_read)(address_space &space,offs_t address); + word_write_func word_write; + word_read_func word_read; UINT32 saddr, daddr; XY dstxy = { 0 }; /* determine read/write functions */ - if (IOREG(tms, REG_DPYCTL) & 0x0800) + if (IOREG(REG_DPYCTL) & 0x0800) { - word_write = shiftreg_w; - word_read = shiftreg_r; + word_write = &tms340x0_device::shiftreg_w; + word_read = &tms340x0_device::shiftreg_r; } else { - word_write = memory_w; - word_read = memory_r; + word_write = &tms340x0_device::memory_w; + word_read = &tms340x0_device::memory_r; } /* compute the starting addresses */ - saddr = SADDR(tms); + saddr = SADDR(); /* compute the bounds of the operation */ - dx = (INT16)DYDX_X(tms); - dy = (INT16)DYDX_Y(tms); + dx = (INT16)DYDX_X(); + dy = (INT16)DYDX_Y(); /* apply the window for non-linear destinations */ - tms->gfxcycles = 4; + m_gfxcycles = 4; if (!dst_is_linear) { - dstxy = DADDR_XY(tms); - tms->gfxcycles += 2 + apply_window(tms, "PIXBLT B", 1, &saddr, &dstxy, &dx, &dy); - daddr = DXYTOL(tms,dstxy); + dstxy = DADDR_XY(); + m_gfxcycles += 2 + apply_window("PIXBLT B", 1, &saddr, &dstxy, &dx, &dy); + daddr = DXYTOL(dstxy); } else - daddr = DADDR(tms); + daddr = DADDR(); daddr &= ~(BITS_PER_PIXEL - 1); - LOGGFX((" saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(tms), DPTCH(tms))); + LOGGFX((" saddr=%08X daddr=%08X sptch=%08X dptch=%08X\n", saddr, daddr, SPTCH(), DPTCH())); /* bail if we're clipped */ if (dx <= 0 || dy <= 0) return; /* window mode 1: just return and interrupt if we are within the window */ - if (WINDOW_CHECKING(tms) == 1 && !dst_is_linear) + if (WINDOW_CHECKING() == 1 && !dst_is_linear) { - CLR_V(tms); - DADDR_XY(tms) = dstxy; - DYDX_X(tms) = dx; - DYDX_Y(tms) = dy; - IOREG(tms, REG_INTPEND) |= TMS34010_WV; - check_interrupt(tms); + CLR_V(); + DADDR_XY() = dstxy; + DYDX_X() = dx; + DYDX_Y() = dy; + IOREG(REG_INTPEND) |= TMS34010_WV; + check_interrupt(); return; } @@ -1717,8 +1626,8 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) full_words /= PIXELS_PER_WORD; /* compute cycles */ - tms->gfxcycles += compute_pixblt_b_cycles(left_partials, right_partials, full_words, dy, PIXEL_OP_TIMING, BITS_PER_PIXEL); - tms->st |= STBIT_P; + m_gfxcycles += compute_pixblt_b_cycles(left_partials, right_partials, full_words, dy, PIXEL_OP_TIMING, BITS_PER_PIXEL); + m_st |= STBIT_P; /* loop over rows */ for (y = 0; y < dy; y++) @@ -1731,21 +1640,21 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) dwordaddr = daddr >> 4; /* fetch the initial source word */ - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = 1 << (saddr & 15); /* handle the left partial word */ if (left_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); dstmask = PIXEL_MASK << (daddr & 15); /* loop over partials */ for (x = 0; x < left_partials; x++) { /* process the pixel */ - pixel = (srcword & srcmask) ? COLOR1(tms) : COLOR0(tms); + pixel = (srcword & srcmask) ? COLOR1() : COLOR0(); pixel &= dstmask; PIXEL_OP(dstword, dstmask, pixel); if (!TRANSPARENCY || pixel != 0) @@ -1755,7 +1664,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) srcmask <<= 1; if (srcmask == 0) { - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = 0x0001; } @@ -1764,7 +1673,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* loop over full words */ @@ -1772,7 +1681,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) { /* fetch the destination word (if necessary) */ if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY) - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); else dstword = 0; dstmask = PIXEL_MASK; @@ -1781,7 +1690,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) for (x = 0; x < PIXELS_PER_WORD; x++) { /* process the pixel */ - pixel = (srcword & srcmask) ? COLOR1(tms) : COLOR0(tms); + pixel = (srcword & srcmask) ? COLOR1() : COLOR0(); pixel &= dstmask; PIXEL_OP(dstword, dstmask, pixel); if (!TRANSPARENCY || pixel != 0) @@ -1791,7 +1700,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) srcmask <<= 1; if (srcmask == 0) { - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = 0x0001; } @@ -1800,21 +1709,21 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* handle the right partial word */ if (right_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); dstmask = PIXEL_MASK; /* loop over partials */ for (x = 0; x < right_partials; x++) { /* process the pixel */ - pixel = (srcword & srcmask) ? COLOR1(tms) : COLOR0(tms); + pixel = (srcword & srcmask) ? COLOR1() : COLOR0(); pixel &= dstmask; PIXEL_OP(dstword, dstmask, pixel); if (!TRANSPARENCY || pixel != 0) @@ -1824,7 +1733,7 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) srcmask <<= 1; if (srcmask == 0) { - srcword = (*word_read)(*tms->program, swordaddr++ << 1); + srcword = (this->*word_read)(*m_program, swordaddr++ << 1); srcmask = 0x0001; } @@ -1833,72 +1742,72 @@ static void FUNCTION_NAME(pixblt_b)(tms34010_state *tms, int dst_is_linear) } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* update for next row */ - saddr += SPTCH(tms); - daddr += DPTCH(tms); + saddr += SPTCH(); + daddr += DPTCH(); } - LOGGFX((" (%d cycles)\n", tms->gfxcycles)); + LOGGFX((" (%d cycles)\n", m_gfxcycles)); } /* eat cycles */ - if (tms->gfxcycles > tms->icount) + if (m_gfxcycles > m_icount) { - tms->gfxcycles -= tms->icount; - tms->icount = 0; - tms->pc -= 0x10; + m_gfxcycles -= m_icount; + m_icount = 0; + m_pc -= 0x10; } else { - tms->icount -= tms->gfxcycles; - tms->st &= ~STBIT_P; - SADDR(tms) += DYDX_Y(tms) * SPTCH(tms); + m_icount -= m_gfxcycles; + m_st &= ~STBIT_P; + SADDR() += DYDX_Y() * SPTCH(); if (dst_is_linear) - DADDR(tms) += DYDX_Y(tms) * DPTCH(tms); + DADDR() += DYDX_Y() * DPTCH(); else - DADDR_Y(tms) += DYDX_Y(tms); + DADDR_Y() += DYDX_Y(); } } -static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) +void FUNCTION_NAME(tms340x0_device::fill)(int dst_is_linear) { /* if this is the first time through, perform the operation */ - if (!P_FLAG(tms)) + if (!P_FLAG()) { int dx, dy, x, y, words, left_partials, right_partials, full_words; - void (*word_write)(address_space &space,offs_t address,UINT16 data); - UINT16 (*word_read)(address_space &space,offs_t address); + word_write_func word_write; + word_read_func word_read; UINT32 daddr; XY dstxy = { 0 }; /* determine read/write functions */ - if (IOREG(tms, REG_DPYCTL) & 0x0800) + if (IOREG(REG_DPYCTL) & 0x0800) { - word_write = shiftreg_w; - word_read = dummy_shiftreg_r; + word_write = &tms340x0_device::shiftreg_w; + word_read = &tms340x0_device::dummy_shiftreg_r; } else { - word_write = memory_w; - word_read = memory_r; + word_write = &tms340x0_device::memory_w; + word_read = &tms340x0_device::memory_r; } /* compute the bounds of the operation */ - dx = (INT16)DYDX_X(tms); - dy = (INT16)DYDX_Y(tms); + dx = (INT16)DYDX_X(); + dy = (INT16)DYDX_Y(); /* apply the window for non-linear destinations */ - tms->gfxcycles = 4; + m_gfxcycles = 4; if (!dst_is_linear) { - dstxy = DADDR_XY(tms); - tms->gfxcycles += 2 + apply_window(tms, "FILL", 0, NULL, &dstxy, &dx, &dy); - daddr = DXYTOL(tms,dstxy); + dstxy = DADDR_XY(); + m_gfxcycles += 2 + apply_window("FILL", 0, NULL, &dstxy, &dx, &dy); + daddr = DXYTOL(dstxy); } else - daddr = DADDR(tms); + daddr = DADDR(); daddr &= ~(BITS_PER_PIXEL - 1); LOGGFX((" daddr=%08X\n", daddr)); @@ -1907,14 +1816,14 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) return; /* window mode 1: just return and interrupt if we are within the window */ - if (WINDOW_CHECKING(tms) == 1 && !dst_is_linear) + if (WINDOW_CHECKING() == 1 && !dst_is_linear) { - CLR_V(tms); - DADDR_XY(tms) = dstxy; - DYDX_X(tms) = dx; - DYDX_Y(tms) = dy; - IOREG(tms, REG_INTPEND) |= TMS34010_WV; - check_interrupt(tms); + CLR_V(); + DADDR_XY() = dstxy; + DYDX_X() = dx; + DYDX_Y() = dy; + IOREG(REG_INTPEND) |= TMS34010_WV; + check_interrupt(); return; } @@ -1928,8 +1837,8 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) full_words /= PIXELS_PER_WORD; /* compute cycles */ - tms->gfxcycles += 2; - tms->st |= STBIT_P; + m_gfxcycles += 2; + m_st |= STBIT_P; /* loop over rows */ for (y = 0; y < dy; y++) @@ -1941,20 +1850,20 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) dwordaddr = daddr >> 4; /* compute cycles */ - tms->gfxcycles += compute_fill_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING); + m_gfxcycles += compute_fill_cycles(left_partials, right_partials, full_words, PIXEL_OP_TIMING); /* handle the left partial word */ if (left_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); dstmask = PIXEL_MASK << (daddr & 15); /* loop over partials */ for (x = 0; x < left_partials; x++) { /* process the pixel */ - pixel = COLOR1(tms) & dstmask; + pixel = COLOR1() & dstmask; PIXEL_OP(dstword, dstmask, pixel); if (!TRANSPARENCY || pixel != 0) dstword = (dstword & ~dstmask) | pixel; @@ -1964,7 +1873,7 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* loop over full words */ @@ -1972,7 +1881,7 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) { /* fetch the destination word (if necessary) */ if (PIXEL_OP_REQUIRES_SOURCE || TRANSPARENCY) - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); else dstword = 0; dstmask = PIXEL_MASK; @@ -1981,7 +1890,7 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) for (x = 0; x < PIXELS_PER_WORD; x++) { /* process the pixel */ - pixel = COLOR1(tms) & dstmask; + pixel = COLOR1() & dstmask; PIXEL_OP(dstword, dstmask, pixel); if (!TRANSPARENCY || pixel != 0) dstword = (dstword & ~dstmask) | pixel; @@ -1991,21 +1900,21 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* handle the right partial word */ if (right_partials != 0) { /* fetch the destination word */ - dstword = (*word_read)(*tms->program, dwordaddr << 1); + dstword = (this->*word_read)(*m_program, dwordaddr << 1); dstmask = PIXEL_MASK; /* loop over partials */ for (x = 0; x < right_partials; x++) { /* process the pixel */ - pixel = COLOR1(tms) & dstmask; + pixel = COLOR1() & dstmask; PIXEL_OP(dstword, dstmask, pixel); if (!TRANSPARENCY || pixel != 0) dstword = (dstword & ~dstmask) | pixel; @@ -2015,31 +1924,31 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear) } /* write the result */ - (*word_write)(*tms->program, dwordaddr++ << 1, dstword); + (this->*word_write)(*m_program, dwordaddr++ << 1, dstword); } /* update for next row */ - daddr += DPTCH(tms); + daddr += DPTCH(); } - LOGGFX((" (%d cycles)\n", tms->gfxcycles)); + LOGGFX((" (%d cycles)\n", m_gfxcycles)); } /* eat cycles */ - if (tms->gfxcycles > tms->icount) + if (m_gfxcycles > m_icount) { - tms->gfxcycles -= tms->icount; - tms->icount = 0; - tms->pc -= 0x10; + m_gfxcycles -= m_icount; + m_icount = 0; + m_pc -= 0x10; } else { - tms->icount -= tms->gfxcycles; - tms->st &= ~STBIT_P; + m_icount -= m_gfxcycles; + m_st &= ~STBIT_P; if (dst_is_linear) - DADDR(tms) += DYDX_Y(tms) * DPTCH(tms); + DADDR() += DYDX_Y() * DPTCH(); else - DADDR_Y(tms) += DYDX_Y(tms); + DADDR_Y() += DYDX_Y(); } } diff --git a/src/emu/cpu/tms34010/34010ops.c b/src/emu/cpu/tms34010/34010ops.c index dee8c2901cb..b91018c08dd 100644 --- a/src/emu/cpu/tms34010/34010ops.c +++ b/src/emu/cpu/tms34010/34010ops.c @@ -16,14 +16,14 @@ #define ZEXTEND(val,width) if (width) (val) &= ((UINT32)0xffffffff >> (32 - (width))) #define SEXTEND(val,width) if (width) (val) = (INT32)((val) << (32 - (width))) >> (32 - (width)) -#define SXYTOL(T,val) ((((INT16)(val).y * (T)->convsp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T)) -#define DXYTOL(T,val) ((((INT16)(val).y * (T)->convdp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T)) -#define MXYTOL(T,val) ((((INT16)(val).y * (T)->convmp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T)) +#define SXYTOL(val) ((((INT16)(val).y * m_convsp) + ((INT16)(val).x << m_pixelshift)) + OFFSET()) +#define DXYTOL(val) ((((INT16)(val).y * m_convdp) + ((INT16)(val).x << m_pixelshift)) + OFFSET()) +#define MXYTOL(val) ((((INT16)(val).y * m_convmp) + ((INT16)(val).x << m_pixelshift)) + OFFSET()) -#define COUNT_CYCLES(T,x) (T)->icount -= x -#define COUNT_UNKNOWN_CYCLES(T,x) COUNT_CYCLES(T,x) +#define COUNT_CYCLES(x) m_icount -= x +#define COUNT_UNKNOWN_CYCLES(x) COUNT_CYCLES(x) -#define CORRECT_ODD_PC(T,x) do { if ((T)->pc & 0x0f) logerror("%s to PC=%08X\n", x, (T)->pc); (T)->pc &= ~0x0f; } while (0) +#define CORRECT_ODD_PC(x) do { if (m_pc & 0x0f) logerror("%s to PC=%08X\n", x, m_pc); m_pc &= ~0x0f; } while (0) @@ -33,39 +33,39 @@ #define SIGN(val) ((val) & 0x80000000) -#define CLR_Z(T) (T)->st &= ~STBIT_Z -#define CLR_V(T) (T)->st &= ~STBIT_V -#define CLR_C(T) (T)->st &= ~STBIT_C -#define CLR_N(T) (T)->st &= ~STBIT_N -#define CLR_NZ(T) (T)->st &= ~(STBIT_N | STBIT_Z) -#define CLR_CZ(T) (T)->st &= ~(STBIT_C | STBIT_Z) -#define CLR_ZV(T) (T)->st &= ~(STBIT_Z | STBIT_V) -#define CLR_NZV(T) (T)->st &= ~(STBIT_N | STBIT_Z | STBIT_V) -#define CLR_NCZ(T) (T)->st &= ~(STBIT_N | STBIT_C | STBIT_Z) -#define CLR_NCZV(T) (T)->st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V) +#define CLR_Z() m_st &= ~STBIT_Z +#define CLR_V() m_st &= ~STBIT_V +#define CLR_C() m_st &= ~STBIT_C +#define CLR_N() m_st &= ~STBIT_N +#define CLR_NZ() m_st &= ~(STBIT_N | STBIT_Z) +#define CLR_CZ() m_st &= ~(STBIT_C | STBIT_Z) +#define CLR_ZV() m_st &= ~(STBIT_Z | STBIT_V) +#define CLR_NZV() m_st &= ~(STBIT_N | STBIT_Z | STBIT_V) +#define CLR_NCZ() m_st &= ~(STBIT_N | STBIT_C | STBIT_Z) +#define CLR_NCZV() m_st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V) -#define SET_V_BIT_LO(T,val,bit) (T)->st |= ((val) << (28 - (bit))) & STBIT_V -#define SET_V_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 28)) & STBIT_V -#define SET_V_LOG(T,val) (T)->st |= (val) << 28 -#define SET_Z_BIT_LO(T,val,bit) (T)->st |= ((val) << (29 - (bit))) & STBIT_Z -#define SET_Z_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 29)) & STBIT_Z -#define SET_Z_LOG(T,val) (T)->st |= (val) << 29 -#define SET_C_BIT_LO(T,val,bit) (T)->st |= ((val) << (30 - (bit))) & STBIT_C -#define SET_C_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 30)) & STBIT_C -#define SET_C_LOG(T,val) (T)->st |= (val) << 30 -#define SET_N_BIT(T,val,bit) (T)->st |= ((val) << (31 - (bit))) & STBIT_N -#define SET_N_LOG(T,val) (T)->st |= (val) << 31 +#define SET_V_BIT_LO(val,bit) m_st |= ((val) << (28 - (bit))) & STBIT_V +#define SET_V_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 28)) & STBIT_V +#define SET_V_LOG(val) m_st |= (val) << 28 +#define SET_Z_BIT_LO(val,bit) m_st |= ((val) << (29 - (bit))) & STBIT_Z +#define SET_Z_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 29)) & STBIT_Z +#define SET_Z_LOG(val) m_st |= (val) << 29 +#define SET_C_BIT_LO(val,bit) m_st |= ((val) << (30 - (bit))) & STBIT_C +#define SET_C_BIT_HI(val,bit) m_st |= ((val) >> ((bit) - 30)) & STBIT_C +#define SET_C_LOG(val) m_st |= (val) << 30 +#define SET_N_BIT(val,bit) m_st |= ((val) << (31 - (bit))) & STBIT_N +#define SET_N_LOG(val) m_st |= (val) << 31 -#define SET_Z_VAL(T,val) SET_Z_LOG(T, (val) == 0) -#define SET_N_VAL(T,val) SET_N_BIT(T, val, 31) -#define SET_NZ_VAL(T,val) SET_Z_VAL(T, val); SET_N_VAL(T, val) -#define SET_V_SUB(T,a,b,r) SET_V_BIT_HI(T, ((a) ^ (b)) & ((a) ^ (r)), 31) -#define SET_V_ADD(T,a,b,r) SET_V_BIT_HI(T, ~((a) ^ (b)) & ((a) ^ (r)), 31) -#define SET_C_SUB(T,a,b) SET_C_LOG(T, (UINT32)(b) > (UINT32)(a)) -#define SET_C_ADD(T,a,b) SET_C_LOG(T, (UINT32)~(a) < (UINT32)(b)) -#define SET_NZV_SUB(T,a,b,r) SET_NZ_VAL(T,r); SET_V_SUB(T,a,b,r) -#define SET_NZCV_SUB(T,a,b,r) SET_NZV_SUB(T,a,b,r); SET_C_SUB(T,a,b) -#define SET_NZCV_ADD(T,a,b,r) SET_NZ_VAL(T,r); SET_V_ADD(T,a,b,r); SET_C_ADD(T,a,b) +#define SET_Z_VAL(val) SET_Z_LOG((val) == 0) +#define SET_N_VAL(val) SET_N_BIT(val, 31) +#define SET_NZ_VAL(val) SET_Z_VAL(val); SET_N_VAL(val) +#define SET_V_SUB(a,b,r) SET_V_BIT_HI(((a) ^ (b)) & ((a) ^ (r)), 31) +#define SET_V_ADD(a,b,r) SET_V_BIT_HI(~((a) ^ (b)) & ((a) ^ (r)), 31) +#define SET_C_SUB(a,b) SET_C_LOG((UINT32)(b) > (UINT32)(a)) +#define SET_C_ADD(a,b) SET_C_LOG((UINT32)~(a) < (UINT32)(b)) +#define SET_NZV_SUB(a,b,r) SET_NZ_VAL(r); SET_V_SUB(a,b,r) +#define SET_NZCV_SUB(a,b,r) SET_NZV_SUB(a,b,r); SET_C_SUB(a,b) +#define SET_NZCV_ADD(a,b,r) SET_NZ_VAL(r); SET_V_ADD(a,b,r); SET_C_ADD(a,b) static const UINT8 fw_inc[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 }; @@ -74,30 +74,30 @@ static const UINT8 fw_inc[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,1 UNIMPLEMENTED INSTRUCTION ***************************************************************************/ -static void unimpl(tms34010_state *tms, UINT16 op) +void tms340x0_device::unimpl(UINT16 op) { /* kludge for Super High Impact -- this doesn't seem to cause */ /* an illegal opcode exception */ - if (tms->direct->read_decrypted_word(TOBYTE(tms->pc - 0x10)) == 0x0007) + if (m_direct->read_decrypted_word(TOBYTE(m_pc - 0x10)) == 0x0007) return; /* 9 Ball Shootout calls to FFDF7468, expecting it */ /* to execute the next instruction from FFDF7470 */ /* but the instruction at FFDF7460 is an 0x0001 */ - if (tms->direct->read_decrypted_word(TOBYTE(tms->pc - 0x10)) == 0x0001) + if (m_direct->read_decrypted_word(TOBYTE(m_pc - 0x10)) == 0x0001) return; - PUSH(tms, tms->pc); - PUSH(tms, tms->st); - RESET_ST(tms); - tms->pc = RLONG(tms, 0xfffffc20); - COUNT_UNKNOWN_CYCLES(tms,16); + PUSH(m_pc); + PUSH(m_st); + RESET_ST(); + m_pc = RLONG(0xfffffc20); + COUNT_UNKNOWN_CYCLES(16); /* extra check to prevent bad things */ - if (tms->pc == 0 || opcode_table[tms->direct->read_decrypted_word(TOBYTE(tms->pc)) >> 4] == unimpl) + if (m_pc == 0 || s_opcode_table[m_direct->read_decrypted_word(TOBYTE(m_pc)) >> 4] == &tms34010_device::unimpl) { - tms->device->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); - debugger_break(tms->device->machine()); + set_input_line(INPUT_LINE_HALT, ASSERT_LINE); + debugger_break(machine()); } } @@ -109,94 +109,94 @@ static void unimpl(tms34010_state *tms, UINT16 op) #define ADD_XY(R) \ { \ - XY a = R##REG_XY(tms,SRCREG(op)); \ - XY *b = &R##REG_XY(tms,DSTREG(op)); \ - CLR_NCZV(tms); \ + XY a = R##REG_XY(SRCREG(op)); \ + XY *b = &R##REG_XY(DSTREG(op)); \ + CLR_NCZV(); \ b->x += a.x; \ b->y += a.y; \ - SET_N_LOG(tms, b->x == 0); \ - SET_C_BIT_LO(tms, b->y, 15); \ - SET_Z_LOG(tms, b->y == 0); \ - SET_V_BIT_LO(tms, b->x, 15); \ - COUNT_CYCLES(tms,1); \ + SET_N_LOG(b->x == 0); \ + SET_C_BIT_LO(b->y, 15); \ + SET_Z_LOG(b->y == 0); \ + SET_V_BIT_LO(b->x, 15); \ + COUNT_CYCLES(1); \ } -static void add_xy_a(tms34010_state *tms, UINT16 op) { ADD_XY(A); } -static void add_xy_b(tms34010_state *tms, UINT16 op) { ADD_XY(B); } +void tms340x0_device::add_xy_a(UINT16 op) { ADD_XY(A); } +void tms340x0_device::add_xy_b(UINT16 op) { ADD_XY(B); } #define SUB_XY(R) \ { \ - XY a = R##REG_XY(tms,SRCREG(op)); \ - XY *b = &R##REG_XY(tms,DSTREG(op)); \ - CLR_NCZV(tms); \ - SET_N_LOG(tms, a.x == b->x); \ - SET_C_LOG(tms, a.y > b->y); \ - SET_Z_LOG(tms, a.y == b->y); \ - SET_V_LOG(tms, a.x > b->x); \ + XY a = R##REG_XY(SRCREG(op)); \ + XY *b = &R##REG_XY(DSTREG(op)); \ + CLR_NCZV(); \ + SET_N_LOG(a.x == b->x); \ + SET_C_LOG(a.y > b->y); \ + SET_Z_LOG(a.y == b->y); \ + SET_V_LOG(a.x > b->x); \ b->x -= a.x; \ b->y -= a.y; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void sub_xy_a(tms34010_state *tms, UINT16 op) { SUB_XY(A); } -static void sub_xy_b(tms34010_state *tms, UINT16 op) { SUB_XY(B); } +void tms340x0_device::sub_xy_a(UINT16 op) { SUB_XY(A); } +void tms340x0_device::sub_xy_b(UINT16 op) { SUB_XY(B); } #define CMP_XY(R) \ { \ INT16 res; \ - XY a = R##REG_XY(tms,DSTREG(op)); \ - XY b = R##REG_XY(tms,SRCREG(op)); \ - CLR_NCZV(tms); \ + XY a = R##REG_XY(DSTREG(op)); \ + XY b = R##REG_XY(SRCREG(op)); \ + CLR_NCZV(); \ res = a.x-b.x; \ - SET_N_LOG(tms, res == 0); \ - SET_V_BIT_LO(tms, res, 15); \ + SET_N_LOG(res == 0); \ + SET_V_BIT_LO(res, 15); \ res = a.y-b.y; \ - SET_Z_LOG(tms, res == 0); \ - SET_C_BIT_LO(tms, res, 15); \ - COUNT_CYCLES(tms,1); \ + SET_Z_LOG(res == 0); \ + SET_C_BIT_LO(res, 15); \ + COUNT_CYCLES(1); \ } -static void cmp_xy_a(tms34010_state *tms, UINT16 op) { CMP_XY(A); } -static void cmp_xy_b(tms34010_state *tms, UINT16 op) { CMP_XY(B); } +void tms340x0_device::cmp_xy_a(UINT16 op) { CMP_XY(A); } +void tms340x0_device::cmp_xy_b(UINT16 op) { CMP_XY(B); } #define CPW(R) \ { \ INT32 res = 0; \ - INT16 x = R##REG_X(tms,SRCREG(op)); \ - INT16 y = R##REG_Y(tms,SRCREG(op)); \ + INT16 x = R##REG_X(SRCREG(op)); \ + INT16 y = R##REG_Y(SRCREG(op)); \ \ - CLR_V(tms); \ - res |= ((WSTART_X(tms) > x) ? 0x20 : 0); \ - res |= ((x > WEND_X(tms)) ? 0x40 : 0); \ - res |= ((WSTART_Y(tms) > y) ? 0x80 : 0); \ - res |= ((y > WEND_Y(tms)) ? 0x100 : 0); \ - R##REG(tms,DSTREG(op)) = res; \ - SET_V_LOG(tms, res != 0); \ - COUNT_CYCLES(tms,1); \ + CLR_V(); \ + res |= ((WSTART_X() > x) ? 0x20 : 0); \ + res |= ((x > WEND_X()) ? 0x40 : 0); \ + res |= ((WSTART_Y() > y) ? 0x80 : 0); \ + res |= ((y > WEND_Y()) ? 0x100 : 0); \ + R##REG(DSTREG(op)) = res; \ + SET_V_LOG(res != 0); \ + COUNT_CYCLES(1); \ } -static void cpw_a(tms34010_state *tms, UINT16 op) { CPW(A); } -static void cpw_b(tms34010_state *tms, UINT16 op) { CPW(B); } +void tms340x0_device::cpw_a(UINT16 op) { CPW(A); } +void tms340x0_device::cpw_b(UINT16 op) { CPW(B); } #define CVXYL(R) \ { \ - R##REG(tms,DSTREG(op)) = DXYTOL(tms,R##REG_XY(tms,SRCREG(op))); \ - COUNT_CYCLES(tms,3); \ + R##REG(DSTREG(op)) = DXYTOL(R##REG_XY(SRCREG(op))); \ + COUNT_CYCLES(3); \ } -static void cvxyl_a(tms34010_state *tms, UINT16 op) { CVXYL(A); } -static void cvxyl_b(tms34010_state *tms, UINT16 op) { CVXYL(B); } +void tms340x0_device::cvxyl_a(UINT16 op) { CVXYL(A); } +void tms340x0_device::cvxyl_b(UINT16 op) { CVXYL(B); } #define MOVX(R) \ { \ - R##REG(tms,DSTREG(op)) = (R##REG(tms,DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,SRCREG(op)); \ - COUNT_CYCLES(tms,1); \ + R##REG(DSTREG(op)) = (R##REG(DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(SRCREG(op)); \ + COUNT_CYCLES(1); \ } -static void movx_a(tms34010_state *tms, UINT16 op) { MOVX(A); } -static void movx_b(tms34010_state *tms, UINT16 op) { MOVX(B); } +void tms340x0_device::movx_a(UINT16 op) { MOVX(A); } +void tms340x0_device::movx_b(UINT16 op) { MOVX(B); } #define MOVY(R) \ { \ - R##REG(tms,DSTREG(op)) = (R##REG(tms,SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,DSTREG(op)); \ - COUNT_CYCLES(tms,1); \ + R##REG(DSTREG(op)) = (R##REG(SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(DSTREG(op)); \ + COUNT_CYCLES(1); \ } -static void movy_a(tms34010_state *tms, UINT16 op) { MOVY(A); } -static void movy_b(tms34010_state *tms, UINT16 op) { MOVY(B); } +void tms340x0_device::movy_a(UINT16 op) { MOVY(A); } +void tms340x0_device::movy_b(UINT16 op) { MOVY(B); } @@ -206,103 +206,103 @@ static void movy_b(tms34010_state *tms, UINT16 op) { MOVY(B); } #define PIXT_RI(R) \ { \ - WPIXEL(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \ - COUNT_UNKNOWN_CYCLES(tms,2); \ + WPIXEL(R##REG(DSTREG(op)),R##REG(SRCREG(op))); \ + COUNT_UNKNOWN_CYCLES(2); \ } -static void pixt_ri_a(tms34010_state *tms, UINT16 op) { PIXT_RI(A); } -static void pixt_ri_b(tms34010_state *tms, UINT16 op) { PIXT_RI(B); } +void tms340x0_device::pixt_ri_a(UINT16 op) { PIXT_RI(A); } +void tms340x0_device::pixt_ri_b(UINT16 op) { PIXT_RI(B); } #define PIXT_RIXY(R) \ { \ - if (WINDOW_CHECKING(tms) != 0) \ + if (WINDOW_CHECKING() != 0) \ { \ - CLR_V(tms); \ - if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \ - R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \ + CLR_V(); \ + if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() || \ + R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y()) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ goto skip; \ } \ - if (WINDOW_CHECKING(tms) == 1) goto skip; \ + if (WINDOW_CHECKING() == 1) goto skip; \ } \ - WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),R##REG(tms,SRCREG(op))); \ + WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),R##REG(SRCREG(op))); \ skip: \ - COUNT_UNKNOWN_CYCLES(tms,4); \ + COUNT_UNKNOWN_CYCLES(4); \ } -static void pixt_rixy_a(tms34010_state *tms, UINT16 op) { PIXT_RIXY(A); } -static void pixt_rixy_b(tms34010_state *tms, UINT16 op) { PIXT_RIXY(B); } +void tms340x0_device::pixt_rixy_a(UINT16 op) { PIXT_RIXY(A); } +void tms340x0_device::pixt_rixy_b(UINT16 op) { PIXT_RIXY(B); } #define PIXT_IR(R) \ { \ - INT32 temp = RPIXEL(tms,R##REG(tms,SRCREG(op))); \ - CLR_V(tms); \ - R##REG(tms,DSTREG(op)) = temp; \ - SET_V_LOG(tms, temp != 0); \ - COUNT_CYCLES(tms,4); \ + INT32 temp = RPIXEL(R##REG(SRCREG(op))); \ + CLR_V(); \ + R##REG(DSTREG(op)) = temp; \ + SET_V_LOG(temp != 0); \ + COUNT_CYCLES(4); \ } -static void pixt_ir_a(tms34010_state *tms, UINT16 op) { PIXT_IR(A); } -static void pixt_ir_b(tms34010_state *tms, UINT16 op) { PIXT_IR(B); } +void tms340x0_device::pixt_ir_a(UINT16 op) { PIXT_IR(A); } +void tms340x0_device::pixt_ir_b(UINT16 op) { PIXT_IR(B); } #define PIXT_II(R) \ { \ - WPIXEL(tms,R##REG(tms,DSTREG(op)),RPIXEL(tms,R##REG(tms,SRCREG(op)))); \ - COUNT_UNKNOWN_CYCLES(tms,4); \ + WPIXEL(R##REG(DSTREG(op)),RPIXEL(R##REG(SRCREG(op)))); \ + COUNT_UNKNOWN_CYCLES(4); \ } -static void pixt_ii_a(tms34010_state *tms, UINT16 op) { PIXT_II(A); } -static void pixt_ii_b(tms34010_state *tms, UINT16 op) { PIXT_II(B); } +void tms340x0_device::pixt_ii_a(UINT16 op) { PIXT_II(A); } +void tms340x0_device::pixt_ii_b(UINT16 op) { PIXT_II(B); } #define PIXT_IXYR(R) \ { \ - INT32 temp = RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op)))); \ - CLR_V(tms); \ - R##REG(tms,DSTREG(op)) = temp; \ - SET_V_LOG(tms, temp != 0); \ - COUNT_CYCLES(tms,6); \ + INT32 temp = RPIXEL(SXYTOL(R##REG_XY(SRCREG(op)))); \ + CLR_V(); \ + R##REG(DSTREG(op)) = temp; \ + SET_V_LOG(temp != 0); \ + COUNT_CYCLES(6); \ } -static void pixt_ixyr_a(tms34010_state *tms, UINT16 op) { PIXT_IXYR(A); } -static void pixt_ixyr_b(tms34010_state *tms, UINT16 op) { PIXT_IXYR(B); } +void tms340x0_device::pixt_ixyr_a(UINT16 op) { PIXT_IXYR(A); } +void tms340x0_device::pixt_ixyr_b(UINT16 op) { PIXT_IXYR(B); } #define PIXT_IXYIXY(R) \ { \ - if (WINDOW_CHECKING(tms) != 0) \ + if (WINDOW_CHECKING() != 0) \ { \ - CLR_V(tms); \ - if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \ - R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \ + CLR_V(); \ + if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() || \ + R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y()) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ goto skip; \ } \ - if (WINDOW_CHECKING(tms) == 1) goto skip; \ + if (WINDOW_CHECKING() == 1) goto skip; \ } \ - WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op))))); \ + WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),RPIXEL(SXYTOL(R##REG_XY(SRCREG(op))))); \ skip: \ - COUNT_UNKNOWN_CYCLES(tms,7); \ + COUNT_UNKNOWN_CYCLES(7); \ } -static void pixt_ixyixy_a(tms34010_state *tms, UINT16 op) { PIXT_IXYIXY(A); } -static void pixt_ixyixy_b(tms34010_state *tms, UINT16 op) { PIXT_IXYIXY(B); } +void tms340x0_device::pixt_ixyixy_a(UINT16 op) { PIXT_IXYIXY(A); } +void tms340x0_device::pixt_ixyixy_b(UINT16 op) { PIXT_IXYIXY(B); } #define DRAV(R) \ { \ - if (WINDOW_CHECKING(tms) != 0) \ + if (WINDOW_CHECKING() != 0) \ { \ - CLR_V(tms); \ - if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \ - R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \ + CLR_V(); \ + if (R##REG_X(DSTREG(op)) < WSTART_X() || R##REG_X(DSTREG(op)) > WEND_X() || \ + R##REG_Y(DSTREG(op)) < WSTART_Y() || R##REG_Y(DSTREG(op)) > WEND_Y()) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ goto skip; \ } \ - if (WINDOW_CHECKING(tms) == 1) goto skip; \ + if (WINDOW_CHECKING() == 1) goto skip; \ } \ - WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),COLOR1(tms)); \ + WPIXEL(DXYTOL(R##REG_XY(DSTREG(op))),COLOR1()); \ skip: \ - R##REG_X(tms,DSTREG(op)) += R##REG_X(tms,SRCREG(op)); \ - R##REG_Y(tms,DSTREG(op)) += R##REG_Y(tms,SRCREG(op)); \ - COUNT_UNKNOWN_CYCLES(tms,4); \ + R##REG_X(DSTREG(op)) += R##REG_X(SRCREG(op)); \ + R##REG_Y(DSTREG(op)) += R##REG_Y(SRCREG(op)); \ + COUNT_UNKNOWN_CYCLES(4); \ } -static void drav_a(tms34010_state *tms, UINT16 op) { DRAV(A); } -static void drav_b(tms34010_state *tms, UINT16 op) { DRAV(B); } +void tms340x0_device::drav_a(UINT16 op) { DRAV(A); } +void tms340x0_device::drav_b(UINT16 op) { DRAV(B); } @@ -312,270 +312,270 @@ static void drav_b(tms34010_state *tms, UINT16 op) { DRAV(B); } #define ABS(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 r = 0 - *rd; \ - CLR_NZV(tms); \ + CLR_NZV(); \ if (r > 0) *rd = r; \ - SET_NZ_VAL(tms, r); \ - SET_V_LOG(tms, r == (INT32)0x80000000); \ - COUNT_CYCLES(tms,1); \ + SET_NZ_VAL(r); \ + SET_V_LOG(r == (INT32)0x80000000); \ + COUNT_CYCLES(1); \ } -static void abs_a(tms34010_state *tms, UINT16 op) { ABS(A); } -static void abs_b(tms34010_state *tms, UINT16 op) { ABS(B); } +void tms340x0_device::abs_a(UINT16 op) { ABS(A); } +void tms340x0_device::abs_b(UINT16 op) { ABS(B); } #define ADD(R) \ { \ - INT32 a = R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 a = R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 b = *rd; \ INT32 r = a + b; \ - CLR_NCZV(tms); \ + CLR_NCZV(); \ *rd = r; \ - SET_NZCV_ADD(tms,a,b,r); \ - COUNT_CYCLES(tms,1); \ + SET_NZCV_ADD(a,b,r); \ + COUNT_CYCLES(1); \ } -static void add_a(tms34010_state *tms, UINT16 op) { ADD(A); } -static void add_b(tms34010_state *tms, UINT16 op) { ADD(B); } +void tms340x0_device::add_a(UINT16 op) { ADD(A); } +void tms340x0_device::add_b(UINT16 op) { ADD(B); } #define ADDC(R) \ { \ /* I'm not sure to which side the carry is added to, should */ \ /* verify it against the examples */ \ - INT32 a = R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 a = R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 b = *rd; \ - INT32 r = a + b + (C_FLAG(tms) ? 1 : 0); \ - CLR_NCZV(tms); \ + INT32 r = a + b + (C_FLAG() ? 1 : 0); \ + CLR_NCZV(); \ *rd = r; \ - SET_NZCV_ADD(tms,a,b,r); \ - COUNT_CYCLES(tms,1); \ + SET_NZCV_ADD(a,b,r); \ + COUNT_CYCLES(1); \ } -static void addc_a(tms34010_state *tms, UINT16 op) { ADDC(A); } -static void addc_b(tms34010_state *tms, UINT16 op) { ADDC(B); } +void tms340x0_device::addc_a(UINT16 op) { ADDC(A); } +void tms340x0_device::addc_b(UINT16 op) { ADDC(B); } #define ADDI_W(R) \ { \ - INT32 a = PARAM_WORD(tms); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 a = PARAM_WORD(); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 b = *rd; \ INT32 r = a + b; \ - CLR_NCZV(tms); \ + CLR_NCZV(); \ *rd = r; \ - SET_NZCV_ADD(tms,a,b,r); \ - COUNT_CYCLES(tms,2); \ + SET_NZCV_ADD(a,b,r); \ + COUNT_CYCLES(2); \ } -static void addi_w_a(tms34010_state *tms, UINT16 op) { ADDI_W(A); } -static void addi_w_b(tms34010_state *tms, UINT16 op) { ADDI_W(B); } +void tms340x0_device::addi_w_a(UINT16 op) { ADDI_W(A); } +void tms340x0_device::addi_w_b(UINT16 op) { ADDI_W(B); } #define ADDI_L(R) \ { \ - INT32 a = PARAM_LONG(tms); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 a = PARAM_LONG(); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 b = *rd; \ INT32 r = a + b; \ - CLR_NCZV(tms); \ + CLR_NCZV(); \ *rd = r; \ - SET_NZCV_ADD(tms,a,b,r); \ - COUNT_CYCLES(tms,3); \ + SET_NZCV_ADD(a,b,r); \ + COUNT_CYCLES(3); \ } -static void addi_l_a(tms34010_state *tms, UINT16 op) { ADDI_L(A); } -static void addi_l_b(tms34010_state *tms, UINT16 op) { ADDI_L(B); } +void tms340x0_device::addi_l_a(UINT16 op) { ADDI_L(A); } +void tms340x0_device::addi_l_b(UINT16 op) { ADDI_L(B); } #define ADDK(R) \ { \ INT32 a = fw_inc[PARAM_K(op)]; \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 b = *rd; \ INT32 r = a + b; \ - CLR_NCZV(tms); \ + CLR_NCZV(); \ *rd = r; \ - SET_NZCV_ADD(tms,a,b,r); \ - COUNT_CYCLES(tms,1); \ + SET_NZCV_ADD(a,b,r); \ + COUNT_CYCLES(1); \ } -static void addk_a(tms34010_state *tms, UINT16 op) { ADDK(A); } -static void addk_b(tms34010_state *tms, UINT16 op) { ADDK(B); } +void tms340x0_device::addk_a(UINT16 op) { ADDK(A); } +void tms340x0_device::addk_b(UINT16 op) { ADDK(B); } #define AND(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - *rd &= R##REG(tms,SRCREG(op)); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,1); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + *rd &= R##REG(SRCREG(op)); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(1); \ } -static void and_a(tms34010_state *tms, UINT16 op) { AND(A); } -static void and_b(tms34010_state *tms, UINT16 op) { AND(B); } +void tms340x0_device::and_a(UINT16 op) { AND(A); } +void tms340x0_device::and_b(UINT16 op) { AND(B); } #define ANDI(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - *rd &= ~PARAM_LONG(tms); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + *rd &= ~PARAM_LONG(); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void andi_a(tms34010_state *tms, UINT16 op) { ANDI(A); } -static void andi_b(tms34010_state *tms, UINT16 op) { ANDI(B); } +void tms340x0_device::andi_a(UINT16 op) { ANDI(A); } +void tms340x0_device::andi_b(UINT16 op) { ANDI(B); } #define ANDN(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - *rd &= ~R##REG(tms,SRCREG(op)); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,1); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + *rd &= ~R##REG(SRCREG(op)); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(1); \ } -static void andn_a(tms34010_state *tms, UINT16 op) { ANDN(A); } -static void andn_b(tms34010_state *tms, UINT16 op) { ANDN(B); } +void tms340x0_device::andn_a(UINT16 op) { ANDN(A); } +void tms340x0_device::andn_b(UINT16 op) { ANDN(B); } #define BTST_K(R) \ { \ int bit = 31 - PARAM_K(op); \ - CLR_Z(tms); \ + CLR_Z(); \ if (bit <= 29) \ - SET_Z_BIT_LO(tms, ~R##REG(tms,DSTREG(op)), bit); \ + SET_Z_BIT_LO(~R##REG(DSTREG(op)), bit); \ else \ - SET_Z_BIT_HI(tms, ~R##REG(tms,DSTREG(op)), bit); \ - COUNT_CYCLES(tms,1); \ + SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit); \ + COUNT_CYCLES(1); \ } -static void btst_k_a(tms34010_state *tms, UINT16 op) { BTST_K(A); } -static void btst_k_b(tms34010_state *tms, UINT16 op) { BTST_K(B); } +void tms340x0_device::btst_k_a(UINT16 op) { BTST_K(A); } +void tms340x0_device::btst_k_b(UINT16 op) { BTST_K(B); } #define BTST_R(R) \ { \ - int bit = R##REG(tms,SRCREG(op)) & 0x1f; \ - CLR_Z(tms); \ + int bit = R##REG(SRCREG(op)) & 0x1f; \ + CLR_Z(); \ if (bit <= 29) \ - SET_Z_BIT_LO(tms, ~R##REG(tms,DSTREG(op)), bit); \ + SET_Z_BIT_LO(~R##REG(DSTREG(op)), bit); \ else \ - SET_Z_BIT_HI(tms, ~R##REG(tms,DSTREG(op)), bit); \ - COUNT_CYCLES(tms,2); \ + SET_Z_BIT_HI(~R##REG(DSTREG(op)), bit); \ + COUNT_CYCLES(2); \ } -static void btst_r_a(tms34010_state *tms, UINT16 op) { BTST_R(A); } -static void btst_r_b(tms34010_state *tms, UINT16 op) { BTST_R(B); } +void tms340x0_device::btst_r_a(UINT16 op) { BTST_R(A); } +void tms340x0_device::btst_r_b(UINT16 op) { BTST_R(B); } -static void clrc(tms34010_state *tms, UINT16 op) +void tms340x0_device::clrc(UINT16 op) { - CLR_C(tms); - COUNT_CYCLES(tms,1); + CLR_C(); + COUNT_CYCLES(1); } #define CMP(R) \ { \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 r = *rd - *rs; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,*rd,*rs,r); \ - COUNT_CYCLES(tms,1); \ + CLR_NCZV(); \ + SET_NZCV_SUB(*rd,*rs,r); \ + COUNT_CYCLES(1); \ } -static void cmp_a(tms34010_state *tms, UINT16 op) { CMP(A); } -static void cmp_b(tms34010_state *tms, UINT16 op) { CMP(B); } +void tms340x0_device::cmp_a(UINT16 op) { CMP(A); } +void tms340x0_device::cmp_b(UINT16 op) { CMP(B); } #define CMPI_W(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 t = (INT16)~PARAM_WORD(tms); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 t = (INT16)~PARAM_WORD(); \ INT32 r = *rd - t; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,*rd,t,r); \ - COUNT_CYCLES(tms,2); \ + CLR_NCZV(); \ + SET_NZCV_SUB(*rd,t,r); \ + COUNT_CYCLES(2); \ } -static void cmpi_w_a(tms34010_state *tms, UINT16 op) { CMPI_W(A); } -static void cmpi_w_b(tms34010_state *tms, UINT16 op) { CMPI_W(B); } +void tms340x0_device::cmpi_w_a(UINT16 op) { CMPI_W(A); } +void tms340x0_device::cmpi_w_b(UINT16 op) { CMPI_W(B); } #define CMPI_L(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 t = ~PARAM_LONG(tms); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 t = ~PARAM_LONG(); \ INT32 r = *rd - t; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,*rd,t,r); \ - COUNT_CYCLES(tms,3); \ + CLR_NCZV(); \ + SET_NZCV_SUB(*rd,t,r); \ + COUNT_CYCLES(3); \ } -static void cmpi_l_a(tms34010_state *tms, UINT16 op) { CMPI_L(A); } -static void cmpi_l_b(tms34010_state *tms, UINT16 op) { CMPI_L(B); } +void tms340x0_device::cmpi_l_a(UINT16 op) { CMPI_L(A); } +void tms340x0_device::cmpi_l_b(UINT16 op) { CMPI_L(B); } -static void dint(tms34010_state *tms, UINT16 op) +void tms340x0_device::dint(UINT16 op) { - tms->st &= ~STBIT_IE; - COUNT_CYCLES(tms,3); + m_st &= ~STBIT_IE; + COUNT_CYCLES(3); } #define DIVS(R) \ { \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 *rd1 = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ if (!(DSTREG(op) & 1)) \ { \ if (!*rs) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ } \ else \ { \ - INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \ + INT32 *rd2 = &R##REG(DSTREG(op)+1); \ INT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \ INT64 quotient = dividend / *rs; \ INT32 remainder = dividend % *rs; \ UINT32 signbits = (INT32)quotient >> 31; \ if (EXTRACT_64HI(quotient) != signbits) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ } \ else \ { \ *rd1 = quotient; \ *rd2 = remainder; \ - SET_NZ_VAL(tms, *rd1); \ + SET_NZ_VAL(*rd1); \ } \ } \ - COUNT_CYCLES(tms,40); \ + COUNT_CYCLES(40); \ } \ else \ { \ if (!*rs) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ } \ else \ { \ *rd1 /= *rs; \ - SET_NZ_VAL(tms, *rd1); \ + SET_NZ_VAL(*rd1); \ } \ - COUNT_CYCLES(tms,39); \ + COUNT_CYCLES(39); \ } \ } -static void divs_a(tms34010_state *tms, UINT16 op) { DIVS(A); } -static void divs_b(tms34010_state *tms, UINT16 op) { DIVS(B); } +void tms340x0_device::divs_a(UINT16 op) { DIVS(A); } +void tms340x0_device::divs_b(UINT16 op) { DIVS(B); } #define DIVU(R) \ { \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ - CLR_ZV(tms); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 *rd1 = &R##REG(DSTREG(op)); \ + CLR_ZV(); \ if (!(DSTREG(op) & 1)) \ { \ if (!*rs) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ } \ else \ { \ - INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \ + INT32 *rd2 = &R##REG(DSTREG(op)+1); \ UINT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \ UINT64 quotient = dividend / (UINT32)*rs; \ UINT32 remainder = dividend % (UINT32)*rs; \ if (EXTRACT_64HI(quotient) != 0) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ } \ else \ { \ *rd1 = quotient; \ *rd2 = remainder; \ - SET_Z_VAL(tms, *rd1); \ + SET_Z_VAL(*rd1); \ } \ } \ } \ @@ -583,48 +583,48 @@ static void divs_b(tms34010_state *tms, UINT16 op) { DIVS(B); } { \ if (!*rs) \ { \ - SET_V_LOG(tms, 1); \ + SET_V_LOG(1); \ } \ else \ { \ *rd1 = (UINT32)*rd1 / (UINT32)*rs; \ - SET_Z_VAL(tms, *rd1); \ + SET_Z_VAL(*rd1); \ } \ } \ - COUNT_CYCLES(tms,37); \ + COUNT_CYCLES(37); \ } -static void divu_a(tms34010_state *tms, UINT16 op) { DIVU(A); } -static void divu_b(tms34010_state *tms, UINT16 op) { DIVU(B); } +void tms340x0_device::divu_a(UINT16 op) { DIVU(A); } +void tms340x0_device::divu_b(UINT16 op) { DIVU(B); } -static void eint(tms34010_state *tms, UINT16 op) +void tms340x0_device::eint(UINT16 op) { - tms->st |= STBIT_IE; - check_interrupt(tms); - COUNT_CYCLES(tms,3); + m_st |= STBIT_IE; + check_interrupt(); + COUNT_CYCLES(3); } #define EXGF(F,R) \ { \ UINT8 shift = F ? 6 : 0; \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - UINT32 temp = (tms->st >> shift) & 0x3f; \ - tms->st &= ~(0x3f << shift); \ - tms->st |= (*rd & 0x3f) << shift; \ + INT32 *rd = &R##REG(DSTREG(op)); \ + UINT32 temp = (m_st >> shift) & 0x3f; \ + m_st &= ~(0x3f << shift); \ + m_st |= (*rd & 0x3f) << shift; \ *rd = temp; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void exgf0_a(tms34010_state *tms, UINT16 op) { EXGF(0,A); } -static void exgf0_b(tms34010_state *tms, UINT16 op) { EXGF(0,B); } -static void exgf1_a(tms34010_state *tms, UINT16 op) { EXGF(1,A); } -static void exgf1_b(tms34010_state *tms, UINT16 op) { EXGF(1,B); } +void tms340x0_device::exgf0_a(UINT16 op) { EXGF(0,A); } +void tms340x0_device::exgf0_b(UINT16 op) { EXGF(0,B); } +void tms340x0_device::exgf1_a(UINT16 op) { EXGF(1,A); } +void tms340x0_device::exgf1_b(UINT16 op) { EXGF(1,B); } #define LMO(R) \ { \ UINT32 res = 0; \ - UINT32 rs = R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - SET_Z_VAL(tms, rs); \ + UINT32 rs = R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + SET_Z_VAL(rs); \ if (rs) \ { \ while (!(rs & 0x80000000)) \ @@ -634,435 +634,435 @@ static void exgf1_b(tms34010_state *tms, UINT16 op) { EXGF(1,B); } } \ } \ *rd = res; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void lmo_a(tms34010_state *tms, UINT16 op) { LMO(A); } -static void lmo_b(tms34010_state *tms, UINT16 op) { LMO(B); } +void tms340x0_device::lmo_a(UINT16 op) { LMO(A); } +void tms340x0_device::lmo_b(UINT16 op) { LMO(B); } #define MMFM(R) \ { \ INT32 i; \ - UINT16 l = (UINT16) PARAM_WORD(tms); \ - COUNT_CYCLES(tms,3); \ + UINT16 l = (UINT16) PARAM_WORD(); \ + COUNT_CYCLES(3); \ { \ INT32 rd = DSTREG(op); \ for (i = 15; i >= 0 ; i--) \ { \ if (l & 0x8000) \ { \ - R##REG(tms,i) = RLONG(tms, R##REG(tms,rd)); \ - R##REG(tms,rd) += 0x20; \ - COUNT_CYCLES(tms,4); \ + R##REG(i) = RLONG(R##REG(rd)); \ + R##REG(rd) += 0x20; \ + COUNT_CYCLES(4); \ } \ l <<= 1; \ } \ } \ } -static void mmfm_a(tms34010_state *tms, UINT16 op) { MMFM(A); } -static void mmfm_b(tms34010_state *tms, UINT16 op) { MMFM(B); } +void tms340x0_device::mmfm_a(UINT16 op) { MMFM(A); } +void tms340x0_device::mmfm_b(UINT16 op) { MMFM(B); } #define MMTM(R) \ { \ UINT32 i; \ - UINT16 l = (UINT16) PARAM_WORD(tms); \ - COUNT_CYCLES(tms,2); \ + UINT16 l = (UINT16) PARAM_WORD(); \ + COUNT_CYCLES(2); \ { \ INT32 rd = DSTREG(op); \ - if (tms->is_34020) \ + if (m_is_34020) \ { \ - CLR_N(tms); \ - SET_N_VAL(tms, R##REG(tms,rd) ^ 0x80000000); \ + CLR_N(); \ + SET_N_VAL(R##REG(rd) ^ 0x80000000); \ } \ for (i = 0; i < 16; i++) \ { \ if (l & 0x8000) \ { \ - R##REG(tms,rd) -= 0x20; \ - WLONG(tms, R##REG(tms,rd),R##REG(tms,i)); \ - COUNT_CYCLES(tms,4); \ + R##REG(rd) -= 0x20; \ + WLONG(R##REG(rd),R##REG(i)); \ + COUNT_CYCLES(4); \ } \ l <<= 1; \ } \ } \ } -static void mmtm_a(tms34010_state *tms, UINT16 op) { MMTM(A); } -static void mmtm_b(tms34010_state *tms, UINT16 op) { MMTM(B); } +void tms340x0_device::mmtm_a(UINT16 op) { MMTM(A); } +void tms340x0_device::mmtm_b(UINT16 op) { MMTM(B); } #define MODS(R) \ { \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ if (*rs != 0) \ { \ *rd %= *rs; \ - SET_NZ_VAL(tms, *rd); \ + SET_NZ_VAL(*rd); \ } \ else \ - SET_V_LOG(tms, 1); \ - COUNT_CYCLES(tms,40); \ + SET_V_LOG(1); \ + COUNT_CYCLES(40); \ } -static void mods_a(tms34010_state *tms, UINT16 op) { MODS(A); } -static void mods_b(tms34010_state *tms, UINT16 op) { MODS(B); } +void tms340x0_device::mods_a(UINT16 op) { MODS(A); } +void tms340x0_device::mods_b(UINT16 op) { MODS(B); } #define MODU(R) \ { \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_ZV(tms); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_ZV(); \ if (*rs != 0) \ { \ *rd = (UINT32)*rd % (UINT32)*rs; \ - SET_Z_VAL(tms, *rd); \ + SET_Z_VAL(*rd); \ } \ else \ - SET_V_LOG(tms, 1); \ - COUNT_CYCLES(tms,35); \ + SET_V_LOG(1); \ + COUNT_CYCLES(35); \ } -static void modu_a(tms34010_state *tms, UINT16 op) { MODU(A); } -static void modu_b(tms34010_state *tms, UINT16 op) { MODU(B); } +void tms340x0_device::modu_a(UINT16 op) { MODU(A); } +void tms340x0_device::modu_b(UINT16 op) { MODU(B); } #define MPYS(R) \ { \ - INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ - INT32 m1 = R##REG(tms,SRCREG(op)); \ + INT32 *rd1 = &R##REG(DSTREG(op)); \ + INT32 m1 = R##REG(SRCREG(op)); \ INT64 product; \ \ - SEXTEND(m1, FW(tms,1)); \ - CLR_NZ(tms); \ + SEXTEND(m1, FW(1)); \ + CLR_NZ(); \ product = mul_32x32(m1, *rd1); \ - SET_Z_LOG(tms, product == 0); \ - SET_N_BIT(tms, product >> 32, 31); \ + SET_Z_LOG(product == 0); \ + SET_N_BIT(product >> 32, 31); \ \ *rd1 = EXTRACT_64HI(product); \ - R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \ + R##REG(DSTREG(op)|1) = EXTRACT_64LO(product); \ \ - COUNT_CYCLES(tms,20); \ + COUNT_CYCLES(20); \ } -static void mpys_a(tms34010_state *tms, UINT16 op) { MPYS(A); } -static void mpys_b(tms34010_state *tms, UINT16 op) { MPYS(B); } +void tms340x0_device::mpys_a(UINT16 op) { MPYS(A); } +void tms340x0_device::mpys_b(UINT16 op) { MPYS(B); } #define MPYU(R) \ { \ - INT32 *rd1 = &R##REG(tms,DSTREG(op)); \ - UINT32 m1 = R##REG(tms,SRCREG(op)); \ + INT32 *rd1 = &R##REG(DSTREG(op)); \ + UINT32 m1 = R##REG(SRCREG(op)); \ UINT64 product; \ \ - ZEXTEND(m1, FW(tms,1)); \ - CLR_Z(tms); \ + ZEXTEND(m1, FW(1)); \ + CLR_Z(); \ product = mulu_32x32(m1, *rd1); \ - SET_Z_LOG(tms, product == 0); \ + SET_Z_LOG(product == 0); \ \ *rd1 = EXTRACT_64HI(product); \ - R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \ + R##REG(DSTREG(op)|1) = EXTRACT_64LO(product); \ \ - COUNT_CYCLES(tms,21); \ + COUNT_CYCLES(21); \ } -static void mpyu_a(tms34010_state *tms, UINT16 op) { MPYU(A); } -static void mpyu_b(tms34010_state *tms, UINT16 op) { MPYU(B); } +void tms340x0_device::mpyu_a(UINT16 op) { MPYU(A); } +void tms340x0_device::mpyu_b(UINT16 op) { MPYU(B); } #define NEG(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 r = 0 - *rd; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,0,*rd,r); \ + CLR_NCZV(); \ + SET_NZCV_SUB(0,*rd,r); \ *rd = r; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void neg_a(tms34010_state *tms, UINT16 op) { NEG(A); } -static void neg_b(tms34010_state *tms, UINT16 op) { NEG(B); } +void tms340x0_device::neg_a(UINT16 op) { NEG(A); } +void tms340x0_device::neg_b(UINT16 op) { NEG(B); } #define NEGB(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 t = *rd + (C_FLAG(tms) ? 1 : 0); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 t = *rd + (C_FLAG() ? 1 : 0); \ INT32 r = 0 - t; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,0,t,r); \ + CLR_NCZV(); \ + SET_NZCV_SUB(0,t,r); \ *rd = r; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void negb_a(tms34010_state *tms, UINT16 op) { NEGB(A); } -static void negb_b(tms34010_state *tms, UINT16 op) { NEGB(B); } +void tms340x0_device::negb_a(UINT16 op) { NEGB(A); } +void tms340x0_device::negb_b(UINT16 op) { NEGB(B); } -static void nop(tms34010_state *tms, UINT16 op) +void tms340x0_device::nop(UINT16 op) { - COUNT_CYCLES(tms,1); + COUNT_CYCLES(1); } #define NOT(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ *rd = ~(*rd); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,1); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(1); \ } -static void not_a(tms34010_state *tms, UINT16 op) { NOT(A); } -static void not_b(tms34010_state *tms, UINT16 op) { NOT(B); } +void tms340x0_device::not_a(UINT16 op) { NOT(A); } +void tms340x0_device::not_b(UINT16 op) { NOT(B); } #define OR(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - *rd |= R##REG(tms,SRCREG(op)); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,1); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + *rd |= R##REG(SRCREG(op)); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(1); \ } -static void or_a(tms34010_state *tms, UINT16 op) { OR(A); } -static void or_b(tms34010_state *tms, UINT16 op) { OR(B); } +void tms340x0_device::or_a(UINT16 op) { OR(A); } +void tms340x0_device::or_b(UINT16 op) { OR(B); } #define ORI(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - *rd |= PARAM_LONG(tms); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + *rd |= PARAM_LONG(); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void ori_a(tms34010_state *tms, UINT16 op) { ORI(A); } -static void ori_b(tms34010_state *tms, UINT16 op) { ORI(B); } +void tms340x0_device::ori_a(UINT16 op) { ORI(A); } +void tms340x0_device::ori_b(UINT16 op) { ORI(B); } -static void setc(tms34010_state *tms, UINT16 op) +void tms340x0_device::setc(UINT16 op) { - SET_C_LOG(tms, 1); - COUNT_CYCLES(tms,1); + SET_C_LOG(1); + COUNT_CYCLES(1); } #define SETF(F) \ { \ UINT8 shift = F ? 6 : 0; \ - tms->st &= ~(0x3f << shift); \ - tms->st |= (op & 0x3f) << shift; \ - COUNT_CYCLES(tms,1+F); \ + m_st &= ~(0x3f << shift); \ + m_st |= (op & 0x3f) << shift; \ + COUNT_CYCLES(1+F); \ } -static void setf0(tms34010_state *tms, UINT16 op) { SETF(0); } -static void setf1(tms34010_state *tms, UINT16 op) { SETF(1); } +void tms340x0_device::setf0(UINT16 op) { SETF(0); } +void tms340x0_device::setf1(UINT16 op) { SETF(1); } #define SEXT(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZ(tms); \ - SEXTEND(*rd,FW(tms,F)); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZ(); \ + SEXTEND(*rd,FW(F)); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void sext0_a(tms34010_state *tms, UINT16 op) { SEXT(0,A); } -static void sext0_b(tms34010_state *tms, UINT16 op) { SEXT(0,B); } -static void sext1_a(tms34010_state *tms, UINT16 op) { SEXT(1,A); } -static void sext1_b(tms34010_state *tms, UINT16 op) { SEXT(1,B); } +void tms340x0_device::sext0_a(UINT16 op) { SEXT(0,A); } +void tms340x0_device::sext0_b(UINT16 op) { SEXT(0,B); } +void tms340x0_device::sext1_a(UINT16 op) { SEXT(1,A); } +void tms340x0_device::sext1_b(UINT16 op) { SEXT(1,B); } #define RL(R,K) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 res = *rd; \ INT32 k = (K); \ - CLR_CZ(tms); \ + CLR_CZ(); \ if (k) \ { \ res<<=(k-1); \ - SET_C_BIT_HI(tms, res, 31); \ + SET_C_BIT_HI(res, 31); \ res<<=1; \ res |= (((UINT32)*rd)>>((-k)&0x1f)); \ *rd = res; \ } \ - SET_Z_VAL(tms, res); \ - COUNT_CYCLES(tms,1); \ + SET_Z_VAL(res); \ + COUNT_CYCLES(1); \ } -static void rl_k_a(tms34010_state *tms, UINT16 op) { RL(A,PARAM_K(op)); } -static void rl_k_b(tms34010_state *tms, UINT16 op) { RL(B,PARAM_K(op)); } -static void rl_r_a(tms34010_state *tms, UINT16 op) { RL(A,AREG(tms,SRCREG(op))&0x1f); } -static void rl_r_b(tms34010_state *tms, UINT16 op) { RL(B,BREG(tms,SRCREG(op))&0x1f); } +void tms340x0_device::rl_k_a(UINT16 op) { RL(A,PARAM_K(op)); } +void tms340x0_device::rl_k_b(UINT16 op) { RL(B,PARAM_K(op)); } +void tms340x0_device::rl_r_a(UINT16 op) { RL(A,AREG(SRCREG(op))&0x1f); } +void tms340x0_device::rl_r_b(UINT16 op) { RL(B,BREG(SRCREG(op))&0x1f); } #define SLA(R,K) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ UINT32 res = *rd; \ INT32 k = K; \ - CLR_NCZV(tms); \ + CLR_NCZV(); \ if (k) \ { \ UINT32 mask = (0xffffffff<<(31-k))&0x7fffffff; \ UINT32 res2 = SIGN(res) ? res^mask : res; \ - SET_V_LOG(tms, (res2 & mask) != 0); \ + SET_V_LOG((res2 & mask) != 0); \ \ res<<=(k-1); \ - SET_C_BIT_HI(tms, res, 31); \ + SET_C_BIT_HI(res, 31); \ res<<=1; \ *rd = res; \ } \ - SET_NZ_VAL(tms, res); \ - COUNT_CYCLES(tms,3); \ + SET_NZ_VAL(res); \ + COUNT_CYCLES(3); \ } -static void sla_k_a(tms34010_state *tms, UINT16 op) { SLA(A,PARAM_K(op)); } -static void sla_k_b(tms34010_state *tms, UINT16 op) { SLA(B,PARAM_K(op)); } -static void sla_r_a(tms34010_state *tms, UINT16 op) { SLA(A,AREG(tms,SRCREG(op))&0x1f); } -static void sla_r_b(tms34010_state *tms, UINT16 op) { SLA(B,BREG(tms,SRCREG(op))&0x1f); } +void tms340x0_device::sla_k_a(UINT16 op) { SLA(A,PARAM_K(op)); } +void tms340x0_device::sla_k_b(UINT16 op) { SLA(B,PARAM_K(op)); } +void tms340x0_device::sla_r_a(UINT16 op) { SLA(A,AREG(SRCREG(op))&0x1f); } +void tms340x0_device::sla_r_b(UINT16 op) { SLA(B,BREG(SRCREG(op))&0x1f); } #define SLL(R,K) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ UINT32 res = *rd; \ INT32 k = K; \ - CLR_CZ(tms); \ + CLR_CZ(); \ if (k) \ { \ res<<=(k-1); \ - SET_C_BIT_HI(tms, res, 31); \ + SET_C_BIT_HI(res, 31); \ res<<=1; \ *rd = res; \ } \ - SET_Z_VAL(tms, res); \ - COUNT_CYCLES(tms,1); \ + SET_Z_VAL(res); \ + COUNT_CYCLES(1); \ } -static void sll_k_a(tms34010_state *tms, UINT16 op) { SLL(A,PARAM_K(op)); } -static void sll_k_b(tms34010_state *tms, UINT16 op) { SLL(B,PARAM_K(op)); } -static void sll_r_a(tms34010_state *tms, UINT16 op) { SLL(A,AREG(tms,SRCREG(op))&0x1f); } -static void sll_r_b(tms34010_state *tms, UINT16 op) { SLL(B,BREG(tms,SRCREG(op))&0x1f); } +void tms340x0_device::sll_k_a(UINT16 op) { SLL(A,PARAM_K(op)); } +void tms340x0_device::sll_k_b(UINT16 op) { SLL(B,PARAM_K(op)); } +void tms340x0_device::sll_r_a(UINT16 op) { SLL(A,AREG(SRCREG(op))&0x1f); } +void tms340x0_device::sll_r_b(UINT16 op) { SLL(B,BREG(SRCREG(op))&0x1f); } #define SRA(R,K) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 res = *rd; \ INT32 k = (-(K)) & 0x1f; \ - CLR_NCZ(tms); \ + CLR_NCZ(); \ if (k) \ { \ res>>=(k-1); \ - SET_C_BIT_LO(tms, res, 0); \ + SET_C_BIT_LO(res, 0); \ res>>=1; \ *rd = res; \ } \ - SET_NZ_VAL(tms, res); \ - COUNT_CYCLES(tms,1); \ + SET_NZ_VAL(res); \ + COUNT_CYCLES(1); \ } -static void sra_k_a(tms34010_state *tms, UINT16 op) { SRA(A,PARAM_K(op)); } -static void sra_k_b(tms34010_state *tms, UINT16 op) { SRA(B,PARAM_K(op)); } -static void sra_r_a(tms34010_state *tms, UINT16 op) { SRA(A,AREG(tms,SRCREG(op))); } -static void sra_r_b(tms34010_state *tms, UINT16 op) { SRA(B,BREG(tms,SRCREG(op))); } +void tms340x0_device::sra_k_a(UINT16 op) { SRA(A,PARAM_K(op)); } +void tms340x0_device::sra_k_b(UINT16 op) { SRA(B,PARAM_K(op)); } +void tms340x0_device::sra_r_a(UINT16 op) { SRA(A,AREG(SRCREG(op))); } +void tms340x0_device::sra_r_b(UINT16 op) { SRA(B,BREG(SRCREG(op))); } #define SRL(R,K) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ UINT32 res = *rd; \ INT32 k = (-(K)) & 0x1f; \ - CLR_CZ(tms); \ + CLR_CZ(); \ if (k) \ { \ res>>=(k-1); \ - SET_C_BIT_LO(tms, res, 0); \ + SET_C_BIT_LO(res, 0); \ res>>=1; \ *rd = res; \ } \ - SET_Z_VAL(tms, res); \ - COUNT_CYCLES(tms,1); \ + SET_Z_VAL(res); \ + COUNT_CYCLES(1); \ } -static void srl_k_a(tms34010_state *tms, UINT16 op) { SRL(A,PARAM_K(op)); } -static void srl_k_b(tms34010_state *tms, UINT16 op) { SRL(B,PARAM_K(op)); } -static void srl_r_a(tms34010_state *tms, UINT16 op) { SRL(A,AREG(tms,SRCREG(op))); } -static void srl_r_b(tms34010_state *tms, UINT16 op) { SRL(B,BREG(tms,SRCREG(op))); } +void tms340x0_device::srl_k_a(UINT16 op) { SRL(A,PARAM_K(op)); } +void tms340x0_device::srl_k_b(UINT16 op) { SRL(B,PARAM_K(op)); } +void tms340x0_device::srl_r_a(UINT16 op) { SRL(A,AREG(SRCREG(op))); } +void tms340x0_device::srl_r_b(UINT16 op) { SRL(B,BREG(SRCREG(op))); } #define SUB(R) \ { \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 r = *rd - *rs; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,*rd,*rs,r); \ + CLR_NCZV(); \ + SET_NZCV_SUB(*rd,*rs,r); \ *rd = r; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void sub_a(tms34010_state *tms, UINT16 op) { SUB(A); } -static void sub_b(tms34010_state *tms, UINT16 op) { SUB(B); } +void tms340x0_device::sub_a(UINT16 op) { SUB(A); } +void tms340x0_device::sub_b(UINT16 op) { SUB(B); } #define SUBB(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 t = R##REG(tms,SRCREG(op)); \ - INT32 r = *rd - t - (C_FLAG(tms) ? 1 : 0); \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,*rd,t,r); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 t = R##REG(SRCREG(op)); \ + INT32 r = *rd - t - (C_FLAG() ? 1 : 0); \ + CLR_NCZV(); \ + SET_NZCV_SUB(*rd,t,r); \ *rd = r; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void subb_a(tms34010_state *tms, UINT16 op) { SUBB(A); } -static void subb_b(tms34010_state *tms, UINT16 op) { SUBB(B); } +void tms340x0_device::subb_a(UINT16 op) { SUBB(A); } +void tms340x0_device::subb_b(UINT16 op) { SUBB(B); } #define SUBI_W(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 r; \ - INT32 t = ~PARAM_WORD(tms); \ - CLR_NCZV(tms); \ + INT32 t = ~PARAM_WORD(); \ + CLR_NCZV(); \ r = *rd - t; \ - SET_NZCV_SUB(tms,*rd,t,r); \ + SET_NZCV_SUB(*rd,t,r); \ *rd = r; \ - COUNT_CYCLES(tms,2); \ + COUNT_CYCLES(2); \ } -static void subi_w_a(tms34010_state *tms, UINT16 op) { SUBI_W(A); } -static void subi_w_b(tms34010_state *tms, UINT16 op) { SUBI_W(B); } +void tms340x0_device::subi_w_a(UINT16 op) { SUBI_W(A); } +void tms340x0_device::subi_w_b(UINT16 op) { SUBI_W(B); } #define SUBI_L(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 t = ~PARAM_LONG(tms); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 t = ~PARAM_LONG(); \ INT32 r = *rd - t; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,*rd,t,r); \ + CLR_NCZV(); \ + SET_NZCV_SUB(*rd,t,r); \ *rd = r; \ - COUNT_CYCLES(tms,3); \ + COUNT_CYCLES(3); \ } -static void subi_l_a(tms34010_state *tms, UINT16 op) { SUBI_L(A); } -static void subi_l_b(tms34010_state *tms, UINT16 op) { SUBI_L(B); } +void tms340x0_device::subi_l_a(UINT16 op) { SUBI_L(A); } +void tms340x0_device::subi_l_b(UINT16 op) { SUBI_L(B); } #define SUBK(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 t = fw_inc[PARAM_K(op)]; \ INT32 r = *rd - t; \ - CLR_NCZV(tms); \ - SET_NZCV_SUB(tms,*rd,t,r); \ + CLR_NCZV(); \ + SET_NZCV_SUB(*rd,t,r); \ *rd = r; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void subk_a(tms34010_state *tms, UINT16 op) { SUBK(A); } -static void subk_b(tms34010_state *tms, UINT16 op) { SUBK(B); } +void tms340x0_device::subk_a(UINT16 op) { SUBK(A); } +void tms340x0_device::subk_b(UINT16 op) { SUBK(B); } #define XOR(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - *rd ^= R##REG(tms,SRCREG(op)); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,1); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + *rd ^= R##REG(SRCREG(op)); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(1); \ } -static void xor_a(tms34010_state *tms, UINT16 op) { XOR(A); } -static void xor_b(tms34010_state *tms, UINT16 op) { XOR(B); } +void tms340x0_device::xor_a(UINT16 op) { XOR(A); } +void tms340x0_device::xor_b(UINT16 op) { XOR(B); } #define XORI(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - *rd ^= PARAM_LONG(tms); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + *rd ^= PARAM_LONG(); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void xori_a(tms34010_state *tms, UINT16 op) { XORI(A); } -static void xori_b(tms34010_state *tms, UINT16 op) { XORI(B); } +void tms340x0_device::xori_a(UINT16 op) { XORI(A); } +void tms340x0_device::xori_b(UINT16 op) { XORI(B); } #define ZEXT(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - ZEXTEND(*rd,FW(tms,F)); \ - SET_Z_VAL(tms, *rd); \ - COUNT_CYCLES(tms,1); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + ZEXTEND(*rd,FW(F)); \ + SET_Z_VAL(*rd); \ + COUNT_CYCLES(1); \ } -static void zext0_a(tms34010_state *tms, UINT16 op) { ZEXT(0,A); } -static void zext0_b(tms34010_state *tms, UINT16 op) { ZEXT(0,B); } -static void zext1_a(tms34010_state *tms, UINT16 op) { ZEXT(1,A); } -static void zext1_b(tms34010_state *tms, UINT16 op) { ZEXT(1,B); } +void tms340x0_device::zext0_a(UINT16 op) { ZEXT(0,A); } +void tms340x0_device::zext0_b(UINT16 op) { ZEXT(0,B); } +void tms340x0_device::zext1_a(UINT16 op) { ZEXT(1,A); } +void tms340x0_device::zext1_b(UINT16 op) { ZEXT(1,B); } @@ -1072,346 +1072,346 @@ static void zext1_b(tms34010_state *tms, UINT16 op) { ZEXT(1,B); } #define MOVI_W(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ - *rd=PARAM_WORD(tms); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,2); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ + *rd=PARAM_WORD(); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(2); \ } -static void movi_w_a(tms34010_state *tms, UINT16 op) { MOVI_W(A); } -static void movi_w_b(tms34010_state *tms, UINT16 op) { MOVI_W(B); } +void tms340x0_device::movi_w_a(UINT16 op) { MOVI_W(A); } +void tms340x0_device::movi_w_b(UINT16 op) { MOVI_W(B); } #define MOVI_L(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ - *rd=PARAM_LONG(tms); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ + *rd=PARAM_LONG(); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void movi_l_a(tms34010_state *tms, UINT16 op) { MOVI_L(A); } -static void movi_l_b(tms34010_state *tms, UINT16 op) { MOVI_L(B); } +void tms340x0_device::movi_l_a(UINT16 op) { MOVI_L(A); } +void tms340x0_device::movi_l_b(UINT16 op) { MOVI_L(B); } #define MOVK(R) \ { \ INT32 k = PARAM_K(op); if (!k) k = 32; \ - R##REG(tms,DSTREG(op)) = k; \ - COUNT_CYCLES(tms,1); \ + R##REG(DSTREG(op)) = k; \ + COUNT_CYCLES(1); \ } -static void movk_a(tms34010_state *tms, UINT16 op) { MOVK(A); } -static void movk_b(tms34010_state *tms, UINT16 op) { MOVK(B); } +void tms340x0_device::movk_a(UINT16 op) { MOVK(A); } +void tms340x0_device::movk_b(UINT16 op) { MOVK(B); } #define MOVB_RN(R) \ { \ - WBYTE(tms, R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \ - COUNT_CYCLES(tms,1); \ + WBYTE(R##REG(DSTREG(op)),R##REG(SRCREG(op))); \ + COUNT_CYCLES(1); \ } -static void movb_rn_a(tms34010_state *tms, UINT16 op) { MOVB_RN(A); } -static void movb_rn_b(tms34010_state *tms, UINT16 op) { MOVB_RN(B); } +void tms340x0_device::movb_rn_a(UINT16 op) { MOVB_RN(A); } +void tms340x0_device::movb_rn_b(UINT16 op) { MOVB_RN(B); } #define MOVB_NR(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ - *rd = (INT8)RBYTE(tms, R##REG(tms,SRCREG(op))); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ + *rd = (INT8)RBYTE(R##REG(SRCREG(op))); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void movb_nr_a(tms34010_state *tms, UINT16 op) { MOVB_NR(A); } -static void movb_nr_b(tms34010_state *tms, UINT16 op) { MOVB_NR(B); } +void tms340x0_device::movb_nr_a(UINT16 op) { MOVB_NR(A); } +void tms340x0_device::movb_nr_b(UINT16 op) { MOVB_NR(B); } #define MOVB_NN(R) \ { \ - WBYTE(tms, R##REG(tms,DSTREG(op)),(UINT32)(UINT8)RBYTE(tms, R##REG(tms,SRCREG(op))));\ - COUNT_CYCLES(tms,3); \ + WBYTE(R##REG(DSTREG(op)),(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))));\ + COUNT_CYCLES(3); \ } -static void movb_nn_a(tms34010_state *tms, UINT16 op) { MOVB_NN(A); } -static void movb_nn_b(tms34010_state *tms, UINT16 op) { MOVB_NN(B); } +void tms340x0_device::movb_nn_a(UINT16 op) { MOVB_NN(A); } +void tms340x0_device::movb_nn_b(UINT16 op) { MOVB_NN(B); } #define MOVB_R_NO(R) \ { \ - INT32 o = PARAM_WORD(tms); \ - WBYTE(tms, R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \ - COUNT_CYCLES(tms,3); \ + INT32 o = PARAM_WORD(); \ + WBYTE(R##REG(DSTREG(op))+o,R##REG(SRCREG(op))); \ + COUNT_CYCLES(3); \ } -static void movb_r_no_a(tms34010_state *tms, UINT16 op) { MOVB_R_NO(A); } -static void movb_r_no_b(tms34010_state *tms, UINT16 op) { MOVB_R_NO(B); } +void tms340x0_device::movb_r_no_a(UINT16 op) { MOVB_R_NO(A); } +void tms340x0_device::movb_r_no_b(UINT16 op) { MOVB_R_NO(B); } #define MOVB_NO_R(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 o = PARAM_WORD(tms); \ - CLR_NZV(tms); \ - *rd = (INT8)RBYTE(tms, R##REG(tms,SRCREG(op))+o); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,5); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 o = PARAM_WORD(); \ + CLR_NZV(); \ + *rd = (INT8)RBYTE(R##REG(SRCREG(op))+o); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(5); \ } -static void movb_no_r_a(tms34010_state *tms, UINT16 op) { MOVB_NO_R(A); } -static void movb_no_r_b(tms34010_state *tms, UINT16 op) { MOVB_NO_R(B); } +void tms340x0_device::movb_no_r_a(UINT16 op) { MOVB_NO_R(A); } +void tms340x0_device::movb_no_r_b(UINT16 op) { MOVB_NO_R(B); } #define MOVB_NO_NO(R) \ { \ - INT32 o1 = PARAM_WORD(tms); \ - INT32 o2 = PARAM_WORD(tms); \ - WBYTE(tms, R##REG(tms,DSTREG(op))+o2,(UINT32)(UINT8)RBYTE(tms, R##REG(tms,SRCREG(op))+o1)); \ - COUNT_CYCLES(tms,5); \ + INT32 o1 = PARAM_WORD(); \ + INT32 o2 = PARAM_WORD(); \ + WBYTE(R##REG(DSTREG(op))+o2,(UINT32)(UINT8)RBYTE(R##REG(SRCREG(op))+o1)); \ + COUNT_CYCLES(5); \ } -static void movb_no_no_a(tms34010_state *tms, UINT16 op) { MOVB_NO_NO(A); } -static void movb_no_no_b(tms34010_state *tms, UINT16 op) { MOVB_NO_NO(B); } +void tms340x0_device::movb_no_no_a(UINT16 op) { MOVB_NO_NO(A); } +void tms340x0_device::movb_no_no_b(UINT16 op) { MOVB_NO_NO(B); } #define MOVB_RA(R) \ { \ - WBYTE(tms, PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \ - COUNT_CYCLES(tms,1); \ + WBYTE(PARAM_LONG(),R##REG(DSTREG(op))); \ + COUNT_CYCLES(1); \ } -static void movb_ra_a(tms34010_state *tms, UINT16 op) { MOVB_RA(A); } -static void movb_ra_b(tms34010_state *tms, UINT16 op) { MOVB_RA(B); } +void tms340x0_device::movb_ra_a(UINT16 op) { MOVB_RA(A); } +void tms340x0_device::movb_ra_b(UINT16 op) { MOVB_RA(B); } #define MOVB_AR(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ - *rd = (INT8)RBYTE(tms, PARAM_LONG(tms)); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,5); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ + *rd = (INT8)RBYTE(PARAM_LONG()); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(5); \ } -static void movb_ar_a(tms34010_state *tms, UINT16 op) { MOVB_AR(A); } -static void movb_ar_b(tms34010_state *tms, UINT16 op) { MOVB_AR(B); } +void tms340x0_device::movb_ar_a(UINT16 op) { MOVB_AR(A); } +void tms340x0_device::movb_ar_b(UINT16 op) { MOVB_AR(B); } -static void movb_aa(tms34010_state *tms, UINT16 op) +void tms340x0_device::movb_aa(UINT16 op) { - UINT32 bitaddrs=PARAM_LONG(tms); - WBYTE(tms, PARAM_LONG(tms),(UINT32)(UINT8)RBYTE(tms, bitaddrs)); - COUNT_CYCLES(tms,6); + UINT32 bitaddrs=PARAM_LONG(); + WBYTE(PARAM_LONG(),(UINT32)(UINT8)RBYTE(bitaddrs)); + COUNT_CYCLES(6); } #define MOVE_RR(RS,RD) \ { \ - INT32 *rd = &RD##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ - *rd = RS##REG(tms,SRCREG(op)); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,1); \ + INT32 *rd = &RD##REG(DSTREG(op)); \ + CLR_NZV(); \ + *rd = RS##REG(SRCREG(op)); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(1); \ } -static void move_rr_a (tms34010_state *tms, UINT16 op) { MOVE_RR(A,A); } -static void move_rr_b (tms34010_state *tms, UINT16 op) { MOVE_RR(B,B); } -static void move_rr_ax(tms34010_state *tms, UINT16 op) { MOVE_RR(A,B); } -static void move_rr_bx(tms34010_state *tms, UINT16 op) { MOVE_RR(B,A); } +void tms340x0_device::move_rr_a (UINT16 op) { MOVE_RR(A,A); } +void tms340x0_device::move_rr_b (UINT16 op) { MOVE_RR(B,B); } +void tms340x0_device::move_rr_ax(UINT16 op) { MOVE_RR(A,B); } +void tms340x0_device::move_rr_bx(UINT16 op) { MOVE_RR(B,A); } #define MOVE_RN(F,R) \ { \ - WFIELD##F(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \ - COUNT_CYCLES(tms,1); \ + WFIELD##F(R##REG(DSTREG(op)),R##REG(SRCREG(op))); \ + COUNT_CYCLES(1); \ } -static void move0_rn_a (tms34010_state *tms, UINT16 op) { MOVE_RN(0,A); } -static void move0_rn_b (tms34010_state *tms, UINT16 op) { MOVE_RN(0,B); } -static void move1_rn_a (tms34010_state *tms, UINT16 op) { MOVE_RN(1,A); } -static void move1_rn_b (tms34010_state *tms, UINT16 op) { MOVE_RN(1,B); } +void tms340x0_device::move0_rn_a (UINT16 op) { MOVE_RN(0,A); } +void tms340x0_device::move0_rn_b (UINT16 op) { MOVE_RN(0,B); } +void tms340x0_device::move1_rn_a (UINT16 op) { MOVE_RN(1,A); } +void tms340x0_device::move1_rn_b (UINT16 op) { MOVE_RN(1,B); } #define MOVE_R_DN(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - *rd-=fw_inc[FW(tms,F)]; \ - WFIELD##F(tms,*rd,R##REG(tms,SRCREG(op))); \ - COUNT_CYCLES(tms,2); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + *rd-=fw_inc[FW(F)]; \ + WFIELD##F(*rd,R##REG(SRCREG(op))); \ + COUNT_CYCLES(2); \ } -static void move0_r_dn_a (tms34010_state *tms, UINT16 op) { MOVE_R_DN(0,A); } -static void move0_r_dn_b (tms34010_state *tms, UINT16 op) { MOVE_R_DN(0,B); } -static void move1_r_dn_a (tms34010_state *tms, UINT16 op) { MOVE_R_DN(1,A); } -static void move1_r_dn_b (tms34010_state *tms, UINT16 op) { MOVE_R_DN(1,B); } +void tms340x0_device::move0_r_dn_a (UINT16 op) { MOVE_R_DN(0,A); } +void tms340x0_device::move0_r_dn_b (UINT16 op) { MOVE_R_DN(0,B); } +void tms340x0_device::move1_r_dn_a (UINT16 op) { MOVE_R_DN(1,A); } +void tms340x0_device::move1_r_dn_b (UINT16 op) { MOVE_R_DN(1,B); } #define MOVE_R_NI(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - WFIELD##F(tms,*rd,R##REG(tms,SRCREG(op))); \ - *rd+=fw_inc[FW(tms,F)]; \ - COUNT_CYCLES(tms,1); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + WFIELD##F(*rd,R##REG(SRCREG(op))); \ + *rd+=fw_inc[FW(F)]; \ + COUNT_CYCLES(1); \ } -static void move0_r_ni_a (tms34010_state *tms, UINT16 op) { MOVE_R_NI(0,A); } -static void move0_r_ni_b (tms34010_state *tms, UINT16 op) { MOVE_R_NI(0,B); } -static void move1_r_ni_a (tms34010_state *tms, UINT16 op) { MOVE_R_NI(1,A); } -static void move1_r_ni_b (tms34010_state *tms, UINT16 op) { MOVE_R_NI(1,B); } +void tms340x0_device::move0_r_ni_a (UINT16 op) { MOVE_R_NI(0,A); } +void tms340x0_device::move0_r_ni_b (UINT16 op) { MOVE_R_NI(0,B); } +void tms340x0_device::move1_r_ni_a (UINT16 op) { MOVE_R_NI(1,A); } +void tms340x0_device::move1_r_ni_b (UINT16 op) { MOVE_R_NI(1,B); } #define MOVE_NR(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ - *rd = RFIELD##F(tms,R##REG(tms,SRCREG(op))); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ + *rd = RFIELD##F(R##REG(SRCREG(op))); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void move0_nr_a (tms34010_state *tms, UINT16 op) { MOVE_NR(0,A); } -static void move0_nr_b (tms34010_state *tms, UINT16 op) { MOVE_NR(0,B); } -static void move1_nr_a (tms34010_state *tms, UINT16 op) { MOVE_NR(1,A); } -static void move1_nr_b (tms34010_state *tms, UINT16 op) { MOVE_NR(1,B); } +void tms340x0_device::move0_nr_a (UINT16 op) { MOVE_NR(0,A); } +void tms340x0_device::move0_nr_b (UINT16 op) { MOVE_NR(0,B); } +void tms340x0_device::move1_nr_a (UINT16 op) { MOVE_NR(1,A); } +void tms340x0_device::move1_nr_b (UINT16 op) { MOVE_NR(1,B); } #define MOVE_DN_R(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - CLR_NZV(tms); \ - *rs-=fw_inc[FW(tms,F)]; \ - *rd = RFIELD##F(tms,*rs); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,4); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + CLR_NZV(); \ + *rs-=fw_inc[FW(F)]; \ + *rd = RFIELD##F(*rs); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(4); \ } -static void move0_dn_r_a (tms34010_state *tms, UINT16 op) { MOVE_DN_R(0,A); } -static void move0_dn_r_b (tms34010_state *tms, UINT16 op) { MOVE_DN_R(0,B); } -static void move1_dn_r_a (tms34010_state *tms, UINT16 op) { MOVE_DN_R(1,A); } -static void move1_dn_r_b (tms34010_state *tms, UINT16 op) { MOVE_DN_R(1,B); } +void tms340x0_device::move0_dn_r_a (UINT16 op) { MOVE_DN_R(0,A); } +void tms340x0_device::move0_dn_r_b (UINT16 op) { MOVE_DN_R(0,B); } +void tms340x0_device::move1_dn_r_a (UINT16 op) { MOVE_DN_R(1,A); } +void tms340x0_device::move1_dn_r_b (UINT16 op) { MOVE_DN_R(1,B); } #define MOVE_NI_R(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 data = RFIELD##F(tms,*rs); \ - CLR_NZV(tms); \ - *rs+=fw_inc[FW(tms,F)]; \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 data = RFIELD##F(*rs); \ + CLR_NZV(); \ + *rs+=fw_inc[FW(F)]; \ *rd = data; \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,3); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(3); \ } -static void move0_ni_r_a (tms34010_state *tms, UINT16 op) { MOVE_NI_R(0,A); } -static void move0_ni_r_b (tms34010_state *tms, UINT16 op) { MOVE_NI_R(0,B); } -static void move1_ni_r_a (tms34010_state *tms, UINT16 op) { MOVE_NI_R(1,A); } -static void move1_ni_r_b (tms34010_state *tms, UINT16 op) { MOVE_NI_R(1,B); } +void tms340x0_device::move0_ni_r_a (UINT16 op) { MOVE_NI_R(0,A); } +void tms340x0_device::move0_ni_r_b (UINT16 op) { MOVE_NI_R(0,B); } +void tms340x0_device::move1_ni_r_a (UINT16 op) { MOVE_NI_R(1,A); } +void tms340x0_device::move1_ni_r_b (UINT16 op) { MOVE_NI_R(1,B); } #define MOVE_NN(F,R) \ { \ - WFIELD##F(tms,R##REG(tms,DSTREG(op)),RFIELD##F(tms,R##REG(tms,SRCREG(op)))); \ - COUNT_CYCLES(tms,3); \ + WFIELD##F(R##REG(DSTREG(op)),RFIELD##F(R##REG(SRCREG(op)))); \ + COUNT_CYCLES(3); \ } -static void move0_nn_a (tms34010_state *tms, UINT16 op) { MOVE_NN(0,A); } -static void move0_nn_b (tms34010_state *tms, UINT16 op) { MOVE_NN(0,B); } -static void move1_nn_a (tms34010_state *tms, UINT16 op) { MOVE_NN(1,A); } -static void move1_nn_b (tms34010_state *tms, UINT16 op) { MOVE_NN(1,B); } +void tms340x0_device::move0_nn_a (UINT16 op) { MOVE_NN(0,A); } +void tms340x0_device::move0_nn_b (UINT16 op) { MOVE_NN(0,B); } +void tms340x0_device::move1_nn_a (UINT16 op) { MOVE_NN(1,A); } +void tms340x0_device::move1_nn_b (UINT16 op) { MOVE_NN(1,B); } #define MOVE_DN_DN(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 *rs = &R##REG(SRCREG(op)); \ INT32 data; \ - *rs-=fw_inc[FW(tms,F)]; \ - data = RFIELD##F(tms,*rs); \ - *rd-=fw_inc[FW(tms,F)]; \ - WFIELD##F(tms,*rd,data); \ - COUNT_CYCLES(tms,4); \ + *rs-=fw_inc[FW(F)]; \ + data = RFIELD##F(*rs); \ + *rd-=fw_inc[FW(F)]; \ + WFIELD##F(*rd,data); \ + COUNT_CYCLES(4); \ } -static void move0_dn_dn_a (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(0,A); } -static void move0_dn_dn_b (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(0,B); } -static void move1_dn_dn_a (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(1,A); } -static void move1_dn_dn_b (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(1,B); } +void tms340x0_device::move0_dn_dn_a (UINT16 op) { MOVE_DN_DN(0,A); } +void tms340x0_device::move0_dn_dn_b (UINT16 op) { MOVE_DN_DN(0,B); } +void tms340x0_device::move1_dn_dn_a (UINT16 op) { MOVE_DN_DN(1,A); } +void tms340x0_device::move1_dn_dn_b (UINT16 op) { MOVE_DN_DN(1,B); } #define MOVE_NI_NI(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 *rs = &R##REG(tms,SRCREG(op)); \ - INT32 data = RFIELD##F(tms,*rs); \ - *rs+=fw_inc[FW(tms,F)]; \ - WFIELD##F(tms,*rd,data); \ - *rd+=fw_inc[FW(tms,F)]; \ - COUNT_CYCLES(tms,4); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 *rs = &R##REG(SRCREG(op)); \ + INT32 data = RFIELD##F(*rs); \ + *rs+=fw_inc[FW(F)]; \ + WFIELD##F(*rd,data); \ + *rd+=fw_inc[FW(F)]; \ + COUNT_CYCLES(4); \ } -static void move0_ni_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(0,A); } -static void move0_ni_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(0,B); } -static void move1_ni_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(1,A); } -static void move1_ni_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(1,B); } +void tms340x0_device::move0_ni_ni_a (UINT16 op) { MOVE_NI_NI(0,A); } +void tms340x0_device::move0_ni_ni_b (UINT16 op) { MOVE_NI_NI(0,B); } +void tms340x0_device::move1_ni_ni_a (UINT16 op) { MOVE_NI_NI(1,A); } +void tms340x0_device::move1_ni_ni_b (UINT16 op) { MOVE_NI_NI(1,B); } #define MOVE_R_NO(F,R) \ { \ - INT32 o = PARAM_WORD(tms); \ - WFIELD##F(tms,R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \ - COUNT_CYCLES(tms,3); \ + INT32 o = PARAM_WORD(); \ + WFIELD##F(R##REG(DSTREG(op))+o,R##REG(SRCREG(op))); \ + COUNT_CYCLES(3); \ } -static void move0_r_no_a (tms34010_state *tms, UINT16 op) { MOVE_R_NO(0,A); } -static void move0_r_no_b (tms34010_state *tms, UINT16 op) { MOVE_R_NO(0,B); } -static void move1_r_no_a (tms34010_state *tms, UINT16 op) { MOVE_R_NO(1,A); } -static void move1_r_no_b (tms34010_state *tms, UINT16 op) { MOVE_R_NO(1,B); } +void tms340x0_device::move0_r_no_a (UINT16 op) { MOVE_R_NO(0,A); } +void tms340x0_device::move0_r_no_b (UINT16 op) { MOVE_R_NO(0,B); } +void tms340x0_device::move1_r_no_a (UINT16 op) { MOVE_R_NO(1,A); } +void tms340x0_device::move1_r_no_b (UINT16 op) { MOVE_R_NO(1,B); } #define MOVE_NO_R(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 o = PARAM_WORD(tms); \ - CLR_NZV(tms); \ - *rd = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,5); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 o = PARAM_WORD(); \ + CLR_NZV(); \ + *rd = RFIELD##F(R##REG(SRCREG(op))+o); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(5); \ } -static void move0_no_r_a (tms34010_state *tms, UINT16 op) { MOVE_NO_R(0,A); } -static void move0_no_r_b (tms34010_state *tms, UINT16 op) { MOVE_NO_R(0,B); } -static void move1_no_r_a (tms34010_state *tms, UINT16 op) { MOVE_NO_R(1,A); } -static void move1_no_r_b (tms34010_state *tms, UINT16 op) { MOVE_NO_R(1,B); } +void tms340x0_device::move0_no_r_a (UINT16 op) { MOVE_NO_R(0,A); } +void tms340x0_device::move0_no_r_b (UINT16 op) { MOVE_NO_R(0,B); } +void tms340x0_device::move1_no_r_a (UINT16 op) { MOVE_NO_R(1,A); } +void tms340x0_device::move1_no_r_b (UINT16 op) { MOVE_NO_R(1,B); } #define MOVE_NO_NI(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - INT32 o = PARAM_WORD(tms); \ - INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o); \ - WFIELD##F(tms,*rd,data); \ - *rd+=fw_inc[FW(tms,F)]; \ - COUNT_CYCLES(tms,5); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + INT32 o = PARAM_WORD(); \ + INT32 data = RFIELD##F(R##REG(SRCREG(op))+o); \ + WFIELD##F(*rd,data); \ + *rd+=fw_inc[FW(F)]; \ + COUNT_CYCLES(5); \ } -static void move0_no_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(0,A); } -static void move0_no_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(0,B); } -static void move1_no_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(1,A); } -static void move1_no_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(1,B); } +void tms340x0_device::move0_no_ni_a (UINT16 op) { MOVE_NO_NI(0,A); } +void tms340x0_device::move0_no_ni_b (UINT16 op) { MOVE_NO_NI(0,B); } +void tms340x0_device::move1_no_ni_a (UINT16 op) { MOVE_NO_NI(1,A); } +void tms340x0_device::move1_no_ni_b (UINT16 op) { MOVE_NO_NI(1,B); } #define MOVE_NO_NO(F,R) \ { \ - INT32 o1 = PARAM_WORD(tms); \ - INT32 o2 = PARAM_WORD(tms); \ - INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o1); \ - WFIELD##F(tms,R##REG(tms,DSTREG(op))+o2,data); \ - COUNT_CYCLES(tms,5); \ + INT32 o1 = PARAM_WORD(); \ + INT32 o2 = PARAM_WORD(); \ + INT32 data = RFIELD##F(R##REG(SRCREG(op))+o1); \ + WFIELD##F(R##REG(DSTREG(op))+o2,data); \ + COUNT_CYCLES(5); \ } -static void move0_no_no_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(0,A); } -static void move0_no_no_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(0,B); } -static void move1_no_no_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(1,A); } -static void move1_no_no_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(1,B); } +void tms340x0_device::move0_no_no_a (UINT16 op) { MOVE_NO_NO(0,A); } +void tms340x0_device::move0_no_no_b (UINT16 op) { MOVE_NO_NO(0,B); } +void tms340x0_device::move1_no_no_a (UINT16 op) { MOVE_NO_NO(1,A); } +void tms340x0_device::move1_no_no_b (UINT16 op) { MOVE_NO_NO(1,B); } #define MOVE_RA(F,R) \ { \ - WFIELD##F(tms,PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \ - COUNT_CYCLES(tms,3); \ + WFIELD##F(PARAM_LONG(),R##REG(DSTREG(op))); \ + COUNT_CYCLES(3); \ } -static void move0_ra_a (tms34010_state *tms, UINT16 op) { MOVE_RA(0,A); } -static void move0_ra_b (tms34010_state *tms, UINT16 op) { MOVE_RA(0,B); } -static void move1_ra_a (tms34010_state *tms, UINT16 op) { MOVE_RA(1,A); } -static void move1_ra_b (tms34010_state *tms, UINT16 op) { MOVE_RA(1,B); } +void tms340x0_device::move0_ra_a (UINT16 op) { MOVE_RA(0,A); } +void tms340x0_device::move0_ra_b (UINT16 op) { MOVE_RA(0,B); } +void tms340x0_device::move1_ra_a (UINT16 op) { MOVE_RA(1,A); } +void tms340x0_device::move1_ra_b (UINT16 op) { MOVE_RA(1,B); } #define MOVE_AR(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_NZV(tms); \ - *rd = RFIELD##F(tms,PARAM_LONG(tms)); \ - SET_NZ_VAL(tms, *rd); \ - COUNT_CYCLES(tms,5); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_NZV(); \ + *rd = RFIELD##F(PARAM_LONG()); \ + SET_NZ_VAL(*rd); \ + COUNT_CYCLES(5); \ } -static void move0_ar_a (tms34010_state *tms, UINT16 op) { MOVE_AR(0,A); } -static void move0_ar_b (tms34010_state *tms, UINT16 op) { MOVE_AR(0,B); } -static void move1_ar_a (tms34010_state *tms, UINT16 op) { MOVE_AR(1,A); } -static void move1_ar_b (tms34010_state *tms, UINT16 op) { MOVE_AR(1,B); } +void tms340x0_device::move0_ar_a (UINT16 op) { MOVE_AR(0,A); } +void tms340x0_device::move0_ar_b (UINT16 op) { MOVE_AR(0,B); } +void tms340x0_device::move1_ar_a (UINT16 op) { MOVE_AR(1,A); } +void tms340x0_device::move1_ar_b (UINT16 op) { MOVE_AR(1,B); } #define MOVE_A_NI(F,R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - WFIELD##F(tms,*rd,RFIELD##F(tms,PARAM_LONG(tms))); \ - *rd+=fw_inc[FW(tms,F)]; \ - COUNT_CYCLES(tms,5); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + WFIELD##F(*rd,RFIELD##F(PARAM_LONG())); \ + *rd+=fw_inc[FW(F)]; \ + COUNT_CYCLES(5); \ } -static void move0_a_ni_a (tms34010_state *tms, UINT16 op) { MOVE_A_NI(0,A); } -static void move0_a_ni_b (tms34010_state *tms, UINT16 op) { MOVE_A_NI(0,B); } -static void move1_a_ni_a (tms34010_state *tms, UINT16 op) { MOVE_A_NI(1,A); } -static void move1_a_ni_b (tms34010_state *tms, UINT16 op) { MOVE_A_NI(1,B); } +void tms340x0_device::move0_a_ni_a (UINT16 op) { MOVE_A_NI(0,A); } +void tms340x0_device::move0_a_ni_b (UINT16 op) { MOVE_A_NI(0,B); } +void tms340x0_device::move1_a_ni_a (UINT16 op) { MOVE_A_NI(1,A); } +void tms340x0_device::move1_a_ni_b (UINT16 op) { MOVE_A_NI(1,B); } #define MOVE_AA(F) \ { \ - UINT32 bitaddrs=PARAM_LONG(tms); \ - WFIELD##F(tms,PARAM_LONG(tms),RFIELD##F(tms,bitaddrs)); \ - COUNT_CYCLES(tms,7); \ + UINT32 bitaddrs=PARAM_LONG(); \ + WFIELD##F(PARAM_LONG(),RFIELD##F(bitaddrs)); \ + COUNT_CYCLES(7); \ } -static void move0_aa (tms34010_state *tms, UINT16 op) { MOVE_AA(0); } -static void move1_aa (tms34010_state *tms, UINT16 op) { MOVE_AA(1); } +void tms340x0_device::move0_aa (UINT16 op) { MOVE_AA(0); } +void tms340x0_device::move1_aa (UINT16 op) { MOVE_AA(1); } @@ -1421,152 +1421,152 @@ static void move1_aa (tms34010_state *tms, UINT16 op) { MOVE_AA(1); } #define CALL(R) \ { \ - PUSH(tms, tms->pc); \ - tms->pc = R##REG(tms,DSTREG(op)); \ - CORRECT_ODD_PC(tms,"CALL"); \ - COUNT_CYCLES(tms,3); \ + PUSH(m_pc); \ + m_pc = R##REG(DSTREG(op)); \ + CORRECT_ODD_PC("CALL"); \ + COUNT_CYCLES(3); \ } -static void call_a (tms34010_state *tms, UINT16 op) { CALL(A); } -static void call_b (tms34010_state *tms, UINT16 op) { CALL(B); } +void tms340x0_device::call_a (UINT16 op) { CALL(A); } +void tms340x0_device::call_b (UINT16 op) { CALL(B); } -static void callr(tms34010_state *tms, UINT16 op) +void tms340x0_device::callr(UINT16 op) { - PUSH(tms, tms->pc+0x10); - tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; - COUNT_CYCLES(tms,3); + PUSH(m_pc+0x10); + m_pc += (PARAM_WORD_NO_INC()<<4)+0x10; + COUNT_CYCLES(3); } -static void calla(tms34010_state *tms, UINT16 op) +void tms340x0_device::calla(UINT16 op) { - PUSH(tms, tms->pc+0x20); - tms->pc = PARAM_LONG_NO_INC(tms); - CORRECT_ODD_PC(tms,"CALLA"); - COUNT_CYCLES(tms,4); + PUSH(m_pc+0x20); + m_pc = PARAM_LONG_NO_INC(); + CORRECT_ODD_PC("CALLA"); + COUNT_CYCLES(4); } #define DSJ(R) \ { \ - if (--R##REG(tms,DSTREG(op))) \ + if (--R##REG(DSTREG(op))) \ { \ - tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \ - COUNT_CYCLES(tms,3); \ + m_pc += (PARAM_WORD_NO_INC()<<4)+0x10; \ + COUNT_CYCLES(3); \ } \ else \ { \ - SKIP_WORD(tms); \ - COUNT_CYCLES(tms,2); \ + SKIP_WORD(); \ + COUNT_CYCLES(2); \ } \ } -static void dsj_a (tms34010_state *tms, UINT16 op) { DSJ(A); } -static void dsj_b (tms34010_state *tms, UINT16 op) { DSJ(B); } +void tms340x0_device::dsj_a (UINT16 op) { DSJ(A); } +void tms340x0_device::dsj_b (UINT16 op) { DSJ(B); } #define DSJEQ(R) \ { \ - if (Z_FLAG(tms)) \ + if (Z_FLAG()) \ { \ - if (--R##REG(tms,DSTREG(op))) \ + if (--R##REG(DSTREG(op))) \ { \ - tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \ - COUNT_CYCLES(tms,3); \ + m_pc += (PARAM_WORD_NO_INC()<<4)+0x10; \ + COUNT_CYCLES(3); \ } \ else \ { \ - SKIP_WORD(tms); \ - COUNT_CYCLES(tms,2); \ + SKIP_WORD(); \ + COUNT_CYCLES(2); \ } \ } \ else \ { \ - SKIP_WORD(tms); \ - COUNT_CYCLES(tms,2); \ + SKIP_WORD(); \ + COUNT_CYCLES(2); \ } \ } -static void dsjeq_a (tms34010_state *tms, UINT16 op) { DSJEQ(A); } -static void dsjeq_b (tms34010_state *tms, UINT16 op) { DSJEQ(B); } +void tms340x0_device::dsjeq_a (UINT16 op) { DSJEQ(A); } +void tms340x0_device::dsjeq_b (UINT16 op) { DSJEQ(B); } #define DSJNE(R) \ { \ - if (!Z_FLAG(tms)) \ + if (!Z_FLAG()) \ { \ - if (--R##REG(tms,DSTREG(op))) \ + if (--R##REG(DSTREG(op))) \ { \ - tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \ - COUNT_CYCLES(tms,3); \ + m_pc += (PARAM_WORD_NO_INC()<<4)+0x10; \ + COUNT_CYCLES(3); \ } \ else \ { \ - SKIP_WORD(tms); \ - COUNT_CYCLES(tms,2); \ + SKIP_WORD(); \ + COUNT_CYCLES(2); \ } \ } \ else \ { \ - SKIP_WORD(tms); \ - COUNT_CYCLES(tms,2); \ + SKIP_WORD(); \ + COUNT_CYCLES(2); \ } \ } -static void dsjne_a (tms34010_state *tms, UINT16 op) { DSJNE(A); } -static void dsjne_b (tms34010_state *tms, UINT16 op) { DSJNE(B); } +void tms340x0_device::dsjne_a (UINT16 op) { DSJNE(A); } +void tms340x0_device::dsjne_b (UINT16 op) { DSJNE(B); } #define DSJS(R) \ { \ if (op & 0x0400) \ { \ - if (--R##REG(tms,DSTREG(op))) \ + if (--R##REG(DSTREG(op))) \ { \ - tms->pc -= ((PARAM_K(op))<<4); \ - COUNT_CYCLES(tms,2); \ + m_pc -= ((PARAM_K(op))<<4); \ + COUNT_CYCLES(2); \ } \ else \ - COUNT_CYCLES(tms,3); \ + COUNT_CYCLES(3); \ } \ else \ { \ - if (--R##REG(tms,DSTREG(op))) \ + if (--R##REG(DSTREG(op))) \ { \ - tms->pc += ((PARAM_K(op))<<4); \ - COUNT_CYCLES(tms,2); \ + m_pc += ((PARAM_K(op))<<4); \ + COUNT_CYCLES(2); \ } \ else \ - COUNT_CYCLES(tms,3); \ + COUNT_CYCLES(3); \ } \ } -static void dsjs_a (tms34010_state *tms, UINT16 op) { DSJS(A); } -static void dsjs_b (tms34010_state *tms, UINT16 op) { DSJS(B); } +void tms340x0_device::dsjs_a (UINT16 op) { DSJS(A); } +void tms340x0_device::dsjs_b (UINT16 op) { DSJS(B); } -static void emu(tms34010_state *tms, UINT16 op) +void tms340x0_device::emu(UINT16 op) { /* in RUN state, this instruction is a NOP */ - COUNT_CYCLES(tms,6); + COUNT_CYCLES(6); } #define EXGPC(R) \ { \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 temppc = *rd; \ - *rd = tms->pc; \ - tms->pc = temppc; \ - CORRECT_ODD_PC(tms,"EXGPC"); \ - COUNT_CYCLES(tms,2); \ + *rd = m_pc; \ + m_pc = temppc; \ + CORRECT_ODD_PC("EXGPC"); \ + COUNT_CYCLES(2); \ } -static void exgpc_a (tms34010_state *tms, UINT16 op) { EXGPC(A); } -static void exgpc_b (tms34010_state *tms, UINT16 op) { EXGPC(B); } +void tms340x0_device::exgpc_a (UINT16 op) { EXGPC(A); } +void tms340x0_device::exgpc_b (UINT16 op) { EXGPC(B); } #define GETPC(R) \ { \ - R##REG(tms,DSTREG(op)) = tms->pc; \ - COUNT_CYCLES(tms,1); \ + R##REG(DSTREG(op)) = m_pc; \ + COUNT_CYCLES(1); \ } -static void getpc_a (tms34010_state *tms, UINT16 op) { GETPC(A); } -static void getpc_b (tms34010_state *tms, UINT16 op) { GETPC(B); } +void tms340x0_device::getpc_a (UINT16 op) { GETPC(A); } +void tms340x0_device::getpc_b (UINT16 op) { GETPC(B); } #define GETST(R) \ { \ - R##REG(tms,DSTREG(op)) = tms->st; \ - COUNT_CYCLES(tms,1); \ + R##REG(DSTREG(op)) = m_st; \ + COUNT_CYCLES(1); \ } -static void getst_a (tms34010_state *tms, UINT16 op) { GETST(A); } -static void getst_b (tms34010_state *tms, UINT16 op) { GETST(B); } +void tms340x0_device::getst_a (UINT16 op) { GETST(A); } +void tms340x0_device::getst_b (UINT16 op) { GETST(B); } #define j_xx_8(TAKE) \ { \ @@ -1574,24 +1574,24 @@ static void getst_b (tms34010_state *tms, UINT16 op) { GETST(B); } { \ if (TAKE) \ { \ - tms->pc += (PARAM_REL8(op) << 4); \ - COUNT_CYCLES(tms,2); \ + m_pc += (PARAM_REL8(op) << 4); \ + COUNT_CYCLES(2); \ } \ else \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } \ else \ { \ if (TAKE) \ { \ - tms->pc = PARAM_LONG_NO_INC(tms); \ - CORRECT_ODD_PC(tms,"J_XX_8"); \ - COUNT_CYCLES(tms,3); \ + m_pc = PARAM_LONG_NO_INC(); \ + CORRECT_ODD_PC("J_XX_8"); \ + COUNT_CYCLES(3); \ } \ else \ { \ - SKIP_LONG(tms); \ - COUNT_CYCLES(tms,4); \ + SKIP_LONG(); \ + COUNT_CYCLES(4); \ } \ } \ } @@ -1602,23 +1602,23 @@ static void getst_b (tms34010_state *tms, UINT16 op) { GETST(B); } { \ if (TAKE) \ { \ - tms->pc += (PARAM_REL8(op) << 4); \ - COUNT_CYCLES(tms,2); \ + m_pc += (PARAM_REL8(op) << 4); \ + COUNT_CYCLES(2); \ } \ else \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } \ else \ { \ if (TAKE) \ { \ - tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \ - COUNT_CYCLES(tms,3); \ + m_pc += (PARAM_WORD_NO_INC()<<4)+0x10; \ + COUNT_CYCLES(3); \ } \ else \ { \ - SKIP_WORD(tms); \ - COUNT_CYCLES(tms,2); \ + SKIP_WORD(); \ + COUNT_CYCLES(2); \ } \ } \ } @@ -1627,277 +1627,277 @@ static void getst_b (tms34010_state *tms, UINT16 op) { GETST(B); } { \ if (TAKE) \ { \ - tms->pc += (PARAM_REL8(op) << 4); \ - COUNT_CYCLES(tms,2); \ + m_pc += (PARAM_REL8(op) << 4); \ + COUNT_CYCLES(2); \ } \ else \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void j_UC_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_UC_0(UINT16 op) { j_xx_0(1); } -static void j_UC_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_UC_8(UINT16 op) { j_xx_8(1); } -static void j_UC_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_UC_x(UINT16 op) { j_xx_x(1); } -static void j_P_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_P_0(UINT16 op) { - j_xx_0(!N_FLAG(tms) && !Z_FLAG(tms)); + j_xx_0(!N_FLAG() && !Z_FLAG()); } -static void j_P_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_P_8(UINT16 op) { - j_xx_8(!N_FLAG(tms) && !Z_FLAG(tms)); + j_xx_8(!N_FLAG() && !Z_FLAG()); } -static void j_P_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_P_x(UINT16 op) { - j_xx_x(!N_FLAG(tms) && !Z_FLAG(tms)); + j_xx_x(!N_FLAG() && !Z_FLAG()); } -static void j_LS_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LS_0(UINT16 op) { - j_xx_0(C_FLAG(tms) || Z_FLAG(tms)); + j_xx_0(C_FLAG() || Z_FLAG()); } -static void j_LS_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LS_8(UINT16 op) { - j_xx_8(C_FLAG(tms) || Z_FLAG(tms)); + j_xx_8(C_FLAG() || Z_FLAG()); } -static void j_LS_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LS_x(UINT16 op) { - j_xx_x(C_FLAG(tms) || Z_FLAG(tms)); + j_xx_x(C_FLAG() || Z_FLAG()); } -static void j_HI_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_HI_0(UINT16 op) { - j_xx_0(!C_FLAG(tms) && !Z_FLAG(tms)); + j_xx_0(!C_FLAG() && !Z_FLAG()); } -static void j_HI_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_HI_8(UINT16 op) { - j_xx_8(!C_FLAG(tms) && !Z_FLAG(tms)); + j_xx_8(!C_FLAG() && !Z_FLAG()); } -static void j_HI_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_HI_x(UINT16 op) { - j_xx_x(!C_FLAG(tms) && !Z_FLAG(tms)); + j_xx_x(!C_FLAG() && !Z_FLAG()); } -static void j_LT_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LT_0(UINT16 op) { - j_xx_0((N_FLAG(tms) && !V_FLAG(tms)) || (!N_FLAG(tms) && V_FLAG(tms))); + j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG())); } -static void j_LT_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LT_8(UINT16 op) { - j_xx_8((N_FLAG(tms) && !V_FLAG(tms)) || (!N_FLAG(tms) && V_FLAG(tms))); + j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG())); } -static void j_LT_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LT_x(UINT16 op) { - j_xx_x((N_FLAG(tms) && !V_FLAG(tms)) || (!N_FLAG(tms) && V_FLAG(tms))); + j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG())); } -static void j_GE_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_GE_0(UINT16 op) { - j_xx_0((N_FLAG(tms) && V_FLAG(tms)) || (!N_FLAG(tms) && !V_FLAG(tms))); + j_xx_0((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG())); } -static void j_GE_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_GE_8(UINT16 op) { - j_xx_8((N_FLAG(tms) && V_FLAG(tms)) || (!N_FLAG(tms) && !V_FLAG(tms))); + j_xx_8((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG())); } -static void j_GE_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_GE_x(UINT16 op) { - j_xx_x((N_FLAG(tms) && V_FLAG(tms)) || (!N_FLAG(tms) && !V_FLAG(tms))); + j_xx_x((N_FLAG() && V_FLAG()) || (!N_FLAG() && !V_FLAG())); } -static void j_LE_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LE_0(UINT16 op) { - j_xx_0((N_FLAG(tms) && !V_FLAG(tms)) || (!N_FLAG(tms) && V_FLAG(tms)) || Z_FLAG(tms)); + j_xx_0((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG()); } -static void j_LE_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LE_8(UINT16 op) { - j_xx_8((N_FLAG(tms) && !V_FLAG(tms)) || (!N_FLAG(tms) && V_FLAG(tms)) || Z_FLAG(tms)); + j_xx_8((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG()); } -static void j_LE_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_LE_x(UINT16 op) { - j_xx_x((N_FLAG(tms) && !V_FLAG(tms)) || (!N_FLAG(tms) && V_FLAG(tms)) || Z_FLAG(tms)); + j_xx_x((N_FLAG() && !V_FLAG()) || (!N_FLAG() && V_FLAG()) || Z_FLAG()); } -static void j_GT_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_GT_0(UINT16 op) { - j_xx_0((N_FLAG(tms) && V_FLAG(tms) && !Z_FLAG(tms)) || (!N_FLAG(tms) && !V_FLAG(tms) && !Z_FLAG(tms))); + j_xx_0((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG())); } -static void j_GT_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_GT_8(UINT16 op) { - j_xx_8((N_FLAG(tms) && V_FLAG(tms) && !Z_FLAG(tms)) || (!N_FLAG(tms) && !V_FLAG(tms) && !Z_FLAG(tms))); + j_xx_8((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG())); } -static void j_GT_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_GT_x(UINT16 op) { - j_xx_x((N_FLAG(tms) && V_FLAG(tms) && !Z_FLAG(tms)) || (!N_FLAG(tms) && !V_FLAG(tms) && !Z_FLAG(tms))); + j_xx_x((N_FLAG() && V_FLAG() && !Z_FLAG()) || (!N_FLAG() && !V_FLAG() && !Z_FLAG())); } -static void j_C_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_C_0(UINT16 op) { - j_xx_0(C_FLAG(tms)); + j_xx_0(C_FLAG()); } -static void j_C_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_C_8(UINT16 op) { - j_xx_8(C_FLAG(tms)); + j_xx_8(C_FLAG()); } -static void j_C_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_C_x(UINT16 op) { - j_xx_x(C_FLAG(tms)); + j_xx_x(C_FLAG()); } -static void j_NC_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NC_0(UINT16 op) { - j_xx_0(!C_FLAG(tms)); + j_xx_0(!C_FLAG()); } -static void j_NC_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NC_8(UINT16 op) { - j_xx_8(!C_FLAG(tms)); + j_xx_8(!C_FLAG()); } -static void j_NC_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NC_x(UINT16 op) { - j_xx_x(!C_FLAG(tms)); + j_xx_x(!C_FLAG()); } -static void j_EQ_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_EQ_0(UINT16 op) { - j_xx_0(Z_FLAG(tms)); + j_xx_0(Z_FLAG()); } -static void j_EQ_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_EQ_8(UINT16 op) { - j_xx_8(Z_FLAG(tms)); + j_xx_8(Z_FLAG()); } -static void j_EQ_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_EQ_x(UINT16 op) { - j_xx_x(Z_FLAG(tms)); + j_xx_x(Z_FLAG()); } -static void j_NE_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NE_0(UINT16 op) { - j_xx_0(!Z_FLAG(tms)); + j_xx_0(!Z_FLAG()); } -static void j_NE_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NE_8(UINT16 op) { - j_xx_8(!Z_FLAG(tms)); + j_xx_8(!Z_FLAG()); } -static void j_NE_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NE_x(UINT16 op) { - j_xx_x(!Z_FLAG(tms)); + j_xx_x(!Z_FLAG()); } -static void j_V_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_V_0(UINT16 op) { - j_xx_0(V_FLAG(tms)); + j_xx_0(V_FLAG()); } -static void j_V_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_V_8(UINT16 op) { - j_xx_8(V_FLAG(tms)); + j_xx_8(V_FLAG()); } -static void j_V_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_V_x(UINT16 op) { - j_xx_x(V_FLAG(tms)); + j_xx_x(V_FLAG()); } -static void j_NV_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NV_0(UINT16 op) { - j_xx_0(!V_FLAG(tms)); + j_xx_0(!V_FLAG()); } -static void j_NV_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NV_8(UINT16 op) { - j_xx_8(!V_FLAG(tms)); + j_xx_8(!V_FLAG()); } -static void j_NV_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NV_x(UINT16 op) { - j_xx_x(!V_FLAG(tms)); + j_xx_x(!V_FLAG()); } -static void j_N_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_N_0(UINT16 op) { - j_xx_0(N_FLAG(tms)); + j_xx_0(N_FLAG()); } -static void j_N_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_N_8(UINT16 op) { - j_xx_8(N_FLAG(tms)); + j_xx_8(N_FLAG()); } -static void j_N_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_N_x(UINT16 op) { - j_xx_x(N_FLAG(tms)); + j_xx_x(N_FLAG()); } -static void j_NN_0(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NN_0(UINT16 op) { - j_xx_0(!N_FLAG(tms)); + j_xx_0(!N_FLAG()); } -static void j_NN_8(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NN_8(UINT16 op) { - j_xx_8(!N_FLAG(tms)); + j_xx_8(!N_FLAG()); } -static void j_NN_x(tms34010_state *tms, UINT16 op) +void tms340x0_device::j_NN_x(UINT16 op) { - j_xx_x(!N_FLAG(tms)); + j_xx_x(!N_FLAG()); } #define JUMP(R) \ { \ - tms->pc = R##REG(tms,DSTREG(op)); \ - CORRECT_ODD_PC(tms,"JUMP"); \ - COUNT_CYCLES(tms,2); \ + m_pc = R##REG(DSTREG(op)); \ + CORRECT_ODD_PC("JUMP"); \ + COUNT_CYCLES(2); \ } -static void jump_a (tms34010_state *tms, UINT16 op) { JUMP(A); } -static void jump_b (tms34010_state *tms, UINT16 op) { JUMP(B); } +void tms340x0_device::jump_a (UINT16 op) { JUMP(A); } +void tms340x0_device::jump_b (UINT16 op) { JUMP(B); } -static void popst(tms34010_state *tms, UINT16 op) +void tms340x0_device::popst(UINT16 op) { - SET_ST(tms, POP(tms)); - COUNT_CYCLES(tms,8); + SET_ST(POP()); + COUNT_CYCLES(8); } -static void pushst(tms34010_state *tms, UINT16 op) +void tms340x0_device::pushst(UINT16 op) { - PUSH(tms, tms->st); - COUNT_CYCLES(tms,2); + PUSH(m_st); + COUNT_CYCLES(2); } #define PUTST(R) \ { \ - SET_ST(tms, R##REG(tms,DSTREG(op))); \ - COUNT_CYCLES(tms,3); \ + SET_ST(R##REG(DSTREG(op))); \ + COUNT_CYCLES(3); \ } -static void putst_a (tms34010_state *tms, UINT16 op) { PUTST(A); } -static void putst_b (tms34010_state *tms, UINT16 op) { PUTST(B); } +void tms340x0_device::putst_a (UINT16 op) { PUTST(A); } +void tms340x0_device::putst_b (UINT16 op) { PUTST(B); } -static void reti(tms34010_state *tms, UINT16 op) +void tms340x0_device::reti(UINT16 op) { - INT32 st = POP(tms); - tms->pc = POP(tms); - CORRECT_ODD_PC(tms,"RETI"); - SET_ST(tms, st); - COUNT_CYCLES(tms,11); + INT32 st = POP(); + m_pc = POP(); + CORRECT_ODD_PC("RETI"); + SET_ST(st); + COUNT_CYCLES(11); } -static void rets(tms34010_state *tms, UINT16 op) +void tms340x0_device::rets(UINT16 op) { UINT32 offs; - tms->pc = POP(tms); - CORRECT_ODD_PC(tms,"RETS"); + m_pc = POP(); + CORRECT_ODD_PC("RETS"); offs = PARAM_N(op); if (offs) { - SP(tms)+=(offs<<4); + SP()+=(offs<<4); } - COUNT_CYCLES(tms,7); + COUNT_CYCLES(7); } #define REV(R) \ { \ - R##REG(tms,DSTREG(op)) = 0x0008; \ - COUNT_CYCLES(tms,1); \ + R##REG(DSTREG(op)) = 0x0008; \ + COUNT_CYCLES(1); \ } -static void rev_a (tms34010_state *tms, UINT16 op) { REV(A); } -static void rev_b (tms34010_state *tms, UINT16 op) { REV(B); } +void tms340x0_device::rev_a (UINT16 op) { REV(A); } +void tms340x0_device::rev_b (UINT16 op) { REV(B); } -static void trap(tms34010_state *tms, UINT16 op) +void tms340x0_device::trap(UINT16 op) { UINT32 t = PARAM_N(op); if (t) { - PUSH(tms, tms->pc); - PUSH(tms, tms->st); + PUSH(m_pc); + PUSH(m_st); } - RESET_ST(tms); - tms->pc = RLONG(tms, 0xffffffe0-(t<<5)); - CORRECT_ODD_PC(tms,"TRAP"); - COUNT_CYCLES(tms,16); + RESET_ST(); + m_pc = RLONG(0xffffffe0-(t<<5)); + CORRECT_ODD_PC("TRAP"); + COUNT_CYCLES(16); } @@ -2018,54 +2018,54 @@ New 34020 ops: #define ADD_XYI(R) \ { \ - UINT32 a = PARAM_LONG(tms); \ - XY *b = &R##REG_XY(tms,DSTREG(op)); \ - CLR_NCZV(tms); \ + UINT32 a = PARAM_LONG(); \ + XY *b = &R##REG_XY(DSTREG(op)); \ + CLR_NCZV(); \ b->x += (INT16)(a & 0xffff); \ b->y += ((INT32)a >> 16); \ - SET_N_LOG(tms, b->x == 0); \ - SET_C_BIT_LO(tms, b->y, 15); \ - SET_Z_LOG(tms, b->y == 0); \ - SET_V_BIT_LO(tms, b->x, 15); \ - COUNT_CYCLES(tms,1); \ + SET_N_LOG(b->x == 0); \ + SET_C_BIT_LO(b->y, 15); \ + SET_Z_LOG(b->y == 0); \ + SET_V_BIT_LO(b->x, 15); \ + COUNT_CYCLES(1); \ } -static void addxyi_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::addxyi_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } ADD_XYI(A); } -static void addxyi_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::addxyi_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } ADD_XYI(B); } -static void blmove(tms34010_state *tms, UINT16 op) +void tms340x0_device::blmove(UINT16 op) { - offs_t src = BREG(tms,0); - offs_t dst = BREG(tms,2); - offs_t bits = BREG(tms,7); + offs_t src = BREG(0); + offs_t dst = BREG(2); + offs_t bits = BREG(7); - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } /* src and dst are aligned */ if (!(src & 0x0f) && !(dst & 0x0f)) { - while (bits >= 16 && tms->icount > 0) + while (bits >= 16 && m_icount > 0) { - TMS34010_WRMEM_WORD(tms, TOBYTE(dst), TMS34010_RDMEM_WORD(tms, TOBYTE(src))); + TMS34010_WRMEM_WORD(TOBYTE(dst), TMS34010_RDMEM_WORD(TOBYTE(src))); src += 0x10; dst += 0x10; bits -= 0x10; - tms->icount -= 2; + m_icount -= 2; } - if (bits != 0 && tms->icount > 0) + if (bits != 0 && m_icount > 0) { - (*tms34010_wfield_functions[bits])(tms, dst, (*tms34010_rfield_functions[bits])(tms, src)); + (this->*s_wfield_functions[bits])(dst, (this->*s_rfield_functions[bits])(src)); dst += bits; src += bits; bits = 0; - tms->icount -= 2; + m_icount -= 2; } } @@ -2088,246 +2088,246 @@ static void blmove(tms34010_state *tms, UINT16 op) } /* update the final results */ - BREG(tms,0) = src; - BREG(tms,2) = dst; - BREG(tms,7) = bits; + BREG(0) = src; + BREG(2) = dst; + BREG(7) = bits; /* if we're not done yet, back up the PC */ if (bits != 0) - tms->pc -= 0x10; + m_pc -= 0x10; } -static void cexec_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::cexec_l(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cexec_l\n"); } -static void cexec_s(tms34010_state *tms, UINT16 op) +void tms340x0_device::cexec_s(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cexec_s\n"); } -static void clip(tms34010_state *tms, UINT16 op) +void tms340x0_device::clip(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:clip\n"); } -static void cmovcg_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovcg_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovcg_a\n"); } -static void cmovcg_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovcg_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovcg_b\n"); } -static void cmovcm_f(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovcm_f(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovcm_f\n"); } -static void cmovcm_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovcm_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovcm_b\n"); } -static void cmovgc_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovgc_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovgc_a\n"); } -static void cmovgc_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovgc_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovgc_b\n"); } -static void cmovgc_a_s(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovgc_a_s(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovgc_a_s\n"); } -static void cmovgc_b_s(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovgc_b_s(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovgc_b_s\n"); } -static void cmovmc_f(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovmc_f(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovmc_f\n"); } -static void cmovmc_f_va(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovmc_f_va(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovmc_f_va\n"); } -static void cmovmc_f_vb(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovmc_f_vb(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovmc_f_vb\n"); } -static void cmovmc_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmovmc_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cmovmc_b\n"); } #define CMPK(R) \ { \ INT32 r; \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ INT32 t = PARAM_K(op); if (!t) t = 32; \ - CLR_NCZV(tms); \ + CLR_NCZV(); \ r = *rd - t; \ - SET_NZCV_SUB(tms,*rd,t,r); \ - COUNT_CYCLES(tms,1); \ + SET_NZCV_SUB(*rd,t,r); \ + COUNT_CYCLES(1); \ } -static void cmp_k_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmp_k_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } CMPK(A); } -static void cmp_k_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cmp_k_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } CMPK(B); } -static void cvdxyl_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::cvdxyl_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cvdxyl_a\n"); } -static void cvdxyl_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cvdxyl_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cvdxyl_b\n"); } -static void cvmxyl_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::cvmxyl_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cvmxyl_a\n"); } -static void cvmxyl_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cvmxyl_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cvmxyl_b\n"); } -static void cvsxyl_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::cvsxyl_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cvsxyl_a\n"); } -static void cvsxyl_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::cvsxyl_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:cvsxyl_b\n"); } -static void exgps_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::exgps_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:exgps_a\n"); } -static void exgps_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::exgps_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:exgps_b\n"); } -static void fline(tms34010_state *tms, UINT16 op) +void tms340x0_device::fline(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:fline\n"); } -static void fpixeq(tms34010_state *tms, UINT16 op) +void tms340x0_device::fpixeq(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:fpixeq\n"); } -static void fpixne(tms34010_state *tms, UINT16 op) +void tms340x0_device::fpixne(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:fpixne\n"); } -static void getps_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::getps_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:getps_a\n"); } -static void getps_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::getps_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:getps_b\n"); } -static void idle(tms34010_state *tms, UINT16 op) +void tms340x0_device::idle(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:idle\n"); } -static void linit(tms34010_state *tms, UINT16 op) +void tms340x0_device::linit(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:linit\n"); } -static void mwait(tms34010_state *tms, UINT16 op) +void tms340x0_device::mwait(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } } -static void pfill_xy(tms34010_state *tms, UINT16 op) +void tms340x0_device::pfill_xy(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:pfill_xy\n"); } -static void pixblt_l_m_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::pixblt_l_m_l(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:pixblt_l_m_l\n"); } -static void retm(tms34010_state *tms, UINT16 op) +void tms340x0_device::retm(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:retm\n"); } #define RMO(R) \ { \ UINT32 res = 0; \ - UINT32 rs = R##REG(tms,SRCREG(op)); \ - INT32 *rd = &R##REG(tms,DSTREG(op)); \ - CLR_Z(tms); \ - SET_Z_VAL(tms, rs); \ + UINT32 rs = R##REG(SRCREG(op)); \ + INT32 *rd = &R##REG(DSTREG(op)); \ + CLR_Z(); \ + SET_Z_VAL(rs); \ if (rs) \ { \ while (!(rs & 0x00000001)) \ @@ -2337,20 +2337,20 @@ static void retm(tms34010_state *tms, UINT16 op) } \ } \ *rd = res; \ - COUNT_CYCLES(tms,1); \ + COUNT_CYCLES(1); \ } -static void rmo_a(tms34010_state *tms, UINT16 op) { RMO(A); } -static void rmo_b(tms34010_state *tms, UINT16 op) { RMO(B); } +void tms340x0_device::rmo_a(UINT16 op) { RMO(A); } +void tms340x0_device::rmo_b(UINT16 op) { RMO(B); } #define RPIX(R) \ { \ - UINT32 v = R##REG(tms,DSTREG(op)); \ - switch (tms->pixelshift) \ + UINT32 v = R##REG(DSTREG(op)); \ + switch (m_pixelshift) \ { \ case 0: \ v = (v & 1) ? 0xffffffff : 0x00000000;\ - COUNT_CYCLES(tms,8); \ + COUNT_CYCLES(8); \ break; \ case 1: \ v &= 3; \ @@ -2358,101 +2358,101 @@ static void rmo_b(tms34010_state *tms, UINT16 op) { RMO(B); } v |= v << 4; \ v |= v << 8; \ v |= v << 16; \ - COUNT_CYCLES(tms,7); \ + COUNT_CYCLES(7); \ break; \ case 2: \ v &= 0x0f; \ v |= v << 4; \ v |= v << 8; \ v |= v << 16; \ - COUNT_CYCLES(tms,6); \ + COUNT_CYCLES(6); \ break; \ case 3: \ v &= 0xff; \ v |= v << 8; \ v |= v << 16; \ - COUNT_CYCLES(tms,5); \ + COUNT_CYCLES(5); \ break; \ case 4: \ v &= 0xffff; \ v |= v << 16; \ - COUNT_CYCLES(tms,4); \ + COUNT_CYCLES(4); \ break; \ case 5: \ - COUNT_CYCLES(tms,2); \ + COUNT_CYCLES(2); \ break; \ } \ - R##REG(tms,DSTREG(op)) = v; \ + R##REG(DSTREG(op)) = v; \ } -static void rpix_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::rpix_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } RPIX(A); } -static void rpix_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::rpix_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } RPIX(B); } -static void setcdp(tms34010_state *tms, UINT16 op) +void tms340x0_device::setcdp(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:setcdp\n"); } -static void setcmp(tms34010_state *tms, UINT16 op) +void tms340x0_device::setcmp(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:setcmp\n"); } -static void setcsp(tms34010_state *tms, UINT16 op) +void tms340x0_device::setcsp(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:setcsp\n"); } -static void swapf_a(tms34010_state *tms, UINT16 op) +void tms340x0_device::swapf_a(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:swapf_a\n"); } -static void swapf_b(tms34010_state *tms, UINT16 op) +void tms340x0_device::swapf_b(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:swapf_b\n"); } -static void tfill_xy(tms34010_state *tms, UINT16 op) +void tms340x0_device::tfill_xy(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:tfill_xy\n"); } -static void trapl(tms34010_state *tms, UINT16 op) +void tms340x0_device::trapl(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:trapl\n"); } -static void vblt_b_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::vblt_b_l(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:vblt_b_l\n"); } -static void vfill_l(tms34010_state *tms, UINT16 op) +void tms340x0_device::vfill_l(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:vfill_l\n"); } -static void vlcol(tms34010_state *tms, UINT16 op) +void tms340x0_device::vlcol(UINT16 op) { - if (!tms->is_34020) { unimpl(tms, op); return; } + if (!m_is_34020) { unimpl(op); return; } logerror("020:vlcol\n"); } diff --git a/src/emu/cpu/tms34010/34010ops.h b/src/emu/cpu/tms34010/34010ops.h index a2453000588..f811659c11c 100644 --- a/src/emu/cpu/tms34010/34010ops.h +++ b/src/emu/cpu/tms34010/34010ops.h @@ -19,29 +19,29 @@ MEMORY I/O MACROS ***************************************************************************/ -#define TMS34010_RDMEM(T,A) ((unsigned)(T)->program->read_byte (A)) -#define TMS34010_RDMEM_WORD(T,A) ((unsigned)(T)->program->read_word (A)) -INLINE UINT32 TMS34010_RDMEM_DWORD(tms34010_state *tms, offs_t A) +#define TMS34010_RDMEM(A) ((unsigned)m_program->read_byte (A)) +#define TMS34010_RDMEM_WORD(A) ((unsigned)m_program->read_word (A)) +inline UINT32 tms340x0_device::TMS34010_RDMEM_DWORD(offs_t A) { - UINT32 result = tms->program->read_word(A); - return result | (tms->program->read_word(A+2)<<16); + UINT32 result = m_program->read_word(A); + return result | (m_program->read_word(A+2)<<16); } -#define TMS34010_WRMEM(T,A,V) ((T)->program->write_byte(A,V)) -#define TMS34010_WRMEM_WORD(T,A,V) ((T)->program->write_word(A,V)) -INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V) +#define TMS34010_WRMEM(A,V) (m_program->write_byte(A,V)) +#define TMS34010_WRMEM_WORD(A,V) (m_program->write_word(A,V)) +inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, UINT32 V) { - tms->program->write_word(A,V); - tms->program->write_word(A+2,V>>16); + m_program->write_word(A,V); + m_program->write_word(A+2,V>>16); } /* IO registers accessor */ -#define IOREG(T,reg) ((T)->IOregs[reg]) -#define SMART_IOREG(T,reg) ((T)->IOregs[(T)->is_34020 ? (int)REG020_##reg : (int)REG_##reg]) -#define PBH(T) (IOREG(T, REG_CONTROL) & 0x0100) -#define PBV(T) (IOREG(T, REG_CONTROL) & 0x0200) +#define IOREG(reg) (m_IOregs[reg]) +#define SMART_IOREG(reg) (m_IOregs[m_is_34020 ? (int)REG020_##reg : (int)REG_##reg]) +#define PBH() (IOREG(REG_CONTROL) & 0x0100) +#define PBV() (IOREG(REG_CONTROL) & 0x0200) @@ -49,7 +49,7 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V) FIELD WRITE MACROS ***************************************************************************/ -#define WFIELDMAC(T,MASK,MAX) \ +#define WFIELDMAC(MASK,MAX) \ UINT32 shift = offset & 0x0f; \ UINT32 masked_data = data & (MASK); \ UINT32 old; \ @@ -58,89 +58,95 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V) \ if (shift >= MAX) \ { \ - old = (UINT32)TMS34010_RDMEM_DWORD(T, offset) & ~((MASK) << shift); \ - TMS34010_WRMEM_DWORD(T, offset, (masked_data << shift) | old); \ + old = (UINT32)TMS34010_RDMEM_DWORD(offset) & ~((MASK) << shift); \ + TMS34010_WRMEM_DWORD(offset, (masked_data << shift) | old); \ } \ else \ { \ - old = (UINT32)TMS34010_RDMEM_WORD(T, offset) & ~((MASK) << shift); \ - TMS34010_WRMEM_WORD(T, offset, ((masked_data & (MASK)) << shift) | old); \ + old = (UINT32)TMS34010_RDMEM_WORD(offset) & ~((MASK) << shift); \ + TMS34010_WRMEM_WORD(offset, ((masked_data & (MASK)) << shift) | old); \ } -#define WFIELDMAC_BIG(T,MASK,MAX) \ + +#define WFIELDMAC_BIG(MASK,MAX) \ UINT32 shift = offset & 0x0f; \ UINT32 masked_data = data & (MASK); \ UINT32 old; \ \ offset = TOBYTE(offset & 0xfffffff0); \ \ - old = (UINT32)TMS34010_RDMEM_DWORD(T, offset) & ~(UINT32)((MASK) << shift); \ - TMS34010_WRMEM_DWORD(T, offset, (UINT32)(masked_data << shift) | old); \ + old = (UINT32)TMS34010_RDMEM_DWORD(offset) & ~(UINT32)((MASK) << shift); \ + TMS34010_WRMEM_DWORD(offset, (UINT32)(masked_data << shift) | old); \ if (shift >= MAX) \ { \ shift = 32 - shift; \ - old = (UINT32)TMS34010_RDMEM_WORD(T, offset + 4) & ~((MASK) >> shift); \ - TMS34010_WRMEM_WORD(T, offset, (masked_data >> shift) | old); \ + old = (UINT32)TMS34010_RDMEM_WORD(offset + 4) & ~((MASK) >> shift); \ + TMS34010_WRMEM_WORD(offset, (masked_data >> shift) | old); \ } -#define WFIELDMAC_8(T) \ + +#define WFIELDMAC_8() \ if (offset & 0x07) \ { \ - WFIELDMAC(T,0xff,9); \ + WFIELDMAC(0xff,9); \ } \ else \ - TMS34010_WRMEM(T, TOBYTE(offset), data); -#define RFIELDMAC_8(T) \ + TMS34010_WRMEM(TOBYTE(offset), data); + +#define RFIELDMAC_8() \ if (offset & 0x07) \ { \ - RFIELDMAC(T,0xff,9); \ + RFIELDMAC(0xff,9); \ } \ else \ - return TMS34010_RDMEM(T, TOBYTE(offset)); -#define WFIELDMAC_32(T) \ + return TMS34010_RDMEM(TOBYTE(offset)); + +#define WFIELDMAC_32() \ if (offset & 0x0f) \ { \ UINT32 shift = offset&0x0f; \ UINT32 old; \ UINT32 hiword; \ offset &= 0xfffffff0; \ - old = ((UINT32) TMS34010_RDMEM_DWORD (T, TOBYTE(offset ))&(0xffffffff>>(0x20-shift))); \ - hiword = ((UINT32) TMS34010_RDMEM_DWORD (T, TOBYTE(offset+0x20))&(0xffffffff<>(0x20-shift))|hiword); \ + old = ((UINT32) TMS34010_RDMEM_DWORD (TOBYTE(offset ))&(0xffffffff>>(0x20-shift))); \ + hiword = ((UINT32) TMS34010_RDMEM_DWORD (TOBYTE(offset+0x20))&(0xffffffff<>(0x20-shift))|hiword); \ } \ else \ - TMS34010_WRMEM_DWORD(T, TOBYTE(offset),data); + TMS34010_WRMEM_DWORD(TOBYTE(offset),data); /*************************************************************************** FIELD READ MACROS ***************************************************************************/ -#define RFIELDMAC(T,MASK,MAX) \ +#define RFIELDMAC(MASK,MAX) \ UINT32 shift = offset & 0x0f; \ offset = TOBYTE(offset & 0xfffffff0); \ \ if (shift >= MAX) \ - ret = (TMS34010_RDMEM_DWORD(T, offset) >> shift) & (MASK); \ + ret = (TMS34010_RDMEM_DWORD(offset) >> shift) & (MASK); \ else \ - ret = (TMS34010_RDMEM_WORD(T, offset) >> shift) & (MASK); -#define RFIELDMAC_BIG(T,MASK,MAX) \ + ret = (TMS34010_RDMEM_WORD(offset) >> shift) & (MASK); + +#define RFIELDMAC_BIG(MASK,MAX) \ UINT32 shift = offset & 0x0f; \ offset = TOBYTE(offset & 0xfffffff0); \ \ - ret = (UINT32)TMS34010_RDMEM_DWORD(T, offset) >> shift; \ + ret = (UINT32)TMS34010_RDMEM_DWORD(offset) >> shift; \ if (shift >= MAX) \ - ret |= (TMS34010_RDMEM_WORD(T, offset + 4) << (32 - shift)); \ + ret |= (TMS34010_RDMEM_WORD(offset + 4) << (32 - shift)); \ ret &= MASK; -#define RFIELDMAC_32(T) \ + +#define RFIELDMAC_32() \ if (offset&0x0f) \ { \ UINT32 shift = offset&0x0f; \ offset &= 0xfffffff0; \ - return (((UINT32)TMS34010_RDMEM_DWORD (T, TOBYTE(offset ))>> shift) | \ - (TMS34010_RDMEM_DWORD (T, TOBYTE(offset+0x20))<<(0x20-shift)));\ + return (((UINT32)TMS34010_RDMEM_DWORD (TOBYTE(offset ))>> shift) | \ + (TMS34010_RDMEM_DWORD (TOBYTE(offset+0x20))<<(0x20-shift)));\ } \ else \ - return TMS34010_RDMEM_DWORD(T, TOBYTE(offset)); + return TMS34010_RDMEM_DWORD(TOBYTE(offset)); #endif /* __34010OPS_H__ */ diff --git a/src/emu/cpu/tms34010/34010tbl.c b/src/emu/cpu/tms34010/34010tbl.c index 889c692fd8d..63fde238d3b 100644 --- a/src/emu/cpu/tms34010/34010tbl.c +++ b/src/emu/cpu/tms34010/34010tbl.c @@ -6,1162 +6,775 @@ *****************************************************************************/ -static void unimpl(tms34010_state *tms, UINT16 op); - -/* Graphics Instructions */ - -static void pixblt_l_l(tms34010_state *tms, UINT16 op); /* 0f00 */ -static void pixblt_l_xy(tms34010_state *tms, UINT16 op); /* 0f20 */ -static void pixblt_xy_l(tms34010_state *tms, UINT16 op); /* 0f40 */ -static void pixblt_xy_xy(tms34010_state *tms, UINT16 op); /* 0f60 */ -static void pixblt_b_l(tms34010_state *tms, UINT16 op); /* 0f80 */ -static void pixblt_b_xy(tms34010_state *tms, UINT16 op); /* 0fa0 */ -static void fill_l(tms34010_state *tms, UINT16 op); /* 0fc0 */ -static void fill_xy(tms34010_state *tms, UINT16 op); /* 0fe0 */ -static void line(tms34010_state *tms, UINT16 op); /* df10/df90 */ -static void add_xy_a(tms34010_state *tms, UINT16 op); /* e000/e100 */ -static void add_xy_b(tms34010_state *tms, UINT16 op); /* e000/e100 */ -static void sub_xy_a(tms34010_state *tms, UINT16 op); /* e200/e300 */ -static void sub_xy_b(tms34010_state *tms, UINT16 op); /* e200/e300 */ -static void cmp_xy_a(tms34010_state *tms, UINT16 op); /* e400/e500 */ -static void cmp_xy_b(tms34010_state *tms, UINT16 op); /* e400/e500 */ -static void cpw_a(tms34010_state *tms, UINT16 op); /* e600/e700 */ -static void cpw_b(tms34010_state *tms, UINT16 op); /* e600/e700 */ -static void cvxyl_a(tms34010_state *tms, UINT16 op); /* e800/e900 */ -static void cvxyl_b(tms34010_state *tms, UINT16 op); /* e800/e900 */ -static void movx_a(tms34010_state *tms, UINT16 op); /* ec00/ed00 */ -static void movx_b(tms34010_state *tms, UINT16 op); /* ec00/ed00 */ -static void movy_a(tms34010_state *tms, UINT16 op); /* ee00/ef00 */ -static void movy_b(tms34010_state *tms, UINT16 op); /* ee00/ef00 */ -static void pixt_ri_a(tms34010_state *tms, UINT16 op); /* f800/f900 */ -static void pixt_ri_b(tms34010_state *tms, UINT16 op); /* f800/f900 */ -static void pixt_rixy_a(tms34010_state *tms, UINT16 op); /* f000/f100 */ -static void pixt_rixy_b(tms34010_state *tms, UINT16 op); /* f000/f100 */ -static void pixt_ir_a(tms34010_state *tms, UINT16 op); /* fa00/fb00 */ -static void pixt_ir_b(tms34010_state *tms, UINT16 op); /* fa00/fb00 */ -static void pixt_ii_a(tms34010_state *tms, UINT16 op); /* fc00/fd00 */ -static void pixt_ii_b(tms34010_state *tms, UINT16 op); /* fc00/fd00 */ -static void pixt_ixyr_a(tms34010_state *tms, UINT16 op); /* f200/f300 */ -static void pixt_ixyr_b(tms34010_state *tms, UINT16 op); /* f200/f300 */ -static void pixt_ixyixy_a(tms34010_state *tms, UINT16 op); /* f400/f500 */ -static void pixt_ixyixy_b(tms34010_state *tms, UINT16 op); /* f400/f500 */ -static void drav_a(tms34010_state *tms, UINT16 op); /* f600/f700 */ -static void drav_b(tms34010_state *tms, UINT16 op); /* f600/f700 */ - -/* General Instructions */ -static void abs_a(tms34010_state *tms, UINT16 op); /* 0380 */ -static void abs_b(tms34010_state *tms, UINT16 op); /* 0390 */ -static void add_a(tms34010_state *tms, UINT16 op); /* 4000/4100 */ -static void add_b(tms34010_state *tms, UINT16 op); /* 4000/4100 */ -static void addc_a(tms34010_state *tms, UINT16 op); /* 4200/4200 */ -static void addc_b(tms34010_state *tms, UINT16 op); /* 4200/4200 */ -static void addi_w_a(tms34010_state *tms, UINT16 op); /* 0b00 */ -static void addi_w_b(tms34010_state *tms, UINT16 op); /* 0b10 */ -static void addi_l_a(tms34010_state *tms, UINT16 op); /* 0b20 */ -static void addi_l_b(tms34010_state *tms, UINT16 op); /* 0b30 */ -static void addk_a(tms34010_state *tms, UINT16 op); /* 1000-1300 */ -static void addk_b(tms34010_state *tms, UINT16 op); /* 1000-1300 */ -static void and_a(tms34010_state *tms, UINT16 op); /* 5000/5100 */ -static void and_b(tms34010_state *tms, UINT16 op); /* 5000/5100 */ -static void andi_a(tms34010_state *tms, UINT16 op); /* 0b80 */ -static void andi_b(tms34010_state *tms, UINT16 op); /* 0b90 */ -static void andn_a(tms34010_state *tms, UINT16 op); /* 5200-5300 */ -static void andn_b(tms34010_state *tms, UINT16 op); /* 5200-5300 */ -static void btst_k_a(tms34010_state *tms, UINT16 op); /* 1c00-1f00 */ -static void btst_k_b(tms34010_state *tms, UINT16 op); /* 1c00-1f00 */ -static void btst_r_a(tms34010_state *tms, UINT16 op); /* 4a00-4b00 */ -static void btst_r_b(tms34010_state *tms, UINT16 op); /* 4a00-4b00 */ -static void clrc(tms34010_state *tms, UINT16 op); /* 0320 */ -static void cmp_a(tms34010_state *tms, UINT16 op); /* 4800/4900 */ -static void cmp_b(tms34010_state *tms, UINT16 op); /* 4800/4900 */ -static void cmpi_w_a(tms34010_state *tms, UINT16 op); /* 0b40 */ -static void cmpi_w_b(tms34010_state *tms, UINT16 op); /* 0b50 */ -static void cmpi_l_a(tms34010_state *tms, UINT16 op); /* 0b60 */ -static void cmpi_l_b(tms34010_state *tms, UINT16 op); /* 0b70 */ -static void dint(tms34010_state *tms, UINT16 op); -static void divs_a(tms34010_state *tms, UINT16 op); /* 5800/5900 */ -static void divs_b(tms34010_state *tms, UINT16 op); /* 5800/5900 */ -static void divu_a(tms34010_state *tms, UINT16 op); /* 5a00/5b00 */ -static void divu_b(tms34010_state *tms, UINT16 op); /* 5a00/5b00 */ -static void eint(tms34010_state *tms, UINT16 op); -static void exgf0_a(tms34010_state *tms, UINT16 op); /* d500 */ -static void exgf0_b(tms34010_state *tms, UINT16 op); /* d510 */ -static void exgf1_a(tms34010_state *tms, UINT16 op); /* d700 */ -static void exgf1_b(tms34010_state *tms, UINT16 op); /* d710 */ -static void lmo_a(tms34010_state *tms, UINT16 op); /* 6a00/6b00 */ -static void lmo_b(tms34010_state *tms, UINT16 op); /* 6a00/6b00 */ -static void mmfm_a(tms34010_state *tms, UINT16 op); /* 09a0 */ -static void mmfm_b(tms34010_state *tms, UINT16 op); /* 09b0 */ -static void mmtm_a(tms34010_state *tms, UINT16 op); /* 0980 */ -static void mmtm_b(tms34010_state *tms, UINT16 op); /* 0990 */ -static void mods_a(tms34010_state *tms, UINT16 op); /* 6c00/6d00 */ -static void mods_b(tms34010_state *tms, UINT16 op); /* 6c00/6d00 */ -static void modu_a(tms34010_state *tms, UINT16 op); /* 6e00/6f00 */ -static void modu_b(tms34010_state *tms, UINT16 op); /* 6e00/6f00 */ -static void mpys_a(tms34010_state *tms, UINT16 op); /* 5c00/5d00 */ -static void mpys_b(tms34010_state *tms, UINT16 op); /* 5c00/5d00 */ -static void mpyu_a(tms34010_state *tms, UINT16 op); /* 5e00/5e00 */ -static void mpyu_b(tms34010_state *tms, UINT16 op); /* 5e00/5f00 */ -static void neg_a(tms34010_state *tms, UINT16 op); /* 03a0 */ -static void neg_b(tms34010_state *tms, UINT16 op); /* 03b0 */ -static void negb_a(tms34010_state *tms, UINT16 op); /* 03c0 */ -static void negb_b(tms34010_state *tms, UINT16 op); /* 03d0 */ -static void nop(tms34010_state *tms, UINT16 op); /* 0300 */ -static void not_a(tms34010_state *tms, UINT16 op); /* 03e0 */ -static void not_b(tms34010_state *tms, UINT16 op); /* 03f0 */ -static void or_a(tms34010_state *tms, UINT16 op); /* 5400-5500 */ -static void or_b(tms34010_state *tms, UINT16 op); /* 5400-5500 */ -static void ori_a(tms34010_state *tms, UINT16 op); /* 0ba0 */ -static void ori_b(tms34010_state *tms, UINT16 op); /* 0bb0 */ -static void rl_k_a(tms34010_state *tms, UINT16 op); /* 3000-3300 */ -static void rl_k_b(tms34010_state *tms, UINT16 op); /* 3000-3300 */ -static void rl_r_a(tms34010_state *tms, UINT16 op); /* 6800/6900 */ -static void rl_r_b(tms34010_state *tms, UINT16 op); /* 6800/6900 */ -static void setc(tms34010_state *tms, UINT16 op); /* 0de0 */ -static void setf0(tms34010_state *tms, UINT16 op); -static void setf1(tms34010_state *tms, UINT16 op); -static void sext0_a(tms34010_state *tms, UINT16 op); /* 0500 */ -static void sext0_b(tms34010_state *tms, UINT16 op); /* 0510 */ -static void sext1_a(tms34010_state *tms, UINT16 op); /* 0700 */ -static void sext1_b(tms34010_state *tms, UINT16 op); /* 0710 */ -static void sla_k_a(tms34010_state *tms, UINT16 op); /* 2000-2300 */ -static void sla_k_b(tms34010_state *tms, UINT16 op); /* 2000-2300 */ -static void sla_r_a(tms34010_state *tms, UINT16 op); /* 6000/6100 */ -static void sla_r_b(tms34010_state *tms, UINT16 op); /* 6000/6100 */ -static void sll_k_a(tms34010_state *tms, UINT16 op); /* 2400-2700 */ -static void sll_k_b(tms34010_state *tms, UINT16 op); /* 2400-2700 */ -static void sll_r_a(tms34010_state *tms, UINT16 op); /* 6200/6300 */ -static void sll_r_b(tms34010_state *tms, UINT16 op); /* 6200/6300 */ -static void sra_k_a(tms34010_state *tms, UINT16 op); /* 2800-2b00 */ -static void sra_k_b(tms34010_state *tms, UINT16 op); /* 2800-2b00 */ -static void sra_r_a(tms34010_state *tms, UINT16 op); /* 6400/6500 */ -static void sra_r_b(tms34010_state *tms, UINT16 op); /* 6400/6500 */ -static void srl_k_a(tms34010_state *tms, UINT16 op); /* 2c00-2f00 */ -static void srl_k_b(tms34010_state *tms, UINT16 op); /* 2c00-2f00 */ -static void srl_r_a(tms34010_state *tms, UINT16 op); /* 6600/6700 */ -static void srl_r_b(tms34010_state *tms, UINT16 op); /* 6600/6700 */ -static void sub_a(tms34010_state *tms, UINT16 op); /* 4400/4500 */ -static void sub_b(tms34010_state *tms, UINT16 op); /* 4400/4500 */ -static void subb_a(tms34010_state *tms, UINT16 op); /* 4600/4700 */ -static void subb_b(tms34010_state *tms, UINT16 op); /* 4600/4700 */ -static void subi_w_a(tms34010_state *tms, UINT16 op); /* 0be0 */ -static void subi_w_b(tms34010_state *tms, UINT16 op); /* 0bf0 */ -static void subi_l_a(tms34010_state *tms, UINT16 op); /* 0d00 */ -static void subi_l_b(tms34010_state *tms, UINT16 op); /* 0d10 */ -static void subk_a(tms34010_state *tms, UINT16 op); /* 1400-1700 */ -static void subk_b(tms34010_state *tms, UINT16 op); /* 1400-1700 */ -static void xor_a(tms34010_state *tms, UINT16 op); /* 5600-5700 */ -static void xor_b(tms34010_state *tms, UINT16 op); /* 5600-5700 */ -static void xori_a(tms34010_state *tms, UINT16 op); /* 0bc0 */ -static void xori_b(tms34010_state *tms, UINT16 op); /* 0bd0 */ -static void zext0_a(tms34010_state *tms, UINT16 op); /* 0520 */ -static void zext0_b(tms34010_state *tms, UINT16 op); /* 0530 */ -static void zext1_a(tms34010_state *tms, UINT16 op); /* 0720 */ -static void zext1_b(tms34010_state *tms, UINT16 op); /* 0720 */ - - -/* Move Instructions */ -static void movi_w_a(tms34010_state *tms, UINT16 op); -static void movi_w_b(tms34010_state *tms, UINT16 op); -static void movi_l_a(tms34010_state *tms, UINT16 op); -static void movi_l_b(tms34010_state *tms, UINT16 op); -static void movk_a(tms34010_state *tms, UINT16 op); -static void movk_b(tms34010_state *tms, UINT16 op); -static void movb_rn_a(tms34010_state *tms, UINT16 op); /* 8c00-8d00 */ -static void movb_rn_b(tms34010_state *tms, UINT16 op); /* 8c00-8d00 */ -static void movb_nr_a(tms34010_state *tms, UINT16 op); /* 8e00-8f00 */ -static void movb_nr_b(tms34010_state *tms, UINT16 op); /* 8e00-8f00 */ -static void movb_nn_a(tms34010_state *tms, UINT16 op); /* 9c00-9d00 */ -static void movb_nn_b(tms34010_state *tms, UINT16 op); /* 9c00-9d00 */ -static void movb_r_no_a(tms34010_state *tms, UINT16 op); /* ac00-ad00 */ -static void movb_r_no_b(tms34010_state *tms, UINT16 op); /* ac00-ad00 */ -static void movb_no_r_a(tms34010_state *tms, UINT16 op); /* ae00-af00 */ -static void movb_no_r_b(tms34010_state *tms, UINT16 op); /* ae00-af00 */ -static void movb_no_no_a(tms34010_state *tms, UINT16 op); /* bc00-bd00 */ -static void movb_no_no_b(tms34010_state *tms, UINT16 op); /* bc00-bd00 */ -static void movb_ra_a(tms34010_state *tms, UINT16 op); -static void movb_ra_b(tms34010_state *tms, UINT16 op); -static void movb_ar_a(tms34010_state *tms, UINT16 op); -static void movb_ar_b(tms34010_state *tms, UINT16 op); -static void movb_aa(tms34010_state *tms, UINT16 op); -static void move_rr_a(tms34010_state *tms, UINT16 op); /* 4c00/d00 */ -static void move_rr_b(tms34010_state *tms, UINT16 op); /* 4c00/d00 */ -static void move_rr_ax(tms34010_state *tms, UINT16 op); /* 4e00/f00 */ -static void move_rr_bx(tms34010_state *tms, UINT16 op); /* 4e00/f00 */ -static void move0_rn_a(tms34010_state *tms, UINT16 op); /* 8000 */ -static void move0_rn_b(tms34010_state *tms, UINT16 op); -static void move1_rn_a(tms34010_state *tms, UINT16 op); -static void move1_rn_b(tms34010_state *tms, UINT16 op); -static void move0_r_dn_a(tms34010_state *tms, UINT16 op); /* a000 */ -static void move0_r_dn_b(tms34010_state *tms, UINT16 op); -static void move1_r_dn_a(tms34010_state *tms, UINT16 op); -static void move1_r_dn_b(tms34010_state *tms, UINT16 op); -static void move0_r_ni_a(tms34010_state *tms, UINT16 op); /* 9000 */ -static void move0_r_ni_b(tms34010_state *tms, UINT16 op); -static void move1_r_ni_a(tms34010_state *tms, UINT16 op); -static void move1_r_ni_b(tms34010_state *tms, UINT16 op); -static void move0_nr_a(tms34010_state *tms, UINT16 op); /* 8400-500 */ -static void move0_nr_b(tms34010_state *tms, UINT16 op); /* 8400-500 */ -static void move1_nr_a(tms34010_state *tms, UINT16 op); /* 8600-700 */ -static void move1_nr_b(tms34010_state *tms, UINT16 op); /* 8600-700 */ -static void move0_dn_r_a(tms34010_state *tms, UINT16 op); /* A400-500 */ -static void move0_dn_r_b(tms34010_state *tms, UINT16 op); /* A400-500 */ -static void move1_dn_r_a(tms34010_state *tms, UINT16 op); /* A600-700 */ -static void move1_dn_r_b(tms34010_state *tms, UINT16 op); /* A600-700 */ -static void move0_ni_r_a(tms34010_state *tms, UINT16 op); /* 9400-500 */ -static void move0_ni_r_b(tms34010_state *tms, UINT16 op); /* 9400-500 */ -static void move1_ni_r_a(tms34010_state *tms, UINT16 op); /* 9600-700 */ -static void move1_ni_r_b(tms34010_state *tms, UINT16 op); /* 9600-700 */ -static void move0_nn_a(tms34010_state *tms, UINT16 op); /* 8800 */ -static void move0_nn_b(tms34010_state *tms, UINT16 op); -static void move1_nn_a(tms34010_state *tms, UINT16 op); -static void move1_nn_b(tms34010_state *tms, UINT16 op); -static void move0_dn_dn_a(tms34010_state *tms, UINT16 op); /* a800 */ -static void move0_dn_dn_b(tms34010_state *tms, UINT16 op); -static void move1_dn_dn_a(tms34010_state *tms, UINT16 op); -static void move1_dn_dn_b(tms34010_state *tms, UINT16 op); -static void move0_ni_ni_a(tms34010_state *tms, UINT16 op); /* 9800 */ -static void move0_ni_ni_b(tms34010_state *tms, UINT16 op); -static void move1_ni_ni_a(tms34010_state *tms, UINT16 op); -static void move1_ni_ni_b(tms34010_state *tms, UINT16 op); -static void move0_r_no_a(tms34010_state *tms, UINT16 op); /* b000 */ -static void move0_r_no_b(tms34010_state *tms, UINT16 op); -static void move1_r_no_a(tms34010_state *tms, UINT16 op); -static void move1_r_no_b(tms34010_state *tms, UINT16 op); -static void move0_no_r_a(tms34010_state *tms, UINT16 op); /* b400 */ -static void move0_no_r_b(tms34010_state *tms, UINT16 op); -static void move1_no_r_a(tms34010_state *tms, UINT16 op); -static void move1_no_r_b(tms34010_state *tms, UINT16 op); -static void move0_no_ni_a(tms34010_state *tms, UINT16 op); /* d000 */ -static void move0_no_ni_b(tms34010_state *tms, UINT16 op); -static void move1_no_ni_a(tms34010_state *tms, UINT16 op); -static void move1_no_ni_b(tms34010_state *tms, UINT16 op); -static void move0_no_no_a(tms34010_state *tms, UINT16 op); /* b800 */ -static void move0_no_no_b(tms34010_state *tms, UINT16 op); -static void move1_no_no_a(tms34010_state *tms, UINT16 op); -static void move1_no_no_b(tms34010_state *tms, UINT16 op); -static void move0_ra_a(tms34010_state *tms, UINT16 op); -static void move0_ra_b(tms34010_state *tms, UINT16 op); -static void move1_ra_a(tms34010_state *tms, UINT16 op); -static void move1_ra_b(tms34010_state *tms, UINT16 op); -static void move0_ar_a(tms34010_state *tms, UINT16 op); -static void move0_ar_b(tms34010_state *tms, UINT16 op); -static void move1_ar_a(tms34010_state *tms, UINT16 op); -static void move1_ar_b(tms34010_state *tms, UINT16 op); -static void move0_a_ni_a(tms34010_state *tms, UINT16 op); /* d400 */ -static void move0_a_ni_b(tms34010_state *tms, UINT16 op); /* d410 */ -static void move1_a_ni_a(tms34010_state *tms, UINT16 op); /* d600 */ -static void move1_a_ni_b(tms34010_state *tms, UINT16 op); /* d610 */ -static void move0_aa(tms34010_state *tms, UINT16 op); /* 05c0 */ -static void move1_aa(tms34010_state *tms, UINT16 op); /* 07c0 */ - - -/* Program Control and Context Switching */ -static void call_a(tms34010_state *tms, UINT16 op); /* 0920 */ -static void call_b(tms34010_state *tms, UINT16 op); /* 0930 */ -static void callr(tms34010_state *tms, UINT16 op); /* 0d3f */ -static void calla(tms34010_state *tms, UINT16 op); /* 0d5f */ -static void dsj_a(tms34010_state *tms, UINT16 op); /* 0d80 */ -static void dsj_b(tms34010_state *tms, UINT16 op); /* 0d90 */ -static void dsjeq_a(tms34010_state *tms, UINT16 op); /* 0da0 */ -static void dsjeq_b(tms34010_state *tms, UINT16 op); /* 0db0 */ -static void dsjne_a(tms34010_state *tms, UINT16 op); /* 0dc0 */ -static void dsjne_b(tms34010_state *tms, UINT16 op); /* 0dd0 */ -static void dsjs_a(tms34010_state *tms, UINT16 op); -static void dsjs_b(tms34010_state *tms, UINT16 op); -static void emu(tms34010_state *tms, UINT16 op); /* 0100 */ -static void exgpc_a(tms34010_state *tms, UINT16 op); /* 0120 */ -static void exgpc_b(tms34010_state *tms, UINT16 op); /* 0130 */ -static void getpc_a(tms34010_state *tms, UINT16 op); /* 0140 */ -static void getpc_b(tms34010_state *tms, UINT16 op); /* 0150 */ -static void getst_a(tms34010_state *tms, UINT16 op); /* 0180 */ -static void getst_b(tms34010_state *tms, UINT16 op); /* 0190 */ -static void j_UC_0(tms34010_state *tms, UINT16 op); -static void j_UC_8(tms34010_state *tms, UINT16 op); -static void j_UC_x(tms34010_state *tms, UINT16 op); -static void j_P_0(tms34010_state *tms, UINT16 op); -static void j_P_8(tms34010_state *tms, UINT16 op); -static void j_P_x(tms34010_state *tms, UINT16 op); -static void j_LS_0(tms34010_state *tms, UINT16 op); -static void j_LS_8(tms34010_state *tms, UINT16 op); -static void j_LS_x(tms34010_state *tms, UINT16 op); -static void j_HI_0(tms34010_state *tms, UINT16 op); -static void j_HI_8(tms34010_state *tms, UINT16 op); -static void j_HI_x(tms34010_state *tms, UINT16 op); -static void j_LT_0(tms34010_state *tms, UINT16 op); -static void j_LT_8(tms34010_state *tms, UINT16 op); -static void j_LT_x(tms34010_state *tms, UINT16 op); -static void j_GE_0(tms34010_state *tms, UINT16 op); -static void j_GE_8(tms34010_state *tms, UINT16 op); -static void j_GE_x(tms34010_state *tms, UINT16 op); -static void j_LE_0(tms34010_state *tms, UINT16 op); -static void j_LE_8(tms34010_state *tms, UINT16 op); -static void j_LE_x(tms34010_state *tms, UINT16 op); -static void j_GT_0(tms34010_state *tms, UINT16 op); -static void j_GT_8(tms34010_state *tms, UINT16 op); -static void j_GT_x(tms34010_state *tms, UINT16 op); -static void j_C_0(tms34010_state *tms, UINT16 op); -static void j_C_8(tms34010_state *tms, UINT16 op); -static void j_C_x(tms34010_state *tms, UINT16 op); -static void j_NC_0(tms34010_state *tms, UINT16 op); -static void j_NC_8(tms34010_state *tms, UINT16 op); -static void j_NC_x(tms34010_state *tms, UINT16 op); -static void j_EQ_0(tms34010_state *tms, UINT16 op); -static void j_EQ_8(tms34010_state *tms, UINT16 op); -static void j_EQ_x(tms34010_state *tms, UINT16 op); -static void j_NE_0(tms34010_state *tms, UINT16 op); -static void j_NE_8(tms34010_state *tms, UINT16 op); -static void j_NE_x(tms34010_state *tms, UINT16 op); -static void j_V_0(tms34010_state *tms, UINT16 op); -static void j_V_8(tms34010_state *tms, UINT16 op); -static void j_V_x(tms34010_state *tms, UINT16 op); -static void j_NV_0(tms34010_state *tms, UINT16 op); -static void j_NV_8(tms34010_state *tms, UINT16 op); -static void j_NV_x(tms34010_state *tms, UINT16 op); -static void j_N_0(tms34010_state *tms, UINT16 op); -static void j_N_8(tms34010_state *tms, UINT16 op); -static void j_N_x(tms34010_state *tms, UINT16 op); -static void j_NN_0(tms34010_state *tms, UINT16 op); -static void j_NN_8(tms34010_state *tms, UINT16 op); -static void j_NN_x(tms34010_state *tms, UINT16 op); -static void jump_a(tms34010_state *tms, UINT16 op); /* 0160 */ -static void jump_b(tms34010_state *tms, UINT16 op); /* 0170 */ -static void popst(tms34010_state *tms, UINT16 op); /* 01c0 */ -static void pushst(tms34010_state *tms, UINT16 op); /* 01e0 */ -static void putst_a(tms34010_state *tms, UINT16 op); /* 01a0 */ -static void putst_b(tms34010_state *tms, UINT16 op); /* 01b0 */ -static void reti(tms34010_state *tms, UINT16 op); /* 0940 */ -static void rets(tms34010_state *tms, UINT16 op); /* 0960/70 */ -static void rev_a(tms34010_state *tms, UINT16 op); /* 0020 */ -static void rev_b(tms34010_state *tms, UINT16 op); /* 0030 */ -static void trap(tms34010_state *tms, UINT16 op); /* 0900/10 */ - - -/* 34020 instructions */ -static void addxyi_a(tms34010_state *tms, UINT16 op); -static void addxyi_b(tms34010_state *tms, UINT16 op); -static void blmove(tms34010_state *tms, UINT16 op); -static void cexec_l(tms34010_state *tms, UINT16 op); -static void cexec_s(tms34010_state *tms, UINT16 op); -static void clip(tms34010_state *tms, UINT16 op); -static void cmovcg_a(tms34010_state *tms, UINT16 op); -static void cmovcg_b(tms34010_state *tms, UINT16 op); -static void cmovcm_f(tms34010_state *tms, UINT16 op); -static void cmovcm_b(tms34010_state *tms, UINT16 op); -static void cmovgc_a(tms34010_state *tms, UINT16 op); -static void cmovgc_b(tms34010_state *tms, UINT16 op); -static void cmovgc_a_s(tms34010_state *tms, UINT16 op); -static void cmovgc_b_s(tms34010_state *tms, UINT16 op); -static void cmovmc_f(tms34010_state *tms, UINT16 op); -static void cmovmc_f_va(tms34010_state *tms, UINT16 op); -static void cmovmc_f_vb(tms34010_state *tms, UINT16 op); -static void cmovmc_b(tms34010_state *tms, UINT16 op); -static void cmp_k_a(tms34010_state *tms, UINT16 op); -static void cmp_k_b(tms34010_state *tms, UINT16 op); -static void cvdxyl_a(tms34010_state *tms, UINT16 op); -static void cvdxyl_b(tms34010_state *tms, UINT16 op); -static void cvmxyl_a(tms34010_state *tms, UINT16 op); -static void cvmxyl_b(tms34010_state *tms, UINT16 op); -static void cvsxyl_a(tms34010_state *tms, UINT16 op); -static void cvsxyl_b(tms34010_state *tms, UINT16 op); -static void exgps_a(tms34010_state *tms, UINT16 op); -static void exgps_b(tms34010_state *tms, UINT16 op); -static void fline(tms34010_state *tms, UINT16 op); -static void fpixeq(tms34010_state *tms, UINT16 op); -static void fpixne(tms34010_state *tms, UINT16 op); -static void getps_a(tms34010_state *tms, UINT16 op); -static void getps_b(tms34010_state *tms, UINT16 op); -static void idle(tms34010_state *tms, UINT16 op); -static void linit(tms34010_state *tms, UINT16 op); -static void mwait(tms34010_state *tms, UINT16 op); -static void pfill_xy(tms34010_state *tms, UINT16 op); -static void pixblt_l_m_l(tms34010_state *tms, UINT16 op); -static void retm(tms34010_state *tms, UINT16 op); -static void rmo_a(tms34010_state *tms, UINT16 op); -static void rmo_b(tms34010_state *tms, UINT16 op); -static void rpix_a(tms34010_state *tms, UINT16 op); -static void rpix_b(tms34010_state *tms, UINT16 op); -static void setcdp(tms34010_state *tms, UINT16 op); -static void setcmp(tms34010_state *tms, UINT16 op); -static void setcsp(tms34010_state *tms, UINT16 op); -static void swapf_a(tms34010_state *tms, UINT16 op); -static void swapf_b(tms34010_state *tms, UINT16 op); -static void tfill_xy(tms34010_state *tms, UINT16 op); -static void trapl(tms34010_state *tms, UINT16 op); -static void vblt_b_l(tms34010_state *tms, UINT16 op); -static void vfill_l(tms34010_state *tms, UINT16 op); -static void vlcol(tms34010_state *tms, UINT16 op); - - /* Opcode Table */ -static void (*const opcode_table[65536 >> 4])(tms34010_state *tms, UINT16 op) = +const tms340x0_device::opcode_func tms340x0_device::s_opcode_table[65536 >> 4] = { /* 0x0000 0x0010 0x0020 0x0030 ... 0x00f0 */ - unimpl, unimpl, rev_a, rev_b, idle, unimpl, unimpl, unimpl, - mwait, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, blmove, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::rev_a, &tms340x0_device::rev_b, &tms340x0_device::idle, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::mwait, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::blmove, /* 0x0100 */ - emu, unimpl, exgpc_a, exgpc_b, getpc_a, getpc_b, jump_a, jump_b, - getst_a, getst_b, putst_a, putst_b, popst, unimpl, pushst, unimpl, + &tms340x0_device::emu, &tms340x0_device::unimpl, &tms340x0_device::exgpc_a, &tms340x0_device::exgpc_b, &tms340x0_device::getpc_a, &tms340x0_device::getpc_b, &tms340x0_device::jump_a, &tms340x0_device::jump_b, + &tms340x0_device::getst_a, &tms340x0_device::getst_b, &tms340x0_device::putst_a, &tms340x0_device::putst_b, &tms340x0_device::popst, &tms340x0_device::unimpl, &tms340x0_device::pushst, &tms340x0_device::unimpl, /* 0x0200 */ - unimpl, unimpl, unimpl, unimpl, unimpl, setcsp, unimpl, setcdp, - rpix_a, rpix_b, exgps_a, exgps_b, getps_a, getps_b, unimpl, setcmp, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::setcsp, &tms340x0_device::unimpl, &tms340x0_device::setcdp, + &tms340x0_device::rpix_a, &tms340x0_device::rpix_b, &tms340x0_device::exgps_a, &tms340x0_device::exgps_b, &tms340x0_device::getps_a, &tms340x0_device::getps_b, &tms340x0_device::unimpl, &tms340x0_device::setcmp, /* 0x0300 */ - nop, unimpl, clrc, unimpl, movb_aa, unimpl, dint, unimpl, - abs_a, abs_b, neg_a, neg_b, negb_a, negb_b, not_a, not_b, + &tms340x0_device::nop, &tms340x0_device::unimpl, &tms340x0_device::clrc, &tms340x0_device::unimpl, &tms340x0_device::movb_aa, &tms340x0_device::unimpl, &tms340x0_device::dint, &tms340x0_device::unimpl, + &tms340x0_device::abs_a, &tms340x0_device::abs_b, &tms340x0_device::neg_a, &tms340x0_device::neg_b, &tms340x0_device::negb_a, &tms340x0_device::negb_b, &tms340x0_device::not_a, &tms340x0_device::not_b, /* 0x0400 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x0500 */ - sext0_a, sext0_b, zext0_a, zext0_b, setf0, setf0, setf0, setf0, - move0_ra_a, move0_ra_b, move0_ar_a, move0_ar_b, move0_aa, unimpl, movb_ra_a, movb_ra_b, + &tms340x0_device::sext0_a, &tms340x0_device::sext0_b, &tms340x0_device::zext0_a, &tms340x0_device::zext0_b, &tms340x0_device::setf0, &tms340x0_device::setf0, &tms340x0_device::setf0, &tms340x0_device::setf0, + &tms340x0_device::move0_ra_a, &tms340x0_device::move0_ra_b, &tms340x0_device::move0_ar_a, &tms340x0_device::move0_ar_b, &tms340x0_device::move0_aa, &tms340x0_device::unimpl, &tms340x0_device::movb_ra_a, &tms340x0_device::movb_ra_b, /* 0x0600 */ - cexec_l, unimpl, cmovgc_a, cmovgc_b, cmovgc_a_s, cmovgc_b_s, cmovcg_a, cmovcg_b, - cmovmc_f, cmovmc_f, cmovcm_f, cmovcm_f, cmovcm_b, cmovcm_b, cmovmc_f_va,cmovmc_f_vb, + &tms340x0_device::cexec_l, &tms340x0_device::unimpl, &tms340x0_device::cmovgc_a, &tms340x0_device::cmovgc_b, &tms340x0_device::cmovgc_a_s, &tms340x0_device::cmovgc_b_s, &tms340x0_device::cmovcg_a, &tms340x0_device::cmovcg_b, + &tms340x0_device::cmovmc_f, &tms340x0_device::cmovmc_f, &tms340x0_device::cmovcm_f, &tms340x0_device::cmovcm_f, &tms340x0_device::cmovcm_b, &tms340x0_device::cmovcm_b, &tms340x0_device::cmovmc_f_va,&tms340x0_device::cmovmc_f_vb, /* 0x0700 */ - sext1_a, sext1_b, zext1_a, zext1_b, setf1, setf1, setf1, setf1, - move1_ra_a, move1_ra_b, move1_ar_a, move1_ar_b, move1_aa, unimpl, movb_ar_a, movb_ar_b, + &tms340x0_device::sext1_a, &tms340x0_device::sext1_b, &tms340x0_device::zext1_a, &tms340x0_device::zext1_b, &tms340x0_device::setf1, &tms340x0_device::setf1, &tms340x0_device::setf1, &tms340x0_device::setf1, + &tms340x0_device::move1_ra_a, &tms340x0_device::move1_ra_b, &tms340x0_device::move1_ar_a, &tms340x0_device::move1_ar_b, &tms340x0_device::move1_aa, &tms340x0_device::unimpl, &tms340x0_device::movb_ar_a, &tms340x0_device::movb_ar_b, /* 0x0800 */ - trapl, unimpl, cmovmc_b, cmovmc_b, unimpl, vblt_b_l, retm, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, clip, + &tms340x0_device::trapl, &tms340x0_device::unimpl, &tms340x0_device::cmovmc_b, &tms340x0_device::cmovmc_b, &tms340x0_device::unimpl, &tms340x0_device::vblt_b_l, &tms340x0_device::retm, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::clip, /* 0x0900 */ - trap, trap, call_a, call_b, reti, unimpl, rets, rets, - mmtm_a, mmtm_b, mmfm_a, mmfm_b, movi_w_a, movi_w_b, movi_l_a, movi_l_b, + &tms340x0_device::trap, &tms340x0_device::trap, &tms340x0_device::call_a, &tms340x0_device::call_b, &tms340x0_device::reti, &tms340x0_device::unimpl, &tms340x0_device::rets, &tms340x0_device::rets, + &tms340x0_device::mmtm_a, &tms340x0_device::mmtm_b, &tms340x0_device::mmfm_a, &tms340x0_device::mmfm_b, &tms340x0_device::movi_w_a, &tms340x0_device::movi_w_b, &tms340x0_device::movi_l_a, &tms340x0_device::movi_l_b, /* 0x0a00 */ - vlcol, unimpl, unimpl, pfill_xy, unimpl, vfill_l, cvmxyl_a, cvmxyl_b, - cvdxyl_a, cvdxyl_b, unimpl, fpixeq, unimpl, fpixne, unimpl, unimpl, + &tms340x0_device::vlcol, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::pfill_xy, &tms340x0_device::unimpl, &tms340x0_device::vfill_l, &tms340x0_device::cvmxyl_a, &tms340x0_device::cvmxyl_b, + &tms340x0_device::cvdxyl_a, &tms340x0_device::cvdxyl_b, &tms340x0_device::unimpl, &tms340x0_device::fpixeq, &tms340x0_device::unimpl, &tms340x0_device::fpixne, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x0b00 */ - addi_w_a, addi_w_b, addi_l_a, addi_l_b, cmpi_w_a, cmpi_w_b, cmpi_l_a, cmpi_l_b, - andi_a, andi_b, ori_a, ori_b, xori_a, xori_b, subi_w_a, subi_w_b, + &tms340x0_device::addi_w_a, &tms340x0_device::addi_w_b, &tms340x0_device::addi_l_a, &tms340x0_device::addi_l_b, &tms340x0_device::cmpi_w_a, &tms340x0_device::cmpi_w_b, &tms340x0_device::cmpi_l_a, &tms340x0_device::cmpi_l_b, + &tms340x0_device::andi_a, &tms340x0_device::andi_b, &tms340x0_device::ori_a, &tms340x0_device::ori_b, &tms340x0_device::xori_a, &tms340x0_device::xori_b, &tms340x0_device::subi_w_a, &tms340x0_device::subi_w_b, /* 0x0c00 */ - addxyi_a, addxyi_b, unimpl, unimpl, unimpl, linit, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::addxyi_a, &tms340x0_device::addxyi_b, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::linit, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x0d00 */ - subi_l_a, subi_l_b, unimpl, callr, unimpl, calla, eint, unimpl, - dsj_a, dsj_b, dsjeq_a, dsjeq_b, dsjne_a, dsjne_b, setc, unimpl, + &tms340x0_device::subi_l_a, &tms340x0_device::subi_l_b, &tms340x0_device::unimpl, &tms340x0_device::callr, &tms340x0_device::unimpl, &tms340x0_device::calla, &tms340x0_device::eint, &tms340x0_device::unimpl, + &tms340x0_device::dsj_a, &tms340x0_device::dsj_b, &tms340x0_device::dsjeq_a, &tms340x0_device::dsjeq_b, &tms340x0_device::dsjne_a, &tms340x0_device::dsjne_b, &tms340x0_device::setc, &tms340x0_device::unimpl, /* 0x0e00 */ - unimpl, pixblt_l_m_l,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, tfill_xy, + &tms340x0_device::unimpl, &tms340x0_device::pixblt_l_m_l,&tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::tfill_xy, /* 0x0f00 */ - pixblt_l_l, unimpl, pixblt_l_xy,unimpl, pixblt_xy_l,unimpl, pixblt_xy_xy,unimpl, - pixblt_b_l, unimpl, pixblt_b_xy,unimpl, fill_l, unimpl, fill_xy, unimpl, + &tms340x0_device::pixblt_l_l, &tms340x0_device::unimpl, &tms340x0_device::pixblt_l_xy,&tms340x0_device::unimpl, &tms340x0_device::pixblt_xy_l,&tms340x0_device::unimpl, &tms340x0_device::pixblt_xy_xy,&tms340x0_device::unimpl, + &tms340x0_device::pixblt_b_l, &tms340x0_device::unimpl, &tms340x0_device::pixblt_b_xy,&tms340x0_device::unimpl, &tms340x0_device::fill_l, &tms340x0_device::unimpl, &tms340x0_device::fill_xy, &tms340x0_device::unimpl, /* 0x1000 */ - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, /* 0x1100 */ - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, /* 0x1200 */ - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, /* 0x1300 */ - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, - addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, + &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, &tms340x0_device::addk_a, &tms340x0_device::addk_b, /* 0x1400 */ - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, /* 0x1500 */ - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, /* 0x1600 */ - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, /* 0x1700 */ - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, - subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, + &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, &tms340x0_device::subk_a, &tms340x0_device::subk_b, /* 0x1800 */ - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, /* 0x1900 */ - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, /* 0x1a00 */ - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, /* 0x1b00 */ - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, - movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, + &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, &tms340x0_device::movk_a, &tms340x0_device::movk_b, /* 0x1c00 */ - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, /* 0x1d00 */ - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, /* 0x1e00 */ - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, /* 0x1f00 */ - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, - btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, + &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, &tms340x0_device::btst_k_a, &tms340x0_device::btst_k_b, /* 0x2000 */ - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, /* 0x2100 */ - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, /* 0x2200 */ - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, /* 0x2300 */ - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, - sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, + &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, &tms340x0_device::sla_k_a, &tms340x0_device::sla_k_b, /* 0x2400 */ - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, /* 0x2500 */ - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, /* 0x2600 */ - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, /* 0x2700 */ - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, - sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, + &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, &tms340x0_device::sll_k_a, &tms340x0_device::sll_k_b, /* 0x2800 */ - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, /* 0x2900 */ - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, /* 0x2a00 */ - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, /* 0x2b00 */ - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, - sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, + &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, &tms340x0_device::sra_k_a, &tms340x0_device::sra_k_b, /* 0x2c00 */ - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, /* 0x2d00 */ - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, /* 0x2e00 */ - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, /* 0x2f00 */ - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, - srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, + &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, &tms340x0_device::srl_k_a, &tms340x0_device::srl_k_b, /* 0x3000 */ - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, /* 0x3100 */ - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, /* 0x3200 */ - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, /* 0x3300 */ - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, - rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, + &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, &tms340x0_device::rl_k_a, &tms340x0_device::rl_k_b, /* 0x3400 */ - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, /* 0x3500 */ - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, /* 0x3600 */ - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, /* 0x3700 */ - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, - cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, + &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, &tms340x0_device::cmp_k_a, &tms340x0_device::cmp_k_b, /* 0x3800 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x3900 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x3a00 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x3b00 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x3c00 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x3d00 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x3e00 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x3f00 */ - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, - dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, + &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, &tms340x0_device::dsjs_a, &tms340x0_device::dsjs_b, /* 0x4000 */ - add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b, - add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b, + &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, + &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, /* 0x4100 */ - add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b, - add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b, + &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, + &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, &tms340x0_device::add_a, &tms340x0_device::add_b, /* 0x4200 */ - addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, - addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, + &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, + &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, /* 0x4300 */ - addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, - addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, + &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, + &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, &tms340x0_device::addc_a, &tms340x0_device::addc_b, /* 0x4400 */ - sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, - sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, + &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, + &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, /* 0x4500 */ - sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, - sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, + &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, + &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, &tms340x0_device::sub_a, &tms340x0_device::sub_b, /* 0x4600 */ - subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, - subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, + &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, + &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, /* 0x4700 */ - subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, - subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, + &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, + &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, &tms340x0_device::subb_a, &tms340x0_device::subb_b, /* 0x4800 */ - cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, - cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, + &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, + &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, /* 0x4900 */ - cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, - cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, + &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, + &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, &tms340x0_device::cmp_a, &tms340x0_device::cmp_b, /* 0x4a00 */ - btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, - btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, + &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, + &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, /* 0x4b00 */ - btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, - btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, + &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, + &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, &tms340x0_device::btst_r_a, &tms340x0_device::btst_r_b, /* 0x4c00 */ - move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, - move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, + &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, + &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, /* 0x4d00 */ - move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, - move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, + &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, + &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, &tms340x0_device::move_rr_a, &tms340x0_device::move_rr_b, /* 0x4e00 */ - move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, - move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, + &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, + &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, /* 0x4f00 */ - move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, - move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, + &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, + &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, &tms340x0_device::move_rr_ax, &tms340x0_device::move_rr_bx, /* 0x5000 */ - and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b, - and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b, + &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, + &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, /* 0x5100 */ - and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b, - and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b, + &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, + &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, &tms340x0_device::and_a, &tms340x0_device::and_b, /* 0x5200 */ - andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, - andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, + &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, + &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, /* 0x5300 */ - andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, - andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, + &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, + &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, &tms340x0_device::andn_a, &tms340x0_device::andn_b, /* 0x5400 */ - or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b, - or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b, + &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, + &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, /* 0x5500 */ - or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b, - or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b, + &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, + &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, &tms340x0_device::or_a, &tms340x0_device::or_b, /* 0x5600 */ - xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, - xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, + &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, + &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, /* 0x5700 */ - xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, - xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, + &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, + &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, &tms340x0_device::xor_a, &tms340x0_device::xor_b, /* 0x5800 */ - divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, - divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, + &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, + &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, /* 0x5900 */ - divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, - divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, + &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, + &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, &tms340x0_device::divs_a, &tms340x0_device::divs_b, /* 0x5a00 */ - divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, - divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, + &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, + &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, /* 0x5b00 */ - divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, - divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, + &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, + &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, &tms340x0_device::divu_a, &tms340x0_device::divu_b, /* 0x5c00 */ - mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, - mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, + &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, + &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, /* 0x5d00 */ - mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, - mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, + &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, + &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, &tms340x0_device::mpys_a, &tms340x0_device::mpys_b, /* 0x5e00 */ - mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, - mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, + &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, + &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, /* 0x5f00 */ - mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, - mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, + &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, + &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, &tms340x0_device::mpyu_a, &tms340x0_device::mpyu_b, /* 0x6000 */ - sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, - sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, + &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, + &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, /* 0x6100 */ - sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, - sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, + &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, + &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, &tms340x0_device::sla_r_a, &tms340x0_device::sla_r_b, /* 0x6200 */ - sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, - sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, + &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, + &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, /* 0x6300 */ - sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, - sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, + &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, + &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, &tms340x0_device::sll_r_a, &tms340x0_device::sll_r_b, /* 0x6400 */ - sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, - sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, + &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, + &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, /* 0x6500 */ - sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, - sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, + &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, + &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, &tms340x0_device::sra_r_a, &tms340x0_device::sra_r_b, /* 0x6600 */ - srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, - srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, + &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, + &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, /* 0x6700 */ - srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, - srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, + &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, + &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, &tms340x0_device::srl_r_a, &tms340x0_device::srl_r_b, /* 0x6800 */ - rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, - rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, + &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, + &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, /* 0x6900 */ - rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, - rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, + &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, + &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, &tms340x0_device::rl_r_a, &tms340x0_device::rl_r_b, /* 0x6a00 */ - lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, - lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, + &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, + &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, /* 0x6b00 */ - lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, - lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, + &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, + &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, &tms340x0_device::lmo_a, &tms340x0_device::lmo_b, /* 0x6c00 */ - mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, - mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, + &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, + &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, /* 0x6d00 */ - mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, - mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, + &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, + &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, &tms340x0_device::mods_a, &tms340x0_device::mods_b, /* 0x6e00 */ - modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, - modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, + &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, + &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, /* 0x6f00 */ - modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, - modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, + &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, + &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, &tms340x0_device::modu_a, &tms340x0_device::modu_b, /* 0x7000 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7100 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7200 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7300 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7400 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7500 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7600 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7700 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7800 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7900 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7a00 */ - rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, - rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, + &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, + &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, /* 0x7b00 */ - rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, - rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, + &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, + &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, &tms340x0_device::rmo_a, &tms340x0_device::rmo_b, /* 0x7c00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7d00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x7e00 */ - swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, - swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, + &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, + &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, /* 0x7f00 */ - swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, - swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, + &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, + &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, &tms340x0_device::swapf_a, &tms340x0_device::swapf_b, /* 0x8000 */ - move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, - move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, + &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, + &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, /* 0x8100 */ - move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, - move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, + &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, + &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, &tms340x0_device::move0_rn_a, &tms340x0_device::move0_rn_b, /* 0x8200 */ - move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, - move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, + &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, + &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, /* 0x8300 */ - move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, - move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, + &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, + &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, &tms340x0_device::move1_rn_a, &tms340x0_device::move1_rn_b, /* 0x8400 */ - move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, - move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, + &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, + &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, /* 0x8500 */ - move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, - move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, + &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, + &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, &tms340x0_device::move0_nr_a, &tms340x0_device::move0_nr_b, /* 0x8600 */ - move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, - move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, + &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, + &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, /* 0x8700 */ - move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, - move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, + &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, + &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, &tms340x0_device::move1_nr_a, &tms340x0_device::move1_nr_b, /* 0x8800 */ - move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, - move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, + &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, + &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, /* 0x8900 */ - move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, - move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, + &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, + &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, &tms340x0_device::move0_nn_a, &tms340x0_device::move0_nn_b, /* 0x8a00 */ - move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, - move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, + &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, + &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, /* 0x8b00 */ - move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, - move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, + &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, + &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, &tms340x0_device::move1_nn_a, &tms340x0_device::move1_nn_b, /* 0x8c00 */ - movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, - movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, + &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, + &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, /* 0x8d00 */ - movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, - movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, + &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, + &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, &tms340x0_device::movb_rn_a, &tms340x0_device::movb_rn_b, /* 0x8e00 */ - movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, - movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, + &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, + &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, /* 0x8f00 */ - movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, - movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, + &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, + &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, &tms340x0_device::movb_nr_a, &tms340x0_device::movb_nr_b, /* 0x9000 */ - move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, - move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, + &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, + &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, /* 0x9100 */ - move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, - move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, + &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, + &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, &tms340x0_device::move0_r_ni_a, &tms340x0_device::move0_r_ni_b, /* 0x9200 */ - move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, - move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, + &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, + &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, /* 0x9300 */ - move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, - move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, + &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, + &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, &tms340x0_device::move1_r_ni_a, &tms340x0_device::move1_r_ni_b, /* 0x9400 */ - move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, - move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, + &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, + &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, /* 0x9500 */ - move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, - move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, + &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, + &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, &tms340x0_device::move0_ni_r_a, &tms340x0_device::move0_ni_r_b, /* 0x9600 */ - move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, - move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, + &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, + &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, /* 0x9700 */ - move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, - move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, + &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, + &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, &tms340x0_device::move1_ni_r_a, &tms340x0_device::move1_ni_r_b, /* 0x9800 */ - move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, - move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, + &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, + &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, /* 0x9900 */ - move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, - move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, + &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, + &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, &tms340x0_device::move0_ni_ni_a, &tms340x0_device::move0_ni_ni_b, /* 0x9a00 */ - move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, - move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, + &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, + &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, /* 0x9b00 */ - move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, - move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, + &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, + &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, &tms340x0_device::move1_ni_ni_a, &tms340x0_device::move1_ni_ni_b, /* 0x9c00 */ - movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, - movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, + &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, + &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, /* 0x9d00 */ - movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, - movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, + &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, + &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, &tms340x0_device::movb_nn_a, &tms340x0_device::movb_nn_b, /* 0x9e00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0x9f00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xa000 */ - move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, - move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, + &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, + &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, /* 0xa100 */ - move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, - move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, + &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, + &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, &tms340x0_device::move0_r_dn_a, &tms340x0_device::move0_r_dn_b, /* 0xa200 */ - move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, - move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, + &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, + &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, /* 0xa300 */ - move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, - move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, + &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, + &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, &tms340x0_device::move1_r_dn_a, &tms340x0_device::move1_r_dn_b, /* 0xa400 */ - move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, - move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, + &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, + &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, /* 0xa500 */ - move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, - move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, + &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, + &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, &tms340x0_device::move0_dn_r_a, &tms340x0_device::move0_dn_r_b, /* 0xa600 */ - move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, - move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, + &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, + &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, /* 0xa700 */ - move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, - move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, + &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, + &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, &tms340x0_device::move1_dn_r_a, &tms340x0_device::move1_dn_r_b, /* 0xa800 */ - move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, - move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, + &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, + &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, /* 0xa900 */ - move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, - move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, + &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, + &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, &tms340x0_device::move0_dn_dn_a, &tms340x0_device::move0_dn_dn_b, /* 0xaa00 */ - move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, - move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, + &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, + &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, /* 0xab00 */ - move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, - move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, + &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, + &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, &tms340x0_device::move1_dn_dn_a, &tms340x0_device::move1_dn_dn_b, /* 0xac00 */ - movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, - movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, + &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, + &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, /* 0xad00 */ - movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, - movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, + &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, + &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, &tms340x0_device::movb_r_no_a, &tms340x0_device::movb_r_no_b, /* 0xae00 */ - movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, - movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, + &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, + &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, /* 0xaf00 */ - movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, - movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, + &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, + &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, &tms340x0_device::movb_no_r_a, &tms340x0_device::movb_no_r_b, /* 0xb000 */ - move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, - move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, + &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, + &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, /* 0xb100 */ - move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, - move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, + &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, + &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, &tms340x0_device::move0_r_no_a, &tms340x0_device::move0_r_no_b, /* 0xb200 */ - move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, - move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, + &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, + &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, /* 0xb300 */ - move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, - move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, + &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, + &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, &tms340x0_device::move1_r_no_a, &tms340x0_device::move1_r_no_b, /* 0xb400 */ - move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, - move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, + &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, + &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, /* 0xb500 */ - move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, - move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, + &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, + &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, &tms340x0_device::move0_no_r_a, &tms340x0_device::move0_no_r_b, /* 0xb600 */ - move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, - move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, + &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, + &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, /* 0xb700 */ - move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, - move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, + &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, + &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, &tms340x0_device::move1_no_r_a, &tms340x0_device::move1_no_r_b, /* 0xb800 */ - move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, - move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, + &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, + &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, /* 0xb900 */ - move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, - move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, + &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, + &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, &tms340x0_device::move0_no_no_a, &tms340x0_device::move0_no_no_b, /* 0xba00 */ - move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, - move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, + &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, + &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, /* 0xbb00 */ - move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, - move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, + &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, + &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, &tms340x0_device::move1_no_no_a, &tms340x0_device::move1_no_no_b, /* 0xbc00 */ - movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, - movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, + &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, + &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, /* 0xbd00 */ - movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, - movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, + &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, + &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, &tms340x0_device::movb_no_no_a, &tms340x0_device::movb_no_no_b, /* 0xbe00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xbf00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xc000 */ - j_UC_0, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, - j_UC_8, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, + &tms340x0_device::j_UC_0, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, + &tms340x0_device::j_UC_8, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, &tms340x0_device::j_UC_x, /* 0xc100 */ - j_P_0, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, - j_P_8, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, + &tms340x0_device::j_P_0, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, + &tms340x0_device::j_P_8, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, &tms340x0_device::j_P_x, /* 0xc200 */ - j_LS_0, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, - j_LS_8, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, + &tms340x0_device::j_LS_0, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, + &tms340x0_device::j_LS_8, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, &tms340x0_device::j_LS_x, /* 0xc300 */ - j_HI_0, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, - j_HI_8, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, + &tms340x0_device::j_HI_0, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, + &tms340x0_device::j_HI_8, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, &tms340x0_device::j_HI_x, /* 0xc400 */ - j_LT_0, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, - j_LT_8, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, + &tms340x0_device::j_LT_0, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, + &tms340x0_device::j_LT_8, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, &tms340x0_device::j_LT_x, /* 0xc500 */ - j_GE_0, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, - j_GE_8, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, + &tms340x0_device::j_GE_0, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, + &tms340x0_device::j_GE_8, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, &tms340x0_device::j_GE_x, /* 0xc600 */ - j_LE_0, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, - j_LE_8, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, + &tms340x0_device::j_LE_0, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, + &tms340x0_device::j_LE_8, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, &tms340x0_device::j_LE_x, /* 0xc700 */ - j_GT_0, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, - j_GT_8, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, + &tms340x0_device::j_GT_0, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, + &tms340x0_device::j_GT_8, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, &tms340x0_device::j_GT_x, /* 0xc800 */ - j_C_0, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, - j_C_8, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, + &tms340x0_device::j_C_0, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, + &tms340x0_device::j_C_8, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, &tms340x0_device::j_C_x, /* 0xc900 */ - j_NC_0, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, - j_NC_8, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, + &tms340x0_device::j_NC_0, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, + &tms340x0_device::j_NC_8, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, &tms340x0_device::j_NC_x, /* 0xca00 */ - j_EQ_0, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, - j_EQ_8, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, + &tms340x0_device::j_EQ_0, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, + &tms340x0_device::j_EQ_8, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, &tms340x0_device::j_EQ_x, /* 0xcb00 */ - j_NE_0, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, - j_NE_8, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, + &tms340x0_device::j_NE_0, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, + &tms340x0_device::j_NE_8, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, &tms340x0_device::j_NE_x, /* 0xcc00 */ - j_V_0, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, - j_V_8, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, + &tms340x0_device::j_V_0, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, + &tms340x0_device::j_V_8, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, &tms340x0_device::j_V_x, /* 0xcd00 */ - j_NV_0, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, - j_NV_8, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, + &tms340x0_device::j_NV_0, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, + &tms340x0_device::j_NV_8, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, &tms340x0_device::j_NV_x, /* 0xce00 */ - j_N_0, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, - j_N_8, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, + &tms340x0_device::j_N_0, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, + &tms340x0_device::j_N_8, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, &tms340x0_device::j_N_x, /* 0xcf00 */ - j_NN_0, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, - j_NN_8, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, + &tms340x0_device::j_NN_0, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, + &tms340x0_device::j_NN_8, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, &tms340x0_device::j_NN_x, /* 0xd000 */ - move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, - move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, + &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, + &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, /* 0xd100 */ - move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, - move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, + &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, + &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, &tms340x0_device::move0_no_ni_a, &tms340x0_device::move0_no_ni_b, /* 0xd200 */ - move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, - move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, + &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, + &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, /* 0xd300 */ - move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, - move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, + &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, + &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, &tms340x0_device::move1_no_ni_a, &tms340x0_device::move1_no_ni_b, /* 0xd400 */ - move0_a_ni_a,move0_a_ni_b,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::move0_a_ni_a,&tms340x0_device::move0_a_ni_b,&tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xd500 */ - exgf0_a, exgf0_b, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::exgf0_a, &tms340x0_device::exgf0_b, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xd600 */ - move1_a_ni_a,move1_a_ni_b,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::move1_a_ni_a,&tms340x0_device::move1_a_ni_b,&tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xd700 */ - exgf1_a, exgf1_b, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::exgf1_a, &tms340x0_device::exgf1_b, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xd800 */ - cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::cexec_s, &tms340x0_device::cexec_s, &tms340x0_device::cexec_s, &tms340x0_device::cexec_s, &tms340x0_device::cexec_s, &tms340x0_device::cexec_s, &tms340x0_device::cexec_s, &tms340x0_device::cexec_s, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xd900 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xda00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xdb00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xdc00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xdd00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xde00 */ - unimpl, fline, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, fline, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::fline, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::fline, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xdf00 */ - unimpl, line, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, line, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::line, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::line, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xe000 */ - add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, - add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, + &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, + &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, /* 0xe100 */ - add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, - add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, + &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, + &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, &tms340x0_device::add_xy_a, &tms340x0_device::add_xy_b, /* 0xe200 */ - sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, - sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, + &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, + &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, /* 0xe300 */ - sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, - sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, + &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, + &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, &tms340x0_device::sub_xy_a, &tms340x0_device::sub_xy_b, /* 0xe400 */ - cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, - cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, + &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, + &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, /* 0xe500 */ - cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, - cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, + &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, + &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, &tms340x0_device::cmp_xy_a, &tms340x0_device::cmp_xy_b, /* 0xe600 */ - cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, - cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, + &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, + &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, /* 0xe700 */ - cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, - cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, + &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, + &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, &tms340x0_device::cpw_a, &tms340x0_device::cpw_b, /* 0xe800 */ - cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, - cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, + &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, + &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, /* 0xe900 */ - cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, - cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, + &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, + &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, &tms340x0_device::cvxyl_a, &tms340x0_device::cvxyl_b, /* 0xea00 */ - cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, - cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, + &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, + &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, /* 0xeb00 */ - cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, - cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, + &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, + &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, &tms340x0_device::cvsxyl_a, &tms340x0_device::cvsxyl_b, /* 0xec00 */ - movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, - movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, + &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, + &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, /* 0xed00 */ - movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, - movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, + &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, + &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, &tms340x0_device::movx_a, &tms340x0_device::movx_b, /* 0xee00 */ - movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, - movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, + &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, + &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, /* 0xef00 */ - movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, - movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, + &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, + &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, &tms340x0_device::movy_a, &tms340x0_device::movy_b, /* 0xf000 */ - pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, - pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, + &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, + &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, /* 0xf100 */ - pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, - pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, + &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, + &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, &tms340x0_device::pixt_rixy_a, &tms340x0_device::pixt_rixy_b, /* 0xf200 */ - pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, - pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, + &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, + &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, /* 0xf300 */ - pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, - pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, + &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, + &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, &tms340x0_device::pixt_ixyr_a, &tms340x0_device::pixt_ixyr_b, /* 0xf400 */ - pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, - pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, + &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, + &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, /* 0xf500 */ - pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, - pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, + &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, + &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, &tms340x0_device::pixt_ixyixy_a, &tms340x0_device::pixt_ixyixy_b, /* 0xf600 */ - drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, - drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, + &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, + &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, /* 0xf700 */ - drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, - drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, + &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, + &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, &tms340x0_device::drav_a, &tms340x0_device::drav_b, /* 0xf800 */ - pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, - pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, + &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, + &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, /* 0xf900 */ - pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, - pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, + &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, + &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, &tms340x0_device::pixt_ri_a, &tms340x0_device::pixt_ri_b, /* 0xfa00 */ - pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, - pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, + &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, + &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, /* 0xfb00 */ - pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, - pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, + &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, + &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, &tms340x0_device::pixt_ir_a, &tms340x0_device::pixt_ir_b, /* 0xfc00 */ - pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, - pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, + &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, + &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, /* 0xfd00 */ - pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, - pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, + &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, + &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, &tms340x0_device::pixt_ii_a, &tms340x0_device::pixt_ii_b, /* 0xfe00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, /* 0xff00 */ - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, - unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, + &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl, &tms340x0_device::unimpl }; diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c index 7de7394370b..b1f16323757 100644 --- a/src/emu/cpu/tms34010/tms34010.c +++ b/src/emu/cpu/tms34010/tms34010.c @@ -23,75 +23,8 @@ #define LOG(x) do { if (VERBOSE) logerror x; } while (0) - -/*************************************************************************** - CORE STATE -***************************************************************************/ - -/* Size of the memory buffer allocated for the shiftr register */ -#define SHIFTREG_SIZE (8 * 512 * sizeof(UINT16)) - -/* TMS34010 State */ -struct XY -{ -#ifdef LSB_FIRST - INT16 x; - INT16 y; -#else - INT16 y; - INT16 x; -#endif -}; - -struct tms34010_state -{ - UINT32 pc; - UINT32 ppc; - UINT32 st; - void (*pixel_write)(tms34010_state *tms, offs_t offset, UINT32 data); - UINT32 (*pixel_read)(tms34010_state *tms, offs_t offset); - UINT32 (*raster_op)(tms34010_state *tms, UINT32 newpix, UINT32 oldpix); - UINT32 convsp; - UINT32 convdp; - UINT32 convmp; - INT32 gfxcycles; - UINT8 pixelshift; - UINT8 is_34020; - UINT8 reset_deferred; - UINT8 hblank_stable; - UINT8 external_host_access; - UINT8 executing; - device_irq_acknowledge_delegate irq_callback; - legacy_cpu_device *device; - address_space *program; - direct_read_data *direct; - const tms34010_config *config; - screen_device *screen; - emu_timer * scantimer; - int icount; - - /* A registers 0-15 map to regs[0]-regs[15] */ - /* B registers 0-15 map to regs[30]-regs[15] */ - union - { - INT32 reg; - XY xy; - } regs[31]; - - UINT16 IOregs[64]; - UINT16 shiftreg[SHIFTREG_SIZE/2]; -}; - -INLINE tms34010_state *get_safe_token(device_t *device) -{ - assert(device != NULL); - assert(device->type() == TMS34010 || - device->type() == TMS34020); - return (tms34010_state *)downcast(device)->token(); -} - -#include "34010ops.h" - +const device_type TMS34010 = &device_creator; +const device_type TMS34020 = &device_creator; /*************************************************************************** @@ -99,15 +32,35 @@ INLINE tms34010_state *get_safe_token(device_t *device) ***************************************************************************/ /* default configuration */ -static const tms34010_config default_config = +static const tms340x0_config default_config = { 0 }; -static void check_interrupt(tms34010_state *tms); -static TIMER_CALLBACK( scanline_callback ); -static void tms34010_state_postload(tms34010_state *tms); +tms340x0_device::tms340x0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname) + : cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__) + , m_program_config("program", ENDIANNESS_LITTLE, 16, 32, 3) + , m_config(&default_config) +{ +} + + +tms34010_device::tms34010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : tms340x0_device(mconfig, TMS34010, "TMS34010", tag, owner, clock, "tms34010") +{ + m_is_34020 = 0; +} + + +tms34020_device::tms34020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : tms340x0_device(mconfig, TMS34020, "TMS34020", tag, owner, clock, "tms34020") +{ + m_is_34020 = 1; +} + + +#include "34010ops.h" /*************************************************************************** @@ -127,75 +80,75 @@ static void tms34010_state_postload(tms34010_state *tms); #define STBITS_F0 (0x1f << 0) /* register definitions and shortcuts */ -#define N_FLAG(T) ((T)->st & STBIT_N) -#define Z_FLAG(T) ((T)->st & STBIT_Z) -#define C_FLAG(T) ((T)->st & STBIT_C) -#define V_FLAG(T) ((T)->st & STBIT_V) -#define P_FLAG(T) ((T)->st & STBIT_P) -#define IE_FLAG(T) ((T)->st & STBIT_IE) -#define FE0_FLAG(T) ((T)->st & STBIT_FE0) -#define FE1_FLAG(T) ((T)->st & STBIT_FE1) +#define N_FLAG() (m_st & STBIT_N) +#define Z_FLAG() (m_st & STBIT_Z) +#define C_FLAG() (m_st & STBIT_C) +#define V_FLAG() (m_st & STBIT_V) +#define P_FLAG() (m_st & STBIT_P) +#define IE_FLAG() (m_st & STBIT_IE) +#define FE0_FLAG() (m_st & STBIT_FE0) +#define FE1_FLAG() (m_st & STBIT_FE1) /* register file access */ -#define AREG(T,i) ((T)->regs[i].reg) -#define AREG_XY(T,i) ((T)->regs[i].xy) -#define AREG_X(T,i) ((T)->regs[i].xy.x) -#define AREG_Y(T,i) ((T)->regs[i].xy.y) -#define BREG(T,i) ((T)->regs[30 - (i)].reg) -#define BREG_XY(T,i) ((T)->regs[30 - (i)].xy) -#define BREG_X(T,i) ((T)->regs[30 - (i)].xy.x) -#define BREG_Y(T,i) ((T)->regs[30 - (i)].xy.y) -#define SP(T) AREG(T,15) -#define FW(T,i) (((T)->st >> (i ? 6 : 0)) & 0x1f) -#define FWEX(T,i) (((T)->st >> (i ? 6 : 0)) & 0x3f) +#define AREG(i) (m_regs[i].reg) +#define AREG_XY(i) (m_regs[i].xy) +#define AREG_X(i) (m_regs[i].xy.x) +#define AREG_Y(i) (m_regs[i].xy.y) +#define BREG(i) (m_regs[30 - (i)].reg) +#define BREG_XY(i) (m_regs[30 - (i)].xy) +#define BREG_X(i) (m_regs[30 - (i)].xy.x) +#define BREG_Y(i) (m_regs[30 - (i)].xy.y) +#define SP() AREG(15) +#define FW(i) ((m_st >> (i ? 6 : 0)) & 0x1f) +#define FWEX(i) ((m_st >> (i ? 6 : 0)) & 0x3f) /* opcode decode helpers */ #define SRCREG(O) (((O) >> 5) & 0x0f) #define DSTREG(O) ((O) & 0x0f) -#define SKIP_WORD(T) ((T)->pc += (2 << 3)) -#define SKIP_LONG(T) ((T)->pc += (4 << 3)) +#define SKIP_WORD() (m_pc += (2 << 3)) +#define SKIP_LONG() (m_pc += (4 << 3)) #define PARAM_K(O) (((O) >> 5) & 0x1f) #define PARAM_N(O) ((O) & 0x1f) #define PARAM_REL8(O) ((INT8)(O)) /* memory I/O */ -#define WFIELD0(T,a,b) (*tms34010_wfield_functions[FW(T,0)])(T,a,b) -#define WFIELD1(T,a,b) (*tms34010_wfield_functions[FW(T,1)])(T,a,b) -#define RFIELD0(T,a) (*tms34010_rfield_functions[FWEX(T,0)])(T,a) -#define RFIELD1(T,a) (*tms34010_rfield_functions[FWEX(T,1)])(T,a) -#define WPIXEL(T,a,b) (*(T)->pixel_write)(T,a,b) -#define RPIXEL(T,a) (*(T)->pixel_read)(T,a) +#define WFIELD0(a,b) (this->*s_wfield_functions[FW(0)])(a,b) +#define WFIELD1(a,b) (this->*s_wfield_functions[FW(1)])(a,b) +#define RFIELD0(a) (this->*s_rfield_functions[FWEX(0)])(a) +#define RFIELD1(a) (this->*s_rfield_functions[FWEX(1)])(a) +#define WPIXEL(a,b) (this->*m_pixel_write)(a,b) +#define RPIXEL(a) (this->*m_pixel_read)(a) /* Implied Operands */ -#define SADDR(T) BREG(T,0) -#define SADDR_X(T) BREG_X(T,0) -#define SADDR_Y(T) BREG_Y(T,0) -#define SADDR_XY(T) BREG_XY(T,0) -#define SPTCH(T) BREG(T,1) -#define DADDR(T) BREG(T,2) -#define DADDR_X(T) BREG_X(T,2) -#define DADDR_Y(T) BREG_Y(T,2) -#define DADDR_XY(T) BREG_XY(T,2) -#define DPTCH(T) BREG(T,3) -#define OFFSET(T) BREG(T,4) -#define WSTART_X(T) BREG_X(T,5) -#define WSTART_Y(T) BREG_Y(T,5) -#define WEND_X(T) BREG_X(T,6) -#define WEND_Y(T) BREG_Y(T,6) -#define DYDX_X(T) BREG_X(T,7) -#define DYDX_Y(T) BREG_Y(T,7) -#define COLOR0(T) BREG(T,8) -#define COLOR1(T) BREG(T,9) -#define COUNT(T) BREG(T,10) -#define INC1_X(T) BREG_X(T,11) -#define INC1_Y(T) BREG_Y(T,11) -#define INC2_X(T) BREG_X(T,12) -#define INC2_Y(T) BREG_Y(T,12) -#define PATTRN(T) BREG(T,13) -#define TEMP(T) BREG(T,14) +#define SADDR() BREG(0) +#define SADDR_X() BREG_X(0) +#define SADDR_Y() BREG_Y(0) +#define SADDR_XY() BREG_XY(0) +#define SPTCH() BREG(1) +#define DADDR() BREG(2) +#define DADDR_X() BREG_X(2) +#define DADDR_Y() BREG_Y(2) +#define DADDR_XY() BREG_XY(2) +#define DPTCH() BREG(3) +#define OFFSET() BREG(4) +#define WSTART_X() BREG_X(5) +#define WSTART_Y() BREG_Y(5) +#define WEND_X() BREG_X(6) +#define WEND_Y() BREG_Y(6) +#define DYDX_X() BREG_X(7) +#define DYDX_Y() BREG_Y(7) +#define COLOR0() BREG(8) +#define COLOR1() BREG(9) +#define COUNT() BREG(10) +#define INC1_X() BREG_X(11) +#define INC1_Y() BREG_Y(11) +#define INC2_X() BREG_X(12) +#define INC2_Y() BREG_Y(12) +#define PATTRN() BREG(13) +#define TEMP() BREG(14) /* I/O registers */ -#define WINDOW_CHECKING(T) ((IOREG(T, REG_CONTROL) >> 6) & 0x03) +#define WINDOW_CHECKING() ((IOREG(REG_CONTROL) >> 6) & 0x03) @@ -204,89 +157,89 @@ static void tms34010_state_postload(tms34010_state *tms); ***************************************************************************/ /* Break up Status Register into indiviual flags */ -INLINE void SET_ST(tms34010_state *tms, UINT32 st) +inline void tms340x0_device::SET_ST(UINT32 st) { - tms->st = st; + m_st = st; /* interrupts might have been enabled, check it */ - check_interrupt(tms); + check_interrupt(); } /* Intialize Status to 0x0010 */ -INLINE void RESET_ST(tms34010_state *tms) +inline void tms340x0_device::RESET_ST() { - SET_ST(tms, 0x00000010); + SET_ST(0x00000010); } /* shortcuts for reading opcodes */ -INLINE UINT32 ROPCODE(tms34010_state *tms) +inline UINT32 tms340x0_device::ROPCODE() { - UINT32 pc = TOBYTE(tms->pc); - tms->pc += 2 << 3; - return tms->direct->read_decrypted_word(pc); + UINT32 pc = TOBYTE(m_pc); + m_pc += 2 << 3; + return m_direct->read_decrypted_word(pc); } -INLINE INT16 PARAM_WORD(tms34010_state *tms) +inline INT16 tms340x0_device::PARAM_WORD() { - UINT32 pc = TOBYTE(tms->pc); - tms->pc += 2 << 3; - return tms->direct->read_raw_word(pc); + UINT32 pc = TOBYTE(m_pc); + m_pc += 2 << 3; + return m_direct->read_raw_word(pc); } -INLINE INT32 PARAM_LONG(tms34010_state *tms) +inline INT32 tms340x0_device::PARAM_LONG() { - UINT32 pc = TOBYTE(tms->pc); - tms->pc += 4 << 3; - return (UINT16)tms->direct->read_raw_word(pc) | (tms->direct->read_raw_word(pc + 2) << 16); + UINT32 pc = TOBYTE(m_pc); + m_pc += 4 << 3; + return (UINT16)m_direct->read_raw_word(pc) | (m_direct->read_raw_word(pc + 2) << 16); } -INLINE INT16 PARAM_WORD_NO_INC(tms34010_state *tms) +inline INT16 tms340x0_device::PARAM_WORD_NO_INC() { - return tms->direct->read_raw_word(TOBYTE(tms->pc)); + return m_direct->read_raw_word(TOBYTE(m_pc)); } -INLINE INT32 PARAM_LONG_NO_INC(tms34010_state *tms) +inline INT32 tms340x0_device::PARAM_LONG_NO_INC() { - UINT32 pc = TOBYTE(tms->pc); - return (UINT16)tms->direct->read_raw_word(pc) | (tms->direct->read_raw_word(pc + 2) << 16); + UINT32 pc = TOBYTE(m_pc); + return (UINT16)m_direct->read_raw_word(pc) | (m_direct->read_raw_word(pc + 2) << 16); } /* read memory byte */ -INLINE UINT32 RBYTE(tms34010_state *tms, offs_t offset) +inline UINT32 tms340x0_device::RBYTE(offs_t offset) { UINT32 ret; - RFIELDMAC_8(tms); + RFIELDMAC_8(); return ret; } /* write memory byte */ -INLINE void WBYTE(tms34010_state *tms, offs_t offset, UINT32 data) +inline void tms340x0_device::WBYTE(offs_t offset, UINT32 data) { - WFIELDMAC_8(tms); + WFIELDMAC_8(); } /* read memory long */ -INLINE UINT32 RLONG(tms34010_state *tms, offs_t offset) +inline UINT32 tms340x0_device::RLONG(offs_t offset) { - RFIELDMAC_32(tms); + RFIELDMAC_32(); } /* write memory long */ -INLINE void WLONG(tms34010_state *tms, offs_t offset, UINT32 data) +inline void tms340x0_device::WLONG(offs_t offset, UINT32 data) { - WFIELDMAC_32(tms); + WFIELDMAC_32(); } /* pushes/pops a value from the stack */ -INLINE void PUSH(tms34010_state *tms, UINT32 data) +inline void tms340x0_device::PUSH(UINT32 data) { - SP(tms) -= 0x20; - WLONG(tms, SP(tms), data); + SP() -= 0x20; + WLONG(SP(), data); } -INLINE INT32 POP(tms34010_state *tms) +inline INT32 tms340x0_device::POP() { - INT32 ret = RLONG(tms, SP(tms)); - SP(tms) += 0x20; + INT32 ret = RLONG(SP()); + SP() += 0x20; return ret; } @@ -296,33 +249,33 @@ INLINE INT32 POP(tms34010_state *tms) PIXEL READS ***************************************************************************/ -#define RP(T,m1,m2) \ +#define RP(m1,m2) \ /* TODO: Plane masking */ \ - return (TMS34010_RDMEM_WORD(T, TOBYTE(offset & 0xfffffff0)) >> (offset & m1)) & m2; + return (TMS34010_RDMEM_WORD(TOBYTE(offset & 0xfffffff0)) >> (offset & m1)) & m2; -static UINT32 read_pixel_1(tms34010_state *tms, offs_t offset) { RP(tms,0x0f,0x01) } -static UINT32 read_pixel_2(tms34010_state *tms, offs_t offset) { RP(tms,0x0e,0x03) } -static UINT32 read_pixel_4(tms34010_state *tms, offs_t offset) { RP(tms,0x0c,0x0f) } -static UINT32 read_pixel_8(tms34010_state *tms, offs_t offset) { RP(tms,0x08,0xff) } -static UINT32 read_pixel_16(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::read_pixel_1(offs_t offset) { RP(0x0f,0x01) } +UINT32 tms340x0_device::read_pixel_2(offs_t offset) { RP(0x0e,0x03) } +UINT32 tms340x0_device::read_pixel_4(offs_t offset) { RP(0x0c,0x0f) } +UINT32 tms340x0_device::read_pixel_8(offs_t offset) { RP(0x08,0xff) } +UINT32 tms340x0_device::read_pixel_16(offs_t offset) { /* TODO: Plane masking */ - return TMS34010_RDMEM_WORD(tms, TOBYTE(offset & 0xfffffff0)); + return TMS34010_RDMEM_WORD(TOBYTE(offset & 0xfffffff0)); } -static UINT32 read_pixel_32(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::read_pixel_32(offs_t offset) { /* TODO: Plane masking */ - return TMS34010_RDMEM_DWORD(tms, TOBYTE(offset & 0xffffffe0)); + return TMS34010_RDMEM_DWORD(TOBYTE(offset & 0xffffffe0)); } /* Shift register read */ -static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset) +UINT32 tms340x0_device::read_pixel_shiftreg(offs_t offset) { - if (tms->config->to_shiftreg) - tms->config->to_shiftreg(*tms->program, offset, &tms->shiftreg[0]); + if (m_config->to_shiftreg) + m_config->to_shiftreg(*m_program, offset, &m_shiftreg[0]); else - fatalerror("To ShiftReg function not set. PC = %08X\n", tms->pc); - return tms->shiftreg[0]; + fatalerror("To ShiftReg function not set. PC = %08X\n", m_pc); + return m_shiftreg[0]; } @@ -332,136 +285,138 @@ static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset) ***************************************************************************/ /* No Raster Op + No Transparency */ -#define WP(T,m1,m2) \ +#define WP(m1,m2) \ UINT32 a = TOBYTE(offset & 0xfffffff0); \ - UINT32 pix = TMS34010_RDMEM_WORD(T,a); \ + UINT32 pix = TMS34010_RDMEM_WORD(a); \ UINT32 shiftcount = offset & m1; \ \ /* TODO: plane masking */ \ data &= m2; \ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \ - TMS34010_WRMEM_WORD(T, a, pix); + TMS34010_WRMEM_WORD(a, pix); + /* No Raster Op + Transparency */ -#define WP_T(T,m1,m2) \ +#define WP_T(m1,m2) \ /* TODO: plane masking */ \ data &= m2; \ if (data) \ { \ UINT32 a = TOBYTE(offset & 0xfffffff0); \ - UINT32 pix = TMS34010_RDMEM_WORD(T,a); \ + UINT32 pix = TMS34010_RDMEM_WORD(a); \ UINT32 shiftcount = offset & m1; \ \ /* TODO: plane masking */ \ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \ - TMS34010_WRMEM_WORD(T, a, pix); \ + TMS34010_WRMEM_WORD(a, pix); \ } /* Raster Op + No Transparency */ -#define WP_R(T,m1,m2) \ +#define WP_R(m1,m2) \ UINT32 a = TOBYTE(offset & 0xfffffff0); \ - UINT32 pix = TMS34010_RDMEM_WORD(T,a); \ + UINT32 pix = TMS34010_RDMEM_WORD(a); \ UINT32 shiftcount = offset & m1; \ \ /* TODO: plane masking */ \ - data = (*(T)->raster_op)(tms, data & m2, (pix >> shiftcount) & m2) & m2; \ + data = (this->*m_raster_op)(data & m2, (pix >> shiftcount) & m2) & m2; \ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \ - TMS34010_WRMEM_WORD(T, a, pix); + TMS34010_WRMEM_WORD(a, pix); + /* Raster Op + Transparency */ -#define WP_R_T(T,m1,m2) \ +#define WP_R_T(m1,m2) \ UINT32 a = TOBYTE(offset & 0xfffffff0); \ - UINT32 pix = TMS34010_RDMEM_WORD(T,a); \ + UINT32 pix = TMS34010_RDMEM_WORD(a); \ UINT32 shiftcount = offset & m1; \ \ /* TODO: plane masking */ \ - data = (*(T)->raster_op)(tms, data & m2, (pix >> shiftcount) & m2) & m2; \ + data = (this->*m_raster_op)(data & m2, (pix >> shiftcount) & m2) & m2; \ if (data) \ { \ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \ - TMS34010_WRMEM_WORD(T, a, pix); \ + TMS34010_WRMEM_WORD(a, pix); \ } /* No Raster Op + No Transparency */ -static void write_pixel_1(tms34010_state *tms, offs_t offset, UINT32 data) { WP(tms, 0x0f, 0x01); } -static void write_pixel_2(tms34010_state *tms, offs_t offset, UINT32 data) { WP(tms, 0x0e, 0x03); } -static void write_pixel_4(tms34010_state *tms, offs_t offset, UINT32 data) { WP(tms, 0x0c, 0x0f); } -static void write_pixel_8(tms34010_state *tms, offs_t offset, UINT32 data) { WP(tms, 0x08, 0xff); } -static void write_pixel_16(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_1(offs_t offset, UINT32 data) { WP(0x0f, 0x01); } +void tms340x0_device::write_pixel_2(offs_t offset, UINT32 data) { WP(0x0e, 0x03); } +void tms340x0_device::write_pixel_4(offs_t offset, UINT32 data) { WP(0x0c, 0x0f); } +void tms340x0_device::write_pixel_8(offs_t offset, UINT32 data) { WP(0x08, 0xff); } +void tms340x0_device::write_pixel_16(offs_t offset, UINT32 data) { /* TODO: plane masking */ - TMS34010_WRMEM_WORD(tms, TOBYTE(offset & 0xfffffff0), data); + TMS34010_WRMEM_WORD(TOBYTE(offset & 0xfffffff0), data); } -static void write_pixel_32(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_32(offs_t offset, UINT32 data) { /* TODO: plane masking */ - TMS34010_WRMEM_WORD(tms, TOBYTE(offset & 0xffffffe0), data); + TMS34010_WRMEM_WORD(TOBYTE(offset & 0xffffffe0), data); } /* No Raster Op + Transparency */ -static void write_pixel_t_1(tms34010_state *tms, offs_t offset, UINT32 data) { WP_T(tms, 0x0f, 0x01); } -static void write_pixel_t_2(tms34010_state *tms, offs_t offset, UINT32 data) { WP_T(tms, 0x0e, 0x03); } -static void write_pixel_t_4(tms34010_state *tms, offs_t offset, UINT32 data) { WP_T(tms, 0x0c, 0x0f); } -static void write_pixel_t_8(tms34010_state *tms, offs_t offset, UINT32 data) { WP_T(tms, 0x08, 0xff); } -static void write_pixel_t_16(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_t_1(offs_t offset, UINT32 data) { WP_T(0x0f, 0x01); } +void tms340x0_device::write_pixel_t_2(offs_t offset, UINT32 data) { WP_T(0x0e, 0x03); } +void tms340x0_device::write_pixel_t_4(offs_t offset, UINT32 data) { WP_T(0x0c, 0x0f); } +void tms340x0_device::write_pixel_t_8(offs_t offset, UINT32 data) { WP_T(0x08, 0xff); } +void tms340x0_device::write_pixel_t_16(offs_t offset, UINT32 data) { /* TODO: plane masking */ if (data) - TMS34010_WRMEM_WORD(tms, TOBYTE(offset & 0xfffffff0), data); + TMS34010_WRMEM_WORD(TOBYTE(offset & 0xfffffff0), data); } -static void write_pixel_t_32(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_t_32(offs_t offset, UINT32 data) { /* TODO: plane masking */ if (data) - TMS34010_WRMEM_DWORD(tms, TOBYTE(offset & 0xffffffe0), data); + TMS34010_WRMEM_DWORD(TOBYTE(offset & 0xffffffe0), data); } /* Raster Op + No Transparency */ -static void write_pixel_r_1(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R(tms, 0x0f, 0x01); } -static void write_pixel_r_2(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R(tms, 0x0e, 0x03); } -static void write_pixel_r_4(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R(tms, 0x0c, 0x0f); } -static void write_pixel_r_8(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R(tms, 0x08, 0xff); } -static void write_pixel_r_16(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_r_1(offs_t offset, UINT32 data) { WP_R(0x0f, 0x01); } +void tms340x0_device::write_pixel_r_2(offs_t offset, UINT32 data) { WP_R(0x0e, 0x03); } +void tms340x0_device::write_pixel_r_4(offs_t offset, UINT32 data) { WP_R(0x0c, 0x0f); } +void tms340x0_device::write_pixel_r_8(offs_t offset, UINT32 data) { WP_R(0x08, 0xff); } +void tms340x0_device::write_pixel_r_16(offs_t offset, UINT32 data) { /* TODO: plane masking */ UINT32 a = TOBYTE(offset & 0xfffffff0); - TMS34010_WRMEM_WORD(tms, a, (*tms->raster_op)(tms, data, TMS34010_RDMEM_WORD(tms, a))); + TMS34010_WRMEM_WORD(a, (this->*m_raster_op)(data, TMS34010_RDMEM_WORD(a))); } -static void write_pixel_r_32(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_r_32(offs_t offset, UINT32 data) { /* TODO: plane masking */ UINT32 a = TOBYTE(offset & 0xffffffe0); - TMS34010_WRMEM_DWORD(tms, a, (*tms->raster_op)(tms, data, TMS34010_RDMEM_DWORD(tms, a))); + TMS34010_WRMEM_DWORD(a, (this->*m_raster_op)(data, TMS34010_RDMEM_DWORD(a))); } /* Raster Op + Transparency */ -static void write_pixel_r_t_1(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R_T(tms, 0x0f,0x01); } -static void write_pixel_r_t_2(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R_T(tms, 0x0e,0x03); } -static void write_pixel_r_t_4(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R_T(tms, 0x0c,0x0f); } -static void write_pixel_r_t_8(tms34010_state *tms, offs_t offset, UINT32 data) { WP_R_T(tms, 0x08,0xff); } -static void write_pixel_r_t_16(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_r_t_1(offs_t offset, UINT32 data) { WP_R_T(0x0f,0x01); } +void tms340x0_device::write_pixel_r_t_2(offs_t offset, UINT32 data) { WP_R_T(0x0e,0x03); } +void tms340x0_device::write_pixel_r_t_4(offs_t offset, UINT32 data) { WP_R_T(0x0c,0x0f); } +void tms340x0_device::write_pixel_r_t_8(offs_t offset, UINT32 data) { WP_R_T(0x08,0xff); } +void tms340x0_device::write_pixel_r_t_16(offs_t offset, UINT32 data) { /* TODO: plane masking */ UINT32 a = TOBYTE(offset & 0xfffffff0); - data = (*tms->raster_op)(tms, data, TMS34010_RDMEM_WORD(tms, a)); + data = (this->*m_raster_op)(data, TMS34010_RDMEM_WORD(a)); if (data) - TMS34010_WRMEM_WORD(tms, a, data); + TMS34010_WRMEM_WORD(a, data); } -static void write_pixel_r_t_32(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_r_t_32(offs_t offset, UINT32 data) { /* TODO: plane masking */ UINT32 a = TOBYTE(offset & 0xffffffe0); - data = (*tms->raster_op)(tms, data, TMS34010_RDMEM_DWORD(tms, a)); + data = (this->*m_raster_op)(data, TMS34010_RDMEM_DWORD(a)); if (data) - TMS34010_WRMEM_DWORD(tms, a, data); + TMS34010_WRMEM_DWORD(a, data); } /* Shift register write */ -static void write_pixel_shiftreg(tms34010_state *tms, offs_t offset, UINT32 data) +void tms340x0_device::write_pixel_shiftreg(offs_t offset, UINT32 data) { - if (tms->config->from_shiftreg) - tms->config->from_shiftreg(*tms->program, offset, &tms->shiftreg[0]); + if (m_config->from_shiftreg) + m_config->from_shiftreg(*m_program, offset, &m_shiftreg[0]); else - fatalerror("From ShiftReg function not set. PC = %08X\n", tms->pc); + fatalerror("From ShiftReg function not set. PC = %08X\n", m_pc); } @@ -471,32 +426,32 @@ static void write_pixel_shiftreg(tms34010_state *tms, offs_t offset, UINT32 data ***************************************************************************/ /* Raster operations */ -static UINT32 raster_op_1(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return newpix & oldpix; } -static UINT32 raster_op_2(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return newpix & ~oldpix; } -static UINT32 raster_op_3(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return 0; } -static UINT32 raster_op_4(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return newpix | ~oldpix; } -static UINT32 raster_op_5(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return ~(newpix ^ oldpix); } -static UINT32 raster_op_6(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return ~oldpix; } -static UINT32 raster_op_7(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return ~(newpix | oldpix); } -static UINT32 raster_op_8(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return newpix | oldpix; } -static UINT32 raster_op_9(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return oldpix; } -static UINT32 raster_op_10(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return newpix ^ oldpix; } -static UINT32 raster_op_11(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return ~newpix & oldpix; } -static UINT32 raster_op_12(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return 0xffff; } -static UINT32 raster_op_13(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return ~newpix | oldpix; } -static UINT32 raster_op_14(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return ~(newpix & oldpix); } -static UINT32 raster_op_15(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return ~newpix; } -static UINT32 raster_op_16(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return newpix + oldpix; } -static UINT32 raster_op_17(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) +UINT32 tms340x0_device::raster_op_1(UINT32 newpix, UINT32 oldpix) { return newpix & oldpix; } +UINT32 tms340x0_device::raster_op_2(UINT32 newpix, UINT32 oldpix) { return newpix & ~oldpix; } +UINT32 tms340x0_device::raster_op_3(UINT32 newpix, UINT32 oldpix) { return 0; } +UINT32 tms340x0_device::raster_op_4(UINT32 newpix, UINT32 oldpix) { return newpix | ~oldpix; } +UINT32 tms340x0_device::raster_op_5(UINT32 newpix, UINT32 oldpix) { return ~(newpix ^ oldpix); } +UINT32 tms340x0_device::raster_op_6(UINT32 newpix, UINT32 oldpix) { return ~oldpix; } +UINT32 tms340x0_device::raster_op_7(UINT32 newpix, UINT32 oldpix) { return ~(newpix | oldpix); } +UINT32 tms340x0_device::raster_op_8(UINT32 newpix, UINT32 oldpix) { return newpix | oldpix; } +UINT32 tms340x0_device::raster_op_9(UINT32 newpix, UINT32 oldpix) { return oldpix; } +UINT32 tms340x0_device::raster_op_10(UINT32 newpix, UINT32 oldpix) { return newpix ^ oldpix; } +UINT32 tms340x0_device::raster_op_11(UINT32 newpix, UINT32 oldpix) { return ~newpix & oldpix; } +UINT32 tms340x0_device::raster_op_12(UINT32 newpix, UINT32 oldpix) { return 0xffff; } +UINT32 tms340x0_device::raster_op_13(UINT32 newpix, UINT32 oldpix) { return ~newpix | oldpix; } +UINT32 tms340x0_device::raster_op_14(UINT32 newpix, UINT32 oldpix) { return ~(newpix & oldpix); } +UINT32 tms340x0_device::raster_op_15(UINT32 newpix, UINT32 oldpix) { return ~newpix; } +UINT32 tms340x0_device::raster_op_16(UINT32 newpix, UINT32 oldpix) { return newpix + oldpix; } +UINT32 tms340x0_device::raster_op_17(UINT32 newpix, UINT32 oldpix) { - UINT32 max = (UINT32)0xffffffff >> (32 - IOREG(tms, REG_PSIZE)); + UINT32 max = (UINT32)0xffffffff >> (32 - IOREG(REG_PSIZE)); UINT32 res = newpix + oldpix; return (res > max) ? max : res; } -static UINT32 raster_op_18(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return oldpix - newpix; } -static UINT32 raster_op_19(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? oldpix - newpix : 0; } -static UINT32 raster_op_20(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? oldpix : newpix; } -static UINT32 raster_op_21(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? newpix : oldpix; } +UINT32 tms340x0_device::raster_op_18(UINT32 newpix, UINT32 oldpix) { return oldpix - newpix; } +UINT32 tms340x0_device::raster_op_19(UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? oldpix - newpix : 0; } +UINT32 tms340x0_device::raster_op_20(UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? oldpix : newpix; } +UINT32 tms340x0_device::raster_op_21(UINT32 newpix, UINT32 oldpix) { return (oldpix > newpix) ? newpix : oldpix; } @@ -520,68 +475,68 @@ static UINT32 raster_op_21(tms34010_state *tms, UINT32 newpix, UINT32 oldpix) { ****************************************************************************/ /* Generate pending interrupts. */ -static void check_interrupt(tms34010_state *tms) +void tms340x0_device::check_interrupt() { int vector = 0; int irqline = -1; int irq; /* if we're not actively executing, skip it */ - if (!tms->executing) + if (!m_executing) return; /* check for NMI first */ - if (IOREG(tms, REG_HSTCTLH) & 0x0100) + if (IOREG(REG_HSTCTLH) & 0x0100) { - LOG(("TMS34010 '%s' takes NMI\n", tms->device->tag())); + LOG(("TMS34010 '%s' takes NMI\n", tag())); /* ack the NMI */ - IOREG(tms, REG_HSTCTLH) &= ~0x0100; + IOREG(REG_HSTCTLH) &= ~0x0100; /* handle NMI mode bit */ - if (!(IOREG(tms, REG_HSTCTLH) & 0x0200)) + if (!(IOREG(REG_HSTCTLH) & 0x0200)) { - PUSH(tms, tms->pc); - PUSH(tms, tms->st); + PUSH(m_pc); + PUSH(m_st); } /* leap to the vector */ - RESET_ST(tms); - tms->pc = RLONG(tms, 0xfffffee0); - COUNT_CYCLES(tms,16); + RESET_ST(); + m_pc = RLONG(0xfffffee0); + COUNT_CYCLES(16); return; } /* early out if everything else is disabled */ - irq = IOREG(tms, REG_INTPEND) & IOREG(tms, REG_INTENB); - if (!IE_FLAG(tms) || !irq) + irq = IOREG(REG_INTPEND) & IOREG(REG_INTENB); + if (!IE_FLAG() || !irq) return; /* host interrupt */ if (irq & TMS34010_HI) { - LOG(("TMS34010 '%s' takes HI\n", tms->device->tag())); + LOG(("TMS34010 '%s' takes HI\n", tag())); vector = 0xfffffec0; } /* display interrupt */ else if (irq & TMS34010_DI) { - LOG(("TMS34010 '%s' takes DI\n", tms->device->tag())); + LOG(("TMS34010 '%s' takes DI\n", tag())); vector = 0xfffffea0; } /* window violation interrupt */ else if (irq & TMS34010_WV) { - LOG(("TMS34010 '%s' takes WV\n", tms->device->tag())); + LOG(("TMS34010 '%s' takes WV\n", tag())); vector = 0xfffffe80; } /* external 1 interrupt */ else if (irq & TMS34010_INT1) { - LOG(("TMS34010 '%s' takes INT1\n", tms->device->tag())); + LOG(("TMS34010 '%s' takes INT1\n", tag())); vector = 0xffffffc0; irqline = 0; } @@ -589,7 +544,7 @@ static void check_interrupt(tms34010_state *tms) /* external 2 interrupt */ else if (irq & TMS34010_INT2) { - LOG(("TMS34010 '%s' takes INT2\n", tms->device->tag())); + LOG(("TMS34010 '%s' takes INT2\n", tag())); vector = 0xffffffa0; irqline = 1; } @@ -597,15 +552,15 @@ static void check_interrupt(tms34010_state *tms) /* if we took something, generate it */ if (vector) { - PUSH(tms, tms->pc); - PUSH(tms, tms->st); - RESET_ST(tms); - tms->pc = RLONG(tms, vector); - COUNT_CYCLES(tms,16); + PUSH(m_pc); + PUSH(m_st); + RESET_ST(); + m_pc = RLONG(vector); + COUNT_CYCLES(16); /* call the callback for externals */ if (irqline >= 0) - (void)(tms->irq_callback)(*tms->device, irqline); + standard_irq_callback(irqline); } } @@ -615,130 +570,113 @@ static void check_interrupt(tms34010_state *tms) Reset the CPU emulation ***************************************************************************/ -static CPU_INIT( tms34010 ) +void tms340x0_device::device_start() { - const tms34010_config *configdata = device->static_config() ? (const tms34010_config *)device->static_config() : &default_config; - tms34010_state *tms = get_safe_token(device); + m_external_host_access = FALSE; - tms->external_host_access = FALSE; - - tms->config = configdata; - tms->irq_callback = irqcallback; - tms->device = device; - tms->program = &device->space(AS_PROGRAM); - tms->direct = &tms->program->direct(); - tms->screen = downcast(device->machine().device(configdata->screen_tag)); + m_program = &space(AS_PROGRAM); + m_direct = &m_program->direct(); + m_screen = downcast(machine().device(m_config->screen_tag)); /* set up the state table */ { - device_state_interface *state; - device->interface(state); - state->state_add(TMS34010_PC, "PC", tms->pc); - state->state_add(STATE_GENPC, "GENPC", tms->pc).noshow(); - state->state_add(STATE_GENPCBASE, "GENPCBASE", tms->ppc).noshow(); - state->state_add(TMS34010_SP, "SP", tms->regs[15].reg); - state->state_add(STATE_GENSP, "GENSP", tms->regs[15].reg).noshow(); - state->state_add(TMS34010_ST, "ST", tms->st); - state->state_add(STATE_GENFLAGS, "GENFLAGS", tms->st).noshow().formatstr("%18s"); + state_add(TMS34010_PC, "PC", m_pc); + state_add(STATE_GENPC, "GENPC", m_pc).noshow(); + state_add(STATE_GENPCBASE, "GENPCBASE", m_ppc).noshow(); + state_add(TMS34010_SP, "SP", m_regs[15].reg); + state_add(STATE_GENSP, "GENSP", m_regs[15].reg).noshow(); + state_add(TMS34010_ST, "ST", m_st); + state_add(STATE_GENFLAGS, "GENFLAGS", m_st).noshow().formatstr("%18s"); astring tempstr; for (int regnum = 0; regnum < 15; regnum++) - state->state_add(TMS34010_A0 + regnum, tempstr.format("A%d", regnum), tms->regs[regnum].reg); + { + state_add(TMS34010_A0 + regnum, tempstr.format("A%d", regnum), m_regs[regnum].reg); + } for (int regnum = 0; regnum < 15; regnum++) - state->state_add(TMS34010_B0 + regnum, tempstr.format("B%d", regnum), tms->regs[30 - regnum].reg); + { + state_add(TMS34010_B0 + regnum, tempstr.format("B%d", regnum), m_regs[30 - regnum].reg); + } } /* allocate a scanline timer and set it to go off at the start */ - tms->scantimer = device->machine().scheduler().timer_alloc(FUNC(scanline_callback), tms); - tms->scantimer->adjust(attotime::zero); + m_scantimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(tms340x0_device::scanline_callback), this)); + m_scantimer->adjust(attotime::zero); - device->save_item(NAME(tms->pc)); - device->save_item(NAME(tms->st)); - device->save_item(NAME(tms->reset_deferred)); - device->save_item(NAME(tms->shiftreg)); - device->save_item(NAME(tms->IOregs)); - device->save_item(NAME(tms->convsp)); - device->save_item(NAME(tms->convdp)); - device->save_item(NAME(tms->convmp)); - device->save_item(NAME(tms->pixelshift)); - device->save_item(NAME(tms->gfxcycles)); - device->save_pointer(NAME(&tms->regs[0].reg), ARRAY_LENGTH(tms->regs)); - device->machine().save().register_postload(save_prepost_delegate(FUNC(tms34010_state_postload), tms)); + save_item(NAME(m_pc)); + save_item(NAME(m_st)); + save_item(NAME(m_reset_deferred)); + save_item(NAME(m_shiftreg)); + save_item(NAME(m_IOregs)); + save_item(NAME(m_convsp)); + save_item(NAME(m_convdp)); + save_item(NAME(m_convmp)); + save_item(NAME(m_pixelshift)); + save_item(NAME(m_gfxcycles)); + save_pointer(NAME(&m_regs[0].reg), ARRAY_LENGTH(m_regs)); + machine().save().register_postload(save_prepost_delegate(FUNC(tms340x0_device::tms34010_state_postload), this)); + + m_icountptr = &m_icount; } -static CPU_RESET( tms34010 ) +void tms340x0_device::device_reset() { - /* zap the state and copy in the config pointer */ - tms34010_state *tms = get_safe_token(device); - const tms34010_config *config = tms->config; - screen_device *screen = tms->screen; - device_irq_acknowledge_delegate save_irqcallback = tms->irq_callback; - emu_timer *save_scantimer = tms->scantimer; - - memset(tms, 0, sizeof(*tms)); - - tms->config = config; - tms->screen = screen; - tms->irq_callback = save_irqcallback; - tms->scantimer = save_scantimer; - tms->device = device; - tms->program = &device->space(AS_PROGRAM); - tms->direct = &tms->program->direct(); + m_ppc = 0; + m_st = 0; + m_pixel_write = NULL; + m_pixel_read = NULL; + m_raster_op = NULL; + m_pixel_op = NULL; + m_pixel_op_timing = 0; + m_convsp = 0; + m_convdp = 0; + m_convmp = 0; + m_gfxcycles = 0; + m_pixelshift = 0; + m_hblank_stable = 0; + m_external_host_access = 0; + m_executing = 0; + memset(m_regs, 0, sizeof(m_regs)); + memset(m_IOregs, 0, sizeof(m_IOregs)); + memset(m_shiftreg, 0, sizeof(m_shiftreg)); /* fetch the initial PC and reset the state */ - tms->pc = RLONG(tms, 0xffffffe0) & 0xfffffff0; - RESET_ST(tms); + m_pc = RLONG(0xffffffe0) & 0xfffffff0; + RESET_ST(); /* HALT the CPU if requested, and remember to re-read the starting PC */ /* the first time we are run */ - tms->reset_deferred = tms->config->halt_on_reset; - if (tms->config->halt_on_reset) - (downcast(device))->io_register_w(device->space(AS_PROGRAM), REG_HSTCTLH, 0x8000, 0xffff); + m_reset_deferred = m_config->halt_on_reset; + if (m_config->halt_on_reset) + { + io_register_w(*m_program, REG_HSTCTLH, 0x8000, 0xffff); + } } -static CPU_RESET( tms34020 ) -{ - tms34010_state *tms = get_safe_token(device); - CPU_RESET_CALL(tms34010); - tms->is_34020 = 1; -} - - - -/*************************************************************************** - Shut down the CPU emulation -***************************************************************************/ - -static CPU_EXIT( tms34010 ) -{ -} - - - /*************************************************************************** Set IRQ line state ***************************************************************************/ -static void set_irq_line(tms34010_state *tms, int irqline, int linestate) +void tms340x0_device::execute_set_input(int inputnum, int state) { - LOG(("TMS34010 '%s' set irq line %d state %d\n", tms->device->tag(), irqline, linestate)); + LOG(("TMS34010 '%s' set irq line %d state %d\n", tag(), inputnum, state)); /* set the pending interrupt */ - switch (irqline) + switch (inputnum) { case 0: - if (linestate != CLEAR_LINE) - IOREG(tms, REG_INTPEND) |= TMS34010_INT1; + if (state != CLEAR_LINE) + IOREG(REG_INTPEND) |= TMS34010_INT1; else - IOREG(tms, REG_INTPEND) &= ~TMS34010_INT1; + IOREG(REG_INTPEND) &= ~TMS34010_INT1; break; case 1: - if (linestate != CLEAR_LINE) - IOREG(tms, REG_INTPEND) |= TMS34010_INT2; + if (state != CLEAR_LINE) + IOREG(REG_INTPEND) |= TMS34010_INT2; else - IOREG(tms, REG_INTPEND) &= ~TMS34010_INT2; + IOREG(REG_INTPEND) &= ~TMS34010_INT2; break; } } @@ -749,17 +687,16 @@ static void set_irq_line(tms34010_state *tms, int irqline, int linestate) Generate internal interrupt ***************************************************************************/ -static TIMER_CALLBACK( internal_interrupt_callback ) +TIMER_CALLBACK_MEMBER( tms340x0_device::internal_interrupt_callback ) { - tms34010_state *tms = (tms34010_state *)ptr; int type = param; /* call through to the CPU to generate the int */ - IOREG(tms, REG_INTPEND) |= type; - LOG(("TMS34010 '%s' set internal interrupt $%04x\n", tms->device->tag(), type)); + IOREG(REG_INTPEND) |= type; + LOG(("TMS34010 '%s' set internal interrupt $%04x\n", tag(), type)); /* generate triggers so that spin loops can key off them */ - tms->device->signal_interrupt_trigger(); + signal_interrupt_trigger(); } @@ -768,49 +705,47 @@ static TIMER_CALLBACK( internal_interrupt_callback ) Execute ***************************************************************************/ -static CPU_EXECUTE( tms34010 ) +void tms340x0_device::execute_run() { - tms34010_state *tms = get_safe_token(device); - /* Get out if CPU is halted. Absolutely no interrupts must be taken!!! */ - if (IOREG(tms, REG_HSTCTLH) & 0x8000) + if (IOREG(REG_HSTCTLH) & 0x8000) { - tms->icount = 0; + m_icount = 0; return; } /* if the CPU's reset was deferred, do it now */ - if (tms->reset_deferred) + if (m_reset_deferred) { - tms->reset_deferred = 0; - tms->pc = RLONG(tms, 0xffffffe0); + m_reset_deferred = 0; + m_pc = RLONG(0xffffffe0); } /* check interrupts first */ - tms->executing = TRUE; - check_interrupt(tms); - if ((tms->device->machine().debug_flags & DEBUG_FLAG_ENABLED) == 0) + m_executing = TRUE; + check_interrupt(); + if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0) { do { UINT16 op; - tms->ppc = tms->pc; - op = ROPCODE(tms); - (*opcode_table[op >> 4])(tms, op); - } while (tms->icount > 0); + m_ppc = m_pc; + op = ROPCODE(); + (this->*s_opcode_table[op >> 4])(op); + } while (m_icount > 0); } else { do { UINT16 op; - debugger_instruction_hook(tms->device, tms->pc); - tms->ppc = tms->pc; - op = ROPCODE(tms); - (*opcode_table[op >> 4])(tms, op); - } while (tms->icount > 0); + debugger_instruction_hook(this, m_pc); + m_ppc = m_pc; + op = ROPCODE(); + (this->*s_opcode_table[op >> 4])(op); + } while (m_icount > 0); } - tms->executing = FALSE; + m_executing = FALSE; } @@ -819,33 +754,33 @@ static CPU_EXECUTE( tms34010 ) PIXEL OPS ***************************************************************************/ -static void (*const pixel_write_ops[4][6])(tms34010_state *tms, offs_t offset, UINT32 data) = +const tms340x0_device::pixel_write_func tms340x0_device::s_pixel_write_ops[4][6] = { - { write_pixel_1, write_pixel_2, write_pixel_4, write_pixel_8, write_pixel_16, write_pixel_32 }, - { write_pixel_r_1, write_pixel_r_2, write_pixel_r_4, write_pixel_r_8, write_pixel_r_16, write_pixel_r_32 }, - { write_pixel_t_1, write_pixel_t_2, write_pixel_t_4, write_pixel_t_8, write_pixel_t_16, write_pixel_t_32 }, - { write_pixel_r_t_1, write_pixel_r_t_2, write_pixel_r_t_4, write_pixel_r_t_8, write_pixel_r_t_16, write_pixel_r_t_32 } + { &tms340x0_device::write_pixel_1, &tms340x0_device::write_pixel_2, &tms340x0_device::write_pixel_4, &tms340x0_device::write_pixel_8, &tms340x0_device::write_pixel_16, &tms340x0_device::write_pixel_32 }, + { &tms340x0_device::write_pixel_r_1, &tms340x0_device::write_pixel_r_2, &tms340x0_device::write_pixel_r_4, &tms340x0_device::write_pixel_r_8, &tms340x0_device::write_pixel_r_16, &tms340x0_device::write_pixel_r_32 }, + { &tms340x0_device::write_pixel_t_1, &tms340x0_device::write_pixel_t_2, &tms340x0_device::write_pixel_t_4, &tms340x0_device::write_pixel_t_8, &tms340x0_device::write_pixel_t_16, &tms340x0_device::write_pixel_t_32 }, + { &tms340x0_device::write_pixel_r_t_1, &tms340x0_device::write_pixel_r_t_2, &tms340x0_device::write_pixel_r_t_4, &tms340x0_device::write_pixel_r_t_8, &tms340x0_device::write_pixel_r_t_16, &tms340x0_device::write_pixel_r_t_32 } }; -static UINT32 (*const pixel_read_ops[6])(tms34010_state *tms, offs_t offset) = +const tms340x0_device::pixel_read_func tms340x0_device::s_pixel_read_ops[6] = { - read_pixel_1, read_pixel_2, read_pixel_4, read_pixel_8, read_pixel_16, read_pixel_32 + &tms340x0_device::read_pixel_1, &tms340x0_device::read_pixel_2, &tms340x0_device::read_pixel_4, &tms340x0_device::read_pixel_8, &tms340x0_device::read_pixel_16, &tms340x0_device::read_pixel_32 }; -static void set_pixel_function(tms34010_state *tms) +void tms340x0_device::set_pixel_function() { UINT32 i1,i2; - if (IOREG(tms, REG_DPYCTL) & 0x0800) + if (IOREG(REG_DPYCTL) & 0x0800) { /* Shift Register Transfer */ - tms->pixel_write = write_pixel_shiftreg; - tms->pixel_read = read_pixel_shiftreg; + m_pixel_write = &tms340x0_device::write_pixel_shiftreg; + m_pixel_read = &tms340x0_device::read_pixel_shiftreg; return; } - switch (IOREG(tms, REG_PSIZE)) + switch (IOREG(REG_PSIZE)) { default: case 0x01: i2 = 0; break; @@ -856,13 +791,13 @@ static void set_pixel_function(tms34010_state *tms) case 0x20: i2 = 5; break; } - if (IOREG(tms, REG_CONTROL) & 0x20) - i1 = tms->raster_op ? 3 : 2; + if (IOREG(REG_CONTROL) & 0x20) + i1 = m_raster_op ? 3 : 2; else - i1 = tms->raster_op ? 1 : 0; + i1 = m_raster_op ? 1 : 0; - tms->pixel_write = pixel_write_ops[i1][i2]; - tms->pixel_read = pixel_read_ops [i2]; + m_pixel_write = s_pixel_write_ops[i1][i2]; + m_pixel_read = s_pixel_read_ops [i2]; } @@ -871,22 +806,22 @@ static void set_pixel_function(tms34010_state *tms) RASTER OPS ***************************************************************************/ -static UINT32 (*const raster_ops[32]) (tms34010_state *tms, UINT32 newpix, UINT32 oldpix) = +const tms340x0_device::raster_op_func tms340x0_device::s_raster_ops[32] = { - 0, raster_op_1 , raster_op_2 , raster_op_3, - raster_op_4 , raster_op_5 , raster_op_6 , raster_op_7, - raster_op_8 , raster_op_9 , raster_op_10, raster_op_11, - raster_op_12, raster_op_13, raster_op_14, raster_op_15, - raster_op_16, raster_op_17, raster_op_18, raster_op_19, - raster_op_20, raster_op_21, 0, 0, - 0, 0, 0, 0, - 0, 0, 0, 0, + NULL, &tms340x0_device::raster_op_1 , &tms340x0_device::raster_op_2 , &tms340x0_device::raster_op_3, + &tms340x0_device::raster_op_4 , &tms340x0_device::raster_op_5 , &tms340x0_device::raster_op_6 , &tms340x0_device::raster_op_7, + &tms340x0_device::raster_op_8 , &tms340x0_device::raster_op_9 , &tms340x0_device::raster_op_10, &tms340x0_device::raster_op_11, + &tms340x0_device::raster_op_12, &tms340x0_device::raster_op_13, &tms340x0_device::raster_op_14, &tms340x0_device::raster_op_15, + &tms340x0_device::raster_op_16, &tms340x0_device::raster_op_17, &tms340x0_device::raster_op_18, &tms340x0_device::raster_op_19, + &tms340x0_device::raster_op_20, &tms340x0_device::raster_op_21, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, }; -static void set_raster_op(tms34010_state *tms) +void tms340x0_device::set_raster_op() { - tms->raster_op = raster_ops[(IOREG(tms, REG_CONTROL) >> 10) & 0x1f]; + m_raster_op = s_raster_ops[(IOREG(REG_CONTROL) >> 10) & 0x1f]; } @@ -895,52 +830,51 @@ static void set_raster_op(tms34010_state *tms) VIDEO TIMING HELPERS ***************************************************************************/ -static TIMER_CALLBACK( scanline_callback ) +TIMER_CALLBACK_MEMBER( tms340x0_device::scanline_callback ) { - tms34010_state *tms = (tms34010_state *)ptr; int vsblnk, veblnk, vtotal; int vcount = param; int enabled; int master; /* fetch the core timing parameters */ - const rectangle ¤t_visarea = tms->screen->visible_area(); - enabled = SMART_IOREG(tms, DPYCTL) & 0x8000; - master = (tms->is_34020 || (SMART_IOREG(tms, DPYCTL) & 0x2000)); - vsblnk = SMART_IOREG(tms, VSBLNK); - veblnk = SMART_IOREG(tms, VEBLNK); - vtotal = SMART_IOREG(tms, VTOTAL); + const rectangle ¤t_visarea = m_screen->visible_area(); + enabled = SMART_IOREG(DPYCTL) & 0x8000; + master = (m_is_34020 || (SMART_IOREG(DPYCTL) & 0x2000)); + vsblnk = SMART_IOREG(VSBLNK); + veblnk = SMART_IOREG(VEBLNK); + vtotal = SMART_IOREG(VTOTAL); if (!master) { - vtotal = MIN(tms->screen->height() - 1, vtotal); - vcount = tms->screen->vpos(); + vtotal = MIN(m_screen->height() - 1, vtotal); + vcount = m_screen->vpos(); } /* update the VCOUNT */ - SMART_IOREG(tms, VCOUNT) = vcount; + SMART_IOREG(VCOUNT) = vcount; /* if we match the display interrupt scanline, signal an interrupt */ - if (enabled && vcount == SMART_IOREG(tms, DPYINT)) + if (enabled && vcount == SMART_IOREG(DPYINT)) { /* generate the display interrupt signal */ - internal_interrupt_callback(machine, tms, TMS34010_DI); + internal_interrupt_callback(NULL, TMS34010_DI); } /* at the start of VBLANK, load the starting display address */ if (vcount == vsblnk) { /* 34010 loads DPYADR with DPYSTRT, and inverts if the origin is 0 */ - if (!tms->is_34020) + if (!m_is_34020) { - IOREG(tms, REG_DPYADR) = IOREG(tms, REG_DPYSTRT); - LOG(("Start of VBLANK, DPYADR = %04X\n", IOREG(tms, REG_DPYADR))); + IOREG(REG_DPYADR) = IOREG(REG_DPYSTRT); + LOG(("Start of VBLANK, DPYADR = %04X\n", IOREG(REG_DPYADR))); } /* 34020 loads DPYNXx with DPYSTx */ else { - IOREG(tms, REG020_DPYNXL) = IOREG(tms, REG020_DPYSTL) & 0xffe0; - IOREG(tms, REG020_DPYNXH) = IOREG(tms, REG020_DPYSTH); + IOREG(REG020_DPYNXL) = IOREG(REG020_DPYSTL) & 0xffe0; + IOREG(REG020_DPYNXH) = IOREG(REG020_DPYSTH); } } @@ -949,19 +883,19 @@ static TIMER_CALLBACK( scanline_callback ) { /* only do this if we have an incoming pixel clock */ /* also, only do it if the HEBLNK/HSBLNK values are stable */ - if (master && (tms->config->scanline_callback_ind16 != NULL || tms->config->scanline_callback_rgb32 != NULL)) + if (master && (m_config->scanline_callback_ind16 != NULL || m_config->scanline_callback_rgb32 != NULL)) { - int htotal = SMART_IOREG(tms, HTOTAL); + int htotal = SMART_IOREG(HTOTAL); if (htotal > 0 && vtotal > 0) { - attoseconds_t refresh = HZ_TO_ATTOSECONDS(tms->config->pixclock) * (htotal + 1) * (vtotal + 1); - int width = (htotal + 1) * tms->config->pixperclock; + attoseconds_t refresh = HZ_TO_ATTOSECONDS(m_config->pixclock) * (htotal + 1) * (vtotal + 1); + int width = (htotal + 1) * m_config->pixperclock; int height = vtotal + 1; rectangle visarea; /* extract the visible area */ - visarea.min_x = SMART_IOREG(tms, HEBLNK) * tms->config->pixperclock; - visarea.max_x = SMART_IOREG(tms, HSBLNK) * tms->config->pixperclock - 1; + visarea.min_x = SMART_IOREG(HEBLNK) * m_config->pixperclock; + visarea.max_x = SMART_IOREG(HSBLNK) * m_config->pixperclock - 1; visarea.min_y = veblnk; visarea.max_y = vsblnk - 1; @@ -971,55 +905,55 @@ static TIMER_CALLBACK( scanline_callback ) /* because many games play with the HEBLNK/HSBLNK for effects, we don't change if they are the only thing that has changed, unless they are stable for a couple of frames */ - int current_width = tms->screen->width(); - int current_height = tms->screen->height(); + int current_width = m_screen->width(); + int current_height = m_screen->height(); if (width != current_width || height != current_height || visarea.min_y != current_visarea.min_y || visarea.max_y != current_visarea.max_y || - (tms->hblank_stable > 2 && (visarea.min_x != current_visarea.min_x || visarea.max_x != current_visarea.max_x))) + (m_hblank_stable > 2 && (visarea.min_x != current_visarea.min_x || visarea.max_x != current_visarea.max_x))) { - tms->screen->configure(width, height, visarea, refresh); + m_screen->configure(width, height, visarea, refresh); } - tms->hblank_stable++; + m_hblank_stable++; } LOG(("Configuring screen: HTOTAL=%3d BLANK=%3d-%3d VTOTAL=%3d BLANK=%3d-%3d refresh=%f\n", - htotal, SMART_IOREG(tms, HEBLNK), SMART_IOREG(tms, HSBLNK), vtotal, veblnk, vsblnk, ATTOSECONDS_TO_HZ(refresh))); + htotal, SMART_IOREG(HEBLNK), SMART_IOREG(HSBLNK), vtotal, veblnk, vsblnk, ATTOSECONDS_TO_HZ(refresh))); /* interlaced timing not supported */ - if ((SMART_IOREG(tms, DPYCTL) & 0x4000) == 0) + if ((SMART_IOREG(DPYCTL) & 0x4000) == 0) fatalerror("Interlaced video configured on the TMS34010 (unsupported)\n"); } } } /* force a partial update within the visible area */ - if (vcount >= current_visarea.min_y && vcount <= current_visarea.max_y && (tms->config->scanline_callback_ind16 != NULL || tms->config->scanline_callback_rgb32 != NULL)) - tms->screen->update_partial(vcount); + if (vcount >= current_visarea.min_y && vcount <= current_visarea.max_y && (m_config->scanline_callback_ind16 != NULL || m_config->scanline_callback_rgb32 != NULL)) + m_screen->update_partial(vcount); /* if we are in the visible area, increment DPYADR by DUDATE */ if (vcount >= veblnk && vcount < vsblnk) { /* 34010 increments by the DUDATE field in DPYCTL */ - if (!tms->is_34020) + if (!m_is_34020) { - UINT16 dpyadr = IOREG(tms, REG_DPYADR); + UINT16 dpyadr = IOREG(REG_DPYADR); if ((dpyadr & 3) == 0) - dpyadr = ((dpyadr & 0xfffc) - (IOREG(tms, REG_DPYCTL) & 0x03fc)) | (IOREG(tms, REG_DPYSTRT) & 0x0003); + dpyadr = ((dpyadr & 0xfffc) - (IOREG(REG_DPYCTL) & 0x03fc)) | (IOREG(REG_DPYSTRT) & 0x0003); else dpyadr = (dpyadr & 0xfffc) | ((dpyadr - 1) & 3); - IOREG(tms, REG_DPYADR) = dpyadr; + IOREG(REG_DPYADR) = dpyadr; } /* 34020 updates based on the DINC register, including zoom */ else { - UINT32 dpynx = IOREG(tms, REG020_DPYNXL) | (IOREG(tms, REG020_DPYNXH) << 16); - UINT32 dinc = IOREG(tms, REG020_DINCL) | (IOREG(tms, REG020_DINCH) << 16); + UINT32 dpynx = IOREG(REG020_DPYNXL) | (IOREG(REG020_DPYNXH) << 16); + UINT32 dinc = IOREG(REG020_DINCL) | (IOREG(REG020_DINCH) << 16); dpynx = (dpynx & 0xffffffe0) | ((dpynx + dinc) & 0x1f); if ((dpynx & 0x1f) == 0) dpynx += dinc & 0xffffffe0; - IOREG(tms, REG020_DPYNXL) = dpynx; - IOREG(tms, REG020_DPYNXH) = dpynx >> 16; + IOREG(REG020_DPYNXL) = dpynx; + IOREG(REG020_DPYNXH) = dpynx >> 16; } } @@ -1030,76 +964,56 @@ static TIMER_CALLBACK( scanline_callback ) /* note that we add !master (0 or 1) as a attoseconds value; this makes no practical difference */ /* but helps ensure that masters are updated first before slaves */ - tms->scantimer->adjust(tms->screen->time_until_pos(vcount) + attotime(0, !master), vcount); + m_scantimer->adjust(m_screen->time_until_pos(vcount) + attotime(0, !master), vcount); } -void tms34010_get_display_params(device_t *cpu, tms34010_display_params *params) +void tms340x0_device::get_display_params(tms34010_display_params *params) { - tms34010_state *tms = get_safe_token(cpu); - - params->enabled = ((SMART_IOREG(tms, DPYCTL) & 0x8000) != 0); - params->vcount = SMART_IOREG(tms, VCOUNT); - params->veblnk = SMART_IOREG(tms, VEBLNK); - params->vsblnk = SMART_IOREG(tms, VSBLNK); - params->heblnk = SMART_IOREG(tms, HEBLNK) * tms->config->pixperclock; - params->hsblnk = SMART_IOREG(tms, HSBLNK) * tms->config->pixperclock; + params->enabled = ((SMART_IOREG(DPYCTL) & 0x8000) != 0); + params->vcount = SMART_IOREG(VCOUNT); + params->veblnk = SMART_IOREG(VEBLNK); + params->vsblnk = SMART_IOREG(VSBLNK); + params->heblnk = SMART_IOREG(HEBLNK) * m_config->pixperclock; + params->hsblnk = SMART_IOREG(HSBLNK) * m_config->pixperclock; /* 34010 gets its address from DPYADR and DPYTAP */ - if (!tms->is_34020) + if (!m_is_34020) { - UINT16 dpyadr = IOREG(tms, REG_DPYADR); - if (!(IOREG(tms, REG_DPYCTL) & 0x0400)) + UINT16 dpyadr = IOREG(REG_DPYADR); + if (!(IOREG(REG_DPYCTL) & 0x0400)) dpyadr ^= 0xfffc; params->rowaddr = dpyadr >> 4; - params->coladdr = ((dpyadr & 0x007c) << 4) | (IOREG(tms, REG_DPYTAP) & 0x3fff); - params->yoffset = (IOREG(tms, REG_DPYSTRT) - IOREG(tms, REG_DPYADR)) & 3; + params->coladdr = ((dpyadr & 0x007c) << 4) | (IOREG(REG_DPYTAP) & 0x3fff); + params->yoffset = (IOREG(REG_DPYSTRT) - IOREG(REG_DPYADR)) & 3; } /* 34020 gets its address from DPYNX */ else { - params->rowaddr = IOREG(tms, REG020_DPYNXH); - params->coladdr = IOREG(tms, REG020_DPYNXL) & 0xffe0; + params->rowaddr = IOREG(REG020_DPYNXH); + params->coladdr = IOREG(REG020_DPYNXL) & 0xffe0; params->yoffset = 0; - if ((IOREG(tms, REG020_DINCL) & 0x1f) != 0) - params->yoffset = (IOREG(tms, REG020_DPYNXL) & 0x1f) / (IOREG(tms, REG020_DINCL) & 0x1f); + if ((IOREG(REG020_DINCL) & 0x1f) != 0) + params->yoffset = (IOREG(REG020_DPYNXL) & 0x1f) / (IOREG(REG020_DINCL) & 0x1f); } } -UINT32 tms34010_device::tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +UINT32 tms340x0_device::tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { pen_t blackpen = screen.palette()->black_pen(); tms34010_display_params params; - tms34010_state *tms = NULL; - device_t *cpu; int x; - /* find the owning CPU */ - device_iterator iter(machine().root_device()); - for (cpu = iter.first(); cpu != NULL; cpu = iter.next()) - { - device_type type = cpu->type(); - if (type == TMS34010 || type == TMS34020) - { - tms = get_safe_token(cpu); - if (tms->config != NULL && tms->config->scanline_callback_ind16 != NULL && tms->screen == &screen) - break; - tms = NULL; - } - } - if (tms == NULL) - fatalerror("Unable to locate matching CPU for screen '%s'\n", screen.tag()); - /* get the display parameters for the screen */ - tms34010_get_display_params(tms->device, ¶ms); + get_display_params(¶ms); /* if the display is enabled, call the scanline callback */ if (params.enabled) { /* call through to the callback */ LOG((" Update: scan=%3d ROW=%04X COL=%04X\n", cliprect.min_y, params.rowaddr, params.coladdr)); - (*tms->config->scanline_callback_ind16)(screen, bitmap, cliprect.min_y, ¶ms); + (*m_config->scanline_callback_ind16)(screen, bitmap, cliprect.min_y, ¶ms); } /* otherwise, just blank the current scanline */ @@ -1116,39 +1030,21 @@ UINT32 tms34010_device::tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitm } -UINT32 tms34010_device::tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +UINT32 tms340x0_device::tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { pen_t blackpen = rgb_t::black; tms34010_display_params params; - tms34010_state *tms = NULL; - device_t *cpu; int x; - /* find the owning CPU */ - device_iterator iter(machine().root_device()); - for (cpu = iter.first(); cpu != NULL; cpu = iter.next()) - { - device_type type = cpu->type(); - if (type == TMS34010 || type == TMS34020) - { - tms = get_safe_token(cpu); - if (tms->config != NULL && tms->config->scanline_callback_rgb32 != NULL && tms->screen == &screen) - break; - tms = NULL; - } - } - if (tms == NULL) - fatalerror("Unable to locate matching CPU for screen '%s'\n", screen.tag()); - /* get the display parameters for the screen */ - tms34010_get_display_params(tms->device, ¶ms); + get_display_params(¶ms); /* if the display is enabled, call the scanline callback */ if (params.enabled) { /* call through to the callback */ LOG((" Update: scan=%3d ROW=%04X COL=%04X\n", cliprect.min_y, params.rowaddr, params.coladdr)); - (*tms->config->scanline_callback_rgb32)(screen, bitmap, cliprect.min_y, ¶ms); + (*m_config->scanline_callback_rgb32)(screen, bitmap, cliprect.min_y, ¶ms); } /* otherwise, just blank the current scanline */ @@ -1186,31 +1082,30 @@ static const char *const ioreg_name[] = WRITE16_MEMBER( tms34010_device::io_register_w ) { - tms34010_state *tms = get_safe_token(this); int oldreg, newreg; /* Set register */ - oldreg = IOREG(tms, offset); - IOREG(tms, offset) = data; + oldreg = IOREG(offset); + IOREG(offset) = data; switch (offset) { case REG_CONTROL: - set_raster_op(tms); - set_pixel_function(tms); + set_raster_op(); + set_pixel_function(); break; case REG_PSIZE: - set_pixel_function(tms); + set_pixel_function(); switch (data) { default: - case 0x01: tms->pixelshift = 0; break; - case 0x02: tms->pixelshift = 1; break; - case 0x04: tms->pixelshift = 2; break; - case 0x08: tms->pixelshift = 3; break; - case 0x10: tms->pixelshift = 4; break; + case 0x01: m_pixelshift = 0; break; + case 0x02: m_pixelshift = 1; break; + case 0x04: m_pixelshift = 2; break; + case 0x08: m_pixelshift = 3; break; + case 0x10: m_pixelshift = 4; break; } break; @@ -1219,21 +1114,21 @@ WRITE16_MEMBER( tms34010_device::io_register_w ) break; case REG_DPYCTL: - set_pixel_function(tms); + set_pixel_function(); break; case REG_HSTCTLH: /* if the CPU is halting itself, stop execution right away */ if (mem_mask & 0xff00) { - if ((data & 0x8000) && !tms->external_host_access) - tms->icount = 0; + if ((data & 0x8000) && !m_external_host_access) + m_icount = 0; - tms->device->set_input_line(INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE); + set_input_line(INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE); /* NMI issued? */ if (data & 0x0100) - tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), 0, tms); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(tms340x0_device::internal_interrupt_callback), this), 0); } break; @@ -1241,7 +1136,7 @@ WRITE16_MEMBER( tms34010_device::io_register_w ) if (mem_mask & 0x00ff) { /* the TMS34010 can change MSGOUT, can set INTOUT, and can clear INTIN */ - if (!tms->external_host_access) + if (!m_external_host_access) { newreg = (oldreg & 0xff8f) | (data & 0x0070); newreg |= data & 0x0080; @@ -1255,59 +1150,59 @@ WRITE16_MEMBER( tms34010_device::io_register_w ) newreg &= data | ~0x0080; newreg |= data & 0x0008; } - IOREG(tms, offset) = newreg; + IOREG(offset) = newreg; /* the TMS34010 can set output interrupt? */ if (!(oldreg & 0x0080) && (newreg & 0x0080)) { - if (tms->config->output_int) - (*tms->config->output_int)(&space.device(), 1); + if (m_config->output_int) + (*m_config->output_int)(&space.device(), 1); } else if ((oldreg & 0x0080) && !(newreg & 0x0080)) { - if (tms->config->output_int) - (*tms->config->output_int)(&space.device(), 0); + if (m_config->output_int) + (*m_config->output_int)(&space.device(), 0); } /* input interrupt? (should really be state-based, but the functions don't exist!) */ if (!(oldreg & 0x0008) && (newreg & 0x0008)) - tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), TMS34010_HI, tms); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(tms340x0_device::internal_interrupt_callback), this), TMS34010_HI); else if ((oldreg & 0x0008) && !(newreg & 0x0008)) - IOREG(tms, REG_INTPEND) &= ~TMS34010_HI; + IOREG(REG_INTPEND) &= ~TMS34010_HI; } break; case REG_CONVSP: - tms->convsp = 1 << (~data & 0x1f); + m_convsp = 1 << (~data & 0x1f); break; case REG_CONVDP: - tms->convdp = 1 << (~data & 0x1f); + m_convdp = 1 << (~data & 0x1f); break; case REG_INTENB: - check_interrupt(tms); + check_interrupt(); break; case REG_INTPEND: /* X1P, X2P and HIP are read-only */ /* WVP and DIP can only have 0's written to them */ - IOREG(tms, REG_INTPEND) = oldreg; + IOREG(REG_INTPEND) = oldreg; if (!(data & TMS34010_WV)) - IOREG(tms, REG_INTPEND) &= ~TMS34010_WV; + IOREG(REG_INTPEND) &= ~TMS34010_WV; if (!(data & TMS34010_DI)) - IOREG(tms, REG_INTPEND) &= ~TMS34010_DI; + IOREG(REG_INTPEND) &= ~TMS34010_DI; break; case REG_HEBLNK: case REG_HSBLNK: if (oldreg != data) - tms->hblank_stable = 0; + m_hblank_stable = 0; break; } // if (LOG_CONTROL_REGS) -// logerror("%s: %s = %04X (%d)\n", tms->device->machine().describe_context(), ioreg_name[offset], IOREG(tms, offset), tms->screen.vpos()); +// logerror("%s: %s = %04X (%d)\n", machine().describe_context(), ioreg_name[offset], IOREG(offset), m_screen.vpos()); } @@ -1338,38 +1233,37 @@ static const char *const ioreg020_name[] = WRITE16_MEMBER( tms34020_device::io_register_w ) { - tms34010_state *tms = get_safe_token(this); int oldreg, newreg; /* Set register */ - oldreg = IOREG(tms, offset); - IOREG(tms, offset) = data; + oldreg = IOREG(offset); + IOREG(offset) = data; // if (LOG_CONTROL_REGS) -// logerror("%s: %s = %04X (%d)\n", device->machine().describe_context(), ioreg020_name[offset], IOREG(tms, offset), tms->screen.vpos()); +// logerror("%s: %s = %04X (%d)\n", machine().describe_context(), ioreg020_name[offset], IOREG(offset), m_screen.vpos()); switch (offset) { case REG020_CONTROL: case REG020_CONTROL2: - IOREG(tms, REG020_CONTROL) = data; - IOREG(tms, REG020_CONTROL2) = data; - set_raster_op(tms); - set_pixel_function(tms); + IOREG(REG020_CONTROL) = data; + IOREG(REG020_CONTROL2) = data; + set_raster_op(); + set_pixel_function(); break; case REG020_PSIZE: - set_pixel_function(tms); + set_pixel_function(); switch (data) { default: - case 0x01: tms->pixelshift = 0; break; - case 0x02: tms->pixelshift = 1; break; - case 0x04: tms->pixelshift = 2; break; - case 0x08: tms->pixelshift = 3; break; - case 0x10: tms->pixelshift = 4; break; - case 0x20: tms->pixelshift = 5; break; + case 0x01: m_pixelshift = 0; break; + case 0x02: m_pixelshift = 1; break; + case 0x04: m_pixelshift = 2; break; + case 0x08: m_pixelshift = 3; break; + case 0x10: m_pixelshift = 4; break; + case 0x20: m_pixelshift = 5; break; } break; @@ -1379,23 +1273,23 @@ WRITE16_MEMBER( tms34020_device::io_register_w ) break; case REG020_DPYCTL: - set_pixel_function(tms); + set_pixel_function(); break; case REG020_HSTCTLH: /* if the CPU is halting itself, stop execution right away */ - if ((data & 0x8000) && !tms->external_host_access) - tms->icount = 0; - tms->device->set_input_line(INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE); + if ((data & 0x8000) && !m_external_host_access) + m_icount = 0; + set_input_line(INPUT_LINE_HALT, (data & 0x8000) ? ASSERT_LINE : CLEAR_LINE); /* NMI issued? */ if (data & 0x0100) - tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), 0, tms); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(tms340x0_device::internal_interrupt_callback), this), 0); break; case REG020_HSTCTLL: /* the TMS34010 can change MSGOUT, can set INTOUT, and can clear INTIN */ - if (!tms->external_host_access) + if (!m_external_host_access) { newreg = (oldreg & 0xff8f) | (data & 0x0070); newreg |= data & 0x0080; @@ -1409,75 +1303,75 @@ WRITE16_MEMBER( tms34020_device::io_register_w ) newreg &= data | ~0x0080; newreg |= data & 0x0008; } - IOREG(tms, offset) = newreg; + IOREG(offset) = newreg; /* the TMS34010 can set output interrupt? */ if (!(oldreg & 0x0080) && (newreg & 0x0080)) { - if (tms->config->output_int) - (*tms->config->output_int)(&space.device(), 1); + if (m_config->output_int) + (*m_config->output_int)(&space.device(), 1); } else if ((oldreg & 0x0080) && !(newreg & 0x0080)) { - if (tms->config->output_int) - (*tms->config->output_int)(&space.device(), 0); + if (m_config->output_int) + (*m_config->output_int)(&space.device(), 0); } /* input interrupt? (should really be state-based, but the functions don't exist!) */ if (!(oldreg & 0x0008) && (newreg & 0x0008)) - tms->device->machine().scheduler().synchronize(FUNC(internal_interrupt_callback), TMS34010_HI, tms); + machine().scheduler().synchronize(timer_expired_delegate(FUNC(tms340x0_device::internal_interrupt_callback), this), TMS34010_HI); else if ((oldreg & 0x0008) && !(newreg & 0x0008)) - IOREG(tms, REG020_INTPEND) &= ~TMS34010_HI; + IOREG(REG020_INTPEND) &= ~TMS34010_HI; break; case REG020_INTENB: - check_interrupt(tms); + check_interrupt(); break; case REG020_INTPEND: /* X1P, X2P and HIP are read-only */ /* WVP and DIP can only have 0's written to them */ - IOREG(tms, REG020_INTPEND) = oldreg; + IOREG(REG020_INTPEND) = oldreg; if (!(data & TMS34010_WV)) - IOREG(tms, REG020_INTPEND) &= ~TMS34010_WV; + IOREG(REG020_INTPEND) &= ~TMS34010_WV; if (!(data & TMS34010_DI)) - IOREG(tms, REG020_INTPEND) &= ~TMS34010_DI; + IOREG(REG020_INTPEND) &= ~TMS34010_DI; break; case REG020_CONVSP: if (data & 0x001f) { if (data & 0x1f00) - tms->convsp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f)); + m_convsp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f)); else - tms->convsp = 1 << (~data & 0x1f); + m_convsp = 1 << (~data & 0x1f); } else - tms->convsp = data; + m_convsp = data; break; case REG020_CONVDP: if (data & 0x001f) { if (data & 0x1f00) - tms->convdp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f)); + m_convdp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f)); else - tms->convdp = 1 << (~data & 0x1f); + m_convdp = 1 << (~data & 0x1f); } else - tms->convdp = data; + m_convdp = data; break; case REG020_CONVMP: if (data & 0x001f) { if (data & 0x1f00) - tms->convmp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f)); + m_convmp = (1 << (~data & 0x1f)) + (1 << (~(data >> 8) & 0x1f)); else - tms->convmp = 1 << (~data & 0x1f); + m_convmp = 1 << (~data & 0x1f); } else - tms->convmp = data; + m_convmp = data; break; case REG020_DPYSTRT: @@ -1488,7 +1382,7 @@ WRITE16_MEMBER( tms34020_device::io_register_w ) case REG020_HEBLNK: case REG020_HSBLNK: if (oldreg != data) - tms->hblank_stable = 0; + m_hblank_stable = 0; break; } } @@ -1501,22 +1395,21 @@ WRITE16_MEMBER( tms34020_device::io_register_w ) READ16_MEMBER( tms34010_device::io_register_r ) { - tms34010_state *tms = get_safe_token(this); int result, total; // if (LOG_CONTROL_REGS) -// logerror("%s: read %s\n", device->machine().describe_context(), ioreg_name[offset]); +// logerror("%s: read %s\n", machine().describe_context(), ioreg_name[offset]); switch (offset) { case REG_HCOUNT: /* scale the horizontal position from screen width to HTOTAL */ - result = tms->screen->hpos(); - total = IOREG(tms, REG_HTOTAL) + 1; - result = result * total / tms->screen->width(); + result = m_screen->hpos(); + total = IOREG(REG_HTOTAL) + 1; + result = result * total / m_screen->width(); /* offset by the HBLANK end */ - result += IOREG(tms, REG_HEBLNK); + result += IOREG(REG_HEBLNK); /* wrap around */ if (result > total) @@ -1524,42 +1417,41 @@ READ16_MEMBER( tms34010_device::io_register_r ) return result; case REG_REFCNT: - return (tms->device->total_cycles() / 16) & 0xfffc; + return (total_cycles() / 16) & 0xfffc; case REG_INTPEND: - result = IOREG(tms, offset); + result = IOREG(offset); /* Cool Pool loops in mainline code on the appearance of the DI, even though they */ /* have an IRQ handler. For this reason, we return it signalled a bit early in order */ /* to make it past these loops. */ - if (SMART_IOREG(tms, VCOUNT) + 1 == SMART_IOREG(tms, DPYINT) && - tms->scantimer->remaining() < attotime::from_hz(40000000/8/3)) + if (SMART_IOREG(VCOUNT) + 1 == SMART_IOREG(DPYINT) && + m_scantimer->remaining() < attotime::from_hz(40000000/8/3)) result |= TMS34010_DI; return result; } - return IOREG(tms, offset); + return IOREG(offset); } READ16_MEMBER( tms34020_device::io_register_r ) { - tms34010_state *tms = get_safe_token(this); int result, total; // if (LOG_CONTROL_REGS) -// logerror("%s: read %s\n", device->machine().describe_context(), ioreg_name[offset]); +// logerror("%s: read %s\n", machine().describe_context(), ioreg_name[offset]); switch (offset) { case REG020_HCOUNT: /* scale the horizontal position from screen width to HTOTAL */ - result = tms->screen->hpos(); - total = IOREG(tms, REG020_HTOTAL) + 1; - result = result * total / tms->screen->width(); + result = m_screen->hpos(); + total = IOREG(REG020_HTOTAL) + 1; + result = result * total / m_screen->width(); /* offset by the HBLANK end */ - result += IOREG(tms, REG020_HEBLNK); + result += IOREG(REG020_HEBLNK); /* wrap around */ if (result > total) @@ -1568,14 +1460,14 @@ READ16_MEMBER( tms34020_device::io_register_r ) case REG020_REFADR: { - int refreshrate = (IOREG(tms, REG020_CONFIG) >> 8) & 7; + int refreshrate = (IOREG(REG020_CONFIG) >> 8) & 7; if (refreshrate < 6) - return (tms->device->total_cycles() / refreshrate) & 0xffff; + return (total_cycles() / refreshrate) & 0xffff; break; } } - return IOREG(tms, offset); + return IOREG(offset); } @@ -1584,10 +1476,10 @@ READ16_MEMBER( tms34020_device::io_register_r ) SAVE STATE ***************************************************************************/ -static void tms34010_state_postload(tms34010_state *tms) +void tms340x0_device::tms34010_state_postload() { - set_raster_op(tms); - set_pixel_function(tms); + set_raster_op(); + set_pixel_function(); } @@ -1595,48 +1487,46 @@ static void tms34010_state_postload(tms34010_state *tms) HOST INTERFACE WRITES ***************************************************************************/ -WRITE16_MEMBER( tms34010_device::host_w ) +WRITE16_MEMBER( tms340x0_device::host_w ) { int reg = offset; - tms34010_state *tms = get_safe_token(this); unsigned int addr; switch (reg) { /* upper 16 bits of the address */ case TMS34010_HOST_ADDRESS_H: - IOREG(tms, REG_HSTADRH) = data; + IOREG(REG_HSTADRH) = data; break; /* lower 16 bits of the address */ case TMS34010_HOST_ADDRESS_L: - IOREG(tms, REG_HSTADRL) = data; + IOREG(REG_HSTADRL) = data; break; /* actual data */ case TMS34010_HOST_DATA: /* write to the address */ - addr = (IOREG(tms, REG_HSTADRH) << 16) | IOREG(tms, REG_HSTADRL); - TMS34010_WRMEM_WORD(tms, TOBYTE(addr & 0xfffffff0), data); + addr = (IOREG(REG_HSTADRH) << 16) | IOREG(REG_HSTADRL); + TMS34010_WRMEM_WORD(TOBYTE(addr & 0xfffffff0), data); /* optional postincrement */ - if (IOREG(tms, REG_HSTCTLH) & 0x0800) + if (IOREG(REG_HSTCTLH) & 0x0800) { addr += 0x10; - IOREG(tms, REG_HSTADRH) = addr >> 16; - IOREG(tms, REG_HSTADRL) = (UINT16)addr; + IOREG(REG_HSTADRH) = addr >> 16; + IOREG(REG_HSTADRL) = (UINT16)addr; } break; /* control register */ case TMS34010_HOST_CONTROL: { - tms->external_host_access = TRUE; - address_space &space = tms->device->space(AS_PROGRAM); - if (mem_mask&0xff00) io_register_w(space, REG_HSTCTLH, data & 0xff00, 0xff00); - if (mem_mask&0x00ff) io_register_w(space, REG_HSTCTLL, data & 0x00ff, 0x00ff); - tms->external_host_access = FALSE; + m_external_host_access = TRUE; + if (mem_mask&0xff00) io_register_w(*m_program, REG_HSTCTLH, data & 0xff00, 0xff00); + if (mem_mask&0x00ff) io_register_w(*m_program, REG_HSTCTLL, data & 0x00ff, 0x00ff); + m_external_host_access = FALSE; break; } @@ -1653,10 +1543,9 @@ WRITE16_MEMBER( tms34010_device::host_w ) HOST INTERFACE READS ***************************************************************************/ -READ16_MEMBER( tms34010_device::host_r ) +READ16_MEMBER( tms340x0_device::host_r ) { int reg = offset; - tms34010_state *tms = get_safe_token(this); unsigned int addr; int result = 0; @@ -1666,34 +1555,34 @@ READ16_MEMBER( tms34010_device::host_r ) { /* upper 16 bits of the address */ case TMS34010_HOST_ADDRESS_H: - result = IOREG(tms, REG_HSTADRH); + result = IOREG(REG_HSTADRH); break; /* lower 16 bits of the address */ case TMS34010_HOST_ADDRESS_L: - result = IOREG(tms, REG_HSTADRL); + result = IOREG(REG_HSTADRL); break; /* actual data */ case TMS34010_HOST_DATA: /* read from the address */ - addr = (IOREG(tms, REG_HSTADRH) << 16) | IOREG(tms, REG_HSTADRL); - result = TMS34010_RDMEM_WORD(tms, TOBYTE(addr & 0xfffffff0)); + addr = (IOREG(REG_HSTADRH) << 16) | IOREG(REG_HSTADRL); + result = TMS34010_RDMEM_WORD(TOBYTE(addr & 0xfffffff0)); /* optional postincrement (it says preincrement, but data is preloaded, so it is effectively a postincrement */ - if (IOREG(tms, REG_HSTCTLH) & 0x1000) + if (IOREG(REG_HSTCTLH) & 0x1000) { addr += 0x10; - IOREG(tms, REG_HSTADRH) = addr >> 16; - IOREG(tms, REG_HSTADRL) = (UINT16)addr; + IOREG(REG_HSTADRH) = addr >> 16; + IOREG(REG_HSTADRL) = (UINT16)addr; } break; /* control register */ case TMS34010_HOST_CONTROL: - result = (IOREG(tms, REG_HSTCTLH) & 0xff00) | (IOREG(tms, REG_HSTCTLL) & 0x00ff); + result = (IOREG(REG_HSTCTLH) & 0xff00) | (IOREG(REG_HSTCTLL) & 0x00ff); break; /* error case */ @@ -1706,148 +1595,47 @@ READ16_MEMBER( tms34010_device::host_r ) } - -/************************************************************************** - * Generic set_info - **************************************************************************/ - -static CPU_SET_INFO( tms34010 ) +void tms340x0_device::state_string_export(const device_state_entry &entry, astring &string) { - tms34010_state *tms = get_safe_token(device); - - switch (state) - { - /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(tms, 0, info->i); break; - case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(tms, 1, info->i); break; - } -} - - - -/************************************************************************** - * Generic get_info - **************************************************************************/ - -CPU_EXPORT_STRING( tms34010 ) -{ - tms34010_state *tms = get_safe_token(device); - switch (entry.index()) { case STATE_GENFLAGS: string.printf("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c", - tms->st & 0x80000000 ? 'N':'.', - tms->st & 0x40000000 ? 'C':'.', - tms->st & 0x20000000 ? 'Z':'.', - tms->st & 0x10000000 ? 'V':'.', - tms->st & 0x02000000 ? 'P':'.', - tms->st & 0x00200000 ? 'I':'.', - tms->st & 0x00000800 ? 'E':'.', - tms->st & 0x00000400 ? 'F':'.', - tms->st & 0x00000200 ? 'F':'.', - tms->st & 0x00000100 ? 'F':'.', - tms->st & 0x00000080 ? 'F':'.', - tms->st & 0x00000040 ? 'F':'.', - tms->st & 0x00000020 ? 'E':'.', - tms->st & 0x00000010 ? 'F':'.', - tms->st & 0x00000008 ? 'F':'.', - tms->st & 0x00000004 ? 'F':'.', - tms->st & 0x00000002 ? 'F':'.', - tms->st & 0x00000001 ? 'F':'.'); + m_st & 0x80000000 ? 'N':'.', + m_st & 0x40000000 ? 'C':'.', + m_st & 0x20000000 ? 'Z':'.', + m_st & 0x10000000 ? 'V':'.', + m_st & 0x02000000 ? 'P':'.', + m_st & 0x00200000 ? 'I':'.', + m_st & 0x00000800 ? 'E':'.', + m_st & 0x00000400 ? 'F':'.', + m_st & 0x00000200 ? 'F':'.', + m_st & 0x00000100 ? 'F':'.', + m_st & 0x00000080 ? 'F':'.', + m_st & 0x00000040 ? 'F':'.', + m_st & 0x00000020 ? 'E':'.', + m_st & 0x00000010 ? 'F':'.', + m_st & 0x00000008 ? 'F':'.', + m_st & 0x00000004 ? 'F':'.', + m_st & 0x00000002 ? 'F':'.', + m_st & 0x00000001 ? 'F':'.'); break; } } -CPU_GET_INFO( tms34010 ) + +offs_t tms34010_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { - tms34010_state *tms = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; + extern CPU_DISASSEMBLE( tms34010 ); - switch (state) - { - /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms34010_state); break; - case CPUINFO_INT_INPUT_LINES: info->i = 2; break; - case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; - case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break; - case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; - case CPUINFO_INT_CLOCK_DIVIDER: info->i = 8; break; - case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break; - case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break; - case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; - case CPUINFO_INT_MAX_CYCLES: info->i = 10000; break; - - case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break; - case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break; - case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 3; break; - - case CPUINFO_INT_INPUT_STATE + 0: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT1) ? ASSERT_LINE : CLEAR_LINE; break; - case CPUINFO_INT_INPUT_STATE + 1: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT2) ? ASSERT_LINE : CLEAR_LINE; break; - - /* --- the following bits of info are returned as pointers to functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms34010); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms34010); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34010); break; - case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms34010); break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms34010); break; - case CPUINFO_FCT_BURN: info->burn = NULL; break; - case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34010); break; - case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(tms34010); break; - - /* --- the following bits of info are returned as pointers --- */ - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms->icount; break; - - /* --- the following bits of info are returned as NULL-terminated strings --- */ - case CPUINFO_STR_NAME: strcpy(info->s, "TMS34010"); break; - case CPUINFO_STR_SHORTNAME: strcpy(info->s, "tms34010"); break; - case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments 340x0"); break; - case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break; - case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Alex Pasadyn/Zsolt Vasvari\nParts based on code by Aaron Giles"); break; - } + return CPU_DISASSEMBLE_NAME(tms34010)(this, buffer, pc, oprom, opram, options); } -/************************************************************************** - * CPU-specific set_info - **************************************************************************/ - -CPU_GET_INFO( tms34020 ) +offs_t tms34020_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { - switch (state) - { - /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break; + extern CPU_DISASSEMBLE( tms34020 ); - /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34020); break; - case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34020); break; - - /* --- the following bits of info are returned as NULL-terminated strings --- */ - case CPUINFO_STR_NAME: strcpy(info->s, "TMS34020"); break; - case CPUINFO_STR_SHORTNAME: strcpy(info->s, "tms34020"); break; - - default: CPU_GET_INFO_CALL(tms34010); break; - } + return CPU_DISASSEMBLE_NAME(tms34020)(this, buffer, pc, oprom, opram, options); } -tms34010_device::tms34010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock) - : legacy_cpu_device(mconfig, type, tag, owner, clock, CPU_GET_INFO_NAME(tms34010)) -{ -} - -tms34010_device::tms34010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock, cpu_get_info_func get_info) - : legacy_cpu_device(mconfig, type, tag, owner, clock, get_info) -{ -} - -const device_type TMS34010 = &legacy_device_creator; - - - -tms34020_device::tms34020_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock) - : tms34010_device(mconfig, type, tag, owner, clock, CPU_GET_INFO_NAME(tms34020)) -{ -} - -const device_type TMS34020 = &legacy_device_creator; diff --git a/src/emu/cpu/tms34010/tms34010.h b/src/emu/cpu/tms34010/tms34010.h index fdf06d3feae..ab84416c398 100644 --- a/src/emu/cpu/tms34010/tms34010.h +++ b/src/emu/cpu/tms34010/tms34010.h @@ -188,7 +188,7 @@ struct tms34010_display_params }; -struct tms34010_config +struct tms340x0_config { UINT8 halt_on_reset; /* /HCS pin, which determines HALT state after reset */ const char *screen_tag; /* the screen operated on */ @@ -202,34 +202,811 @@ struct tms34010_config }; -/* PUBLIC FUNCTIONS - 34010 */ -void tms34010_get_display_params(device_t *cpu, tms34010_display_params *params); +#define MCFG_TMS340X0_CONFIG(_config) \ + tms340x0_device::set_tms340x0_config(*device, &_config); -class tms34010_device : public legacy_cpu_device + +class tms340x0_device : public cpu_device { public: - tms34010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock); - tms34010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock, cpu_get_info_func get_info); + // construction/destruction + tms340x0_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname); + + static void set_tms340x0_config(device_t &device, const tms340x0_config *config) { downcast(device).m_config = config; } + + void get_display_params(tms34010_display_params *params); + void tms34010_state_postload(); UINT32 tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); UINT32 tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - /* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */ - DECLARE_WRITE16_MEMBER( io_register_w ); - DECLARE_READ16_MEMBER( io_register_r ); + + virtual DECLARE_WRITE16_MEMBER(io_register_w) = 0; + virtual DECLARE_READ16_MEMBER(io_register_r) = 0; DECLARE_WRITE16_MEMBER(host_w); DECLARE_READ16_MEMBER(host_r); + + TIMER_CALLBACK_MEMBER(internal_interrupt_callback); + TIMER_CALLBACK_MEMBER(scanline_callback); + +protected: + // device-level overrides + virtual void device_start(); + virtual void device_reset(); + + // device_execute_interface overrides + virtual UINT32 execute_min_cycles() const { return 1; } + virtual UINT32 execute_max_cycles() const { return 10000; } + virtual UINT32 execute_input_lines() const { return 2; } + virtual void execute_run(); + virtual void execute_set_input(int inputnum, int state); + + // device_memory_interface overrides + virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; } + + // device_state_interface overrides + virtual void state_string_export(const device_state_entry &entry, astring &string); + + // device_disasm_interface overrides + virtual UINT32 disasm_min_opcode_bytes() const { return 2; } + virtual UINT32 disasm_max_opcode_bytes() const { return 10; } + + typedef void (tms340x0_device::*pixel_write_func)(offs_t offset, UINT32 data); + typedef UINT32 (tms340x0_device::*pixel_read_func)(offs_t offset); + typedef UINT32 (tms340x0_device::*raster_op_func)(UINT32 newpix, UINT32 oldpix); + typedef void (tms340x0_device::*wfield_func)(offs_t offset, UINT32 data); + typedef UINT32 (tms340x0_device::*rfield_func)(offs_t offset); + typedef void (tms340x0_device::*opcode_func)(UINT16 op); + typedef UINT32 (tms340x0_device::*pixel_op_func)(UINT32, UINT32, UINT32); + typedef void (tms340x0_device::*pixblt_op_func)(int, int); + typedef void (tms340x0_device::*pixblt_b_op_func)(int); + typedef void (tms340x0_device::*word_write_func)(address_space &space, offs_t offset,UINT16 data); + typedef UINT16 (tms340x0_device::*word_read_func)(address_space &space, offs_t offset); + + static const wfield_func s_wfield_functions[32]; + static const rfield_func s_rfield_functions[64]; + static const opcode_func s_opcode_table[65536 >> 4]; + static const pixel_op_func s_pixel_op_table[32]; + static const UINT8 s_pixel_op_timing_table[33]; + static const pixblt_op_func s_pixblt_op_table[]; + static const pixblt_op_func s_pixblt_r_op_table[]; + static const pixblt_b_op_func s_pixblt_b_op_table[]; + static const pixblt_b_op_func s_fill_op_table[]; + static const pixel_write_func s_pixel_write_ops[4][6]; + static const pixel_read_func s_pixel_read_ops[6]; + static const raster_op_func s_raster_ops[32]; + + address_space_config m_program_config; + + UINT32 m_pc; + UINT32 m_ppc; + UINT32 m_st; + pixel_write_func m_pixel_write; + pixel_read_func m_pixel_read; + raster_op_func m_raster_op; + pixel_op_func m_pixel_op; + UINT32 m_pixel_op_timing; + UINT32 m_convsp; + UINT32 m_convdp; + UINT32 m_convmp; + INT32 m_gfxcycles; + UINT8 m_pixelshift; + UINT8 m_is_34020; + UINT8 m_reset_deferred; + UINT8 m_hblank_stable; + UINT8 m_external_host_access; + UINT8 m_executing; + address_space *m_program; + direct_read_data *m_direct; + const tms340x0_config *m_config; + screen_device *m_screen; + emu_timer *m_scantimer; + int m_icount; + + struct XY + { +#ifdef LSB_FIRST + INT16 x; + INT16 y; +#else + INT16 y; + INT16 x; +#endif + }; + + /* A registers 0-15 map to regs[0]-regs[15] */ + /* B registers 0-15 map to regs[30]-regs[15] */ + union + { + INT32 reg; + XY xy; + } m_regs[31]; + + UINT16 m_IOregs[64]; + UINT16 m_shiftreg[(8 * 512 * sizeof(UINT16))/2]; + + UINT32 TMS34010_RDMEM_DWORD(offs_t A); + void TMS34010_WRMEM_DWORD(offs_t A, UINT32 V); + void SET_ST(UINT32 st); + void RESET_ST(); + UINT32 ROPCODE(); + INT16 PARAM_WORD(); + INT32 PARAM_LONG(); + INT16 PARAM_WORD_NO_INC(); + INT32 PARAM_LONG_NO_INC(); + UINT32 RBYTE(offs_t offset); + void WBYTE(offs_t offset, UINT32 data); + UINT32 RLONG(offs_t offset); + void WLONG(offs_t offset, UINT32 data); + void PUSH(UINT32 data); + INT32 POP(); + UINT32 read_pixel_1(offs_t offset); + UINT32 read_pixel_2(offs_t offset); + UINT32 read_pixel_4(offs_t offset); + UINT32 read_pixel_8(offs_t offset); + UINT32 read_pixel_16(offs_t offset); + UINT32 read_pixel_32(offs_t offset); + UINT32 read_pixel_shiftreg(offs_t offset); + void write_pixel_1(offs_t offset, UINT32 data); + void write_pixel_2(offs_t offset, UINT32 data); + void write_pixel_4(offs_t offset, UINT32 data); + void write_pixel_8(offs_t offset, UINT32 data); + void write_pixel_16(offs_t offset, UINT32 data); + void write_pixel_32(offs_t offset, UINT32 data); + void write_pixel_t_1(offs_t offset, UINT32 data); + void write_pixel_t_2(offs_t offset, UINT32 data); + void write_pixel_t_4(offs_t offset, UINT32 data); + void write_pixel_t_8(offs_t offset, UINT32 data); + void write_pixel_t_16(offs_t offset, UINT32 data); + void write_pixel_t_32(offs_t offset, UINT32 data); + void write_pixel_r_1(offs_t offset, UINT32 data); + void write_pixel_r_2(offs_t offset, UINT32 data); + void write_pixel_r_4(offs_t offset, UINT32 data); + void write_pixel_r_8(offs_t offset, UINT32 data); + void write_pixel_r_16(offs_t offset, UINT32 data); + void write_pixel_r_32(offs_t offset, UINT32 data); + void write_pixel_r_t_1(offs_t offset, UINT32 data); + void write_pixel_r_t_2(offs_t offset, UINT32 data); + void write_pixel_r_t_4(offs_t offset, UINT32 data); + void write_pixel_r_t_8(offs_t offset, UINT32 data); + void write_pixel_r_t_16(offs_t offset, UINT32 data); + void write_pixel_r_t_32(offs_t offset, UINT32 data); + void write_pixel_shiftreg(offs_t offset, UINT32 data); + UINT32 raster_op_1(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_2(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_3(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_4(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_5(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_6(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_7(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_8(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_9(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_10(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_11(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_12(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_13(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_14(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_15(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_16(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_17(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_18(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_19(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_20(UINT32 newpix, UINT32 oldpix); + UINT32 raster_op_21(UINT32 newpix, UINT32 oldpix); + void wfield_01(offs_t offset, UINT32 data); + void wfield_02(offs_t offset, UINT32 data); + void wfield_03(offs_t offset, UINT32 data); + void wfield_04(offs_t offset, UINT32 data); + void wfield_05(offs_t offset, UINT32 data); + void wfield_06(offs_t offset, UINT32 data); + void wfield_07(offs_t offset, UINT32 data); + void wfield_08(offs_t offset, UINT32 data); + void wfield_09(offs_t offset, UINT32 data); + void wfield_10(offs_t offset, UINT32 data); + void wfield_11(offs_t offset, UINT32 data); + void wfield_12(offs_t offset, UINT32 data); + void wfield_13(offs_t offset, UINT32 data); + void wfield_14(offs_t offset, UINT32 data); + void wfield_15(offs_t offset, UINT32 data); + void wfield_16(offs_t offset, UINT32 data); + void wfield_17(offs_t offset, UINT32 data); + void wfield_18(offs_t offset, UINT32 data); + void wfield_19(offs_t offset, UINT32 data); + void wfield_20(offs_t offset, UINT32 data); + void wfield_21(offs_t offset, UINT32 data); + void wfield_22(offs_t offset, UINT32 data); + void wfield_23(offs_t offset, UINT32 data); + void wfield_24(offs_t offset, UINT32 data); + void wfield_25(offs_t offset, UINT32 data); + void wfield_26(offs_t offset, UINT32 data); + void wfield_27(offs_t offset, UINT32 data); + void wfield_28(offs_t offset, UINT32 data); + void wfield_29(offs_t offset, UINT32 data); + void wfield_30(offs_t offset, UINT32 data); + void wfield_31(offs_t offset, UINT32 data); + void wfield_32(offs_t offset, UINT32 data); + UINT32 rfield_z_01(offs_t offset); + UINT32 rfield_z_02(offs_t offset); + UINT32 rfield_z_03(offs_t offset); + UINT32 rfield_z_04(offs_t offset); + UINT32 rfield_z_05(offs_t offset); + UINT32 rfield_z_06(offs_t offset); + UINT32 rfield_z_07(offs_t offset); + UINT32 rfield_z_08(offs_t offset); + UINT32 rfield_z_09(offs_t offset); + UINT32 rfield_z_10(offs_t offset); + UINT32 rfield_z_11(offs_t offset); + UINT32 rfield_z_12(offs_t offset); + UINT32 rfield_z_13(offs_t offset); + UINT32 rfield_z_14(offs_t offset); + UINT32 rfield_z_15(offs_t offset); + UINT32 rfield_z_16(offs_t offset); + UINT32 rfield_z_17(offs_t offset); + UINT32 rfield_z_18(offs_t offset); + UINT32 rfield_z_19(offs_t offset); + UINT32 rfield_z_20(offs_t offset); + UINT32 rfield_z_21(offs_t offset); + UINT32 rfield_z_22(offs_t offset); + UINT32 rfield_z_23(offs_t offset); + UINT32 rfield_z_24(offs_t offset); + UINT32 rfield_z_25(offs_t offset); + UINT32 rfield_z_26(offs_t offset); + UINT32 rfield_z_27(offs_t offset); + UINT32 rfield_z_28(offs_t offset); + UINT32 rfield_z_29(offs_t offset); + UINT32 rfield_z_30(offs_t offset); + UINT32 rfield_z_31(offs_t offset); + UINT32 rfield_32(offs_t offset); + UINT32 rfield_s_01(offs_t offset); + UINT32 rfield_s_02(offs_t offset); + UINT32 rfield_s_03(offs_t offset); + UINT32 rfield_s_04(offs_t offset); + UINT32 rfield_s_05(offs_t offset); + UINT32 rfield_s_06(offs_t offset); + UINT32 rfield_s_07(offs_t offset); + UINT32 rfield_s_08(offs_t offset); + UINT32 rfield_s_09(offs_t offset); + UINT32 rfield_s_10(offs_t offset); + UINT32 rfield_s_11(offs_t offset); + UINT32 rfield_s_12(offs_t offset); + UINT32 rfield_s_13(offs_t offset); + UINT32 rfield_s_14(offs_t offset); + UINT32 rfield_s_15(offs_t offset); + UINT32 rfield_s_16(offs_t offset); + UINT32 rfield_s_17(offs_t offset); + UINT32 rfield_s_18(offs_t offset); + UINT32 rfield_s_19(offs_t offset); + UINT32 rfield_s_20(offs_t offset); + UINT32 rfield_s_21(offs_t offset); + UINT32 rfield_s_22(offs_t offset); + UINT32 rfield_s_23(offs_t offset); + UINT32 rfield_s_24(offs_t offset); + UINT32 rfield_s_25(offs_t offset); + UINT32 rfield_s_26(offs_t offset); + UINT32 rfield_s_27(offs_t offset); + UINT32 rfield_s_28(offs_t offset); + UINT32 rfield_s_29(offs_t offset); + UINT32 rfield_s_30(offs_t offset); + UINT32 rfield_s_31(offs_t offset); + void unimpl(UINT16 op); + void pixblt_l_l(UINT16 op); /* 0f00 */ + void pixblt_l_xy(UINT16 op); /* 0f20 */ + void pixblt_xy_l(UINT16 op); /* 0f40 */ + void pixblt_xy_xy(UINT16 op); /* 0f60 */ + void pixblt_b_l(UINT16 op); /* 0f80 */ + void pixblt_b_xy(UINT16 op); /* 0fa0 */ + void fill_l(UINT16 op); /* 0fc0 */ + void fill_xy(UINT16 op); /* 0fe0 */ + void line(UINT16 op); /* df10/df90 */ + void add_xy_a(UINT16 op); /* e000/e100 */ + void add_xy_b(UINT16 op); /* e000/e100 */ + void sub_xy_a(UINT16 op); /* e200/e300 */ + void sub_xy_b(UINT16 op); /* e200/e300 */ + void cmp_xy_a(UINT16 op); /* e400/e500 */ + void cmp_xy_b(UINT16 op); /* e400/e500 */ + void cpw_a(UINT16 op); /* e600/e700 */ + void cpw_b(UINT16 op); /* e600/e700 */ + void cvxyl_a(UINT16 op); /* e800/e900 */ + void cvxyl_b(UINT16 op); /* e800/e900 */ + void movx_a(UINT16 op); /* ec00/ed00 */ + void movx_b(UINT16 op); /* ec00/ed00 */ + void movy_a(UINT16 op); /* ee00/ef00 */ + void movy_b(UINT16 op); /* ee00/ef00 */ + void pixt_ri_a(UINT16 op); /* f800/f900 */ + void pixt_ri_b(UINT16 op); /* f800/f900 */ + void pixt_rixy_a(UINT16 op); /* f000/f100 */ + void pixt_rixy_b(UINT16 op); /* f000/f100 */ + void pixt_ir_a(UINT16 op); /* fa00/fb00 */ + void pixt_ir_b(UINT16 op); /* fa00/fb00 */ + void pixt_ii_a(UINT16 op); /* fc00/fd00 */ + void pixt_ii_b(UINT16 op); /* fc00/fd00 */ + void pixt_ixyr_a(UINT16 op); /* f200/f300 */ + void pixt_ixyr_b(UINT16 op); /* f200/f300 */ + void pixt_ixyixy_a(UINT16 op); /* f400/f500 */ + void pixt_ixyixy_b(UINT16 op); /* f400/f500 */ + void drav_a(UINT16 op); /* f600/f700 */ + void drav_b(UINT16 op); /* f600/f700 */ + void abs_a(UINT16 op); /* 0380 */ + void abs_b(UINT16 op); /* 0390 */ + void add_a(UINT16 op); /* 4000/4100 */ + void add_b(UINT16 op); /* 4000/4100 */ + void addc_a(UINT16 op); /* 4200/4200 */ + void addc_b(UINT16 op); /* 4200/4200 */ + void addi_w_a(UINT16 op); /* 0b00 */ + void addi_w_b(UINT16 op); /* 0b10 */ + void addi_l_a(UINT16 op); /* 0b20 */ + void addi_l_b(UINT16 op); /* 0b30 */ + void addk_a(UINT16 op); /* 1000-1300 */ + void addk_b(UINT16 op); /* 1000-1300 */ + void and_a(UINT16 op); /* 5000/5100 */ + void and_b(UINT16 op); /* 5000/5100 */ + void andi_a(UINT16 op); /* 0b80 */ + void andi_b(UINT16 op); /* 0b90 */ + void andn_a(UINT16 op); /* 5200-5300 */ + void andn_b(UINT16 op); /* 5200-5300 */ + void btst_k_a(UINT16 op); /* 1c00-1f00 */ + void btst_k_b(UINT16 op); /* 1c00-1f00 */ + void btst_r_a(UINT16 op); /* 4a00-4b00 */ + void btst_r_b(UINT16 op); /* 4a00-4b00 */ + void clrc(UINT16 op); /* 0320 */ + void cmp_a(UINT16 op); /* 4800/4900 */ + void cmp_b(UINT16 op); /* 4800/4900 */ + void cmpi_w_a(UINT16 op); /* 0b40 */ + void cmpi_w_b(UINT16 op); /* 0b50 */ + void cmpi_l_a(UINT16 op); /* 0b60 */ + void cmpi_l_b(UINT16 op); /* 0b70 */ + void dint(UINT16 op); + void divs_a(UINT16 op); /* 5800/5900 */ + void divs_b(UINT16 op); /* 5800/5900 */ + void divu_a(UINT16 op); /* 5a00/5b00 */ + void divu_b(UINT16 op); /* 5a00/5b00 */ + void eint(UINT16 op); + void exgf0_a(UINT16 op); /* d500 */ + void exgf0_b(UINT16 op); /* d510 */ + void exgf1_a(UINT16 op); /* d700 */ + void exgf1_b(UINT16 op); /* d710 */ + void lmo_a(UINT16 op); /* 6a00/6b00 */ + void lmo_b(UINT16 op); /* 6a00/6b00 */ + void mmfm_a(UINT16 op); /* 09a0 */ + void mmfm_b(UINT16 op); /* 09b0 */ + void mmtm_a(UINT16 op); /* 0980 */ + void mmtm_b(UINT16 op); /* 0990 */ + void mods_a(UINT16 op); /* 6c00/6d00 */ + void mods_b(UINT16 op); /* 6c00/6d00 */ + void modu_a(UINT16 op); /* 6e00/6f00 */ + void modu_b(UINT16 op); /* 6e00/6f00 */ + void mpys_a(UINT16 op); /* 5c00/5d00 */ + void mpys_b(UINT16 op); /* 5c00/5d00 */ + void mpyu_a(UINT16 op); /* 5e00/5e00 */ + void mpyu_b(UINT16 op); /* 5e00/5f00 */ + void neg_a(UINT16 op); /* 03a0 */ + void neg_b(UINT16 op); /* 03b0 */ + void negb_a(UINT16 op); /* 03c0 */ + void negb_b(UINT16 op); /* 03d0 */ + void nop(UINT16 op); /* 0300 */ + void not_a(UINT16 op); /* 03e0 */ + void not_b(UINT16 op); /* 03f0 */ + void or_a(UINT16 op); /* 5400-5500 */ + void or_b(UINT16 op); /* 5400-5500 */ + void ori_a(UINT16 op); /* 0ba0 */ + void ori_b(UINT16 op); /* 0bb0 */ + void rl_k_a(UINT16 op); /* 3000-3300 */ + void rl_k_b(UINT16 op); /* 3000-3300 */ + void rl_r_a(UINT16 op); /* 6800/6900 */ + void rl_r_b(UINT16 op); /* 6800/6900 */ + void setc(UINT16 op); /* 0de0 */ + void setf0(UINT16 op); + void setf1(UINT16 op); + void sext0_a(UINT16 op); /* 0500 */ + void sext0_b(UINT16 op); /* 0510 */ + void sext1_a(UINT16 op); /* 0700 */ + void sext1_b(UINT16 op); /* 0710 */ + void sla_k_a(UINT16 op); /* 2000-2300 */ + void sla_k_b(UINT16 op); /* 2000-2300 */ + void sla_r_a(UINT16 op); /* 6000/6100 */ + void sla_r_b(UINT16 op); /* 6000/6100 */ + void sll_k_a(UINT16 op); /* 2400-2700 */ + void sll_k_b(UINT16 op); /* 2400-2700 */ + void sll_r_a(UINT16 op); /* 6200/6300 */ + void sll_r_b(UINT16 op); /* 6200/6300 */ + void sra_k_a(UINT16 op); /* 2800-2b00 */ + void sra_k_b(UINT16 op); /* 2800-2b00 */ + void sra_r_a(UINT16 op); /* 6400/6500 */ + void sra_r_b(UINT16 op); /* 6400/6500 */ + void srl_k_a(UINT16 op); /* 2c00-2f00 */ + void srl_k_b(UINT16 op); /* 2c00-2f00 */ + void srl_r_a(UINT16 op); /* 6600/6700 */ + void srl_r_b(UINT16 op); /* 6600/6700 */ + void sub_a(UINT16 op); /* 4400/4500 */ + void sub_b(UINT16 op); /* 4400/4500 */ + void subb_a(UINT16 op); /* 4600/4700 */ + void subb_b(UINT16 op); /* 4600/4700 */ + void subi_w_a(UINT16 op); /* 0be0 */ + void subi_w_b(UINT16 op); /* 0bf0 */ + void subi_l_a(UINT16 op); /* 0d00 */ + void subi_l_b(UINT16 op); /* 0d10 */ + void subk_a(UINT16 op); /* 1400-1700 */ + void subk_b(UINT16 op); /* 1400-1700 */ + void xor_a(UINT16 op); /* 5600-5700 */ + void xor_b(UINT16 op); /* 5600-5700 */ + void xori_a(UINT16 op); /* 0bc0 */ + void xori_b(UINT16 op); /* 0bd0 */ + void zext0_a(UINT16 op); /* 0520 */ + void zext0_b(UINT16 op); /* 0530 */ + void zext1_a(UINT16 op); /* 0720 */ + void zext1_b(UINT16 op); /* 0720 */ + void movi_w_a(UINT16 op); + void movi_w_b(UINT16 op); + void movi_l_a(UINT16 op); + void movi_l_b(UINT16 op); + void movk_a(UINT16 op); + void movk_b(UINT16 op); + void movb_rn_a(UINT16 op); /* 8c00-8d00 */ + void movb_rn_b(UINT16 op); /* 8c00-8d00 */ + void movb_nr_a(UINT16 op); /* 8e00-8f00 */ + void movb_nr_b(UINT16 op); /* 8e00-8f00 */ + void movb_nn_a(UINT16 op); /* 9c00-9d00 */ + void movb_nn_b(UINT16 op); /* 9c00-9d00 */ + void movb_r_no_a(UINT16 op); /* ac00-ad00 */ + void movb_r_no_b(UINT16 op); /* ac00-ad00 */ + void movb_no_r_a(UINT16 op); /* ae00-af00 */ + void movb_no_r_b(UINT16 op); /* ae00-af00 */ + void movb_no_no_a(UINT16 op); /* bc00-bd00 */ + void movb_no_no_b(UINT16 op); /* bc00-bd00 */ + void movb_ra_a(UINT16 op); + void movb_ra_b(UINT16 op); + void movb_ar_a(UINT16 op); + void movb_ar_b(UINT16 op); + void movb_aa(UINT16 op); + void move_rr_a(UINT16 op); /* 4c00/d00 */ + void move_rr_b(UINT16 op); /* 4c00/d00 */ + void move_rr_ax(UINT16 op); /* 4e00/f00 */ + void move_rr_bx(UINT16 op); /* 4e00/f00 */ + void move0_rn_a(UINT16 op); /* 8000 */ + void move0_rn_b(UINT16 op); + void move1_rn_a(UINT16 op); + void move1_rn_b(UINT16 op); + void move0_r_dn_a(UINT16 op); /* a000 */ + void move0_r_dn_b(UINT16 op); + void move1_r_dn_a(UINT16 op); + void move1_r_dn_b(UINT16 op); + void move0_r_ni_a(UINT16 op); /* 9000 */ + void move0_r_ni_b(UINT16 op); + void move1_r_ni_a(UINT16 op); + void move1_r_ni_b(UINT16 op); + void move0_nr_a(UINT16 op); /* 8400-500 */ + void move0_nr_b(UINT16 op); /* 8400-500 */ + void move1_nr_a(UINT16 op); /* 8600-700 */ + void move1_nr_b(UINT16 op); /* 8600-700 */ + void move0_dn_r_a(UINT16 op); /* A400-500 */ + void move0_dn_r_b(UINT16 op); /* A400-500 */ + void move1_dn_r_a(UINT16 op); /* A600-700 */ + void move1_dn_r_b(UINT16 op); /* A600-700 */ + void move0_ni_r_a(UINT16 op); /* 9400-500 */ + void move0_ni_r_b(UINT16 op); /* 9400-500 */ + void move1_ni_r_a(UINT16 op); /* 9600-700 */ + void move1_ni_r_b(UINT16 op); /* 9600-700 */ + void move0_nn_a(UINT16 op); /* 8800 */ + void move0_nn_b(UINT16 op); + void move1_nn_a(UINT16 op); + void move1_nn_b(UINT16 op); + void move0_dn_dn_a(UINT16 op); /* a800 */ + void move0_dn_dn_b(UINT16 op); + void move1_dn_dn_a(UINT16 op); + void move1_dn_dn_b(UINT16 op); + void move0_ni_ni_a(UINT16 op); /* 9800 */ + void move0_ni_ni_b(UINT16 op); + void move1_ni_ni_a(UINT16 op); + void move1_ni_ni_b(UINT16 op); + void move0_r_no_a(UINT16 op); /* b000 */ + void move0_r_no_b(UINT16 op); + void move1_r_no_a(UINT16 op); + void move1_r_no_b(UINT16 op); + void move0_no_r_a(UINT16 op); /* b400 */ + void move0_no_r_b(UINT16 op); + void move1_no_r_a(UINT16 op); + void move1_no_r_b(UINT16 op); + void move0_no_ni_a(UINT16 op); /* d000 */ + void move0_no_ni_b(UINT16 op); + void move1_no_ni_a(UINT16 op); + void move1_no_ni_b(UINT16 op); + void move0_no_no_a(UINT16 op); /* b800 */ + void move0_no_no_b(UINT16 op); + void move1_no_no_a(UINT16 op); + void move1_no_no_b(UINT16 op); + void move0_ra_a(UINT16 op); + void move0_ra_b(UINT16 op); + void move1_ra_a(UINT16 op); + void move1_ra_b(UINT16 op); + void move0_ar_a(UINT16 op); + void move0_ar_b(UINT16 op); + void move1_ar_a(UINT16 op); + void move1_ar_b(UINT16 op); + void move0_a_ni_a(UINT16 op); /* d400 */ + void move0_a_ni_b(UINT16 op); /* d410 */ + void move1_a_ni_a(UINT16 op); /* d600 */ + void move1_a_ni_b(UINT16 op); /* d610 */ + void move0_aa(UINT16 op); /* 05c0 */ + void move1_aa(UINT16 op); /* 07c0 */ + void call_a(UINT16 op); /* 0920 */ + void call_b(UINT16 op); /* 0930 */ + void callr(UINT16 op); /* 0d3f */ + void calla(UINT16 op); /* 0d5f */ + void dsj_a(UINT16 op); /* 0d80 */ + void dsj_b(UINT16 op); /* 0d90 */ + void dsjeq_a(UINT16 op); /* 0da0 */ + void dsjeq_b(UINT16 op); /* 0db0 */ + void dsjne_a(UINT16 op); /* 0dc0 */ + void dsjne_b(UINT16 op); /* 0dd0 */ + void dsjs_a(UINT16 op); + void dsjs_b(UINT16 op); + void emu(UINT16 op); /* 0100 */ + void exgpc_a(UINT16 op); /* 0120 */ + void exgpc_b(UINT16 op); /* 0130 */ + void getpc_a(UINT16 op); /* 0140 */ + void getpc_b(UINT16 op); /* 0150 */ + void getst_a(UINT16 op); /* 0180 */ + void getst_b(UINT16 op); /* 0190 */ + void j_UC_0(UINT16 op); + void j_UC_8(UINT16 op); + void j_UC_x(UINT16 op); + void j_P_0(UINT16 op); + void j_P_8(UINT16 op); + void j_P_x(UINT16 op); + void j_LS_0(UINT16 op); + void j_LS_8(UINT16 op); + void j_LS_x(UINT16 op); + void j_HI_0(UINT16 op); + void j_HI_8(UINT16 op); + void j_HI_x(UINT16 op); + void j_LT_0(UINT16 op); + void j_LT_8(UINT16 op); + void j_LT_x(UINT16 op); + void j_GE_0(UINT16 op); + void j_GE_8(UINT16 op); + void j_GE_x(UINT16 op); + void j_LE_0(UINT16 op); + void j_LE_8(UINT16 op); + void j_LE_x(UINT16 op); + void j_GT_0(UINT16 op); + void j_GT_8(UINT16 op); + void j_GT_x(UINT16 op); + void j_C_0(UINT16 op); + void j_C_8(UINT16 op); + void j_C_x(UINT16 op); + void j_NC_0(UINT16 op); + void j_NC_8(UINT16 op); + void j_NC_x(UINT16 op); + void j_EQ_0(UINT16 op); + void j_EQ_8(UINT16 op); + void j_EQ_x(UINT16 op); + void j_NE_0(UINT16 op); + void j_NE_8(UINT16 op); + void j_NE_x(UINT16 op); + void j_V_0(UINT16 op); + void j_V_8(UINT16 op); + void j_V_x(UINT16 op); + void j_NV_0(UINT16 op); + void j_NV_8(UINT16 op); + void j_NV_x(UINT16 op); + void j_N_0(UINT16 op); + void j_N_8(UINT16 op); + void j_N_x(UINT16 op); + void j_NN_0(UINT16 op); + void j_NN_8(UINT16 op); + void j_NN_x(UINT16 op); + void jump_a(UINT16 op); /* 0160 */ + void jump_b(UINT16 op); /* 0170 */ + void popst(UINT16 op); /* 01c0 */ + void pushst(UINT16 op); /* 01e0 */ + void putst_a(UINT16 op); /* 01a0 */ + void putst_b(UINT16 op); /* 01b0 */ + void reti(UINT16 op); /* 0940 */ + void rets(UINT16 op); /* 0960/70 */ + void rev_a(UINT16 op); /* 0020 */ + void rev_b(UINT16 op); /* 0030 */ + void trap(UINT16 op); /* 0900/10 */ + void addxyi_a(UINT16 op); + void addxyi_b(UINT16 op); + void blmove(UINT16 op); + void cexec_l(UINT16 op); + void cexec_s(UINT16 op); + void clip(UINT16 op); + void cmovcg_a(UINT16 op); + void cmovcg_b(UINT16 op); + void cmovcm_f(UINT16 op); + void cmovcm_b(UINT16 op); + void cmovgc_a(UINT16 op); + void cmovgc_b(UINT16 op); + void cmovgc_a_s(UINT16 op); + void cmovgc_b_s(UINT16 op); + void cmovmc_f(UINT16 op); + void cmovmc_f_va(UINT16 op); + void cmovmc_f_vb(UINT16 op); + void cmovmc_b(UINT16 op); + void cmp_k_a(UINT16 op); + void cmp_k_b(UINT16 op); + void cvdxyl_a(UINT16 op); + void cvdxyl_b(UINT16 op); + void cvmxyl_a(UINT16 op); + void cvmxyl_b(UINT16 op); + void cvsxyl_a(UINT16 op); + void cvsxyl_b(UINT16 op); + void exgps_a(UINT16 op); + void exgps_b(UINT16 op); + void fline(UINT16 op); + void fpixeq(UINT16 op); + void fpixne(UINT16 op); + void getps_a(UINT16 op); + void getps_b(UINT16 op); + void idle(UINT16 op); + void linit(UINT16 op); + void mwait(UINT16 op); + void pfill_xy(UINT16 op); + void pixblt_l_m_l(UINT16 op); + void retm(UINT16 op); + void rmo_a(UINT16 op); + void rmo_b(UINT16 op); + void rpix_a(UINT16 op); + void rpix_b(UINT16 op); + void setcdp(UINT16 op); + void setcmp(UINT16 op); + void setcsp(UINT16 op); + void swapf_a(UINT16 op); + void swapf_b(UINT16 op); + void tfill_xy(UINT16 op); + void trapl(UINT16 op); + void vblt_b_l(UINT16 op); + void vfill_l(UINT16 op); + void vlcol(UINT16 op); + int apply_window(const char *inst_name,int srcbpp, UINT32 *srcaddr, XY *dst, int *dx, int *dy); + int compute_fill_cycles(int left_partials, int right_partials, int full_words, int op_timing); + int compute_pixblt_cycles(int left_partials, int right_partials, int full_words, int op_timing); + int compute_pixblt_b_cycles(int left_partials, int right_partials, int full_words, int rows, int op_timing, int bpp); + void memory_w(address_space &space, offs_t offset,UINT16 data); + UINT16 memory_r(address_space &space, offs_t offset); + void shiftreg_w(address_space &space, offs_t offset, UINT16 data); + UINT16 shiftreg_r(address_space &space, offs_t offset); + UINT16 dummy_shiftreg_r(address_space &space, offs_t offset); + UINT32 pixel_op00(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op01(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op02(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op03(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op04(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op05(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op06(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op07(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op08(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op09(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op10(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op11(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op12(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op13(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op14(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op15(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op16(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op17(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op18(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op19(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op20(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + UINT32 pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix); + void pixblt_1_op0(int src_is_linear, int dst_is_linear); + void pixblt_2_op0(int src_is_linear, int dst_is_linear); + void pixblt_4_op0(int src_is_linear, int dst_is_linear); + void pixblt_8_op0(int src_is_linear, int dst_is_linear); + void pixblt_16_op0(int src_is_linear, int dst_is_linear); + void pixblt_r_1_op0(int src_is_linear, int dst_is_linear); + void pixblt_r_2_op0(int src_is_linear, int dst_is_linear); + void pixblt_r_4_op0(int src_is_linear, int dst_is_linear); + void pixblt_r_8_op0(int src_is_linear, int dst_is_linear); + void pixblt_r_16_op0(int src_is_linear, int dst_is_linear); + void pixblt_b_1_op0(int dst_is_linear); + void pixblt_b_2_op0(int dst_is_linear); + void pixblt_b_4_op0(int dst_is_linear); + void pixblt_b_8_op0(int dst_is_linear); + void pixblt_b_16_op0(int dst_is_linear); + void fill_1_op0(int dst_is_linear); + void fill_2_op0(int dst_is_linear); + void fill_4_op0(int dst_is_linear); + void fill_8_op0(int dst_is_linear); + void fill_16_op0(int dst_is_linear); + void pixblt_1_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_2_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_4_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_8_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_16_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_1_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_2_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_4_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_8_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_16_op0_trans(int src_is_linear, int dst_is_linear); + void pixblt_b_1_op0_trans(int dst_is_linear); + void pixblt_b_2_op0_trans(int dst_is_linear); + void pixblt_b_4_op0_trans(int dst_is_linear); + void pixblt_b_8_op0_trans(int dst_is_linear); + void pixblt_b_16_op0_trans(int dst_is_linear); + void fill_1_op0_trans(int dst_is_linear); + void fill_2_op0_trans(int dst_is_linear); + void fill_4_op0_trans(int dst_is_linear); + void fill_8_op0_trans(int dst_is_linear); + void fill_16_op0_trans(int dst_is_linear); + void pixblt_1_opx(int src_is_linear, int dst_is_linear); + void pixblt_2_opx(int src_is_linear, int dst_is_linear); + void pixblt_4_opx(int src_is_linear, int dst_is_linear); + void pixblt_8_opx(int src_is_linear, int dst_is_linear); + void pixblt_16_opx(int src_is_linear, int dst_is_linear); + void pixblt_r_1_opx(int src_is_linear, int dst_is_linear); + void pixblt_r_2_opx(int src_is_linear, int dst_is_linear); + void pixblt_r_4_opx(int src_is_linear, int dst_is_linear); + void pixblt_r_8_opx(int src_is_linear, int dst_is_linear); + void pixblt_r_16_opx(int src_is_linear, int dst_is_linear); + void pixblt_b_1_opx(int dst_is_linear); + void pixblt_b_2_opx(int dst_is_linear); + void pixblt_b_4_opx(int dst_is_linear); + void pixblt_b_8_opx(int dst_is_linear); + void pixblt_b_16_opx(int dst_is_linear); + void fill_1_opx(int dst_is_linear); + void fill_2_opx(int dst_is_linear); + void fill_4_opx(int dst_is_linear); + void fill_8_opx(int dst_is_linear); + void fill_16_opx(int dst_is_linear); + void pixblt_1_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_2_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_4_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_8_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_16_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_1_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_2_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_4_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_8_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_r_16_opx_trans(int src_is_linear, int dst_is_linear); + void pixblt_b_1_opx_trans(int dst_is_linear); + void pixblt_b_2_opx_trans(int dst_is_linear); + void pixblt_b_4_opx_trans(int dst_is_linear); + void pixblt_b_8_opx_trans(int dst_is_linear); + void pixblt_b_16_opx_trans(int dst_is_linear); + void fill_1_opx_trans(int dst_is_linear); + void fill_2_opx_trans(int dst_is_linear); + void fill_4_opx_trans(int dst_is_linear); + void fill_8_opx_trans(int dst_is_linear); + void fill_16_opx_trans(int dst_is_linear); + void check_interrupt(); + void set_pixel_function(); + void set_raster_op(); + +}; + + +class tms34010_device : public tms340x0_device +{ +public: + tms34010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + /* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */ + virtual DECLARE_WRITE16_MEMBER( io_register_w ); + virtual DECLARE_READ16_MEMBER( io_register_r ); + +protected: + virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 8 - 1) / 8; } + virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 8); } + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); }; extern const device_type TMS34010; -class tms34020_device : public tms34010_device +class tms34020_device : public tms340x0_device { public: - tms34020_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock); + tms34020_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + /* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */ - DECLARE_WRITE16_MEMBER( io_register_w ); - DECLARE_READ16_MEMBER( io_register_r ); + virtual DECLARE_WRITE16_MEMBER( io_register_w ); + virtual DECLARE_READ16_MEMBER( io_register_r ); + +protected: + virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 4 - 1) / 4; } + virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 4); } + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); }; extern const device_type TMS34020; diff --git a/src/mame/drivers/artmagic.c b/src/mame/drivers/artmagic.c index e0fb0e17753..9390f92ee89 100644 --- a/src/mame/drivers/artmagic.c +++ b/src/mame/drivers/artmagic.c @@ -475,7 +475,7 @@ ADDRESS_MAP_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -827,7 +827,7 @@ static MACHINE_CONFIG_START( artmagic, artmagic_state ) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_ADD("tms", TMS34010, MASTER_CLOCK_40MHz) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(tms_map) MCFG_QUANTUM_TIME(attotime::from_hz(6000)) diff --git a/src/mame/drivers/btoads.c b/src/mame/drivers/btoads.c index 2e0629a88f3..242fc96845a 100644 --- a/src/mame/drivers/btoads.c +++ b/src/mame/drivers/btoads.c @@ -299,7 +299,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -323,7 +323,7 @@ static const tms34010_config tms_config = static MACHINE_CONFIG_START( btoads, btoads_state ) MCFG_CPU_ADD("maincpu", TMS34020, CPU_CLOCK/2) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_ADD("audiocpu", Z80, SOUND_CLOCK/4) diff --git a/src/mame/drivers/coolpool.c b/src/mame/drivers/coolpool.c index cdea8288585..59a09ad6985 100644 --- a/src/mame/drivers/coolpool.c +++ b/src/mame/drivers/coolpool.c @@ -794,7 +794,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config_amerdart = +static const tms340x0_config tms_config_amerdart = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -808,7 +808,7 @@ static const tms34010_config tms_config_amerdart = }; -static const tms34010_config tms_config_coolpool = +static const tms340x0_config tms_config_coolpool = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -833,7 +833,7 @@ static MACHINE_CONFIG_START( amerdart, coolpool_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, XTAL_40MHz) - MCFG_CPU_CONFIG(tms_config_amerdart) + MCFG_TMS340X0_CONFIG(tms_config_amerdart) MCFG_CPU_PROGRAM_MAP(amerdart_map) MCFG_CPU_ADD("dsp", TMS32015, XTAL_40MHz/2) @@ -864,7 +864,7 @@ static MACHINE_CONFIG_START( coolpool, coolpool_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, XTAL_40MHz) - MCFG_CPU_CONFIG(tms_config_coolpool) + MCFG_TMS340X0_CONFIG(tms_config_coolpool) MCFG_CPU_PROGRAM_MAP(coolpool_map) MCFG_CPU_ADD("dsp", TMS32026,XTAL_40MHz) diff --git a/src/mame/drivers/exterm.c b/src/mame/drivers/exterm.c index 29a3edde38e..aa0ec6e709f 100644 --- a/src/mame/drivers/exterm.c +++ b/src/mame/drivers/exterm.c @@ -400,7 +400,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config master_config = +static const tms340x0_config master_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -413,7 +413,7 @@ static const tms34010_config master_config = exterm_from_shiftreg_master /* read from shiftreg function */ }; -static const tms34010_config slave_config = +static const tms340x0_config slave_config = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -438,11 +438,11 @@ static MACHINE_CONFIG_START( exterm, exterm_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, 40000000) - MCFG_CPU_CONFIG(master_config) + MCFG_TMS340X0_CONFIG(master_config) MCFG_CPU_PROGRAM_MAP(master_map) MCFG_CPU_ADD("slave", TMS34010, 40000000) - MCFG_CPU_CONFIG(slave_config) + MCFG_TMS340X0_CONFIG(slave_config) MCFG_CPU_PROGRAM_MAP(slave_map) MCFG_CPU_ADD("audiocpu", M6502, 2000000) diff --git a/src/mame/drivers/harddriv.c b/src/mame/drivers/harddriv.c index 0a4cd19d3ef..3d46391cae4 100644 --- a/src/mame/drivers/harddriv.c +++ b/src/mame/drivers/harddriv.c @@ -338,7 +338,7 @@ Notes: *************************************/ /* used on the medium-resolution driver boards */ -static const tms34010_config gsp_config_driver = +static const tms340x0_config gsp_config_driver = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -353,7 +353,7 @@ static const tms34010_config gsp_config_driver = /* used on the low-resolution multisync boards for harddrivc, racedrivc, steeltal */ -static const tms34010_config gsp_config_multisync = +static const tms340x0_config gsp_config_multisync = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -368,7 +368,7 @@ static const tms34010_config gsp_config_multisync = /* used on the low-resolution multisync board for stunrun */ -static const tms34010_config gsp_config_multisync_stunrun = +static const tms340x0_config gsp_config_multisync_stunrun = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -382,7 +382,7 @@ static const tms34010_config gsp_config_multisync_stunrun = }; -static const tms34010_config msp_config = +static const tms340x0_config msp_config = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -1296,7 +1296,7 @@ static MACHINE_CONFIG_START( driver_nomsp, harddriv_state ) MCFG_CPU_ADD("gsp", TMS34010, HARDDRIV_GSP_CLOCK) MCFG_CPU_PROGRAM_MAP(driver_gsp_map) - MCFG_CPU_CONFIG(gsp_config_driver) + MCFG_TMS340X0_CONFIG(gsp_config_driver) MCFG_QUANTUM_TIME(attotime::from_hz(30000)) @@ -1328,7 +1328,7 @@ static MACHINE_CONFIG_DERIVED( driver_msp, driver_nomsp ) /* basic machine hardware */ MCFG_CPU_ADD("msp", TMS34010, XTAL_50MHz) MCFG_CPU_PROGRAM_MAP(driver_msp_map) - MCFG_CPU_CONFIG(msp_config) + MCFG_TMS340X0_CONFIG(msp_config) MACHINE_CONFIG_END @@ -1340,7 +1340,7 @@ static MACHINE_CONFIG_DERIVED( multisync_nomsp, driver_nomsp ) MCFG_CPU_PROGRAM_MAP(multisync_68k_map) MCFG_CPU_MODIFY("gsp") - MCFG_CPU_CONFIG(gsp_config_multisync) + MCFG_TMS340X0_CONFIG(gsp_config_multisync) MCFG_CPU_PROGRAM_MAP(multisync_gsp_map) /* video hardware */ @@ -1355,7 +1355,7 @@ static MACHINE_CONFIG_DERIVED( multisync_msp, multisync_nomsp ) /* basic machine hardware */ MCFG_CPU_ADD("msp", TMS34010, XTAL_50MHz) MCFG_CPU_PROGRAM_MAP(driver_msp_map) - MCFG_CPU_CONFIG(msp_config) + MCFG_TMS340X0_CONFIG(msp_config) MACHINE_CONFIG_END @@ -1530,7 +1530,7 @@ static MACHINE_CONFIG_DERIVED( stunrun, multisync_nomsp ) /* basic machine hardware */ /* multisync board without MSP */ MCFG_CPU_MODIFY("gsp") - MCFG_CPU_CONFIG(gsp_config_multisync_stunrun) + MCFG_TMS340X0_CONFIG(gsp_config_multisync_stunrun) MCFG_FRAGMENT_ADD( adsp ) /* ADSP board */ /* video hardware */ diff --git a/src/mame/drivers/jpmimpct.c b/src/mame/drivers/jpmimpct.c index c22777b33b2..e4ea70db568 100644 --- a/src/mame/drivers/jpmimpct.c +++ b/src/mame/drivers/jpmimpct.c @@ -826,7 +826,7 @@ static void jpmimpct_tms_irq(device_t *device, int state) drvstate->update_irqs(); } -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -851,7 +851,7 @@ static MACHINE_CONFIG_START( jpmimpct, jpmimpct_state ) MCFG_CPU_PROGRAM_MAP(m68k_program_map) MCFG_CPU_ADD("dsp", TMS34010, 40000000) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(tms_program_map) MCFG_QUANTUM_TIME(attotime::from_hz(30000)) diff --git a/src/mame/drivers/lethalj.c b/src/mame/drivers/lethalj.c index 6c28380569c..36bd6e29c6c 100644 --- a/src/mame/drivers/lethalj.c +++ b/src/mame/drivers/lethalj.c @@ -629,7 +629,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -641,7 +641,7 @@ static const tms34010_config tms_config = NULL /* read from shiftreg function */ }; -static const tms34010_config tms_config_lethalj = +static const tms340x0_config tms_config_lethalj = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -665,7 +665,7 @@ static MACHINE_CONFIG_START( gameroom, lethalj_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, MASTER_CLOCK) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(lethalj_map) MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH) @@ -695,7 +695,7 @@ MACHINE_CONFIG_END static MACHINE_CONFIG_DERIVED( lethalj, gameroom ) MCFG_CPU_MODIFY("maincpu") - MCFG_CPU_CONFIG(tms_config_lethalj) + MCFG_TMS340X0_CONFIG(tms_config_lethalj) MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK_LETHALJ, 689, 0, 512, 259, 0, 236) diff --git a/src/mame/drivers/metalmx.c b/src/mame/drivers/metalmx.c index d2aa4799e63..ec9de21f2cd 100644 --- a/src/mame/drivers/metalmx.c +++ b/src/mame/drivers/metalmx.c @@ -688,7 +688,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config gsp_config = +static const tms340x0_config gsp_config = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -715,7 +715,7 @@ static MACHINE_CONFIG_START( metalmx, metalmx_state ) MCFG_CPU_DATA_MAP(adsp_data_map) MCFG_CPU_ADD("gsp", TMS34020, 40000000) /* Unverified */ - MCFG_CPU_CONFIG(gsp_config) + MCFG_TMS340X0_CONFIG(gsp_config) MCFG_CPU_PROGRAM_MAP(gsp_map) MCFG_CPU_ADD("dsp32c_1", DSP32C, 40000000) /* Unverified */ diff --git a/src/mame/drivers/micro3d.c b/src/mame/drivers/micro3d.c index 419bb3bb68c..8958d280d50 100644 --- a/src/mame/drivers/micro3d.c +++ b/src/mame/drivers/micro3d.c @@ -286,7 +286,7 @@ ADDRESS_MAP_END * *************************************/ -static const tms34010_config vgb_config = +static const tms340x0_config vgb_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -312,7 +312,7 @@ static MACHINE_CONFIG_START( micro3d, micro3d_state ) MCFG_CPU_VBLANK_INT_DRIVER("screen", micro3d_state, micro3d_vblank) MCFG_CPU_ADD("vgb", TMS34010, XTAL_40MHz) - MCFG_CPU_CONFIG(vgb_config) + MCFG_TMS340X0_CONFIG(vgb_config) MCFG_CPU_PROGRAM_MAP(vgbmem) MCFG_CPU_ADD("drmath", AM29000, XTAL_32MHz / 2) diff --git a/src/mame/drivers/midtunit.c b/src/mame/drivers/midtunit.c index d68852f0c36..3f6a2885a00 100644 --- a/src/mame/drivers/midtunit.c +++ b/src/mame/drivers/midtunit.c @@ -579,7 +579,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -604,7 +604,7 @@ static MACHINE_CONFIG_START( tunit_core, midtunit_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, CPU_CLOCK) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_MACHINE_RESET_OVERRIDE(midtunit_state,midtunit) diff --git a/src/mame/drivers/midwunit.c b/src/mame/drivers/midwunit.c index 575ec8b7fe6..1b2e857b610 100644 --- a/src/mame/drivers/midwunit.c +++ b/src/mame/drivers/midwunit.c @@ -615,7 +615,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -639,7 +639,7 @@ static const tms34010_config tms_config = static MACHINE_CONFIG_START( wunit, midwunit_state ) MCFG_CPU_ADD("maincpu", TMS34010, 50000000) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_MACHINE_RESET_OVERRIDE(midwunit_state,midwunit) diff --git a/src/mame/drivers/midxunit.c b/src/mame/drivers/midxunit.c index 4188f96d42b..731afdbcc28 100644 --- a/src/mame/drivers/midxunit.c +++ b/src/mame/drivers/midxunit.c @@ -239,7 +239,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -264,7 +264,7 @@ static MACHINE_CONFIG_START( midxunit, midxunit_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34020, 40000000) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_MACHINE_RESET_OVERRIDE(midxunit_state,midxunit) diff --git a/src/mame/drivers/midyunit.c b/src/mame/drivers/midyunit.c index 8d45f7b81d5..fa35df5e2e3 100644 --- a/src/mame/drivers/midyunit.c +++ b/src/mame/drivers/midyunit.c @@ -1066,7 +1066,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config zunit_tms_config = +static const tms340x0_config zunit_tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -1079,7 +1079,7 @@ static const tms34010_config zunit_tms_config = midyunit_from_shiftreg /* read from shiftreg function */ }; -static const tms34010_config yunit_tms_config = +static const tms340x0_config yunit_tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -1104,7 +1104,7 @@ static MACHINE_CONFIG_START( zunit, midyunit_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, FAST_MASTER_CLOCK) - MCFG_CPU_CONFIG(zunit_tms_config) + MCFG_TMS340X0_CONFIG(zunit_tms_config) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_MACHINE_RESET_OVERRIDE(midyunit_state,midyunit) @@ -1140,7 +1140,7 @@ static MACHINE_CONFIG_START( yunit_core, midyunit_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, SLOW_MASTER_CLOCK) - MCFG_CPU_CONFIG(yunit_tms_config) + MCFG_TMS340X0_CONFIG(yunit_tms_config) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_MACHINE_RESET_OVERRIDE(midyunit_state,midyunit) diff --git a/src/mame/drivers/potgoldu.c b/src/mame/drivers/potgoldu.c index 338abe714b9..9e76e0c015a 100644 --- a/src/mame/drivers/potgoldu.c +++ b/src/mame/drivers/potgoldu.c @@ -64,7 +64,7 @@ static INPUT_PORTS_START( potgold ) INPUT_PORTS_END -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -82,7 +82,7 @@ static MACHINE_CONFIG_START( potgold, potgold_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, XTAL_40MHz) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(potgold_map) diff --git a/src/mame/drivers/skeetsht.c b/src/mame/drivers/skeetsht.c index 053896ffef4..d98cf721de4 100644 --- a/src/mame/drivers/skeetsht.c +++ b/src/mame/drivers/skeetsht.c @@ -219,7 +219,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { TRUE, /* halt on reset */ "screen", /* the screen operated on */ @@ -248,7 +248,7 @@ static MACHINE_CONFIG_START( skeetsht, skeetsht_state ) MCFG_MC68HC11_CONFIG( 0, 0x100, 0x01 ) // And 512 bytes EEPROM? (68HC11A1) MCFG_CPU_ADD("tms", TMS34010, 48000000) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(tms_program_map) diff --git a/src/mame/drivers/skimaxx.c b/src/mame/drivers/skimaxx.c index 25e7a8df602..458ec2fd088 100644 --- a/src/mame/drivers/skimaxx.c +++ b/src/mame/drivers/skimaxx.c @@ -467,7 +467,7 @@ static void skimaxx_tms_irq(device_t *device, int state) // TODO } -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -508,7 +508,7 @@ static MACHINE_CONFIG_START( skimaxx, skimaxx_state ) /* video hardware */ MCFG_CPU_ADD("tms", TMS34010, XTAL_50MHz) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(tms_program_map) MCFG_SCREEN_ADD("screen", RASTER) diff --git a/src/mame/drivers/tickee.c b/src/mame/drivers/tickee.c index f5dc04c6674..700d6720872 100644 --- a/src/mame/drivers/tickee.c +++ b/src/mame/drivers/tickee.c @@ -735,7 +735,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -749,7 +749,7 @@ static const tms34010_config tms_config = }; -static const tms34010_config rapidfir_tms_config = +static const tms340x0_config rapidfir_tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -774,7 +774,7 @@ static MACHINE_CONFIG_START( tickee, tickee_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, XTAL_40MHz) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(tickee_map) MCFG_MACHINE_RESET_OVERRIDE(tickee_state,tickee) @@ -819,7 +819,7 @@ static MACHINE_CONFIG_START( rapidfir, tickee_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, XTAL_50MHz) - MCFG_CPU_CONFIG(rapidfir_tms_config) + MCFG_TMS340X0_CONFIG(rapidfir_tms_config) MCFG_CPU_PROGRAM_MAP(rapidfir_map) MCFG_MACHINE_RESET_OVERRIDE(tickee_state,rapidfir) @@ -846,7 +846,7 @@ static MACHINE_CONFIG_START( mouseatk, tickee_state ) /* basic machine hardware */ MCFG_CPU_ADD("maincpu", TMS34010, XTAL_40MHz) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(mouseatk_map) MCFG_MACHINE_RESET_OVERRIDE(tickee_state,tickee) diff --git a/src/mame/drivers/xtheball.c b/src/mame/drivers/xtheball.c index 7a37b2db0ba..75ef607e0ec 100644 --- a/src/mame/drivers/xtheball.c +++ b/src/mame/drivers/xtheball.c @@ -322,7 +322,7 @@ INPUT_PORTS_END * *************************************/ -static const tms34010_config tms_config = +static const tms340x0_config tms_config = { FALSE, /* halt on reset */ "screen", /* the screen operated on */ @@ -346,7 +346,7 @@ static const tms34010_config tms_config = static MACHINE_CONFIG_START( xtheball, xtheball_state ) MCFG_CPU_ADD("maincpu", TMS34010, 40000000) - MCFG_CPU_CONFIG(tms_config) + MCFG_TMS340X0_CONFIG(tms_config) MCFG_CPU_PROGRAM_MAP(main_map) MCFG_CPU_PERIODIC_INT_DRIVER(xtheball_state, irq1_line_hold, 15000) diff --git a/src/mame/machine/inder_vid.c b/src/mame/machine/inder_vid.c index 3a68cb6884d..032f2091f37 100644 --- a/src/mame/machine/inder_vid.c +++ b/src/mame/machine/inder_vid.c @@ -90,7 +90,7 @@ static void m68k_gen_int(device_t *device, int state) } -static const tms34010_config tms_config_megaphx = +static const tms340x0_config tms_config_megaphx = { TRUE, /* halt on reset */ "inder_vid:inder_screen", /* the screen operated on */ @@ -110,7 +110,7 @@ ADDRESS_MAP_END static MACHINE_CONFIG_FRAGMENT( inder_vid ) MCFG_CPU_ADD("tms", TMS34010, XTAL_40MHz) - MCFG_CPU_CONFIG(tms_config_megaphx) + MCFG_TMS340X0_CONFIG(tms_config_megaphx) MCFG_CPU_PROGRAM_MAP(megaphx_tms_map) MCFG_SCREEN_ADD("inder_screen", RASTER) diff --git a/src/mame/video/exterm.c b/src/mame/video/exterm.c index e8710cdb7f6..76cc63e52f1 100644 --- a/src/mame/video/exterm.c +++ b/src/mame/video/exterm.c @@ -79,7 +79,7 @@ void exterm_scanline_update(screen_device &screen, bitmap_ind16 &bitmap, int sca int x; /* get parameters for the slave CPU */ - tms34010_get_display_params(state->m_slave, &fgparams); + state->m_slave->get_display_params(&fgparams); /* compute info about the slave vram */ if (fgparams.enabled && scanline >= fgparams.veblnk && scanline < fgparams.vsblnk && fgparams.heblnk < fgparams.hsblnk)