diff --git a/src/emu/cpu/i386/i386op16.c b/src/emu/cpu/i386/i386op16.c
index 440628a3ddc..d47bfee538d 100644
--- a/src/emu/cpu/i386/i386op16.c
+++ b/src/emu/cpu/i386/i386op16.c
@@ -1,6 +1,6 @@
 static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 value, UINT8 shift)
 {
-	UINT16 src = value;
+	UINT32 src = value & 0xffff;
 	UINT16 dst = value;
 
 	if( shift == 0 ) {
@@ -114,7 +114,7 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
 			case 6:
 				shift &= 31;
 				dst = src << shift;
-				cpustate->CF = (src & (1 << (16-shift))) ? 1 : 0;
+				cpustate->CF = (shift <= 16) && (src & (1 << (16-shift)));
 				SetSZPF16(dst);
 				CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
 				break;
diff --git a/src/emu/cpu/i386/i386ops.c b/src/emu/cpu/i386/i386ops.c
index 2bbc6604429..7dd1a68f573 100644
--- a/src/emu/cpu/i386/i386ops.c
+++ b/src/emu/cpu/i386/i386ops.c
@@ -1,6 +1,6 @@
 static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 value, UINT8 shift)
 {
-	UINT8 src = value;
+	UINT32 src = value & 0xff;
 	UINT8 dst = value;
 
 	if( shift == 0 ) {
@@ -115,7 +115,7 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
 			case 6:
 				shift &= 31;
 				dst = src << shift;
-				cpustate->CF = (src >> (8 - shift)) & 0x1;
+				cpustate->CF = (shift <= 8) && (src >> (8 - shift));
 				SetSZPF8(dst);
 				CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
 				break;