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https://github.com/holub/mame
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sdk80: now matches MCS-80 System Design Kit, and added correct monitor rom.
This commit is contained in:
Nigel Barnes
parent
728e18f768
commit
64d113d15e
@ -4,36 +4,34 @@
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Intel SDK-80
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This is an evaluation kit for the 8080 cpu.
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The 8080 System Design Kit (SDK-80) is a complete microcomputer system in
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kit form, and provides a excellent prototype vehicle for evaluation of the
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8080 microcomputer system (MCS-80).
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There is no speaker or storage facility in the standard kit.
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An extensive system monitor is included in a pre-programmed ROM for general
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software utilities and system diagnostics.
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Download the User Manual to get the operating procedures.
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Monitor Commands:
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D Display memory contents
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G Go to address (execute program at address)
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I Insert hex code
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M Move blocks of memory
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S Substitute memory locations
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X Examine registers
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Please note this rom set boots into BASIC, not monitor.
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All commands must be in upper case.
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To correct a mistake, use DEL not Backspace. It will print a \ to indicate
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a removed character.
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No known manual or schematic of the video board.
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D<low address>,<high address> Display memory contents
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G<entry point> Go to address (execute program at address)
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I<address> Insert instructions into RAM
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M<low address>,<high address>,<destination> Move blocks of memory
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S<address> Substitute memory locations
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X<register identifier> Examine and modify registers
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****************************************************************************/
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#include "emu.h"
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#include "cpu/i8085/i8085.h"
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#include "machine/i8255.h"
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#include "machine/i8251.h"
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#include "machine/clock.h"
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#include "bus/rs232/rs232.h"
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//#include "machine/ay31015.h"
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#define I8255A_0_TAG "ppi8255_0"
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#define I8255A_1_TAG "ppi8255_1"
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#define I8251A_TAG "usart"
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#define I8251A_BAUD_TAG "usart_baud"
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#define RS232_TAG "rs232"
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@ -45,19 +43,21 @@ public:
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_usart(*this, I8251A_TAG)
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, m_ppi_0(*this, I8255A_0_TAG)
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, m_ppi_1(*this, I8255A_1_TAG)
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, m_rs232(*this, RS232_TAG)
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, m_usart_baud_rate(*this, I8251A_BAUD_TAG)
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, m_usart_divide_counter(0)
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, m_usart_clock_state(0)
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{ }
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UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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DECLARE_WRITE_LINE_MEMBER( usart_clock_tick );
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private:
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required_device<cpu_device> m_maincpu;
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required_device<i8251_device> m_usart;
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required_device<i8255_device> m_ppi_0;
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required_device<i8255_device> m_ppi_1;
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required_device<rs232_port_device> m_rs232;
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required_ioport m_usart_baud_rate;
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@ -68,14 +68,16 @@ private:
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static ADDRESS_MAP_START(sdk80_mem, AS_PROGRAM, 8, sdk80_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x0fff) AM_ROM
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AM_RANGE(0x3c00, 0x3fff) AM_RAM
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AM_RANGE(0x1000, 0x13ff) AM_RAM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(sdk80_io, AS_IO, 8, sdk80_state)
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ADDRESS_MAP_UNMAP_HIGH
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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AM_RANGE(0xec, 0xec) AM_DEVREADWRITE(I8251A_TAG, i8251_device, data_r, data_w)
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AM_RANGE(0xed, 0xed) AM_DEVREADWRITE(I8251A_TAG, i8251_device, status_r, control_w)
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AM_RANGE(0xec, 0xef) AM_DEVREADWRITE(I8255A_1_TAG, i8255_device, read, write)
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AM_RANGE(0xf4, 0xf7) AM_DEVREADWRITE(I8255A_0_TAG, i8255_device, read, write)
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AM_RANGE(0xfa, 0xfa) AM_DEVREADWRITE(I8251A_TAG, i8251_device, data_r, data_w)
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AM_RANGE(0xfb, 0xfb) AM_DEVREADWRITE(I8251A_TAG, i8251_device, status_r, control_w)
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ADDRESS_MAP_END
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static INPUT_PORTS_START( sdk80 )
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@ -90,31 +92,6 @@ static INPUT_PORTS_START( sdk80 )
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PORT_DIPSETTING( 0x40, "75")
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INPUT_PORTS_END
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#if 0
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/* Graphics Output */
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const gfx_layout sdk80_charlayout =
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{
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7, 8, /* character cell is 7 pixels wide by 8 pixels high */
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64, /* 64 characters in 2513 character generator ROM */
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1, /* 1 bitplane */
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{ 0 },
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/* 5 visible pixels per row, starting at bit 3, with MSB being 0: */
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{ 3, 4, 5, 6, 7 },
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/* pixel rows stored from top to bottom: */
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{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
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8 * 8 /* 8 8-bit pixel rows per character */
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};
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static GFXDECODE_START( sdk80 )
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GFXDECODE_ENTRY( "gfx1", 0x0000, sdk80_charlayout, 0, 1 )
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GFXDECODE_END
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#endif
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UINT32 sdk80_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
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{
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return 0;
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}
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WRITE_LINE_MEMBER( sdk80_state::usart_clock_tick )
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{
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UINT8 old_counter = m_usart_divide_counter;
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@ -149,6 +126,9 @@ static MACHINE_CONFIG_START( sdk80, sdk80_state )
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MCFG_I8251_DTR_HANDLER(DEVWRITELINE(RS232_TAG, rs232_port_device, write_dtr))
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MCFG_I8251_RTS_HANDLER(DEVWRITELINE(RS232_TAG, rs232_port_device, write_rts))
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MCFG_DEVICE_ADD(I8255A_0_TAG, I8255A, 0)
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MCFG_DEVICE_ADD(I8255A_1_TAG, I8255A, 0)
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MCFG_RS232_PORT_ADD(RS232_TAG, default_rs232_devices, "terminal")
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MCFG_RS232_RXD_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_rxd))
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MCFG_RS232_DSR_HANDLER(DEVWRITELINE(I8251A_TAG, i8251_device, write_dsr))
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@ -157,63 +137,13 @@ static MACHINE_CONFIG_START( sdk80, sdk80_state )
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MCFG_DEVICE_ADD("usart_clock", CLOCK, XTAL_18_432MHz/60)
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MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(sdk80_state, usart_clock_tick))
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/* video hardware */
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// 96364 crt controller
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// MCFG_SCREEN_ADD("screen", RASTER)
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// MCFG_SCREEN_REFRESH_RATE(60)
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/* Video is blanked for 70 out of 262 scanlines per refresh cycle.
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Each scanline is composed of 65 character times, 40 of which
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are visible, and each character time is 7 dot times; a dot time
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is 2 cycles of the fundamental 14.31818 MHz oscillator. The
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total blanking time is about 4450 microseconds. */
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// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC((int) (70 * 65 * 7 * 2 / 14.31818)))
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/* It would be nice if we could implement some sort of display
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overscan here. */
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// MCFG_SCREEN_SIZE(40 * 7, 24 * 8)
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// MCFG_SCREEN_VISIBLE_AREA(0, 40 * 7 - 1, 0, 24 * 8 - 1)
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// MCFG_SCREEN_UPDATE_DRIVER(sdk80_state, screen_update)
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// MCFG_SCREEN_PALETTE("palette")
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// MCFG_GFXDECODE_ADD("gfxdecode", "palette", sdk80)
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// MCFG_PALETTE_ADD_MONOCHROME("palette")
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// Video board UART
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// MCFG_DEVICE_ADD( "hd6402", AY31015, 0 )
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// MCFG_AY31015_TX_CLOCK(( XTAL_16MHz / 16 ) / 256)
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// MCFG_AY31015_RX_CLOCK(( XTAL_16MHz / 16 ) / 256)
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// MCFG_AY51013_READ_SI_CB(READ8(sdk80_state, nascom1_hd6402_si))
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// MCFG_AY51013_WRITE_SO_CB(WRITE8(sdk80_state, nascom1_hd6402_so))
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/* Devices */
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// MCFG_DEVICE_ADD("i8279", I8279, 3100000) // based on divider
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// MCFG_I8279_OUT_IRQ_CB(INPUTLINE("maincpu", I8085_RST55_LINE)) // irq
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// MCFG_I8279_OUT_SL_CB(WRITE8(sdk80_state, scanlines_w)) // scan SL lines
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// MCFG_I8279_OUT_DISP_CB(WRITE8(sdk80_state, digit_w)) // display A&B
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// MCFG_I8279_IN_RL_CB(READ8(sdk80_state, kbd_r)) // kbd RL lines
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// MCFG_I8279_IN_SHIFT_CB(VCC) // Shift key
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// MCFG_I8279_IN_CTRL_CB(VCC)
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MACHINE_CONFIG_END
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/* ROM definition */
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ROM_START( sdk80 )
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ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF )
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ROM_LOAD( "basic_blc_1.a14", 0x0000, 0x0400, CRC(b5e75aee) SHA1(6bd1eb9586d72544e8afb4ae43ecedcefa14da33))
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ROM_LOAD( "basic_blc_2.a15", 0x0400, 0x0400, CRC(0a9ad1ed) SHA1(92c47eadcf8b18eeedcccaa3deb9f1518aaceeae))
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ROM_LOAD( "basic_blc_3.a16", 0x0800, 0x0400, CRC(bc898e4b) SHA1(adc000534db0f736a75fbceed360dc220e02c30d))
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ROM_LOAD( "basic_blc_4.a17", 0x0c00, 0x0400, CRC(568e8b6d) SHA1(22960193d3b0ae1b5d876d8c3b3f3b40db01358c))
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/* 512-byte Signetics 2513 character generator ROM at location D2-D3 */
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ROM_REGION(0x0200, "gfx1",0)
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ROM_LOAD("s2513.d2", 0x0000, 0x0200, CRC(a7e567fc) SHA1(b18aae0a2d4f92f5a7e22640719bbc4652f3f4ee))
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/* 256x4 PROM located on the video board, schematic location P7, to be moved into separate device later */
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ROM_REGION( 0x0120, "proms", 0 )
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ROM_LOAD( "6300__d7.p7", 0x0020, 0x0100, CRC(3eb3a8e4) SHA1(19097b5f60d1030f8b82d9f1d3a241f93e5c75d6) )
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ROM_REGION( 0x01400, "maincpu", ROMREGION_ERASEFF )
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ROM_LOAD( "mcs80.a14", 0x0000, 0x0400, BAD_DUMP CRC(3ce7bd37) SHA1(04cc67875b53d4cdfefce07041af12be3acedf4f)) // Compiled from manual listing
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ROM_END
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/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
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COMP( 1975, sdk80, 0, 0, sdk80, sdk80, driver_device, 0, "Intel", "SDK-80", MACHINE_NO_SOUND_HW )
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/* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */
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COMP( 1975, sdk80, 0, 0, sdk80, sdk80, driver_device, 0, "Intel", "SDK-80", MACHINE_NO_SOUND_HW )
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