diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index d5062e003af..ad1d88f6a95 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -7,7 +7,7 @@ Acer CPR 1995 Acer America Corporation - + diff --git a/hash/msx1_flop.xml b/hash/msx1_flop.xml index 3399409c522..df5a8e091ac 100644 --- a/hash/msx1_flop.xml +++ b/hash/msx1_flop.xml @@ -160,7 +160,7 @@ The following floppies came with the machines. @@ -1523,7 +1523,7 @@ The following floppies came with the machines. - @@ -1856,7 +1856,7 @@ The following floppies came with the machines. - + <tape2disk hack> @@ -4059,7 +4059,7 @@ The following floppies came with the machines. - @@ -375,8 +375,8 @@ The following floppies came with the machines. - + @@ -403,8 +403,8 @@ The following floppies came with the machines. - + @@ -431,8 +431,8 @@ The following floppies came with the machines. - + @@ -459,8 +459,8 @@ The following floppies came with the machines. - + @@ -13058,7 +13058,7 @@ The following floppies came with the machines. - 3 Clocks Offset */ - EXTCLOCK(Y1, 14318000.0, "4,4,4,4,4,8") - EXTCLOCK(Y2, 14318000.0, "2,6,2,6,2,2,2,6") - PARAM(Y2.OFFSET, 3.0 / 14318000.0 + 20.0e-9 ) + EXTCLOCK(Y1, 14318000.0, "4,4,4,4,4,8") + EXTCLOCK(Y2, 14318000.0, "2,6,2,6,2,2,2,6") + PARAM(Y2.OFFSET, 3.0 / 14318000.0 + 20.0e-9 ) #define CKBH "Y1", Q #define DICECLOCK "Y2", Q - NET_C(ttlhigh, H1.13) - NET_C(ttlhigh, H1.12) - NET_C(ttlhigh, E1.5) + NET_C(ttlhigh, H1.13) + NET_C(ttlhigh, H1.12) + NET_C(ttlhigh, E1.5) #endif //---------------------------------------------------------------- @@ -175,38 +175,38 @@ CIRCUIT_LAYOUT( breakout ) TTL_INPUT(antenna, 0) - DIODE(CR3, "1N914") - DIODE(CR4, "1N914") - DIODE(CR5, "1N914") - DIODE(CR7, "1N914") + DIODE(CR3, "1N914") + DIODE(CR4, "1N914") + DIODE(CR5, "1N914") + DIODE(CR7, "1N914") - QBJT_EB(Q1, "2N3644") - QBJT_EB(Q2, "2N3643") - QBJT_EB(Q3, "2N3643") - CAP(C19, CAP_U(0.1)) - CAP(C16, CAP_U(0.1)) + QBJT_EB(Q1, "2N3644") + QBJT_EB(Q2, "2N3643") + QBJT_EB(Q3, "2N3643") + CAP(C19, CAP_U(0.1)) + CAP(C16, CAP_U(0.1)) - RES(R25, 100) - RES(R26, 330) - RES(R27, 100) - RES(R31, 220) - RES(R32, 100) + RES(R25, 100) + RES(R26, 330) + RES(R27, 100) + RES(R31, 220) + RES(R32, 100) - NET_C(GND, CR5.A, Q2.E, C16.2, R25.2, Q3.E) - NET_C(CR5.K, Q2.B, antenna) - NET_C(Q2.C, C16.1, R25.1, Q3.B, R27.2) - NET_C(R27.1, CR7.A, R31.2) //CR7.K == IN - NET_C(R31.1, Q1.C) - NET_C(Q3.C, R26.2, CR3.A, CR4.A, E9.5) // E9.6 = Q Q3.C=QQ CR3.K = COIN*1 CR4.K = COIN*2 - NET_C(R26.1, Q1.B, C19.2, R32.2) - NET_C(Q1.E, C19.1, R32.1, V5) + NET_C(GND, CR5.A, Q2.E, C16.2, R25.2, Q3.E) + NET_C(CR5.K, Q2.B, antenna) + NET_C(Q2.C, C16.1, R25.1, Q3.B, R27.2) + NET_C(R27.1, CR7.A, R31.2) //CR7.K == IN + NET_C(R31.1, Q1.C) + NET_C(Q3.C, R26.2, CR3.A, CR4.A, E9.5) // E9.6 = Q Q3.C=QQ CR3.K = COIN*1 CR4.K = COIN*2 + NET_C(R26.1, Q1.B, C19.2, R32.2) + NET_C(Q1.E, C19.1, R32.1, V5) #define LAT_Q "E9", 6 #define Q_n "Q3", C #define COIN1_n "F8", 5 #define COIN2_n "H9", 5 - CONNECTION("CR7", K, "D8", 11) //set + CONNECTION("CR7", K, "D8", 11) //set CONNECTION("CR3", K, COIN1_n) //reset CONNECTION("CR4", K, COIN2_n) //reset @@ -440,31 +440,31 @@ CIRCUIT_LAYOUT( breakout ) #define EGL "C37" , 2 #define EGL_n "C5", 2 - #define RAM_PLAYER1 "E7", 4 - #define A1 "H6", 14 - #define B1 "H6", 13 - #define C1 "H6", 12 - #define D1 "H6", 11 - #define E1 "J6", 14 - #define F1 "J6", 13 - #define G1 "J6", 12 - #define H01 "J6", 11 - #define I1 "K6", 14 - #define J1 "K6", 13 - #define K1 "K6", 12 - #define L1 "K6", 11 - #define A2 "N6", 14 - #define B2 "N6", 13 - #define C2 "N6", 12 - #define D2 "N6", 11 - #define E2s "M6", 14 - #define F2 "M6", 13 - #define G2 "M6", 12 - #define H02 "M6", 11 //TODO: better name for these signals - #define I2 "L6", 14 - #define J2 "L6", 13 - #define K2 "L6", 12 - #define L2 "L6", 11 + #define RAM_PLAYER1 "E7", 4 + #define A1 "H6", 14 + #define B1 "H6", 13 + #define C1 "H6", 12 + #define D1 "H6", 11 + #define E1 "J6", 14 + #define F1 "J6", 13 + #define G1 "J6", 12 + #define H01 "J6", 11 + #define I1 "K6", 14 + #define J1 "K6", 13 + #define K1 "K6", 12 + #define L1 "K6", 11 + #define A2 "N6", 14 + #define B2 "N6", 13 + #define C2 "N6", 12 + #define D2 "N6", 11 + #define E2s "M6", 14 + #define F2 "M6", 13 + #define G2 "M6", 12 + #define H02 "M6", 11 //TODO: better name for these signals + #define I2 "L6", 14 + #define J2 "L6", 13 + #define K2 "L6", 12 + #define L2 "L6", 11 #define CX0 "C6", 11 #define CX1 "C6", 6 @@ -772,18 +772,18 @@ CIRCUIT_LAYOUT( breakout ) CONNECTION(BALL_C, "C4", 10) CONNECTION("A4", 11, "C4", 9) - CONNECTION(A2, "N5", 1) - CONNECTION(E2s, "N5", 2) - CONNECTION(I2, "N5", 3) - CONNECTION("C5", 6, "N5", 4) - CONNECTION(A1, "N5", 5) - CONNECTION(E1, "N5", 6) - CONNECTION(I1, "N5", 7) - CONNECTION(PLAYER_2_n, "N5", 9) - CONNECTION(H32_n, "N5", 10) - CONNECTION(V16, "N5", 11) - CONNECTION(V64, "N5", 12) - CONNECTION(V128, "N5", 13) + CONNECTION(A2, "N5", 1) + CONNECTION(E2s, "N5", 2) + CONNECTION(I2, "N5", 3) + CONNECTION("C5", 6, "N5", 4) + CONNECTION(A1, "N5", 5) + CONNECTION(E1, "N5", 6) + CONNECTION(I1, "N5", 7) + CONNECTION(PLAYER_2_n, "N5", 9) + CONNECTION(H32_n, "N5", 10) + CONNECTION(V16, "N5", 11) + CONNECTION(V64, "N5", 12) + CONNECTION(V128, "N5", 13) CONNECTION(B2, "M5", 1) CONNECTION(F2, "M5", 2) @@ -1561,7 +1561,7 @@ CIRCUIT_LAYOUT( breakout ) CONNECTION(PSYNC, "B9", 1) CONNECTION(VSYNC_n, "B9", 2) - // VIDEO SUMMING + // VIDEO SUMMING RES(R41, RES_K(3.9)) RES(R42, RES_K(3.9)) RES(R43, RES_K(3.9)) diff --git a/src/mame/drivers/nl_pong.c b/src/mame/drivers/nl_pong.c index f13283cdfb9..187a7eb41d8 100644 --- a/src/mame/drivers/nl_pong.c +++ b/src/mame/drivers/nl_pong.c @@ -9,14 +9,14 @@ #include "netlist/devices/net_lib.h" -#define FAST_CLOCK (1) +#define FAST_CLOCK (1) NETLIST_START(pong_fast) SOLVER(Solver, 48000) PARAM(Solver.PARALLEL, 0) // Don't do parallel solvers PARAM(Solver.ACCURACY, 1e-4) // works and is sufficient PARAM(Solver.LTE, 1e-4) // Default is not enough for paddle control if using LTE - PARAM(NETLIST.USE_DEACTIVATE, 1) + PARAM(NETLIST.USE_DEACTIVATE, 1) ANALOG_INPUT(V5, 5) diff --git a/src/mame/drivers/nwk-tr.c b/src/mame/drivers/nwk-tr.c index fdb032d4d82..84bd7385d7a 100644 --- a/src/mame/drivers/nwk-tr.c +++ b/src/mame/drivers/nwk-tr.c @@ -2,32 +2,32 @@ // copyright-holders:Ville Linde /* Konami NWK-TR System - Driver by Ville Linde + Driver by Ville Linde - Hardware overview: + Hardware overview: - GN676 CPU Board: - ---------------- - IBM PowerPC 403GA at 32MHz (main CPU) - Motorola MC68EC000 at 16MHz (sound CPU) - Konami K056800 (MIRAC), sound system interface - Ricoh RF5c400 sound chip - National Semiconductor ADC12138 + GN676 CPU Board: + ---------------- + IBM PowerPC 403GA at 32MHz (main CPU) + Motorola MC68EC000 at 16MHz (sound CPU) + Konami K056800 (MIRAC), sound system interface + Ricoh RF5c400 sound chip + National Semiconductor ADC12138 - GN676 GFX Board: - ---------------- - Analog Devices ADSP-21062 SHARC DSP at 36MHz - Konami K001604 (2D tilemaps + 2x ROZ) - Konami 0000033906 (PCI bridge) - 3DFX 500-0003-03 (Voodoo) FBI with 2MB RAM - 2x 3DFX 500-0004-02 (Voodoo) TMU with 2MB RAM + GN676 GFX Board: + ---------------- + Analog Devices ADSP-21062 SHARC DSP at 36MHz + Konami K001604 (2D tilemaps + 2x ROZ) + Konami 0000033906 (PCI bridge) + 3DFX 500-0003-03 (Voodoo) FBI with 2MB RAM + 2x 3DFX 500-0004-02 (Voodoo) TMU with 2MB RAM - GN676 LAN Board: - ---------------- - Xilinx XC5210 FPGA - Xilinx XC5204 FPGA + GN676 LAN Board: + ---------------- + Xilinx XC5210 FPGA + Xilinx XC5204 FPGA Konami 'NWK-TR' Hardware @@ -90,56 +90,56 @@ Konami 1997 |M48T58Y-70PC1 CN4 DSW(8) CN6 64.000MHz| |--------------------------------------------------------------| Notes: - DRM1M4SJ8 - Fujitsu 81C4256 256kx4 DRAM (SOJ24) - SRAM256K - Cypress CY7C199 32kx8 SRAM (SOJ28) - DRAM16X16 - Fujitsu 8118160A-60 16megx16 DRAM (SOJ42) - M48T58Y-70PC1 - ST Timekeeper RAM - RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz - 056800 - Konami Custom (QFP80) - 058232 - Konami Custom Ceramic Package (SIL14) - ADC12138 - National Semiconductor ADC12138 A/D Converter, 12-bit + Serial I/O With MUX (SOP28) - MACH111 - AMD MACH111 CPLD (Stamped 'N676A1', PLCC44) - 68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4) - PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (64/2) (QFP160) - SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter (SOIC24) - 4AK16 - Hitachi 4AK16 Silicon N-Channel Power MOS FET Array (SIL10) - NE5532AN - Philips, Dual Low-Noise High-Speed Audio OP Amp (DIP8) - SP485CS - Sipex SP485CS Low Power Half Duplex RS485 Transceiver (DIP8) - AN7395S - Panasonic AM7395S Spatializer Audio Processor IC for 3D surround (SOIC20) - PAL1 - AMD PALCE16V8 (stamped 'N676A4', DIP20) - PAL2 - AMD PALCE16V8 (stamped 'N676A2', DIP20) - PAL3 - AMD PALCE16V8 (stamped 'N676A3', DIP20) - PAL4 - AMD PALCE16V8 (stamped 'N676A5', DIP20) - JP1 - 25M O O-O 32M - JP2 - 25M O O-O 32M - JP3 - RW O O O RO - JP4 - PROG 32M O O-O 16M - JP5 - DATA 32M O-O O 16M - JP6 - BOOT 16 O-O O 32 - JP7 - SRC DOUT2 O O-O 0 - JP8 - 64M&32M O-O O 16M - JP9 - 64M O O-O 32M&16M - JP10 - 64M&32M O-O O 16M - JP11 - 64M O O-O 32M&16M - JP12 - through O-O O SP - JP13 - through O-O O SP - JP14 - WDT O O - JP15 - MONO O-O O SURR - JP16 - HIGH O O O MID (N/C LOW) - CN1 to CN3 - D-SUB Connectors - CN4 - Multi-pin Connector for Network PCB - CN5 - DIN96 connector (pads only, not used) - CN6 - DIN96 joining connector to lower PCB - CN7 - Multi-pin connector (pads only, not used) - CN9 to CN13 - Power Connectors - CN14 to CN17 - RCA Stereo Audio OUT - CN18 - RCA Mono Audio OUT - CN19 - USB Connector + DRM1M4SJ8 - Fujitsu 81C4256 256kx4 DRAM (SOJ24) + SRAM256K - Cypress CY7C199 32kx8 SRAM (SOJ28) + DRAM16X16 - Fujitsu 8118160A-60 16megx16 DRAM (SOJ42) + M48T58Y-70PC1 - ST Timekeeper RAM + RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz + 056800 - Konami Custom (QFP80) + 058232 - Konami Custom Ceramic Package (SIL14) + ADC12138 - National Semiconductor ADC12138 A/D Converter, 12-bit + Serial I/O With MUX (SOP28) + MACH111 - AMD MACH111 CPLD (Stamped 'N676A1', PLCC44) + 68EC000 - Motorola MC68EC000, running at 16.0MHz (64/4) + PPC403GA - IBM PowerPC 403GA CPU, clock input 32.0MHz (64/2) (QFP160) + SM5877AM - Nippon Precision Circuits 3rd Order 2-Channel D/A Converter (SOIC24) + 4AK16 - Hitachi 4AK16 Silicon N-Channel Power MOS FET Array (SIL10) + NE5532AN - Philips, Dual Low-Noise High-Speed Audio OP Amp (DIP8) + SP485CS - Sipex SP485CS Low Power Half Duplex RS485 Transceiver (DIP8) + AN7395S - Panasonic AM7395S Spatializer Audio Processor IC for 3D surround (SOIC20) + PAL1 - AMD PALCE16V8 (stamped 'N676A4', DIP20) + PAL2 - AMD PALCE16V8 (stamped 'N676A2', DIP20) + PAL3 - AMD PALCE16V8 (stamped 'N676A3', DIP20) + PAL4 - AMD PALCE16V8 (stamped 'N676A5', DIP20) + JP1 - 25M O O-O 32M + JP2 - 25M O O-O 32M + JP3 - RW O O O RO + JP4 - PROG 32M O O-O 16M + JP5 - DATA 32M O-O O 16M + JP6 - BOOT 16 O-O O 32 + JP7 - SRC DOUT2 O O-O 0 + JP8 - 64M&32M O-O O 16M + JP9 - 64M O O-O 32M&16M + JP10 - 64M&32M O-O O 16M + JP11 - 64M O O-O 32M&16M + JP12 - through O-O O SP + JP13 - through O-O O SP + JP14 - WDT O O + JP15 - MONO O-O O SURR + JP16 - HIGH O O O MID (N/C LOW) + CN1 to CN3 - D-SUB Connectors + CN4 - Multi-pin Connector for Network PCB + CN5 - DIN96 connector (pads only, not used) + CN6 - DIN96 joining connector to lower PCB + CN7 - Multi-pin connector (pads only, not used) + CN9 to CN13 - Power Connectors + CN14 to CN17 - RCA Stereo Audio OUT + CN18 - RCA Mono Audio OUT + CN19 - USB Connector ROM Usage --------- - |------------------------------- ROM Locations -------------------------------------| + |------------------------------- ROM Locations -------------------------------------| Game 27P 25P 22P 16P 14P 12P 9P 16T 14T 12T 9T 7S -------------------------------------------------------------------------------------------------- Racing Jam 676NC01 - - 676A09 676A10 - - 676A04 676A05 - - 676A08 @@ -163,18 +163,18 @@ sticker - GC713AC | CN1 | |------------------------| Notes: - CN1 - Connector joining to CPU board CN4 - CN2/3 - RCA jacks for network cable - 2G - Small SOIC8 chip with number 0038323 at location 2G. An identical chip is present on - *some* Hornet games on the GN715 CPU board at location 30C. It may be a PIC or EEPROM. - On Hornet, the chip seems to refresh the data in the Timekeeper RAM when the battery - dies and keeps the game working. It's purpose on the network board is unknown but it may - 'upgrade' the data in the NVRAM to the network version of the game for a twin cabinet set-up. - HYC2485S - Hybrid ceramic module for RS485 - CY7C199 - 32k x8 SRAM - XC5204 - Xilinx XC5204 FPGA - XC5210 - Xilink XC5210 FPGA - N676H1 - PALCE16V8Q-15 stamped 'N676H1' + CN1 - Connector joining to CPU board CN4 + CN2/3 - RCA jacks for network cable + 2G - Small SOIC8 chip with number 0038323 at location 2G. An identical chip is present on + *some* Hornet games on the GN715 CPU board at location 30C. It may be a PIC or EEPROM. + On Hornet, the chip seems to refresh the data in the Timekeeper RAM when the battery + dies and keeps the game working. It's purpose on the network board is unknown but it may + 'upgrade' the data in the NVRAM to the network version of the game for a twin cabinet set-up. + HYC2485S - Hybrid ceramic module for RS485 + CY7C199 - 32k x8 SRAM + XC5204 - Xilinx XC5204 FPGA + XC5210 - Xilink XC5210 FPGA + N676H1 - PALCE16V8Q-15 stamped 'N676H1' Bottom Board (VIDEO PCB) @@ -211,34 +211,34 @@ GN676 PWB(B)B | 256KSRAM 256KSRAM JP2 CN1 PAL2 | |-------------------------------------------------------------------------------------------| Notes: - 4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40) - 1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32) - 256KSRAM - Winbond W24257AJ-15 256k SRAM (SOJ28) - TEXELFX - 3DFX 500-0004-02 BD0665.1 TMU (QFP208) - PIXELFX - 3DFX 500-0003-03 F001701.1 FBI (QFP240) - 001604 - Konami Custom (QFP208) - MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44) - MACH111 - AMD MACH111 CPLD (Stamped '03161A', PLCC44) - PLCC44_SOCKET - empty PLCC44 socket - AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8) - AM7201 - AMD AM7201 FIFO (PLCC32) - PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20) - PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20) - PAL3 - AMD PALCE16V8 (stamped 'N676B2', DIP20) - JP1 - SLV O O-O MST,TWN (sets board to MASTER TWIN or SLAVE) - JP2 - SLV O O-O MST (sets board to MASTER or SLAVE) - CN1 - 96 Pin joining connector to upper PCB - CN2 - 8-Pin 24kHz RGB OUT - CN3 - 15-Pin DSUB VGA Video MAIN OUT - CN4 - 6-Pin Power Connector - CN5 - 4-Pin Power Connector - CN6 - 2-Pin Connector (Not Used) - CN7 - 6-Pin Connector + 4M_EDO - Silicon Magic SM81C256K16CJ-35 EDO DRAM 66MHz (SOJ40) + 1MSRAM - Cypress CY7C109-25VC 1Meg SRAM (SOJ32) + 256KSRAM - Winbond W24257AJ-15 256k SRAM (SOJ28) + TEXELFX - 3DFX 500-0004-02 BD0665.1 TMU (QFP208) + PIXELFX - 3DFX 500-0003-03 F001701.1 FBI (QFP240) + 001604 - Konami Custom (QFP208) + MC44200FT - Motorola MC44200FT 3 Channel Video D/A Converter (QFP44) + MACH111 - AMD MACH111 CPLD (Stamped '03161A', PLCC44) + PLCC44_SOCKET - empty PLCC44 socket + AV9170 - Integrated Circuit Systems Inc. Clock Multiplier (SOIC8) + AM7201 - AMD AM7201 FIFO (PLCC32) + PAL1 - AMD PALCE16V8 (stamped 'N676B4', DIP20) + PAL2 - AMD PALCE16V8 (stamped 'N676B5', DIP20) + PAL3 - AMD PALCE16V8 (stamped 'N676B2', DIP20) + JP1 - SLV O O-O MST,TWN (sets board to MASTER TWIN or SLAVE) + JP2 - SLV O O-O MST (sets board to MASTER or SLAVE) + CN1 - 96 Pin joining connector to upper PCB + CN2 - 8-Pin 24kHz RGB OUT + CN3 - 15-Pin DSUB VGA Video MAIN OUT + CN4 - 6-Pin Power Connector + CN5 - 4-Pin Power Connector + CN6 - 2-Pin Connector (Not Used) + CN7 - 6-Pin Connector ROM Usage --------- - |------ ROM Locations -------| + |------ ROM Locations -------| Game 8X 8Y 16X 16Y ------------------------------------------- Racing Jam 676A13 - 676A14 - diff --git a/src/mame/drivers/pandoras.c b/src/mame/drivers/pandoras.c index 8dacc1c5744..3a2a9f13020 100644 --- a/src/mame/drivers/pandoras.c +++ b/src/mame/drivers/pandoras.c @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Manuel Abadia +// copyright-holders:Manuel Abadia /*************************************************************************** Pandora's Palace(GX328) (c) 1984 Konami/Interlogic diff --git a/src/mame/drivers/popobear.c b/src/mame/drivers/popobear.c index 0f0010af75b..aa404b1ff16 100644 --- a/src/mame/drivers/popobear.c +++ b/src/mame/drivers/popobear.c @@ -120,13 +120,13 @@ public: DECLARE_READ8_MEMBER(_620000_r); DECLARE_WRITE8_MEMBER(irq_ack_w); DECLARE_WRITE16_MEMBER(vram_w); - + virtual void video_start(); UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void draw_sprites(bitmap_ind16 &bitmap,const rectangle &cliprect); - + TIMER_DEVICE_CALLBACK_MEMBER(irq); - + void postload(); }; @@ -226,7 +226,7 @@ void popobear_state::video_start() m_bg_tilemap[1]->set_transparent_pen(0); m_bg_tilemap[2]->set_transparent_pen(0); m_bg_tilemap[3]->set_transparent_pen(0); - + save_item(NAME(m_vram_rearranged)); machine().save().register_postload(save_prepost_delegate(FUNC(popobear_state::postload), this)); } diff --git a/src/mame/drivers/renegade.c b/src/mame/drivers/renegade.c index 57808b1d19b..5a482bac344 100644 --- a/src/mame/drivers/renegade.c +++ b/src/mame/drivers/renegade.c @@ -205,7 +205,7 @@ void renegade_state::machine_start() DRIVER_INIT_MEMBER(renegade_state,renegade) { m_mcu_sim = FALSE; - + save_item(NAME(m_from_main)); save_item(NAME(m_from_mcu)); save_item(NAME(m_main_sent)); @@ -229,7 +229,7 @@ DRIVER_INIT_MEMBER(renegade_state,kuniokun) m_mcu_encrypt_table_len = 0x2a; m_mcu->suspend(SUSPEND_REASON_DISABLE, 1); - + save_item(NAME(m_mcu_buffer)); save_item(NAME(m_mcu_input_size)); save_item(NAME(m_mcu_output_byte)); diff --git a/src/mame/drivers/savquest.c b/src/mame/drivers/savquest.c index 49684b6f523..d6d1ad550a7 100644 --- a/src/mame/drivers/savquest.c +++ b/src/mame/drivers/savquest.c @@ -425,47 +425,47 @@ WRITE32_MEMBER(savquest_state::bios_ec000_ram_w) static const UINT8 m_hasp_cmppass[] = {0xc3, 0xd9, 0xd3, 0xfb, 0x9d, 0x89, 0xb9, 0xa1, 0xb3, 0xc1, 0xf1, 0xcd, 0xdf, 0x9d}; /* 0x9d or 0x9e */ static const UINT8 m_hasp_prodinfo[] = {0x51, 0x4c, 0x52, 0x4d, 0x53, 0x4e, 0x53, 0x4e, 0x53, 0x49, 0x53, 0x48, 0x53, 0x4b, 0x53, 0x4a, - 0x53, 0x43, 0x53, 0x45, 0x52, 0x46, 0x53, 0x43, 0x53, 0x41, 0xac, 0x40, 0x53, 0xbc, 0x53, 0x42, - 0x53, 0x57, 0x53, 0x5d, 0x52, 0x5e, 0x53, 0x5b, 0x53, 0x59, 0xac, 0x58, 0x53, 0xa4 - }; + 0x53, 0x43, 0x53, 0x45, 0x52, 0x46, 0x53, 0x43, 0x53, 0x41, 0xac, 0x40, 0x53, 0xbc, 0x53, 0x42, + 0x53, 0x57, 0x53, 0x5d, 0x52, 0x5e, 0x53, 0x5b, 0x53, 0x59, 0xac, 0x58, 0x53, 0xa4 + }; READ8_MEMBER(savquest_state::parallel_port_r) { if (offset == 1) { if ((m_haspstate == HASPSTATE_READ) - && (m_hasp_passmode == 3) - ) + && (m_hasp_passmode == 3) + ) { /* passmode 3 is used to retrieve the product(s) information it comes in two parts: header and product the header has this format: - offset range purpose - 00 01 header type - 01 01-05 count of used product slots, must be 2 - 02 01-05 count of unused product slots - this is assumed to be 6-(count of used slots) - but it is not enforced here - however a total of 6 structures will be checked - 03 01-02 unknown - 04 01-46 country code - 05-0f 00 reserved - the used product slots have this format: - (the unused product slots must be entirely zeroes) - 00-01 0001-000a product ID, one must be 6, the other 0a - 02 0001-0003 unknown but must be 0001 - 04 01-05 HASP plug country ID - 05 01-02 unknown but must be 01 - 06 05 unknown - 07-0a any unknown, not used - 0b ff unknown - 0c ff unknown - 0d-0f 00 reserved + offset range purpose + 00 01 header type + 01 01-05 count of used product slots, must be 2 + 02 01-05 count of unused product slots + this is assumed to be 6-(count of used slots) + but it is not enforced here + however a total of 6 structures will be checked + 03 01-02 unknown + 04 01-46 country code + 05-0f 00 reserved + the used product slots have this format: + (the unused product slots must be entirely zeroes) + 00-01 0001-000a product ID, one must be 6, the other 0a + 02 0001-0003 unknown but must be 0001 + 04 01-05 HASP plug country ID + 05 01-02 unknown but must be 01 + 06 05 unknown + 07-0a any unknown, not used + 0b ff unknown + 0c ff unknown + 0d-0f 00 reserved - the read is performed by accessing an array of 16-bit big-endian values - and returning one bit at a time into bit 5 of the result - the 16-bit value is then XORed with 0x534d and the register index - */ + the read is performed by accessing an array of 16-bit big-endian values + and returning one bit at a time into bit 5 of the result + the 16-bit value is then XORed with 0x534d and the register index + */ if (m_hasp_prodind <= (sizeof(m_hasp_prodinfo) * 8)) { @@ -567,24 +567,24 @@ WRITE8_MEMBER(savquest_state::parallel_port_w) */ if ((data8 == 0x94) - || (data8 == 0x9e) - || (data8 == 0xa4) - || (data8 == 0xb2) - || (data8 == 0xbe) - || (data8 == 0xd0) - ) + || (data8 == 0x9e) + || (data8 == 0xa4) + || (data8 == 0xb2) + || (data8 == 0xbe) + || (data8 == 0xd0) + ) { return; } if ((data8 == 0x8a) - || (data8 == 0x8e) - || (data8 == 0xca) - || (data8 == 0xd2) - || (data8 == 0xe2) - || (data8 == 0xf0) - || (data8 == 0xfc) - ) + || (data8 == 0x8e) + || (data8 == 0xca) + || (data8 == 0xd2) + || (data8 == 0xe2) + || (data8 == 0xf0) + || (data8 == 0xfc) + ) { /* someone with access to the actual dongle could dump the true values I've never seen it so I just determined the relevant bits instead @@ -648,8 +648,8 @@ WRITE8_MEMBER(savquest_state::parallel_port_w) if (data8 & 1) { if ((m_hasp_passmode == 1) - && (data8 == 0x9d) - ) + && (data8 == 0x9d) + ) { m_hasp_passmode = 2; } @@ -663,8 +663,8 @@ WRITE8_MEMBER(savquest_state::parallel_port_w) if (++m_hasp_passind == sizeof(m_hasp_tmppass)) { if ((m_hasp_tmppass[0] == 0x9c) - && (m_hasp_tmppass[1] == 0x9e) - ) + && (m_hasp_tmppass[1] == 0x9e) + ) { int i; @@ -690,7 +690,7 @@ WRITE8_MEMBER(savquest_state::parallel_port_w) } } else if ((m_haspstate == HASPSTATE_PASSBEG) - && (data8 & 1) + && (data8 & 1) ) { m_hasp_tmppass[m_hasp_passind] = data8; @@ -725,7 +725,7 @@ WRITE8_MEMBER(savquest_state::smram_w) } static ADDRESS_MAP_START(savquest_map, AS_PROGRAM, 32, savquest_state) - ADDRESS_MAP_UNMAP_HIGH + ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x00000000, 0x0009ffff) AM_RAM AM_RANGE(0x000a0000, 0x000bffff) AM_READWRITE8(smram_r,smram_w,0xffffffff) //AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff) AM_RANGE(0x000c0000, 0x000c7fff) AM_ROM AM_REGION("video_bios", 0) @@ -804,7 +804,7 @@ static MACHINE_CONFIG_START( savquest, savquest_state ) MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259_1", pic8259_device, inta_cb) MCFG_FRAGMENT_ADD( pcat_common ) - MCFG_DEVICE_REMOVE("rtc") + MCFG_DEVICE_REMOVE("rtc") MCFG_DS12885_ADD("rtc") MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0) diff --git a/src/mame/drivers/sealy.c b/src/mame/drivers/sealy.c index f0e0945cc0f..8d1ff2e0fa6 100644 --- a/src/mame/drivers/sealy.c +++ b/src/mame/drivers/sealy.c @@ -55,8 +55,8 @@ public: PALETTE_INIT_MEMBER(sealy_state,sealy) { -// for (int i = 0; i < 32768; i++) -// palette.set_pen_color(i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0)); +// for (int i = 0; i < 32768; i++) +// palette.set_pen_color(i,pal5bit(i >> 5),pal5bit(i >> 10),pal5bit(i >> 0)); } UINT32 sealy_state::screen_update_sealy(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) diff --git a/src/mame/drivers/segasp.c b/src/mame/drivers/segasp.c index 44b70d208b9..ad1a6163d28 100644 --- a/src/mame/drivers/segasp.c +++ b/src/mame/drivers/segasp.c @@ -194,12 +194,12 @@ static ADDRESS_MAP_START( segasp_map, AS_PROGRAM, 64, segasp_state ) /* External Device */ AM_RANGE(0x01000000, 0x0100ffff) AM_RAM // banked access to ROM/NET board address space, mainly backup SRAM and ATA AM_RANGE(0x01010000, 0x01010007) AM_READWRITE(sp_bank_r, sp_bank_w ) -// AM_RANGE(0x01010080, 0x01010087) IRQ pending/reset, ATA control +// AM_RANGE(0x01010080, 0x01010087) IRQ pending/reset, ATA control AM_RANGE(0x01010100, 0x01010127) AM_READ(sp_io_r) AM_RANGE(0x01010128, 0x0101012f) AM_READWRITE(sp_eeprom_r, sp_eeprom_w ) AM_RANGE(0x01010150, 0x01010157) AM_READ(sp_rombdflg_r) -// AM_RANGE(0x01010180, 0x010101af) custom UART 1 -// AM_RANGE(0x010101c0, 0x010101ef) custom UART 2 +// AM_RANGE(0x01010180, 0x010101af) custom UART 1 +// AM_RANGE(0x010101c0, 0x010101ef) custom UART 2 /* Area 1 */ AM_RANGE(0x04000000, 0x04ffffff) AM_MIRROR(0x02000000) AM_RAM AM_SHARE("dc_texture_ram") // texture memory 64 bit access @@ -370,7 +370,7 @@ ROM_START( brickppl ) ROM_LOAD( "ic64", 0x08000000, 0x4000000, CRC(383e90d9) SHA1(eeca4b1bd0cd1fed7b85f045d71e0c7258d4350b) ) ROM_LOAD( "ic65", 0x0c000000, 0x4000000, CRC(4c29b5ac) SHA1(9e6a79ad2d2498eed5b2590c8764222e7d6c0229) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0558-com.ic15", 0, 0x800, BAD_DUMP CRC(7592d004) SHA1(632373d807f54953d68c95a9f874ed3e8011f085) ) @@ -392,7 +392,7 @@ ROM_START( dinoking ) ROM_LOAD( "ic69s", 0x07000000, 0x01000000, CRC(c78e46c2) SHA1(b8224c68face23010414d13ebb4cc05a2a9dce8a) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) ) @@ -413,7 +413,7 @@ ROM_START( dinokior ) ROM_LOAD( "ic68s", 0x06000000, 0x01000000, CRC(ff5ed2b8) SHA1(d8d86b3ed976c8c8fc51d225ae661e5f237b6e1d) ) ROM_LOAD( "ic69s", 0x07000000, 0x01000000, CRC(ab8ac4eb) SHA1(e6b3ce796ae4887011e2764261f3f437dc9939f9) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // actually 8x 128Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) ) @@ -429,7 +429,7 @@ ROM_START( lovebery ) ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(1bd80ed0) SHA1(d50307573389ebe71e381a75deb83811fa397b94) ) ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(d3870287) SHA1(efd3630d54068f5a8caf242a48db410bedf48e7a) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) ) @@ -453,7 +453,7 @@ ROM_START( lovebero ) ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(0a23cea3) SHA1(1780d935b0d641769859b2022df8e4262e7bafd8) ) ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(d3870287) SHA1(efd3630d54068f5a8caf242a48db410bedf48e7a) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) ) @@ -469,7 +469,7 @@ ROM_START( tetgiant ) ROM_LOAD( "ic62", 0x00000000, 0x4000000, CRC(31ba1938) SHA1(9b5a05193b3df13cd7617a38913e0b0fbd61da44) ) ROM_LOAD( "ic63", 0x04000000, 0x4000000, CRC(cb946213) SHA1(6195e33c44a1e8eb464dfc3558dc1c9b4d910ef3) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0604-com.ic15", 0, 0x800, BAD_DUMP CRC(e8dd2b86) SHA1(765ffd2e4a36302b1db0815e842c9656e29f2457) ) @@ -487,7 +487,7 @@ ROM_START( dinoki25 ) DISK_REGION( "cflash" ) DISK_IMAGE( "mda-c0047", 0, SHA1(0f97291d9c5dbe3e66a5220da05aebdfaa78b35d) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0408-com.ic15", 0, 0x800, BAD_DUMP CRC(0e94daba) SHA1(4e9722333a29afd0dbadba78b16344b77a689610) ) @@ -511,7 +511,7 @@ ROM_START( loveber3 ) DISK_REGION( "cflash" ) DISK_IMAGE( "mda-c0042", 0, SHA1(9992d90dae8ce7636e4153e02b779c27931b3be6) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x08)) // 8x 512Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0446-com.ic15", 0, 0x800, BAD_DUMP CRC(60f56bf2) SHA1(35e697aca7213e3fb1ebe75bb8991b1b992af6d9) ) @@ -528,7 +528,7 @@ ROM_START( tetgiano ) DISK_REGION( "cflash" ) DISK_IMAGE( "mda-c0076", 0, SHA1(6987c888d2a3ada2d07f6396d47fdba507ca859d) ) - ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs + ROM_REGION( 0x04, "boardid", ROMREGION_ERASEVAL(0x02)) // 2x 512Mbit FlashROMs ROM_REGION( 0x800, "pic_readout", 0 ) ROM_LOAD( "317-0604-com.ic15", 0, 0x800, BAD_DUMP CRC(e8dd2b86) SHA1(765ffd2e4a36302b1db0815e842c9656e29f2457) ) diff --git a/src/mame/drivers/sigmab98.c b/src/mame/drivers/sigmab98.c index ec7128c484f..f58d6092715 100644 --- a/src/mame/drivers/sigmab98.c +++ b/src/mame/drivers/sigmab98.c @@ -300,7 +300,7 @@ void sigmab98_state::video_start() inline int integer_part(int x) { -// return x >> 16; +// return x >> 16; return (x + 0x8000) >> 16; } @@ -328,14 +328,14 @@ void sigmab98_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec int ny = ((s[ 0x06 ] & 0xf8) >> 3) + 1; int dsty = (s[ 0x06 ] & 0x03) * 256 + s[ 0x07 ]; - int dstdx = (s[ 0x08 ] & 0xff) * 256 + s[ 0x09 ]; // 0x100 = no zoom, 0x200 = 50% zoom - int dstdy = (s[ 0x0a ] & 0xff) * 256 + s[ 0x0b ]; // "" + int dstdx = (s[ 0x08 ] & 0xff) * 256 + s[ 0x09 ]; // 0x100 = no zoom, 0x200 = 50% zoom + int dstdy = (s[ 0x0a ] & 0xff) * 256 + s[ 0x0b ]; // "" int srcx = (s[ 0x0c ] & 0xff) * 256 + s[ 0x0d ]; int srcy = (s[ 0x0e ] & 0xff) * 256 + s[ 0x0f ]; // Sign extend the position - dstx = (dstx & 0x01ff) - (dstx & 0x0200); // or 0x3ff/0x400? + dstx = (dstx & 0x01ff) - (dstx & 0x0200); // or 0x3ff/0x400? dsty = (dsty & 0x01ff) - (dsty & 0x0200); // Flipping @@ -390,17 +390,17 @@ void sigmab98_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec dsty <<= 16; // Source delta (equal for x and y) - int z = int( sqrt(dstdx * dstdx + dstdy * dstdy) + 0.5 ); // dest delta vector is scaled by the source delta!? + int z = int( sqrt(dstdx * dstdx + dstdy * dstdy) + 0.5 ); // dest delta vector is scaled by the source delta!? if (!z) z = 0x100; int srcdzz = z << 8; // Destination x and y deltas - int dstdxx = (dstdx << 16) / z; // dest x delta for source x increments - int dstdyx = (dstdy << 16) / z; // dest y delta for source x increments + int dstdxx = (dstdx << 16) / z; // dest x delta for source x increments + int dstdyx = (dstdy << 16) / z; // dest y delta for source x increments - int dstdxy = -dstdyx; // dest x delta for source y increments (orthogonal to the above vector) - int dstdyy = dstdxx; // dest y delta for source y increments + int dstdxy = -dstdyx; // dest x delta for source y increments (orthogonal to the above vector) + int dstdyy = dstdxx; // dest y delta for source y increments // Transform the source offset in a destination offset (negate, scale and rotate it) srcx = (-srcx << 8) / z; diff --git a/src/mame/drivers/taitotx.c b/src/mame/drivers/taitotx.c index 4da4f131dbb..a0aa73ee43a 100644 --- a/src/mame/drivers/taitotx.c +++ b/src/mame/drivers/taitotx.c @@ -56,7 +56,7 @@ Zoids Card Colosseum Taito Type X+ games - + Battle Gear 4 Battle Gear 4 Tuned Half Life 2 Survivor @@ -64,7 +64,7 @@ War Of The Grail Taito Type X2 games - + Battle Fantasia BlazBlue: Calamity Trigger BlazBlue: Chrono Phantasma diff --git a/src/mame/drivers/tasman.c b/src/mame/drivers/tasman.c index af882f6ef15..3f19ee4d6cf 100644 --- a/src/mame/drivers/tasman.c +++ b/src/mame/drivers/tasman.c @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Philip Bennett, R. Belmont +// copyright-holders:Philip Bennett, R. Belmont /* Konami Gambling Games ("Tasman" hardware) System GX derivative diff --git a/src/mame/drivers/twins.c b/src/mame/drivers/twins.c index b35d2139bc7..7ef1ba2726f 100644 --- a/src/mame/drivers/twins.c +++ b/src/mame/drivers/twins.c @@ -286,7 +286,7 @@ ADDRESS_MAP_END void twins_state::video_start() { m_paloff = 0; - + save_item(NAME(m_paloff)); save_item(NAME(m_spritesinit)); save_item(NAME(m_spriteswidth)); diff --git a/src/mame/drivers/videopin.c b/src/mame/drivers/videopin.c index cd4a5f6f95f..4c5dcda15d1 100644 --- a/src/mame/drivers/videopin.c +++ b/src/mame/drivers/videopin.c @@ -78,7 +78,7 @@ TIMER_CALLBACK_MEMBER(videopin_state::interrupt_callback) void videopin_state::machine_start() { m_interrupt_timer = timer_alloc(TIMER_INTERRUPT); - + save_item(NAME(m_time_pushed)); save_item(NAME(m_time_released)); save_item(NAME(m_prev)); diff --git a/src/mame/drivers/vigilant.c b/src/mame/drivers/vigilant.c index 9b8ac7744ac..3afcf8c8fdc 100644 --- a/src/mame/drivers/vigilant.c +++ b/src/mame/drivers/vigilant.c @@ -897,7 +897,7 @@ ROM_START( vigilanbl ) /* Bootleg */ ROM_LOAD( "f05_c08.bin", 0x00000, 0x10000, CRC(01579d20) SHA1(e58d8ca0ea0ac9d77225bf55faa499d1565924f9) ) ROM_LOAD( "h05_c09.bin", 0x10000, 0x10000, CRC(4f5872f0) SHA1(6af21ba1c94097eecce30585983b4b07528c8635) ) - ROM_REGION( 0x80000, "gfx2", 0 ) + ROM_REGION( 0x80000, "gfx2", 0 ) ROM_LOAD( "n07_c12.bin", 0x00000, 0x10000, CRC(10af8eb2) SHA1(664b178b248babc43a9af0fe140fe57bc7367762) ) ROM_LOAD( "k07_c10.bin", 0x10000, 0x10000, CRC(9576f304) SHA1(0ec2a7d3d82208e2a9a4ef9ab2824e6fe26ebbe5) ) ROM_LOAD( "o07_c13.bin", 0x20000, 0x10000, CRC(b1d9d4dc) SHA1(1aacf6b0ff8d102880d3dce3b55cd1488edb90cf) ) @@ -1055,14 +1055,14 @@ ROM_START( buccanrsa ) ROM_LOAD( "prom2.u99", 0x0300, 0x0100, CRC(e0aa8869) SHA1(ac8bdfeba69420ba56ec561bf3d0f1229d02cea2) ) ROM_END -GAME( 1988, vigilant, 0, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev E)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) -GAME( 1988, vigilantg, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev G)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) -GAME( 1988, vigilano, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) -GAME( 1988, vigilanta, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev A)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) -GAME( 1988, vigilantb, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev B)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) -GAME( 1988, vigilantc, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev C)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) -GAME( 1988, vigilantd, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (Japan, Rev D)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) -GAME( 1988, vigilanbl, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "bootleg", "Vigilante (bootleg)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilant, 0, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev E)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilantg, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev G)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilano, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilanta, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev A)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilantb, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem (Data East license)", "Vigilante (US, Rev B)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilantc, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (World, Rev C)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilantd, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "Irem", "Vigilante (Japan, Rev D)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) +GAME( 1988, vigilanbl, vigilant, vigilant, vigilant, driver_device, 0, ROT0, "bootleg", "Vigilante (bootleg)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) GAME( 1988, kikcubic, 0, kikcubic, kikcubic, driver_device, 0, ROT0, "Irem", "Meikyu Jima (Japan)", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) /* English title is Kickle Cubicle */ GAME( 1988, kikcubicb, kikcubic, kikcubic, kikcubic, driver_device, 0, ROT0, "bootleg", "Kickle Cubele", GAME_NO_COCKTAIL | GAME_SUPPORTS_SAVE ) diff --git a/src/mame/drivers/wms.c b/src/mame/drivers/wms.c index d23d7749fe9..52787162597 100644 --- a/src/mame/drivers/wms.c +++ b/src/mame/drivers/wms.c @@ -21,7 +21,7 @@ 1x Cirrus Logic CL-GD5429-86QC-C (VGA Graphics Controller) [U32] 1x QuickLogic QL2003-XPF144C FPGA [U21] - 4x (1-2-4/8 Mb selectable through jumper) program ROM sockets. [XU02, XU03, XU04, XU05] + 4x (1-2-4/8 Mb selectable through jumper) program ROM sockets. [XU02, XU03, XU04, XU05] 4x (1-2-4/8 Mb selectable through jumper) sound ROM sockets. [XU17, XU18, XU30, XU31] 1x unknown serial EEPROM (DIP8) (currently missing) [XU27] @@ -77,7 +77,7 @@ #define VIDEO_CLOCK XTAL_14_31818MHz // Pletronics MP49 14.31818 MHz. Crystal. Used in common VGA ISA cards. #define UART_CLOCK XTAL_1_8432MHz // Seems UART clock, since allows integer division to common baud rates. - // (16 * 115200 baud, 192 * 9600 baud, 1536 * 1200 baud, etc...) + // (16 * 115200 baud, 192 * 9600 baud, 1536 * 1200 baud, etc...) #include "emu.h" @@ -174,7 +174,7 @@ static MACHINE_CONFIG_START( wms, wms_state ) MCFG_DEVICE_DISABLE() MCFG_CPU_PROGRAM_MAP(adsp_program_map) MCFG_CPU_DATA_MAP(adsp_data_map) - + MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) diff --git a/src/mame/drivers/wyvernf0.c b/src/mame/drivers/wyvernf0.c index 598195012c3..b510b8b8938 100644 --- a/src/mame/drivers/wyvernf0.c +++ b/src/mame/drivers/wyvernf0.c @@ -195,7 +195,7 @@ yyyyyyyy fccccccc x???pppp xxxxxxxx sx = sprram[offs + 3] - ((sprram[offs + 2] & 0x80) << 1); sy = 256 - 8 - sprram[offs + 0] - 23; // center player sprite: 256 - 8 - 0x71 + dy = 256/2-32/2 -> dy = -23 -// int flipx = sprram[offs + 2] & 0x40; // nope +// int flipx = sprram[offs + 2] & 0x40; // nope int flipx = 0; int flipy = sprram[offs + 1] & 0x80; diff --git a/src/mame/includes/bwing.h b/src/mame/includes/bwing.h index 18916ba72c2..5b86cc4887e 100644 --- a/src/mame/includes/bwing.h +++ b/src/mame/includes/bwing.h @@ -85,6 +85,6 @@ public: UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void draw_sprites( bitmap_ind16 &bmp, const rectangle &clip, UINT8 *ram, int pri ); - + INTERRUPT_GEN_MEMBER(bwp3_interrupt); }; diff --git a/src/mame/includes/cchasm.h b/src/mame/includes/cchasm.h index 5a43fcbbf75..34c1ac7cc3c 100644 --- a/src/mame/includes/cchasm.h +++ b/src/mame/includes/cchasm.h @@ -36,7 +36,7 @@ public: required_device m_dac2; required_device m_vector; required_device m_screen; - + required_shared_ptr m_ram; int m_sound_flags; @@ -46,7 +46,7 @@ public: int m_xcenter; int m_ycenter; emu_timer *m_refresh_end_timer; - + DECLARE_WRITE16_MEMBER(led_w); DECLARE_WRITE16_MEMBER(refresh_control_w); DECLARE_WRITE8_MEMBER(reset_coin_flag_w); @@ -57,12 +57,12 @@ public: DECLARE_READ16_MEMBER(io_r); DECLARE_WRITE_LINE_MEMBER(ctc_timer_1_w); DECLARE_WRITE_LINE_MEMBER(ctc_timer_2_w); - + INPUT_CHANGED_MEMBER(set_coin_flag); virtual void video_start(); virtual void sound_start(); - + void refresh(); protected: diff --git a/src/mame/includes/chihiro.h b/src/mame/includes/chihiro.h index d9db8632f87..55f6e20ab8c 100644 --- a/src/mame/includes/chihiro.h +++ b/src/mame/includes/chihiro.h @@ -71,24 +71,24 @@ struct vertex_nv { class vertex_program_simulator { public: enum VectorialOperation { - VecNOP=0, - VecMOV, - VecMUL, - VecADD, - VecMAD, - VecDP3, - VecDPH, - VecDP4, - VecDST, - VecMIN, - VecMAX, - VecSLT, - VecSGE, + VecNOP=0, + VecMOV, + VecMUL, + VecADD, + VecMAD, + VecDP3, + VecDPH, + VecDP4, + VecDST, + VecMIN, + VecMAX, + VecSLT, + VecSGE, VecARL }; enum ScalarOperation { ScaNOP=0, - ScaIMV, + ScaIMV, ScaRCP, ScaRCC, ScaRSQ, diff --git a/src/mame/includes/ddribble.h b/src/mame/includes/ddribble.h index 1bba4bd6ec8..21a18fb8cdc 100644 --- a/src/mame/includes/ddribble.h +++ b/src/mame/includes/ddribble.h @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Manuel Abadia +// copyright-holders:Manuel Abadia /*************************************************************************** Double Dribble diff --git a/src/mame/includes/harddriv.h b/src/mame/includes/harddriv.h index e9ae37539ec..5a1925474a4 100644 --- a/src/mame/includes/harddriv.h +++ b/src/mame/includes/harddriv.h @@ -437,7 +437,7 @@ public: DECLARE_READ16_MEMBER(hd68k_snd_status_r); DECLARE_WRITE16_MEMBER(hd68k_snd_data_w); DECLARE_WRITE16_MEMBER(hd68k_snd_reset_w); - + DECLARE_READ16_MEMBER(hdsnd68k_data_r); DECLARE_WRITE16_MEMBER(hdsnd68k_data_w); DECLARE_READ16_MEMBER(hdsnd68k_switches_r); @@ -453,7 +453,7 @@ public: DECLARE_READ16_MEMBER(hdsnd68k_320com_r); DECLARE_WRITE16_MEMBER(hdsnd68k_320com_w); DECLARE_READ16_MEMBER(hdsnddsp_get_bio); - + DECLARE_WRITE16_MEMBER(hdsnddsp_dac_w); DECLARE_WRITE16_MEMBER(hdsnddsp_comport_w); DECLARE_WRITE16_MEMBER(hdsnddsp_mute_w); @@ -462,19 +462,19 @@ public: DECLARE_READ16_MEMBER(hdsnddsp_rom_r); DECLARE_READ16_MEMBER(hdsnddsp_comram_r); DECLARE_READ16_MEMBER(hdsnddsp_compare_r); - + protected: virtual void device_start(); virtual void device_reset(); virtual machine_config_constructor device_mconfig_additions() const; - + private: required_device m_soundcpu; required_device m_dac; required_device m_sounddsp; required_shared_ptr m_sounddsp_ram; required_region_ptr m_sound_rom; - + UINT8 m_soundflag; UINT8 m_mainflag; UINT16 m_sounddata; @@ -488,7 +488,7 @@ private: UINT16 m_comram[0x400/2]; UINT64 m_last_bio_cycles; - + void update_68k_interrupts(); TIMER_CALLBACK_MEMBER( delayed_68k_w ); }; diff --git a/src/mame/includes/nbmj8688.h b/src/mame/includes/nbmj8688.h index 7abf89cca7e..6e235c58875 100644 --- a/src/mame/includes/nbmj8688.h +++ b/src/mame/includes/nbmj8688.h @@ -46,14 +46,14 @@ public: UINT8 *m_clut; int m_flipscreen_old; emu_timer *m_blitter_timer; - + // common DECLARE_READ8_MEMBER(ff_r); DECLARE_WRITE8_MEMBER(clut_w); DECLARE_WRITE8_MEMBER(blitter_w); DECLARE_WRITE8_MEMBER(scrolly_w); - + DECLARE_WRITE8_MEMBER(mjsikaku_gfxflag2_w); DECLARE_WRITE8_MEMBER(mjsikaku_gfxflag3_w); DECLARE_WRITE8_MEMBER(mjsikaku_romsel_w); @@ -83,7 +83,7 @@ public: DECLARE_VIDEO_START(mbmj8688_hybrid_16bit); DECLARE_VIDEO_START(mbmj8688_hybrid_12bit); DECLARE_VIDEO_START(mbmj8688_pure_16bit); - + UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void vramflip(); void update_pixel(int x, int y); diff --git a/src/mame/includes/pandoras.h b/src/mame/includes/pandoras.h index 3300c12ffef..fb45b30d2e0 100644 --- a/src/mame/includes/pandoras.h +++ b/src/mame/includes/pandoras.h @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Manuel Abadia +// copyright-holders:Manuel Abadia /************************************************************************* Pandora's Palace diff --git a/src/mame/includes/renegade.h b/src/mame/includes/renegade.h index 4bee502c641..eecfc194f5d 100644 --- a/src/mame/includes/renegade.h +++ b/src/mame/includes/renegade.h @@ -18,7 +18,7 @@ public: m_bg_videoram(*this, "bg_videoram"), m_spriteram(*this, "spriteram"), m_rombank(*this, "rombank"), - m_adpcmrom(*this, "adpcm") { } + m_adpcmrom(*this, "adpcm") { } required_device m_maincpu; required_device m_audiocpu; diff --git a/src/mame/includes/toaplipt.h b/src/mame/includes/toaplipt.h index 2297781f6b1..7df6ae592ce 100644 --- a/src/mame/includes/toaplipt.h +++ b/src/mame/includes/toaplipt.h @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Quench, Stephh +// copyright-holders:Quench, Stephh /******************************************************************************* Input port macros used by many games in multiple Toaplan drivers diff --git a/src/mame/includes/wiping.h b/src/mame/includes/wiping.h index acfe7bb6962..baf2d1f1457 100644 --- a/src/mame/includes/wiping.h +++ b/src/mame/includes/wiping.h @@ -21,7 +21,7 @@ public: required_shared_ptr m_videoram; required_shared_ptr m_colorram; required_shared_ptr m_spriteram; - + int m_flipscreen; UINT8 *m_soundregs; // if 0-ed UINT8 m_main_irq_mask; diff --git a/src/mame/machine/n64.c b/src/mame/machine/n64.c index 8f1a1783f53..3d93b68d9c6 100644 --- a/src/mame/machine/n64.c +++ b/src/mame/machine/n64.c @@ -1723,17 +1723,17 @@ int n64_periphs::pif_channel_handle_command(int channel, int slength, UINT8 *sda // Read status switch ((machine().root_device().ioport("input")->read() >> (2 * channel)) & 3) { - case 0: //NONE (unconnected) - case 3: //Invalid + case 0: //NONE (unconnected) + case 3: //Invalid return 1; - case 1: //JOYPAD + case 1: //JOYPAD rdata[0] = 0x05; rdata[1] = 0x00; rdata[2] = 0x01; return 0; - case 2: //MOUSE + case 2: //MOUSE rdata[0] = 0x02; rdata[1] = 0x00; rdata[2] = 0x01; @@ -1778,15 +1778,15 @@ int n64_periphs::pif_channel_handle_command(int channel, int slength, UINT8 *sda case 0: // P1 Inputs case 1: // P2 Inputs case 2: // P3 Inputs - case 3: // P4 Inputs + case 3: // P4 Inputs { switch ((machine().root_device().ioport("input")->read() >> (2 * channel)) & 3) { - case 0: //NONE - case 3: //Invalid + case 0: //NONE + case 3: //Invalid return 1; - case 1: //JOYPAD + case 1: //JOYPAD buttons = machine().root_device().ioport(portnames[(channel*5) + 0])->read(); x = machine().root_device().ioport(portnames[(channel*5) + 1])->read() - 128; y = machine().root_device().ioport(portnames[(channel*5) + 2])->read() - 128; @@ -1797,7 +1797,7 @@ int n64_periphs::pif_channel_handle_command(int channel, int slength, UINT8 *sda rdata[3] = (UINT8)(y); return 0; - case 2: //MOUSE + case 2: //MOUSE buttons = machine().root_device().ioport(portnames[(channel*5) + 0])->read(); x = (INT16)machine().root_device().ioport(portnames[(channel*5) + 1 + 2])->read();// - 128; y = (INT16)machine().root_device().ioport(portnames[(channel*5) + 2 + 2])->read();// - 128; diff --git a/src/mame/video/cchasm.c b/src/mame/video/cchasm.c index b8aeedcd667..b7b1e3394e2 100644 --- a/src/mame/video/cchasm.c +++ b/src/mame/video/cchasm.c @@ -131,6 +131,6 @@ void cchasm_state::video_start() m_xcenter=visarea.xcenter() << 16; m_ycenter=visarea.ycenter() << 16; - + m_refresh_end_timer = timer_alloc(TIMER_REFRESH_END); } diff --git a/src/mame/video/ddribble.c b/src/mame/video/ddribble.c index 19480cdf862..3dc31f75b98 100644 --- a/src/mame/video/ddribble.c +++ b/src/mame/video/ddribble.c @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Manuel Abadia +// copyright-holders:Manuel Abadia /*************************************************************************** video.c diff --git a/src/mame/video/dynduke.c b/src/mame/video/dynduke.c index 628bb3b9b8e..fd727a55788 100644 --- a/src/mame/video/dynduke.c +++ b/src/mame/video/dynduke.c @@ -79,7 +79,7 @@ void dynduke_state::video_start() m_fg_layer->set_transparent_pen(15); m_tx_layer->set_transparent_pen(15); - + save_item(NAME(m_back_bankbase)); save_item(NAME(m_fore_bankbase)); save_item(NAME(m_back_enable)); diff --git a/src/mame/video/midvunit.c b/src/mame/video/midvunit.c index 70aec627aaa..489ae0d52ae 100644 --- a/src/mame/video/midvunit.c +++ b/src/mame/video/midvunit.c @@ -76,7 +76,7 @@ void midvunit_state::video_start() save_item(NAME(m_dma_data)); save_item(NAME(m_dma_data_index)); save_item(NAME(m_page_control)); - + m_video_changed = TRUE; machine().save().register_postload(save_prepost_delegate(FUNC(midvunit_state::postload), this)); } diff --git a/src/mame/video/n64.c b/src/mame/video/n64.c index 28c095bc72c..4a8e0027194 100644 --- a/src/mame/video/n64.c +++ b/src/mame/video/n64.c @@ -442,11 +442,11 @@ void n64_rdp::set_suba_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input case 3: *input_r = &userdata->m_prim_color.i.r; *input_g = &userdata->m_prim_color.i.g; *input_b = &userdata->m_prim_color.i.b; break; case 4: *input_r = &userdata->m_shade_color.i.r; *input_g = &userdata->m_shade_color.i.g; *input_b = &userdata->m_shade_color.i.b; break; case 5: *input_r = &userdata->m_env_color.i.r; *input_g = &userdata->m_env_color.i.g; *input_b = &userdata->m_env_color.i.b; break; - case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break; + case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break; case 7: *input_r = &userdata->m_noise_color.i.r; *input_g = &userdata->m_noise_color.i.g; *input_b = &userdata->m_noise_color.i.b; break; case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15: { - *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; + *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; } } } @@ -462,10 +462,10 @@ void n64_rdp::set_subb_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input case 4: *input_r = &userdata->m_shade_color.i.r; *input_g = &userdata->m_shade_color.i.g; *input_b = &userdata->m_shade_color.i.b; break; case 5: *input_r = &userdata->m_env_color.i.r; *input_g = &userdata->m_env_color.i.g; *input_b = &userdata->m_env_color.i.b; break; case 6: fatalerror("SET_SUBB_RGB_INPUT: key_center\n"); - case 7: *input_r = (UINT8*)&m_k4; *input_g = (UINT8*)&m_k4; *input_b = (UINT8*)&m_k4; break; + case 7: *input_r = (UINT8*)&m_k4; *input_g = (UINT8*)&m_k4; *input_b = (UINT8*)&m_k4; break; case 8: case 9: case 10: case 11: case 12: case 13: case 14: case 15: { - *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; + *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; } } } @@ -493,7 +493,7 @@ void n64_rdp::set_mul_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input_ case 16: case 17: case 18: case 19: case 20: case 21: case 22: case 23: case 24: case 25: case 26: case 27: case 28: case 29: case 30: case 31: { - *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; + *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; } } } @@ -508,8 +508,8 @@ void n64_rdp::set_add_input_rgb(UINT8** input_r, UINT8** input_g, UINT8** input_ case 3: *input_r = &userdata->m_prim_color.i.r; *input_g = &userdata->m_prim_color.i.g; *input_b = &userdata->m_prim_color.i.b; break; case 4: *input_r = &userdata->m_shade_color.i.r; *input_g = &userdata->m_shade_color.i.g; *input_b = &userdata->m_shade_color.i.b; break; case 5: *input_r = &userdata->m_env_color.i.r; *input_g = &userdata->m_env_color.i.g; *input_b = &userdata->m_env_color.i.b; break; - case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break; - case 7: *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; + case 6: *input_r = &m_one.i.r; *input_g = &m_one.i.g; *input_b = &m_one.i.b; break; + case 7: *input_r = &m_zero.i.r; *input_g = &m_zero.i.g; *input_b = &m_zero.i.b; break; } } @@ -2623,7 +2623,7 @@ void n64_rdp::cmd_set_other_modes(UINT32 w1, UINT32 w2) m_other_modes.blend_m2b_0 = (w2 >> 18) & 0x3; // 00 m_other_modes.blend_m2b_1 = (w2 >> 16) & 0x3; // 01 m_other_modes.force_blend = (w2 >> 14) & 1; // 0 - m_other_modes.blend_shift = m_other_modes.force_blend ? 5 : 2; + m_other_modes.blend_shift = m_other_modes.force_blend ? 5 : 2; m_other_modes.alpha_cvg_select = (w2 >> 13) & 1; // 1 m_other_modes.cvg_times_alpha = (w2 >> 12) & 1; // 0 m_other_modes.z_mode = (w2 >> 10) & 0x3; // 00 diff --git a/src/mame/video/n64.h b/src/mame/video/n64.h index 5cdb7ee0ebf..1968a495e49 100644 --- a/src/mame/video/n64.h +++ b/src/mame/video/n64.h @@ -101,7 +101,7 @@ //sign-extension macros #define SIGN22(x) (((x & 0x00200000) * 0x7ff) | (x & 0x1fffff)) -#define SIGN17(x) (((x & 0x00010000) * 0xffff) | (x & 0xffff)) +#define SIGN17(x) (((x & 0x00010000) * 0xffff) | (x & 0xffff)) #define SIGN16(x) (((x & 0x00008000) * 0x1ffff) | (x & 0x7fff)) #define SIGN13(x) (((x & 0x00001000) * 0xfffff) | (x & 0xfff)) #define SIGN11(x) (((x & 0x00000400) * 0x3fffff) | (x & 0x3ff)) @@ -222,7 +222,7 @@ struct misc_state_t INT32 m_fb_format; // Framebuffer pixel format index (0 - I, 1 - IA, 2 - CI, 3 - RGBA) INT32 m_fb_size; // Framebuffer pixel size index (0 - 4bpp, 1 - 8bpp, 2 - 16bpp, 3 - 32bpp) INT32 m_fb_width; // Framebuffer width, in pixels - INT32 m_fb_height; // Framebuffer height, in pixels + INT32 m_fb_height; // Framebuffer height, in pixels UINT32 m_fb_address; // Framebuffer source address offset (in bytes) from start of RDRAM UINT32 m_zb_address; // Z-buffer source address offset (in bytes) from start of RDRAM @@ -367,10 +367,10 @@ struct rdp_span_aux INT32 m_shift_b; INT32 m_precomp_s; INT32 m_precomp_t; - INT32 m_blend_enable; + INT32 m_blend_enable; bool m_pre_wrap; INT32 m_dzpix_enc; - UINT8* m_tmem; /* pointer to texture cache for this polygon */ + UINT8* m_tmem; /* pointer to texture cache for this polygon */ bool m_start_span; }; @@ -398,11 +398,11 @@ struct cv_mask_derivative_t struct rdp_poly_state { - n64_rdp* m_rdp; /* pointer back to the RDP state */ + n64_rdp* m_rdp; /* pointer back to the RDP state */ misc_state_t m_misc_state; /* miscellaneous rasterizer bits */ - other_modes_t m_other_modes; /* miscellaneous rasterizer bits (2) */ - span_base_t m_span_base; /* span initial values for triangle rasterization */ + other_modes_t m_other_modes; /* miscellaneous rasterizer bits (2) */ + span_base_t m_span_base; /* span initial values for triangle rasterization */ rectangle_t m_scissor; /* screen-space scissor bounds */ UINT32 m_fill_color; /* poly fill color */ n64_tile_t m_tiles[8]; /* texture tile state */ @@ -488,10 +488,10 @@ public: void set_blender_input(INT32 cycle, INT32 which, UINT8** input_r, UINT8** input_g, UINT8** input_b, UINT8** input_a, INT32 a, INT32 b, rdp_span_aux* userdata); // Span rasterization - void span_draw_1cycle(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); - void span_draw_2cycle(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); - void span_draw_copy(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); - void span_draw_fill(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); + void span_draw_1cycle(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); + void span_draw_2cycle(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); + void span_draw_copy(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); + void span_draw_fill(INT32 scanline, const extent_t &extent, const rdp_poly_state &object, INT32 threadid); // Render-related (move into eventual drawing-related classes?) void tc_div(INT32 ss, INT32 st, INT32 sw, INT32* sss, INT32* sst); @@ -575,7 +575,7 @@ public: UINT32 m_fill_color; - other_modes_t m_other_modes; + other_modes_t m_other_modes; n64_blender_t m_blender; @@ -588,7 +588,7 @@ public: UINT16 m_dzpix_normalize[0x10000]; rectangle_t m_scissor; - span_base_t m_span_base; + span_base_t m_span_base; rectangle m_visarea; @@ -602,16 +602,16 @@ public: bool rdp_range_check(UINT32 addr); - n64_tile_t m_tiles[8]; + n64_tile_t m_tiles[8]; private: - void write_pixel(UINT32 curpixel, INT32 r, INT32 g, INT32 b, rdp_span_aux* userdata, const rdp_poly_state &object); - void read_pixel(UINT32 curpixel, rdp_span_aux* userdata, const rdp_poly_state &object); - void copy_pixel(UINT32 curpixel, INT32 r, INT32 g, INT32 b, INT32 m_current_pix_cvg, const rdp_poly_state &object); - void fill_pixel(UINT32 curpixel, const rdp_poly_state &object); + void write_pixel(UINT32 curpixel, INT32 r, INT32 g, INT32 b, rdp_span_aux* userdata, const rdp_poly_state &object); + void read_pixel(UINT32 curpixel, rdp_span_aux* userdata, const rdp_poly_state &object); + void copy_pixel(UINT32 curpixel, INT32 r, INT32 g, INT32 b, INT32 m_current_pix_cvg, const rdp_poly_state &object); + void fill_pixel(UINT32 curpixel, const rdp_poly_state &object); - void precalc_cvmask_derivatives(void); - void z_build_com_table(void); + void precalc_cvmask_derivatives(void); + void z_build_com_table(void); void video_update16(n64_periphs* n64, bitmap_rgb32 &bitmap); void video_update32(n64_periphs* n64, bitmap_rgb32 &bitmap); @@ -624,15 +624,15 @@ private: cv_mask_derivative_t cvarray[(1 << 8)]; - UINT16 m_z_com_table[0x40000]; //precalced table of compressed z values, 18b: 512 KB array! - UINT32 m_z_complete_dec_table[0x4000]; //the same for decompressed z values, 14b - UINT8 m_compressed_cvmasks[0x10000]; //16bit cvmask -> to byte + UINT16 m_z_com_table[0x40000]; //precalced table of compressed z values, 18b: 512 KB array! + UINT32 m_z_complete_dec_table[0x4000]; //the same for decompressed z values, 14b + UINT8 m_compressed_cvmasks[0x10000]; //16bit cvmask -> to byte UINT32 m_cmd_data[0x1000]; UINT32 m_temp_rect_data[0x1000]; - INT32 m_cmd_ptr; - INT32 m_cmd_cur; + INT32 m_cmd_ptr; + INT32 m_cmd_cur; UINT32 m_start; UINT32 m_end; diff --git a/src/mame/video/namcos1.c b/src/mame/video/namcos1.c index c518e998cba..78bd68a5057 100644 --- a/src/mame/video/namcos1.c +++ b/src/mame/video/namcos1.c @@ -141,7 +141,7 @@ void namcos1_state::video_start() memset(m_playfield_control, 0, sizeof(m_playfield_control)); m_copy_sprites = 0; - + save_item(NAME(m_copy_sprites)); } diff --git a/src/mame/video/nbmj8688.c b/src/mame/video/nbmj8688.c index bf47bfed3c2..911315c907a 100644 --- a/src/mame/video/nbmj8688.c +++ b/src/mame/video/nbmj8688.c @@ -556,7 +556,7 @@ void nbmj8688_state::common_video_start() m_scrolly = 0; // reset because crystalg/crystal2 don't write to this register m_screen_refresh = 1; - + save_pointer(NAME(m_videoram), 512 * 256); save_pointer(NAME(m_clut), 0x20); save_item(NAME(m_scrolly)); @@ -573,7 +573,7 @@ void nbmj8688_state::common_video_start() save_item(NAME(m_gfxflag3)); save_item(NAME(m_flipscreen)); save_item(NAME(m_flipscreen_old)); - + machine().save().register_postload(save_prepost_delegate(FUNC(nbmj8688_state::postload), this)); } diff --git a/src/mame/video/nbmj8891.c b/src/mame/video/nbmj8891.c index cb4c44bdf21..16c4643ba2a 100644 --- a/src/mame/video/nbmj8891.c +++ b/src/mame/video/nbmj8891.c @@ -501,7 +501,7 @@ VIDEO_START_MEMBER(nbmj8891_state,_1layer) save_item(NAME(m_param_cnt)); save_item(NAME(m_param_old)); } - + common_save_state(); } @@ -521,7 +521,7 @@ void nbmj8891_state::video_start() memset(m_videoram1, 0xff, (width * height * sizeof(UINT8))); m_gfxdraw_mode = 1; m_screen_refresh = 1; - + common_save_state(); save_pointer(NAME(m_videoram1), width * height); } @@ -546,7 +546,7 @@ void nbmj8891_state::common_save_state() save_pointer(NAME(m_palette_ptr), 0x200); save_pointer(NAME(m_clut), 0x800); save_item(NAME(m_flipscreen_old)); - + machine().save().register_postload(save_prepost_delegate(FUNC(nbmj8891_state::postload), this)); } diff --git a/src/mame/video/nbmj8900.c b/src/mame/video/nbmj8900.c index 232ef9b5b01..1cfb31dee91 100644 --- a/src/mame/video/nbmj8900.c +++ b/src/mame/video/nbmj8900.c @@ -368,7 +368,7 @@ void nbmj8900_state::video_start() { m_screen_width = m_screen->width(); m_screen_height = m_screen->height(); - + m_blitter_timer = timer_alloc(TIMER_BLITTER); m_screen->register_screen_bitmap(m_tmpbitmap0); @@ -382,7 +382,7 @@ void nbmj8900_state::video_start() // m_palette->pen(0x07f) = 0xff; /* palette_transparent_pen */ m_gfxdraw_mode = 1; m_screen_refresh = 1; - + save_item(NAME(m_scrolly)); save_item(NAME(m_blitter_destx)); save_item(NAME(m_blitter_desty)); diff --git a/src/mame/video/pandoras.c b/src/mame/video/pandoras.c index dea9040d409..5e3105e1048 100644 --- a/src/mame/video/pandoras.c +++ b/src/mame/video/pandoras.c @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Manuel Abadia +// copyright-holders:Manuel Abadia #include "emu.h" #include "includes/pandoras.h" #include "video/resnet.h" diff --git a/src/mame/video/rdpblend.h b/src/mame/video/rdpblend.h index 4e6ab25e2b4..89d97e7a5c3 100644 --- a/src/mame/video/rdpblend.h +++ b/src/mame/video/rdpblend.h @@ -72,8 +72,8 @@ class n64_blender_t INT32 dither_alpha(INT32 alpha, INT32 dither); INT32 dither_color(INT32 color, INT32 dither); - UINT8 m_color_dither[256 * 8]; - UINT8 m_alpha_dither[256 * 8]; + UINT8 m_color_dither[256 * 8]; + UINT8 m_alpha_dither[256 * 8]; }; #endif // _VIDEO_RDPBLEND_H_ diff --git a/src/mame/video/rdptpipe.c b/src/mame/video/rdptpipe.c index 2bd09a05727..42b811330bf 100644 --- a/src/mame/video/rdptpipe.c +++ b/src/mame/video/rdptpipe.c @@ -255,7 +255,7 @@ void n64_texture_pipe_t::clamp_cycle_light(INT32* S, INT32* T, const bool maxs, void n64_texture_pipe_t::cycle_nearest(color_t* TEX, color_t* prev, INT32 SSS, INT32 SST, UINT32 tilenum, UINT32 cycle, rdp_span_aux* userdata, const rdp_poly_state& object) { - // const n64_tile_t* tiles = object.m_tiles; + // const n64_tile_t* tiles = object.m_tiles; const n64_tile_t& tile = object.m_tiles[tilenum]; const UINT32 tformat = tile.format; const UINT32 tsize = tile.size; diff --git a/src/mame/video/rdptpipe.h b/src/mame/video/rdptpipe.h index defa2b0feb7..7397f33d131 100644 --- a/src/mame/video/rdptpipe.h +++ b/src/mame/video/rdptpipe.h @@ -158,15 +158,15 @@ class n64_texture_pipe_t UINT32 fetch_i8_tlut1(INT32 s, INT32 t, INT32 tbase, INT32 tpal, rdp_span_aux* userdata); UINT32 fetch_i8_raw(INT32 s, INT32 t, INT32 tbase, INT32 tpal, rdp_span_aux* userdata); - texel_fetcher_t m_texel_fetch[16*5]; + texel_fetcher_t m_texel_fetch[16*5]; n64_rdp* m_rdp; INT32 m_maskbits_table[16]; UINT32 m_expand_16to32_table[0x10000]; - UINT16 m_lod_lookup[0x80000]; - INT32 m_clamp_s_diff[8]; - INT32 m_clamp_t_diff[8]; + UINT16 m_lod_lookup[0x80000]; + INT32 m_clamp_s_diff[8]; + INT32 m_clamp_t_diff[8]; }; #endif // _VIDEO_RDPTEXPIPE_H_ diff --git a/src/mame/video/seta001.c b/src/mame/video/seta001.c index f228da92924..d0ff7874fb3 100644 --- a/src/mame/video/seta001.c +++ b/src/mame/video/seta001.c @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Luca Elia, David Haywood +// copyright-holders:Luca Elia, David Haywood /* emulation of Seta sprite chips X1-001A X1-002A (SDIP64) diff --git a/src/mame/video/seta001.h b/src/mame/video/seta001.h index 4b09001d56c..e7f50bd49b9 100644 --- a/src/mame/video/seta001.h +++ b/src/mame/video/seta001.h @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Luca Elia, David Haywood +// copyright-holders:Luca Elia, David Haywood typedef device_delegate gfxbank_cb_delegate; diff --git a/src/mame/video/tc0100scn.c b/src/mame/video/tc0100scn.c index c7eaaaab84d..abe0a708c07 100644 --- a/src/mame/video/tc0100scn.c +++ b/src/mame/video/tc0100scn.c @@ -446,7 +446,7 @@ void tc0100scn_device::postload() { set_layer_ptrs(); restore_scroll(); - + m_gfxdecode->gfx(m_txnum)->set_source((UINT8 *)m_char_ram); m_tilemap[0][0]->mark_all_dirty(); diff --git a/src/mame/video/videopin.c b/src/mame/video/videopin.c index 00503d1aa5c..27f400a8be1 100644 --- a/src/mame/video/videopin.c +++ b/src/mame/video/videopin.c @@ -30,7 +30,7 @@ TILE_GET_INFO_MEMBER(videopin_state::get_tile_info) void videopin_state::video_start() { m_bg_tilemap = &machine().tilemap().create(m_gfxdecode, tilemap_get_info_delegate(FUNC(videopin_state::get_tile_info),this), tilemap_mapper_delegate(FUNC(videopin_state::get_memory_offset),this), 8, 8, 48, 32); - + save_item(NAME(m_ball_x)); save_item(NAME(m_ball_y)); } diff --git a/src/mess/drivers/abc80x.c b/src/mess/drivers/abc80x.c index 75cc73a29fe..f98139ad1a6 100644 --- a/src/mess/drivers/abc80x.c +++ b/src/mess/drivers/abc80x.c @@ -139,11 +139,11 @@ Notes: /* - TODO: + TODO: - - cassette - - abc806 RTC - - abc806 disks except ufd631 won't boot + - cassette + - abc806 RTC + - abc806 disks except ufd631 won't boot */ diff --git a/src/mess/drivers/amstrad.c b/src/mess/drivers/amstrad.c index 1ab281a4c46..b6ed946e1e9 100644 --- a/src/mess/drivers/amstrad.c +++ b/src/mess/drivers/amstrad.c @@ -1,5 +1,5 @@ // license:GPL-2.0+ -// copyright-holders:Kevin Thacker, Barry Rodewald +// copyright-holders:Kevin Thacker, Barry Rodewald /****************************************************************************** amstrad.c diff --git a/src/mess/drivers/camplynx.c b/src/mess/drivers/camplynx.c index 84822d66fd0..c93d60d52f4 100644 --- a/src/mess/drivers/camplynx.c +++ b/src/mess/drivers/camplynx.c @@ -393,7 +393,7 @@ WRITE8_MEMBER( camplynx_state::port84_w ) // Square wave output m_cass->output(BIT(data, 5) ? -1.0 : +1.0); } - else // speaker output + else // speaker output m_dac->write_unsigned8(space, 0, data); } @@ -432,7 +432,7 @@ WRITE8_MEMBER( camplynx_state::lynx128k_port84_w ) // Square wave output m_cass->output(BIT(data, 5) ? -1.0 : +1.0); } - else // speaker output + else // speaker output m_dac->write_unsigned8(space, 0, data); } diff --git a/src/mess/drivers/hh_cop400.c b/src/mess/drivers/hh_cop400.c index 210b95a4db5..568ccd6644e 100644 --- a/src/mess/drivers/hh_cop400.c +++ b/src/mess/drivers/hh_cop400.c @@ -4,7 +4,7 @@ National Semiconductor COP400 MCU handhelds or other simple devices, mostly LED electronic games/toys. - + TODO: - non-working games are due to MCU emulation bugs? - better not start on visually dumped games before other games are working @@ -233,7 +233,7 @@ UINT8 hh_cop400_state::read_inputs(int columns) Castle Toy Einstein * COP421 MCU labeled ~/927 COP421-NEZ/N * 4 lamps, 1bit sound - + ***************************************************************************/ class ctstein_state : public hh_cop400_state @@ -261,7 +261,7 @@ static MACHINE_CONFIG_START( ctstein, ctstein_state ) MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_DISABLED) // guessed MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1)) -// MCFG_DEFAULT_LAYOUT(layout_ctstein) +// MCFG_DEFAULT_LAYOUT(layout_ctstein) /* no video! */ @@ -310,7 +310,7 @@ void einvaderc_state::prepare_display() // D0-D2 are 7segs for (int y = 0; y < 3; y++) m_display_segmask[y] = 0x7f; - + // update display UINT8 l = BITSWAP8(m_l,7,6,0,1,2,3,4,5); UINT16 grid = (m_d | m_g << 4 | m_sk << 8 | m_so << 9) ^ 0x0ff; @@ -633,7 +633,7 @@ static MACHINE_CONFIG_START( plus1, plus1_state ) MCFG_COP400_CONFIG(COP400_CKI_DIVISOR_16, COP400_CKO_OSCILLATOR_OUTPUT, COP400_MICROBUS_ENABLED) // guessed MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_cop400_state, display_decay_tick, attotime::from_msec(1)) -// MCFG_DEFAULT_LAYOUT(layout_plus1) +// MCFG_DEFAULT_LAYOUT(layout_plus1) /* no video! */ @@ -652,12 +652,12 @@ MACHINE_CONFIG_END Milton Bradley (Electronic) Lightfight * COP421L MCU labeled /B119 COP421L-HLA/N * LED matrix, 1bit sound - + Xbox-shaped electronic game for 2 or more players, with long diagonal buttons next to each outer LED. The main object of the game is to pinpoint a light by pressing 2 buttons. To start, press a skill-level button(P2 button 7/8/9) after selecting a game mode(P1 button 6-10). - + The game variations are: 1: LightFight 2: NightFight diff --git a/src/mess/drivers/hh_hmcs40.c b/src/mess/drivers/hh_hmcs40.c index 5e3c1c88c1b..fce417525f0 100644 --- a/src/mess/drivers/hh_hmcs40.c +++ b/src/mess/drivers/hh_hmcs40.c @@ -2070,7 +2070,7 @@ void eturtles_state::prepare_display() WRITE8_MEMBER(eturtles_state::plate_w) { m_r[offset] = data; - + // R0x-R6x: vfd matrix plate int shift = offset * 4; m_plate = (m_plate & ~(0xf << shift)) | (data << shift); @@ -2080,7 +2080,7 @@ WRITE8_MEMBER(eturtles_state::plate_w) WRITE16_MEMBER(eturtles_state::grid_w) { m_d = data; - + // D1-D6: input mux UINT8 inp_mux = data >> 1 & 0x3f; if (inp_mux != m_inp_mux) @@ -2172,7 +2172,7 @@ INPUT_CHANGED_MEMBER(eturtles_state::input_changed) void eturtles_state::machine_start() { hh_hmcs40_state::machine_start(); - + // register for savestates save_item(NAME(m_cop_irq)); } diff --git a/src/mess/drivers/hh_tms1k.c b/src/mess/drivers/hh_tms1k.c index 5c7c020d68b..b469d5d11b3 100644 --- a/src/mess/drivers/hh_tms1k.c +++ b/src/mess/drivers/hh_tms1k.c @@ -1722,7 +1722,7 @@ static MACHINE_CONFIG_START( efootb4, efootb4_state ) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(efootb4_state, write_o)) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) -// MCFG_DEFAULT_LAYOUT(layout_efootb4) +// MCFG_DEFAULT_LAYOUT(layout_efootb4) MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) /* no video! */ @@ -1836,7 +1836,7 @@ static MACHINE_CONFIG_START( ebaskb2, ebaskb2_state ) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(ebaskb2_state, write_o)) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) -// MCFG_DEFAULT_LAYOUT(layout_ebaskb2) +// MCFG_DEFAULT_LAYOUT(layout_ebaskb2) MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) /* no video! */ @@ -4081,7 +4081,7 @@ static MACHINE_CONFIG_START( tbreakup, tbreakup_state ) MCFG_TMS1XXX_WRITE_O_CB(WRITE16(tbreakup_state, write_o)) MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_tms1k_state, display_decay_tick, attotime::from_msec(1)) -// MCFG_DEFAULT_LAYOUT(layout_tbreakup) +// MCFG_DEFAULT_LAYOUT(layout_tbreakup) MCFG_DEFAULT_LAYOUT(layout_hh_tms1k_test) /* no video! */ diff --git a/src/mess/drivers/monty.c b/src/mess/drivers/monty.c index ce4b061b3f4..256e01de83e 100644 --- a/src/mess/drivers/monty.c +++ b/src/mess/drivers/monty.c @@ -4,20 +4,20 @@ 2015-05-08 Skeleton driver for Ritam Monty Plays Scrabble BRAND crossword game - Scrabble computer that allows you play a game of Scrabble by yourself (or you - can play with up to 3 players). Has a built-in 12,000 vocabulary, expandable - to 44,000 by way of 2 expansion modules each containing 16,000 more obscure words. - You can use the included 'score cards' (which look like little Scrabble boards), - or you can use a real Scrabble board and tiles to play. Also note, Monty + Scrabble computer that allows you play a game of Scrabble by yourself (or you + can play with up to 3 players). Has a built-in 12,000 vocabulary, expandable + to 44,000 by way of 2 expansion modules each containing 16,000 more obscure words. + You can use the included 'score cards' (which look like little Scrabble boards), + or you can use a real Scrabble board and tiles to play. Also note, Monty apparently originally came with a little pen. - This game was later upgraded by Ritam to Master Monty which had 24,000 words - built-in (expandable to a total of 56,000 with the same 2 expansion modules). - Two variations on Master Monty have been seen: one looks exactly the same as the - Monty but the electronics on the inside have been upgraded. The later version - is blue and says Master Monty at the top. Both of these versions are hand-upgraded + This game was later upgraded by Ritam to Master Monty which had 24,000 words + built-in (expandable to a total of 56,000 with the same 2 expansion modules). + Two variations on Master Monty have been seen: one looks exactly the same as the + Monty but the electronics on the inside have been upgraded. The later version + is blue and says Master Monty at the top. Both of these versions are hand-upgraded by adding chips and wires to the inside of the game. - + TODO: - Input from the keyboard - Proper SED1503F emulation (it's simulated in-driver for now) @@ -35,54 +35,54 @@ public: monty_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_sed0(*this, "sed1520_0") - , m_writeUpper(false) + , m_sed0(*this, "sed1520_0") + , m_writeUpper(false) { - for (int i = 0; i < 42*32; i++) - m_pixels[i] = 0xff000000; + for (int i = 0; i < 42*32; i++) + m_pixels[i] = 0xff000000; } - DECLARE_READ8_MEMBER(ioInputRead); + DECLARE_READ8_MEMBER(ioInputRead); - DECLARE_WRITE8_MEMBER(ioDisplayWrite); - DECLARE_WRITE8_MEMBER(ioCommandWrite0); - DECLARE_WRITE8_MEMBER(ioCommandWrite1); - - // screen updates + DECLARE_WRITE8_MEMBER(ioDisplayWrite); + DECLARE_WRITE8_MEMBER(ioCommandWrite0); + DECLARE_WRITE8_MEMBER(ioCommandWrite1); + + // screen updates UINT32 lcd_update(screen_device& screen, bitmap_rgb32& bitmap, const rectangle& cliprect); private: required_device m_maincpu; - required_device m_sed0; // TODO: This isn't actually a SED1520, it's a SED1503F - //required_device m_sed1; // TODO: Also, there are 2 SED1503Fs on the board - one is flipped upside down + required_device m_sed0; // TODO: This isn't actually a SED1520, it's a SED1503F + //required_device m_sed1; // TODO: Also, there are 2 SED1503Fs on the board - one is flipped upside down - // Test - UINT8 m_writeUpper; - UINT32 m_pixels[42*32]; + // Test + UINT8 m_writeUpper; + UINT32 m_pixels[42*32]; }; static ADDRESS_MAP_START(monty_mem, AS_PROGRAM, 8, monty_state) AM_RANGE(0x0000, 0x3fff) AM_ROM - //AM_RANGE(0x4000, 0x4000) // The main rom checks to see if another program is here on startup - AM_RANGE(0xf800, 0xffff) AM_RAM + //AM_RANGE(0x4000, 0x4000) // The main rom checks to see if another program is here on startup + AM_RANGE(0xf800, 0xffff) AM_RAM ADDRESS_MAP_END static ADDRESS_MAP_START(monty_io, AS_IO, 8, monty_state) ADDRESS_MAP_GLOBAL_MASK(0xff) - AM_RANGE(0x00, 0x00) AM_WRITE(ioCommandWrite0) - AM_RANGE(0x02, 0x02) AM_WRITE(ioCommandWrite1) - AM_RANGE(0x80, 0xff) AM_WRITE(ioDisplayWrite) + AM_RANGE(0x00, 0x00) AM_WRITE(ioCommandWrite0) + AM_RANGE(0x02, 0x02) AM_WRITE(ioCommandWrite1) + AM_RANGE(0x80, 0xff) AM_WRITE(ioDisplayWrite) - // 7 reads from a bit shifted IO port - AM_RANGE(0x01, 0x01) AM_READ(ioInputRead) - AM_RANGE(0x02, 0x02) AM_READ(ioInputRead) - AM_RANGE(0x04, 0x04) AM_READ(ioInputRead) - AM_RANGE(0x08, 0x08) AM_READ(ioInputRead) - AM_RANGE(0x10, 0x10) AM_READ(ioInputRead) - AM_RANGE(0x20, 0x20) AM_READ(ioInputRead) - AM_RANGE(0x40, 0x40) AM_READ(ioInputRead) + // 7 reads from a bit shifted IO port + AM_RANGE(0x01, 0x01) AM_READ(ioInputRead) + AM_RANGE(0x02, 0x02) AM_READ(ioInputRead) + AM_RANGE(0x04, 0x04) AM_READ(ioInputRead) + AM_RANGE(0x08, 0x08) AM_READ(ioInputRead) + AM_RANGE(0x10, 0x10) AM_READ(ioInputRead) + AM_RANGE(0x20, 0x20) AM_READ(ioInputRead) + AM_RANGE(0x40, 0x40) AM_READ(ioInputRead) ADDRESS_MAP_END @@ -93,79 +93,79 @@ INPUT_PORTS_END READ8_MEMBER( monty_state::ioInputRead ) { - //UINT8 foo; // = machine().rand() & 0xff; - //if (m_maincpu->pc() == 0x135f) - // foo = 0x14; - //if (m_maincpu->pc() == 0x1371) - // foo = 0x1f; - - UINT8 foo = (machine().rand() & 0xff) | 0x14; - - //printf("(%04x) %02x %02x\n", m_maincpu->pc(), foo, (foo & 0x14)); - return foo; + //UINT8 foo; // = machine().rand() & 0xff; + //if (m_maincpu->pc() == 0x135f) + // foo = 0x14; + //if (m_maincpu->pc() == 0x1371) + // foo = 0x1f; + + UINT8 foo = (machine().rand() & 0xff) | 0x14; + + //printf("(%04x) %02x %02x\n", m_maincpu->pc(), foo, (foo & 0x14)); + return foo; } WRITE8_MEMBER( monty_state::ioCommandWrite0 ) { - //printf("(%04x) Command Port 0 write : %02x\n", m_maincpu->pc(), data); - m_writeUpper = false; + //printf("(%04x) Command Port 0 write : %02x\n", m_maincpu->pc(), data); + m_writeUpper = false; } WRITE8_MEMBER( monty_state::ioCommandWrite1 ) { - //if (data == 0xfe) - // printf("---\n"); - - //printf("(%04x) Command Port 1 write : %02x\n", m_maincpu->pc(), data); - m_writeUpper = true; + //if (data == 0xfe) + // printf("---\n"); + + //printf("(%04x) Command Port 1 write : %02x\n", m_maincpu->pc(), data); + m_writeUpper = true; } WRITE8_MEMBER( monty_state::ioDisplayWrite ) { - // Offset directly corresponds to sed1503, DD RAM address (offset 0x7f may be special?) - //printf("(%04x) %02x %02x\n", m_maincpu->pc(), offset, data); - - const UINT8 localUpper = (offset & 0x40) >> 6; - const UINT8 seg = offset & 0x3f; - const UINT8 com = data; + // Offset directly corresponds to sed1503, DD RAM address (offset 0x7f may be special?) + //printf("(%04x) %02x %02x\n", m_maincpu->pc(), offset, data); - // Skip the controller and write straight to the LCD (pc=134f) - for (int i = 0; i < 8; i++) - { - // Pixel location - const int upperSedOffset = m_writeUpper ? 8*2 : 0; - - const size_t x = seg; - const size_t y = i + (localUpper*8) + upperSedOffset; - - // Pixel color - const bool on = (com >> i) & 0x01; - m_pixels[(y*42) + x] = on ? 0xffffffff : 0xff000000; - } + const UINT8 localUpper = (offset & 0x40) >> 6; + const UINT8 seg = offset & 0x3f; + const UINT8 com = data; + + // Skip the controller and write straight to the LCD (pc=134f) + for (int i = 0; i < 8; i++) + { + // Pixel location + const int upperSedOffset = m_writeUpper ? 8*2 : 0; + + const size_t x = seg; + const size_t y = i + (localUpper*8) + upperSedOffset; + + // Pixel color + const bool on = (com >> i) & 0x01; + m_pixels[(y*42) + x] = on ? 0xffffffff : 0xff000000; + } } UINT32 monty_state::lcd_update(screen_device& screen, bitmap_rgb32& bitmap, const rectangle& cliprect) { - for (int y = 0; y < 32; y++) - { - for (int x = 0; x < 42; x++) - { - bitmap.pix32(y, x) = m_pixels[(y*42) + x]; - } - } - - return 0x00; + for (int y = 0; y < 32; y++) + { + for (int x = 0; x < 42; x++) + { + bitmap.pix32(y, x) = m_pixels[(y*42) + x]; + } + } + + return 0x00; } SED1520_UPDATE_CB(monty_screen_update) { - // TODO: Not really a SED1520 - there are two SED1503s - return 0x00; + // TODO: Not really a SED1520 - there are two SED1503s + return 0x00; } @@ -177,15 +177,15 @@ static MACHINE_CONFIG_START( monty, monty_state ) MCFG_CPU_IO_MAP(monty_io) // Video hardware - MCFG_SCREEN_ADD("screen", LCD) - MCFG_SCREEN_REFRESH_RATE(50) - MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // Not accurate - MCFG_SCREEN_SIZE(42, 32) // Two SED1503s (42x16 pixels) control the top and bottom halves - MCFG_SCREEN_VISIBLE_AREA(0, 42-1, 0, 32-1) - MCFG_SCREEN_UPDATE_DRIVER(monty_state, lcd_update) + MCFG_SCREEN_ADD("screen", LCD) + MCFG_SCREEN_REFRESH_RATE(50) + MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // Not accurate + MCFG_SCREEN_SIZE(42, 32) // Two SED1503s (42x16 pixels) control the top and bottom halves + MCFG_SCREEN_VISIBLE_AREA(0, 42-1, 0, 32-1) + MCFG_SCREEN_UPDATE_DRIVER(monty_state, lcd_update) - // LCD controller interfaces - MCFG_SED1520_ADD("sed1520_0", monty_screen_update) + // LCD controller interfaces + MCFG_SED1520_ADD("sed1520_0", monty_screen_update) MACHINE_CONFIG_END @@ -193,15 +193,15 @@ MACHINE_CONFIG_END ROM_START( monty ) ROM_REGION(0xc000, "maincpu", 0) ROM_LOAD( "monty_main.bin", 0x0000, 0x4000, CRC(720b4f55) SHA1(0106eb88d3fbbf25a745b9b6ee785ba13689d095) ) // 27128 - ROM_LOAD( "monty_module1.bin", 0x4000, 0x4000, CRC(2725d8c3) SHA1(8273b9779c0915f9c7c43ea4fb460f43ce036358) ) // 27128 - ROM_LOAD( "monty_module2.bin", 0x8000, 0x4000, CRC(db672e47) SHA1(bb14fe86df06cfa4b19625ba417d1a5bc8eae155) ) // 27128 + ROM_LOAD( "monty_module1.bin", 0x4000, 0x4000, CRC(2725d8c3) SHA1(8273b9779c0915f9c7c43ea4fb460f43ce036358) ) // 27128 + ROM_LOAD( "monty_module2.bin", 0x8000, 0x4000, CRC(db672e47) SHA1(bb14fe86df06cfa4b19625ba417d1a5bc8eae155) ) // 27128 ROM_END ROM_START( mmonty ) ROM_REGION(0x10000, "maincpu", 0) ROM_LOAD( "master_monty_main.bin", 0x0000, 0x8000, CRC(bb5ef4d4) SHA1(ba2c759e429f8740df419f9abb60832eddfba8ab) ) // 27C256 - ROM_LOAD( "monty_module1.bin", 0x8000, 0x4000, CRC(2725d8c3) SHA1(8273b9779c0915f9c7c43ea4fb460f43ce036358) ) // 27128 - ROM_LOAD( "monty_module2.bin", 0xc000, 0x4000, CRC(db672e47) SHA1(bb14fe86df06cfa4b19625ba417d1a5bc8eae155) ) // 27128 + ROM_LOAD( "monty_module1.bin", 0x8000, 0x4000, CRC(2725d8c3) SHA1(8273b9779c0915f9c7c43ea4fb460f43ce036358) ) // 27128 + ROM_LOAD( "monty_module2.bin", 0xc000, 0x4000, CRC(db672e47) SHA1(bb14fe86df06cfa4b19625ba417d1a5bc8eae155) ) // 27128 ROM_END diff --git a/src/mess/drivers/mtx.c b/src/mess/drivers/mtx.c index 732a8643076..ddc61773f8c 100644 --- a/src/mess/drivers/mtx.c +++ b/src/mess/drivers/mtx.c @@ -18,7 +18,7 @@ - CBM (all RAM) mode - "Silicon" disks - Multi Effect Video Wall - + */ #include "emu.h" diff --git a/src/mess/drivers/rainbow.c b/src/mess/drivers/rainbow.c index 3ba06c4b396..9930b42ff22 100644 --- a/src/mess/drivers/rainbow.c +++ b/src/mess/drivers/rainbow.c @@ -16,10 +16,10 @@ Issues with this driver: (1) Keyboard emulation incomplete (fatal; inhibits the system from booting with ERROR 50). -Serial ports do not work, so serial communication failure (ERROR 60) and ERROR 40 (serial +Serial ports do not work, so serial communication failure (ERROR 60) and ERROR 40 (serial printer interface) result. Unfortunately the BIOS tests all three serial interfaces in line. -(2) while DOS 3 and UCSD systems (fort_sys, pas_sys) + diag disks boot, CPM 2.x and DOS 2.x die +(2) while DOS 3 and UCSD systems (fort_sys, pas_sys) + diag disks boot, CPM 2.x and DOS 2.x die in secondary boot loader with a RESTORE (seek track 0) when track 2 sector 1 should be loaded. Writing files to floppy is next to impossible on both CPM 1.x and DOS 3 (these two OS boot @@ -28,20 +28,20 @@ with keyboard workarounds enabled). File deletion works, so few bytes pass. (3) heavy system interaction stalls the driver. Start one of the torture tests on the diag.disk and see what happens (system interaction, Z80, about any test except the video / CRT tests). -(4) arbitration chip (E11; in 100-A schematics or E13 in -B) should be dumped. -It is a 6308 OTP ROM (2048 bit, 256 x 8) used as a lookup table (LUT) with the address pins (A) -used as inputs and the data pins (D) as output. +(4) arbitration chip (E11; in 100-A schematics or E13 in -B) should be dumped. +It is a 6308 OTP ROM (2048 bit, 256 x 8) used as a lookup table (LUT) with the address pins (A) +used as inputs and the data pins (D) as output. Plays a role in DMA access to lower memory (limited to 64 K; Extended communication option only). -Arbiter is also involved in refresh and shared memory contention (affects Z80/8088 CPU cycles). +Arbiter is also involved in refresh and shared memory contention (affects Z80/8088 CPU cycles). => INPUTS on E13 (PC-100 B): SH5 RF SH REQ H -> Pin 19 (A7) shared memory request / refresh ? 1K -> +5 V -> Pin 18 (A6) < UNUSED > -SH 2 BDL ACK (L) -> Pin 17 (A5) BUNDLE OPTION: IRQ acknowledged +SH 2 BDL ACK (L) -> Pin 17 (A5) BUNDLE OPTION: IRQ acknowledged SH 2 NONSHRCYC H -> Pin 5 (A4) unshared memory cycle is in progress -SH 2 PRECHARGE H -> Pin 4 (A3) +SH 2 PRECHARGE H -> Pin 4 (A3) SH 2 SHMUX 88 ENB -> Pin 3 (A2) shared memory SH2 DO REFRESH H -> Pin 2 (A1) indicates that extended memory must be refreshed -> on J6 as (L) SH10 BDL REQ (L) -> Pin 1 (A0) BUNDLE OPTION wishes to use shared memory @@ -52,7 +52,7 @@ UPGRADES WORTH EMULATING: * Color graphics option (uses NEC upd7220 GDC). REFERENCE: Programmer's Reference: AA-AE36A-TV. Either 384 x 240 x 16 or 800 x 240 x 4 colors (out of 4096). 8 ? 64 K video RAM. Pallette limited to 4 colors on 100-A. -Graphics output is independent from monochrome output. +Graphics output is independent from monochrome output. * Extended communication option (occupies BUNDLE_OPTION 1 + 2) REFERENCE: AA-V172A-TV + Addendum AV-Y890A-TV. Two ports, a high-speed RS-422 half-duplex interface (port A) + lower-speed RS-423 full/half-duplex interface @@ -62,7 +62,7 @@ Uses SHRAM, SHMA, BDL SH WR L, NONSHARED CYCLE. Implementation requires DMA and Can't be added if RD51 hard disk controller present (J4 + J5). For programming info see NEWCOM1.DOC (-> RBETECDOC.ZIP). -* ( NO DUMP YET ) PC character set. Enhances Code Blue emulation. Simple CHARACTER ROM replacement? +* ( NO DUMP YET ) PC character set. Enhances Code Blue emulation. Simple CHARACTER ROM replacement? * ( NO DUMP YET ) TCS / Technical Character Set ('$95 from DEC, for Rainbow 100, 100B, 100+ ; separate docs available') Source: price list of a DEC reseller. Possibly identical to http://vt100.net/charsets/technical.html @@ -175,12 +175,12 @@ DIAGNOSTIC-LEDs |J3 | |J2 | |J1 | |-------------PCB# 5416206 / 5016205-01C1-------------| CONNECTORS ("J"): - ...J5... ...J4... both: RD51 controller (hard disk) - ...J5... ...J4... both: EXTENDED COMM. controller + ...J5... ...J4... both: RD51 controller (hard disk) + ...J5... ...J4... both: EXTENDED COMM. controller - ...J6... is the MEMORY OPTION connector (52 pin) - ...J7... is the GRAPHICS OPTION connector (40 pin) - ...J9... RX50 FLOPPY CONTROLLER (40 pin; REQUIRED) + ...J6... is the MEMORY OPTION connector (52 pin) + ...J7... is the GRAPHICS OPTION connector (40 pin) + ...J9... RX50 FLOPPY CONTROLLER (40 pin; REQUIRED) JUMPERS (labeled "W"): W5 + W6 are out when 16K x 8 EPROMS are used @@ -212,7 +212,7 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND). // (2) KEYBOARD_WORKAROUND : also requires FORCE...LOGO (and preliminary headers) //#define KEYBOARD_WORKAROUND -//#define KBD_DELAY 8 // (debounce delay) +//#define KBD_DELAY 8 // (debounce delay) // --------------------------------------------------------------------------- @@ -236,8 +236,8 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND). #include "formats/pc_dsk.h" // PC Formats (TESTING) #include "imagedev/flopdrv.h" -#include "imagedev/harddriv.h" -#include "machine/wd2010.h" +#include "imagedev/harddriv.h" +#include "machine/wd2010.h" #include "machine/i8251.h" #include "machine/clock.h" @@ -261,7 +261,7 @@ public: driver_device(mconfig, type, tag), #ifdef KEYBOARD_WORKAROUND -#include "./m_kbd1.c" +#include "./m_kbd1.c" #endif @@ -270,9 +270,9 @@ public: m_inp3(*this, "W15"), m_inp4(*this, "W18"), m_inp5(*this, "HARD DISK PRESENT"), // DO NOT CHANGE ORDER (also: COMMUNICATION EXTENSION) - m_inp6(*this, "FLOPPY CONTROLLER"), // DO NOT CHANGE ORDER - m_inp7(*this, "GRAPHICS OPTION"), // DO NOT CHANGE ORDER - m_inp8(*this, "MEMORY PRESENT"), // DO NOT CHANGE ORDER + m_inp6(*this, "FLOPPY CONTROLLER"), // DO NOT CHANGE ORDER + m_inp7(*this, "GRAPHICS OPTION"), // DO NOT CHANGE ORDER + m_inp8(*this, "MEMORY PRESENT"), // DO NOT CHANGE ORDER m_inp9(*this, "MONITOR TYPE"), m_inp10(*this, "J17"), m_inp11(*this, "CLIKCLOK"), @@ -283,7 +283,7 @@ public: m_z80(*this, "subcpu"), m_fdc(*this, FD1793_TAG), - m_hdc(*this, "hdc"), + m_hdc(*this, "hdc"), m_kbd8251(*this, "kbdser"), m_lk201(*this, LK201_TAG), @@ -312,9 +312,9 @@ public: DECLARE_WRITE8_MEMBER(share_z80_w); // 'RD51' MFM CONTROLLER (WD1010) ************************************* - DECLARE_READ8_MEMBER(hd_status_60_r); // TRI STATE DATA PORT (R/W) + DECLARE_READ8_MEMBER(hd_status_60_r); // TRI STATE DATA PORT (R/W) DECLARE_WRITE8_MEMBER(hd_status_60_w); - + DECLARE_READ8_MEMBER(hd_status_68_r); // EXTRA REGISTER 0x68 (R/W 8088) DECLARE_WRITE8_MEMBER(hd_status_68_w); @@ -364,9 +364,9 @@ public: DECLARE_READ8_MEMBER(rtc_w); - + #ifdef KEYBOARD_WORKAROUND -#include "./port9x_Ax.c" +#include "./port9x_Ax.c" #endif UINT32 screen_update_rainbow(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(vblank_irq); @@ -381,22 +381,22 @@ protected: private: enum { // LOWEST PRIORITY - // Mnemonic - - - - - - TYPE ADDRESS - Source + // Mnemonic - - - - - - TYPE ADDRESS - Source // [1][0] [1][0] <= Depends on DTR(L) output of keyboard PUSART (on Rainbow-100 B) IRQ_8088_MAILBOX = 0, // 27/A7 9C/29C - [built-in] Interrupt from Z80A IRQ_8088_KBD, // 26/A6 98/298 - [built-in] KEYBOARD Interrupt - 8251A IRQ_BDL_INTR_L, // 25/A5 94/294 - [ext. BUNDLE OPTION] Hard disk or Extended communication IRQ (no DMA) - // IRQ_COMM_PTR_INTR_L, // 24/A4 90/290 - [built-in 7201] Communication/Printer interrupt - // IRQ_DMAC_INTR_L, // 23/A3 8C/28C - [ext. COMM.BOARD only] - external DMA Controller (8237) interrupt - // IRQ_GRF_INTR_L, // 22/A2 88/288 - [ext. COLOR GRAPHICS] - // IRQ_BDL_INTR_1L, // 21/A1 84/284 - [ext. COMM.BOARD only] + // IRQ_COMM_PTR_INTR_L, // 24/A4 90/290 - [built-in 7201] Communication/Printer interrupt + // IRQ_DMAC_INTR_L, // 23/A3 8C/28C - [ext. COMM.BOARD only] - external DMA Controller (8237) interrupt + // IRQ_GRF_INTR_L, // 22/A2 88/288 - [ext. COLOR GRAPHICS] + // IRQ_BDL_INTR_1L, // 21/A1 84/284 - [ext. COMM.BOARD only] IRQ_8088_VBL, // 20/A0 80/280 - [built-in DC012] - VERT INTR L (= schematics) - IRQ_8088_NMI // 02/02 08/08 - [external MEMORY EXTENSION] - PARITY ERROR L + IRQ_8088_NMI // 02/02 08/08 - [external MEMORY EXTENSION] - PARITY ERROR L }; // HIGHEST PRIORITY - + #ifdef KEYBOARD_WORKAROUND -#include "./m_kbd2.c" +#include "./m_kbd2.c" #endif required_ioport m_inp1; @@ -416,7 +416,7 @@ private: required_device m_z80; required_device m_fdc; - optional_device m_hdc; + optional_device m_hdc; required_device m_kbd8251; required_device m_lk201; @@ -468,10 +468,10 @@ private: int m_irq_high; UINT32 m_irq_mask; - int m_bdl_irq; + int m_bdl_irq; int m_hdc_buf_offset; - bool m_hdc_index_latch; + bool m_hdc_index_latch; bool m_hdc_step_latch; int m_hdc_direction; bool m_hdc_track0; @@ -491,7 +491,7 @@ FLOPPY_IMD_FORMAT, FLOPPY_PC_FORMAT FLOPPY_FORMATS_END -// initially only : SLOT_INTERFACE("525qd", FLOPPY_525_SSQD) +// initially only : SLOT_INTERFACE("525qd", FLOPPY_525_SSQD) static SLOT_INTERFACE_START(rainbow_floppies) SLOT_INTERFACE("525qd0", FLOPPY_525_SSQD) SLOT_INTERFACE("525qd1", FLOPPY_525_SSQD) @@ -584,7 +584,7 @@ AM_RANGE(0x00, 0x00) AM_READWRITE(i8088_latch_r, i8088_latch_w) // 0x02 Communication status / control register (8088) AM_RANGE(0x02, 0x02) AM_READWRITE(comm_control_r, comm_control_w) -AM_RANGE(0x04, 0x04) AM_DEVWRITE("vt100_video", rainbow_video_device, dc011_w) +AM_RANGE(0x04, 0x04) AM_DEVWRITE("vt100_video", rainbow_video_device, dc011_w) // TODO: unmapped [06] : Communication bit rates (see page 21 of PC 100 SPEC) @@ -592,7 +592,7 @@ AM_RANGE(0x08, 0x08) AM_READ(system_parameter_r) AM_RANGE(0x0a, 0x0a) AM_READWRITE(diagnostic_r, diagnostic_w) -AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("vt100_video", rainbow_video_device, dc012_w) +AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("vt100_video", rainbow_video_device, dc012_w) // TODO: unmapped [0e] : PRINTER BIT RATE REGISTER (WO) @@ -609,7 +609,7 @@ AM_RANGE(0x11, 0x11) AM_DEVREADWRITE("kbdser", i8251_device, status_r, control_w // 0x20 -> 0x2f ***** EXTENDED COMM. OPTION / Option Select 1. // See boot rom @1EA6: 0x27 (<- RESET EXTENDED COMM OPTION ) // =========================================================== -// 0x30 -> 0x3f ***** Option Select 3 +// 0x30 -> 0x3f ***** Option Select 3 // =========================================================== // 0x40 COMMUNICATIONS DATA REGISTER (MPSC) // 0x41 PRINTER DATA REGISTER (MPSC) @@ -647,7 +647,7 @@ AM_RANGE(0x69, 0x69) AM_READ(hd_status_69_r) // =========================================================== // THE RD51 CONTROLLER: // - WD1010AL - 00 (WDC '83) -// + 2 K x 8 SRAM (SY2128-4 or Japan 8328) 21-17872-01 +// + 2 K x 8 SRAM (SY2128-4 or Japan 8328) 21-17872-01 // + 74(L)Sxxx glue logic (drive/head select, buffers etc.) // + 10 Mhz Quartz (/2) // SERVICE JUMPERS (not to be removed for normal operation): @@ -665,26 +665,26 @@ AM_RANGE(0x69, 0x69) AM_READ(hd_status_69_r) // DEC RD53(67 Mbyte); 1024 cyl.8 heads -- 1325 [!] // [!] More than 4 heads. Prepare with WUTIL and / or DSKPREP. -// SIZE RESTRICTIONS +// SIZE RESTRICTIONS // * HARDWARE: -// WD1010 controller has a built-in limit of 8 heads / 1024 cylinders. +// WD1010 controller has a built-in limit of 8 heads / 1024 cylinders. // * BOOT LOADERS: // - the DEC boot loader (and FDISK from DOS 3.10) initially allowed a maximum hard disc size of 20 MB. // - the custom boot loader that comes with 'WUTIL 3.2' allows 117 MB and 8 surfaces. // * SOFTWARE: -// - MS-DOS 2 allows a maximum partition size of 16 MB (sizes > 15 MB are incompatible to DOS 3) +// - MS-DOS 2 allows a maximum partition size of 16 MB (sizes > 15 MB are incompatible to DOS 3) // [ no more than 4 partitions of 8 MB size on one hard disk possible ] // - MS-DOS 3 - and Concurrent CPM - have a global 32 MB (1024 cylinder) limit // - a CP/M-86-80 partition can have up to 8 MB (all CP/M partitions together must not exceed 10 MB) // =========================================================== -// 0x70 -> 0x7f ***** Option Select 4 +// 0x70 -> 0x7f ***** Option Select 4 // =========================================================== // 0x10c AM_RANGE(0x10c, 0x10c) AM_DEVWRITE("vt100_video", rainbow_video_device, dc012_w) #ifdef KEYBOARD_WORKAROUND -#include "./am_range_9x_Ax.c" +#include "./am_range_9x_Ax.c" #endif ADDRESS_MAP_END @@ -778,7 +778,7 @@ PORT_DIPNAME(0x08, 0x08, "W15 (FACTORY TEST C, LEAVE OFF)") PORT_TOGGLE PORT_DIPSETTING(0x08, DEF_STR(Off)) PORT_DIPSETTING(0x00, DEF_STR(On)) -PORT_START("W18") // DSR = 1 when switch is OFF - see i8251.c +PORT_START("W18") // DSR = 1 when switch is OFF - see i8251.c PORT_DIPNAME(0x01, 0x00, "W18 (FACTORY TEST D, LEAVE OFF) (8251A: DSR)") PORT_TOGGLE PORT_DIPSETTING(0x00, DEF_STR(Off)) PORT_DIPSETTING(0x01, DEF_STR(On)) @@ -808,22 +808,22 @@ void rainbow_state::machine_reset() // BIOS can't handle soft resets (would trigger ERROR 16). // As a fallback, execute a hard reboot! if (COLD_BOOT == 2) - { // FIXME: ask for confirmation (via UI ?) + { // FIXME: ask for confirmation (via UI ?) device().machine().schedule_hard_reset(); } /* ***************************************************************************************************************** Suitable Solutions ClikClok (one of the more compatible battery backed real time clocks) - DESCRIPTION: plugs into NVRAM chip socket on a 100-A and into one of the (EP)ROM sockets on the 100-B - ............ (there is a socket on the ClikClok for the NVRAM / EPROM chip). + DESCRIPTION: plugs into NVRAM chip socket on a 100-A and into one of the (EP)ROM sockets on the 100-B + ............ (there is a socket on the ClikClok for the NVRAM / EPROM chip). - DS1315 phantom clock. No address space needed (-> IRQs must be disabled to block ROM accesses during reads). + DS1315 phantom clock. No address space needed (-> IRQs must be disabled to block ROM accesses during reads). - DRIVERS: 'rbclik.zip' DOS and CP/M binaries plus source from DEC employee; Reads & displays times. Y2K READY. - + 'newclk.arc' (Suitable Solutions; sets time and date; uses FE000 and up). 2 digit year here. + DRIVERS: 'rbclik.zip' DOS and CP/M binaries plus source from DEC employee; Reads & displays times. Y2K READY. + + 'newclk.arc' (Suitable Solutions; sets time and date; uses FE000 and up). 2 digit year here. - TODO: obtain hardware / check address decoders. Access logic here is derived from Vincent Esser's source. + TODO: obtain hardware / check address decoders. Access logic here is derived from Vincent Esser's source. *****************************************************************************************************************/ // * Reset RTC to a defined state * @@ -833,7 +833,7 @@ void rainbow_state::machine_reset() // A magic pattern enables reads or writes (-> RTC_WRITE_DATA_0 / RTC_WRITE_DATA_1) // 64 bits read from two alternating addresses (see DS1315.C) - #define RTC_PATTERN_0 0xFC100 // MIRROR: FE100 + #define RTC_PATTERN_0 0xFC100 // MIRROR: FE100 #define RTC_PATTERN_1 0xFC101 // MIRROR: FE101 program.install_read_handler(RTC_PATTERN_0, RTC_PATTERN_1, 0, 0, read8_delegate(FUNC(rainbow_state::rtc_enable), this)); program.install_read_handler(RTC_PATTERN_0 + 0x2000, RTC_PATTERN_1 + 0x2000, 0, 0, read8_delegate(FUNC(rainbow_state::rtc_enable2), this)); @@ -844,11 +844,11 @@ void rainbow_state::machine_reset() program.install_read_handler(RTC_READ_DATA + 0x2000, RTC_READ_DATA + 0x2000, 0, 0, read8_delegate(FUNC(rainbow_state::rtc_r2), this)); // * Secretly transmit data to RTC (set time / date) * Works only if magic pattern enabled RTC. Look ma, no writes! - #define RTC_WRITE_DATA_0 0xFE000 + #define RTC_WRITE_DATA_0 0xFE000 #define RTC_WRITE_DATA_1 0xFE001 program.install_read_handler(RTC_WRITE_DATA_0, RTC_WRITE_DATA_1, 0, 0, read8_delegate(FUNC(rainbow_state::rtc_w), this)); - m_rtc->chip_reset(); + m_rtc->chip_reset(); // *********************************** / DS1315 'PHANTOM CLOCK' IMPLEMENTATION FOR 'DEC-100-B' *************************************** @@ -856,14 +856,14 @@ void rainbow_state::machine_reset() { COLD_BOOT = 2; m_crtc->MHFU(-100); // reset MHFU counter - } + } // *********** HARD DISK CONTROLLER... if (m_inp5->read() == 0x01) // ...PRESENT? - { + { // Install 8088 read / write handler address_space &io = machine().device("maincpu")->space(AS_IO); - io.unmap_readwrite(0x60, 0x60); + io.unmap_readwrite(0x60, 0x60); io.install_read_handler(0x60, 0x60, read8_delegate(FUNC(rainbow_state::hd_status_60_r), this)); io.install_write_handler(0x60, 0x60, write8_delegate(FUNC(rainbow_state::hd_status_60_w), this)); @@ -933,12 +933,12 @@ void rainbow_state::machine_reset() UINT32 rainbow_state::screen_update_rainbow(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { /* - // Suppress display when accessing floppy (switch to 'smooth scroll' when working with DOS, please)! - if (MOTOR_DISABLE_counter) // IF motor running... - { - if (m_p_vol_ram[0x84] == 0x00) // IF jump scroll - return 0; - } + // Suppress display when accessing floppy (switch to 'smooth scroll' when working with DOS, please)! + if (MOTOR_DISABLE_counter) // IF motor running... + { + if (m_p_vol_ram[0x84] == 0x00) // IF jump scroll + return 0; + } */ m_crtc->palette_select(m_inp9->read()); @@ -952,7 +952,7 @@ UINT32 rainbow_state::screen_update_rainbow(screen_device &screen, bitmap_ind16 // Interrupt handling and arbitration. See 3.1.3.8 OF PC-100 spec. void rainbow_state::update_8088_irqs() { - static const int vectors[] = { 0x27, 0x26, 0x25, 0x20 }; + static const int vectors[] = { 0x27, 0x26, 0x25, 0x20 }; if (m_irq_mask != 0) { @@ -983,7 +983,7 @@ void rainbow_state::lower_8088_irq(int ref) update_8088_irqs(); } -// Only Z80 * private SRAM * is wait state free +// Only Z80 * private SRAM * is wait state free // (= fast enough to allow proper I/O to the floppy) // Shared memory is contended by refresh, concurrent @@ -1045,22 +1045,22 @@ WRITE8_MEMBER(rainbow_state::share_z80_w) // ------------------------ClikClok (for model B; DS1315) --------------------------------- #define RTC_RESET_MACRO m_rtc->chip_reset(); \ - UINT8 *rom = memregion("maincpu")->base(); + UINT8 *rom = memregion("maincpu")->base(); #define RTC_ENABLE_MACRO \ - if (m_inp11->read() == 0x01) \ - { \ - if (offset & 1) \ + if (m_inp11->read() == 0x01) \ + { \ + if (offset & 1) \ m_rtc->read_1(space, 0); \ else \ - m_rtc->read_0(space, 0); \ - } \ - UINT8 *rom = memregion("maincpu")->base(); + m_rtc->read_0(space, 0); \ + } \ + UINT8 *rom = memregion("maincpu")->base(); #define RTC_READ_MACRO \ - if (m_rtc->chip_enable() && (m_inp11->read() == 0x01)) \ - return (m_rtc->read_data(space, 0) & 0x01); \ - UINT8 *rom = memregion("maincpu")->base(); + if (m_rtc->chip_enable() && (m_inp11->read() == 0x01)) \ + return (m_rtc->read_data(space, 0) & 0x01); \ + UINT8 *rom = memregion("maincpu")->base(); // *********** RTC RESET ************** READ8_MEMBER(rainbow_state::rtc_reset) @@ -1078,7 +1078,7 @@ READ8_MEMBER(rainbow_state::rtc_reset2) // *********** RTC ENABLE ************** READ8_MEMBER(rainbow_state::rtc_enable) { - RTC_ENABLE_MACRO + RTC_ENABLE_MACRO return rom[RTC_PATTERN_0 + offset]; } @@ -1151,13 +1151,13 @@ hard_disk_file *(rainbow_state::rainbow_hdc_file(int drv)) if (m_inp5->read() != 0x01) // ...PRESENT? return NULL; - + if (drv != 0) return NULL; harddisk_image_device *img = NULL; - img = dynamic_cast(machine().device(subtag("harddisk1").c_str())); - + img = dynamic_cast(machine().device(subtag("harddisk1").c_str())); + if (!img) return NULL; @@ -1188,7 +1188,7 @@ hard_disk_file *(rainbow_state::rainbow_hdc_file(int drv)) } } -// LBA sector from CHS +// LBA sector from CHS static UINT32 get_and_print_lbasector(hard_disk_info *info, UINT16 cylinder, UINT8 head, UINT8 sector_number) { if (info == NULL) @@ -1242,7 +1242,7 @@ WRITE_LINE_MEMBER(rainbow_state::hdc_read_sector) // Pointer to info + C + H + S UINT32 lbasector = get_and_print_lbasector(info, cylinder, SDH & 0x07, sector_number); - if ((cylinder <= info->cylinders) && // filter invalid ranges + if ((cylinder <= info->cylinders) && // filter invalid ranges (SECTOR_SIZES[(SDH >> 5) & 0x03] == info->sectorbytes) // may not vary in image! ) { @@ -1261,8 +1261,8 @@ WRITE_LINE_MEMBER(rainbow_state::hdc_read_sector) if (read_status != 0) { logerror("...** READ FAILED WITH STATUS %u ** (CYLINDER %u - HEAD %u - SECTOR # %u - SECTOR_SIZE %u ) ***\n", - read_status, cylinder, SDH & 0x07, sector_number, SECTOR_SIZES[(SDH >> 5) & 0x03] - ) ; + read_status, cylinder, SDH & 0x07, sector_number, SECTOR_SIZES[(SDH >> 5) & 0x03] + ) ; } } // (on BCS 1 -> 0) @@ -1308,14 +1308,14 @@ WRITE_LINE_MEMBER(rainbow_state::hdc_write_sector) // CHD WRITE FAILURES or UNMOUNTED HARDDSIK TRIGGER A PERMANENT ERROR. if (success < 50) - m_hdc_write_fault = true; // reset only by HDC RESET! + m_hdc_write_fault = true; // reset only by HDC RESET! } wg_last = state; // remember state } -// Initiated by 'hdc_write_sector' (below) +// Initiated by 'hdc_write_sector' (below) // - in turn invoked by a WG: 1 -> 0 transit. // STATUS CODES: // 0 = DEFAULT ERROR (no HARD DISK FILE ?) @@ -1324,7 +1324,7 @@ WRITE_LINE_MEMBER(rainbow_state::hdc_write_sector) // 50 = SANITY CHECK FAILED (cylinder limit / <> 512 sectors?) // 88 = (LOW LEVEL) WRITE/FORMAT (sector_count != 1 IGNORED) -// 99 = SUCCESS : SECTOR WRITTEN +// 99 = SUCCESS : SECTOR WRITTEN // * RELIES * ON THE FACT THAT THERE WILL BE NO MULTI SECTOR TRANSFERS (!) int rainbow_state::do_write_sector() @@ -1352,7 +1352,7 @@ int rainbow_state::do_write_sector() int sector_number = m_hdc->read(space(AS_PROGRAM), 0x03); int sector_count = m_hdc->read(space(AS_PROGRAM), 0x02); // (1 = single sector) - if (!((cylinder <= info->cylinders) && // filter invalid cylinders + if (!((cylinder <= info->cylinders) && // filter invalid cylinders (SECTOR_SIZES[(SDH >> 5) & 0x03] == info->sectorbytes) // 512, may not vary )) { @@ -1364,7 +1364,7 @@ int rainbow_state::do_write_sector() // Pointer to info + C + H + S UINT32 lbasector = get_and_print_lbasector(info, cylinder, SDH & 0x07, sector_number); - if (sector_count != 1) // ignore all SECTOR_COUNTS != 1 + if (sector_count != 1) // ignore all SECTOR_COUNTS != 1 { logerror(" - ** IGNORED (SECTOR_COUNT !=1) **\n"); return 88; // BAIL OUT @@ -1397,7 +1397,7 @@ READ8_MEMBER(rainbow_state::hd_status_60_r) if (m_hdc_buf_offset >= 1024) // 1 K enforced by controller { m_hdc_buf_offset = 0; - m_hdc->buffer_ready(true); + m_hdc->buffer_ready(true); } return data; } @@ -1412,13 +1412,13 @@ WRITE8_MEMBER(rainbow_state::hd_status_60_w) if (m_hdc_buf_offset >= 1024) // 1 K enforced by controller { m_hdc_buf_offset = 0; - m_hdc->buffer_ready(true); + m_hdc->buffer_ready(true); } } // Secondary Command / Status Registers(68H) is... -// (A) a write - only register for commands +// (A) a write - only register for commands // (B) a read - only register for status signals // Holds the status of the following signals: // - 3 hard-wired controller module identification bits. @@ -1426,8 +1426,8 @@ WRITE8_MEMBER(rainbow_state::hd_status_60_w) // - disk drive(latched status signals) READ8_MEMBER(rainbow_state::hd_status_68_r) { - // (*) Bits 5-7 : HARD WIRED IDENTIFICATION BITS, bits 5+7 = 1 and bit 6 = 0 (= 101 für RD51 module) - int data = 0xe0; // 111 gives DRIVE NOT READY (when W is pressed on boot screen) + // (*) Bits 5-7 : HARD WIRED IDENTIFICATION BITS, bits 5+7 = 1 and bit 6 = 0 (= 101 f?r RD51 module) + int data = 0xe0; // 111 gives DRIVE NOT READY (when W is pressed on boot screen) if ((m_inp5->read() == 0x01) && (rainbow_hdc_file(0) != NULL)) data = 0xa0; // A0 : OK, DRIVE IS READY (!) @@ -1439,27 +1439,27 @@ READ8_MEMBER(rainbow_state::hd_status_68_r) // Bit 4 : SEEK COMPLETE: This status bit indicates that the disk drive positioned the R/W heads over the desired track on the disk surface. // (ALT.TEXT): "Seek Complete - When this signal from the disk drive goes low(0), it indicates that the R /W heads settled on the correct track. - // Writing is inhibited until this signal goes low(0). Seek complete is high(1) during normal seek operation. + // Writing is inhibited until this signal goes low(0). Seek complete is high(1) during normal seek operation. if (stat & 16) // SEEK COMPLETE (bit 4)? data |= 16; // Bit 3 : DIRECTION : This bit indicates the direction the read/write heads in the disk - // drive will move when the WD1010 chip issues step pulse(s). When high(1), the R / W heads will move toward the spindle. - // When low (0), the heads will move away from the spindle, towards track O. + // drive will move when the WD1010 chip issues step pulse(s). When high(1), the R / W heads will move toward the spindle. + // When low (0), the heads will move away from the spindle, towards track O. if (m_hdc_direction) data |= 8; // Bit 2 : LATCHED STEP PULSE: This status bit from the step pulse latch indicates if the WD1010 - // chip issued a step pulse since the last time the 8088 processor cleared the step pulse latch. + // chip issued a step pulse since the last time the 8088 processor cleared the step pulse latch. if (m_hdc_step_latch) data |= 4; // Bit 1 : LATCHED INDEX : This status bit from the index latch indicates if the disk drive - // encountered an index mark since the last time the 8088 processor cleared the index latch. + // encountered an index mark since the last time the 8088 processor cleared the index latch. if (m_hdc_index_latch) data |= 2; - // Bit 0 : CTRL BUSY : indicates that the WD 1010 chip is accessing the sector buffer. When this bit is set, + // Bit 0 : CTRL BUSY : indicates that the WD 1010 chip is accessing the sector buffer. When this bit is set, // the 8088 cannot access the WD 1010 registers. if (stat & 128) // BUSY (bit 7)? data |= 1; @@ -1468,7 +1468,7 @@ READ8_MEMBER(rainbow_state::hd_status_68_r) } -// 68 (WRITE): Secondary Command Registers (68H) - - ERKLÄRUNG: "write-only register for commands" +// 68 (WRITE): Secondary Command Registers (68H) - - ERKL?RUNG: "write-only register for commands" // - see TABLE 4.8 (4-24) WRITE8_MEMBER(rainbow_state::hd_status_68_w) { @@ -1550,15 +1550,15 @@ READ8_MEMBER(rainbow_state::hd_status_69_r) if (m_hdc_write_gate) // WRITE GATE (cached here) data |= 16; - + if (m_hdc_write_fault) data |= 32; if (m_hdc_drive_ready) - data |= 64; + data |= 64; // Fake TRACK 0 signal (normally FROM DRIVE) - m_hdc_track0 = false; // Set a default + m_hdc_track0 = false; // Set a default int stat1 = m_hdc->read(space, 0x04); // CYL LO int stat2 = m_hdc->read(space, 0x05); // CYL HI @@ -1598,7 +1598,7 @@ READ_LINE_MEMBER(rainbow_state::hdc_write_fault) return m_hdc_write_fault; } -// Buffer counter reset when BCR goes from 0 -> 1 +// Buffer counter reset when BCR goes from 0 -> 1 WRITE_LINE_MEMBER(rainbow_state::hdc_bcr) { static int bcr_state; @@ -1613,7 +1613,7 @@ void rainbow_state::hdc_buffer_counter_reset() m_hdc_buf_offset = 0; } -// DATA REQUEST - When high (..) initiates data transfers +// DATA REQUEST - When high (..) initiates data transfers // to or from the sector buffer. On a READ, this signal // goes high AFTER the sector buffer is filled. @@ -1644,7 +1644,7 @@ void rainbow_state::update_bundle_irq() lower_8088_irq(IRQ_BDL_INTR_L); if (m_inp5->read() == 0x01) - hdc_buffer_counter_reset(); + hdc_buffer_counter_reset(); } else { @@ -1686,14 +1686,14 @@ READ8_MEMBER(rainbow_state::system_parameter_r) B : no separation between the 2 available 'bundle cards' (HD controller / COMM.OPTION) ? - M : old RAM extension (128 / 192 K ?) detected with OPTION_PRESENT bit, newer models 'by presence'. + M : old RAM extension (128 / 192 K ?) detected with OPTION_PRESENT bit, newer models 'by presence'. BIOS uses a seperate IRQ vector for RAM board detection (at least on a 100-B). */ return (((m_inp5->read() == 1) ? 0 : 1) | ((m_inp6->read() == 1) ? 0 : 2) | ((m_inp7->read() == 1) ? 0 : 4) | ((m_inp8->read() > BOARD_RAM) ? 0 : 8) - // 16 | 32 | 64 | 128 // to be verified. + // 16 | 32 | 64 | 128 // to be verified. ); } @@ -1709,7 +1709,7 @@ READ8_MEMBER(rainbow_state::comm_control_r) */ int data = 0; if (COLD_BOOT == 2) - data = 0; // During boot phase 2, never enable MHFU (prevents errors). + data = 0; // During boot phase 2, never enable MHFU (prevents errors). else { data = m_crtc->MHFU(1); @@ -1831,8 +1831,8 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r) int track = 0; int fdc_step = 0; - int fdc_ready = 0; - int tk00 = 0; + int fdc_ready = 0; + int tk00 = 0; int fdc_write_gate = 0; int last_dir = 0; @@ -1860,7 +1860,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r) last_dir = 1; // correct? else last_dir = 0; - + if (fdc_ready == 1) printf(" RDY:1 "); // TEST-DEBUG else @@ -1875,7 +1875,7 @@ READ8_MEMBER(rainbow_state::z80_generalstat_r) printf(" TK00=0 "); // TEST-DEBUG else printf(" TK00=1 "); // TEST-DEBUG - + } int data = ( @@ -1909,12 +1909,12 @@ READ8_MEMBER(rainbow_state::z80_diskstatus_r) { // D7: DRQ: reflects status of DATA REQUEST signal from FDC. // '1' indicates that FDC has read data OR requires new write data. - data |= m_fdc->drq_r() ? 0x80 : 0x00; + data |= m_fdc->drq_r() ? 0x80 : 0x00; // D6: IRQ: indicates INTERRUPT REQUEST signal from FDC. Indicates that a // status bit has changed. Set to 1 at the completion of any // command (.. see page 207 or 5-25). - data |= m_fdc->intrq_r() ? 0x40 : 0x00; + data |= m_fdc->intrq_r() ? 0x40 : 0x00; // D5: SIDE 0H: status of side select signal at J2 + J3 of RX50 controller. // For 1 sided drives, this bit will always read low (0). @@ -1935,7 +1935,7 @@ READ8_MEMBER(rainbow_state::z80_diskstatus_r) if (track > 43) data = data & (255 - 4); else - data = data | 4; + data = data | 4; // D1: DS1 H: reflect status of bits 0 and 1 form disk.control reg. // D0: DS0 H: " @@ -1977,9 +1977,9 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w) if (m_floppy != NULL) { m_fdc->set_floppy(m_floppy); // Sets new _image device_ - if (!m_floppy->exists()) + if (!m_floppy->exists()) { - m_floppy = NULL; + m_floppy = NULL; printf("(m_unit = %i) SELECTED IMAGE *** DOES NOT EXIST *** (selected drive = %i)\n", m_unit, selected_drive); selected_drive = INVALID_DRIVE; //m_unit = INVALID_DRIVE; @@ -2002,7 +2002,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w) m_unit = selected_drive; if (MOTOR_DISABLE_counter == 0) // "one shot" - MOTOR_DISABLE_counter = 20; + MOTOR_DISABLE_counter = 20; // FORCE_READY = 0 : assert DRIVE READY on FDC (diagnostic override; USED BY BIOS!) bool force_ready = ((data & 4) == 0) ? true : false; @@ -2025,7 +2025,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w) if (m_unit < 2) { - data = data & (255 - 8); // MOTOR 0 (for A or B) + data = data & (255 - 8); // MOTOR 0 (for A or B) } else { @@ -2033,7 +2033,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w) enable_start = 2; disable_start = 4; } - + // RX-50 has head A and head B (1 for each of the 2 disk slots in a RX-50). // Assume the other one is switched off - for (int f_num = 0; f_num < MAX_FLOPPIES; f_num++) @@ -2045,7 +2045,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w) if ((f_num >= enable_start) && (f_num < disable_start)) tmp_floppy->mon_w(CLEAR_LINE); // enable } - + } m_z80_diskcontrol = data; @@ -2075,7 +2075,7 @@ WRITE_LINE_MEMBER(rainbow_state::clear_video_interrupt) m_crtc->notify_vblank(false); } -// Reflects bits from 'diagnostic_w', except test jumpers +// Reflects bits from 'diagnostic_w', except test jumpers READ8_MEMBER(rainbow_state::diagnostic_r) // 8088 (port 0A READ). Fig.4-29 + table 4-15 { return ((m_diagnostic & (0xf1)) | // MASK 0xf1 = 11110001 @@ -2131,13 +2131,13 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 + allows the floppy data separator and the serial video output to be tested through the use of the printer port. The following table shows how signals are routed. - DIAGNOSTIC LOOPBACK = 0 DIAGNOSTIC LOOPBACK = 1 SIGNAL INPUT - SIGNAL SOURCE SIGNAL SOURCE TO - FROM FROM - PRT RDATA(J2) VIDEO OUT PRT RXD(7201) - PRT RXTXC 500 KHZ PRT RXTXC(7201) - MASTER CLK 250 KHZ VIDEO CLK(DCO11) - FLOPPY RAW DATA PRT TXD(7201) FLOPPY DATA SEPARATOR + DIAGNOSTIC LOOPBACK = 0 DIAGNOSTIC LOOPBACK = 1 SIGNAL INPUT + SIGNAL SOURCE SIGNAL SOURCE TO + FROM FROM + PRT RDATA(J2) VIDEO OUT PRT RXD(7201) + PRT RXTXC 500 KHZ PRT RXTXC(7201) + MASTER CLK 250 KHZ VIDEO CLK(DCO11) + FLOPPY RAW DATA PRT TXD(7201) FLOPPY DATA SEPARATOR During Diagnostic Loopback, the - TEST input of the 8088 is connected to the interrupt output of the MPSC.Thus, using the 8088's WAIT instruction in a @@ -2234,7 +2234,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(rainbow_state::motor_tick) if (m_crtc->MHFU(1)) // MHFU * flag * enabled ? { int data = m_crtc->MHFU(-1); // increment MHFU, return new value - + // MHFU gets active if the 8088 has not acknowledged a video processor interrupt within approx. 108 milliseconds. // Timer reset by 2 sources : the VERT INT L from the DC012, or the MHFU ENB L from the enable flip - flop. @@ -2243,7 +2243,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(rainbow_state::motor_tick) for (int i = 0; i < 9; i++) printf("\nWATCHDOG TRIPPED *** NOW RESET MACHINE ***\n"); - m_crtc->MHFU(-100); // -100 : Enable MHFU flag + m_crtc->MHFU(-100); // -100 : Enable MHFU flag if (m_inp12->read() == 0x01) // DIP for watchdog set? { @@ -2322,7 +2322,7 @@ MCFG_SOFTWARE_LIST_ADD("flop_list", "rainbow") /// ********************************* HARD DISK CONTROLLER ***************************************** -MCFG_DEVICE_ADD("hdc", WD2010, 5000000) // 10 Mhz quartz on controller (divided by 2 for WCLK) +MCFG_DEVICE_ADD("hdc", WD2010, 5000000) // 10 Mhz quartz on controller (divided by 2 for WCLK) MCFG_WD2010_OUT_INTRQ_CB(WRITELINE(rainbow_state, bundle_irq)) // FIRST IRQ SOURCE (OR'ed with DRQ) MCFG_WD2010_OUT_BDRQ_CB(WRITELINE(rainbow_state, hdc_bdrq)) // BUFFER DATA REQUEST @@ -2341,7 +2341,7 @@ MCFG_WD2010_IN_SC_CB(VCC) // SEEK COMPLET // CURRENTLY NOT EVALUATED WITHIN 'WD2010': MCFG_WD2010_IN_TK000_CB(VCC) -MCFG_WD2010_IN_INDEX_CB(VCC) +MCFG_WD2010_IN_INDEX_CB(VCC) MCFG_HARDDISK_ADD("harddisk1") /// ******************************** / HARD DISK CONTROLLER **************************************** @@ -2360,7 +2360,7 @@ MCFG_LK201_TX_HANDLER(DEVWRITELINE("kbdser", i8251_device, write_rxd)) MCFG_DEVICE_ADD("keyboard_clock", CLOCK, 4800 * 16) // 8251 is set to /16 on the clock input MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(rainbow_state, write_keyboard_clock)) -MCFG_TIMER_DRIVER_ADD_PERIODIC("motor", rainbow_state, motor_tick, attotime::from_hz(60)) +MCFG_TIMER_DRIVER_ADD_PERIODIC("motor", rainbow_state, motor_tick, attotime::from_hz(60)) MCFG_NVRAM_ADD_0FILL("nvram") MACHINE_CONFIG_END @@ -2369,7 +2369,7 @@ MACHINE_CONFIG_END // - first generation hardware (introduced May '82) with ROM 04.03.11 // - inability to boot from hard disc (mind the inadequate PSU) -// AVAILABLE RAM: 64 K on board (instead of 128 K on model 'B'). +// AVAILABLE RAM: 64 K on board (instead of 128 K on model 'B'). // Two compatible memory expansions were sold by DEC: // (PCIXX-AA) : 64 K (usable on either Rainbow 100-A or 100-B) @@ -2390,10 +2390,10 @@ ROM_LOAD("12-19606-02a.bin", 0xFA000, 0x2000, NO_DUMP) // ROM (FA000-FBFFF) (E89 ROM_LOAD("12-19606-02b.bin", 0xFC000, 0x2000, NO_DUMP) // ROM (FC000-FDFFF) (E90) 8 K // SOCKETED LANGUAGE ROM (E91) with 1 single localization per ROM - -ROM_LOAD("70-20274-15", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - USA +ROM_LOAD("70-20274-15", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - USA // ROM_LOAD("bg-r873a-bv", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - Canadian (French) // ROM_LOAD("bg-r876a-bv", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - British (UK) -// ROM_LOAD("bg-r878a-bv", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - German / Austrian +// ROM_LOAD("bg-r878a-bv", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - German / Austrian // ROM_LOAD("bg-r874a-bv", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - Italian // ROM_LOAD("bg-r377a-bv", 0xFE000, 0x2000, NO_DUMP) // ROM (FE000-FFFFF) (E91) 8 K - Spanish // (...) @@ -2420,8 +2420,8 @@ ROM_RELOAD(0xfc000, 0x4000) ROM_REGION(0x1000, "chargen", 0) ROM_LOAD("chargen.bin", 0x0000, 0x1000, CRC(1685e452) SHA1(bc299ff1cb74afcededf1a7beb9001188fdcf02f)) -// ROM_REGION(0x800, BUFFER, 0) // HDC RAM buffer 2 K -- NEW HDC -// // ROM_FILL(0x000, 0x800, 0x00) +// ROM_REGION(0x800, BUFFER, 0) // HDC RAM buffer 2 K -- NEW HDC +// // ROM_FILL(0x000, 0x800, 0x00) ROM_END // 'Rainbow 190 B' (announced March 1985) is identical to 100-B, with alternate ROM v5.05. diff --git a/src/mess/drivers/replicator.c b/src/mess/drivers/replicator.c index b2bea598dd0..5825d74294b 100644 --- a/src/mess/drivers/replicator.c +++ b/src/mess/drivers/replicator.c @@ -667,84 +667,84 @@ static MACHINE_CONFIG_START( replicator, replicator_state ) MACHINE_CONFIG_END ROM_START( replica1 ) - ROM_REGION( 0x20000, "maincpu", 0 ) - ROM_DEFAULT_BIOS("v750") + ROM_REGION( 0x20000, "maincpu", 0 ) + ROM_DEFAULT_BIOS("v750") - /* Version 5.1 release: - - Initial firmware release - */ - ROM_SYSTEM_BIOS( 0, "v51", "V 5.1" ) - ROMX_LOAD("mighty-mb40-v5.1.bin", 0x0000, 0x10b90, CRC(20d65cd1) SHA1(da18c3eb5a29a6bc1eecd92eaae6063fe29d0305), ROM_BIOS(1)) + /* Version 5.1 release: + - Initial firmware release + */ + ROM_SYSTEM_BIOS( 0, "v51", "V 5.1" ) + ROMX_LOAD("mighty-mb40-v5.1.bin", 0x0000, 0x10b90, CRC(20d65cd1) SHA1(da18c3eb5a29a6bc1eecd92eaae6063fe29d0305), ROM_BIOS(1)) - /* Version 5.2 release: - - Nozzle Tolerance added to EEPROM - - Updated onboard menus - - X,Y calibration tool added - */ - ROM_SYSTEM_BIOS( 1, "v52", "V 5.2" ) - ROMX_LOAD("mighty-mb40-v5.2.bin", 0x0000, 0x126c4, CRC(555e47cf) SHA1(9d24a3dbeddce16669bb4d29c3366220ddf15d2a), ROM_BIOS(2)) + /* Version 5.2 release: + - Nozzle Tolerance added to EEPROM + - Updated onboard menus + - X,Y calibration tool added + */ + ROM_SYSTEM_BIOS( 1, "v52", "V 5.2" ) + ROMX_LOAD("mighty-mb40-v5.2.bin", 0x0000, 0x126c4, CRC(555e47cf) SHA1(9d24a3dbeddce16669bb4d29c3366220ddf15d2a), ROM_BIOS(2)) - /* Version 5.5 release: - - Acceleration added to motor motion - - Digipot updates - */ - ROM_SYSTEM_BIOS( 2, "v55", "V 5.5" ) - ROMX_LOAD("mighty-mb40-v5.5.bin", 0x0000, 0x1a420, CRC(9327d7e4) SHA1(d734ba2bda12f50ec3ac0035ab11591909d9edde), ROM_BIOS(3)) + /* Version 5.5 release: + - Acceleration added to motor motion + - Digipot updates + */ + ROM_SYSTEM_BIOS( 2, "v55", "V 5.5" ) + ROMX_LOAD("mighty-mb40-v5.5.bin", 0x0000, 0x1a420, CRC(9327d7e4) SHA1(d734ba2bda12f50ec3ac0035ab11591909d9edde), ROM_BIOS(3)) - /* Version 6.2.0 release: - - Bug fix release to firmware 6.0 - - Addresses wavy print issue above 1cm - - Left extruder prints with makerware. - */ - ROM_SYSTEM_BIOS( 3, "v620", "V 6.2.0" ) - ROMX_LOAD("mighty_one_v6.2.0.bin", 0x0000, 0x1cf54, CRC(00df6f48) SHA1(db05afc2e1ebc104fb04753634a911187e396556), ROM_BIOS(4)) + /* Version 6.2.0 release: + - Bug fix release to firmware 6.0 + - Addresses wavy print issue above 1cm + - Left extruder prints with makerware. + */ + ROM_SYSTEM_BIOS( 3, "v620", "V 6.2.0" ) + ROMX_LOAD("mighty_one_v6.2.0.bin", 0x0000, 0x1cf54, CRC(00df6f48) SHA1(db05afc2e1ebc104fb04753634a911187e396556), ROM_BIOS(4)) - /* Version 7.0.0 release: - - Major upgrade to Stepper Motor Smoothness (via Sailfish team) - - X3G format introduced - - Heaters default to leaving 'preheat' on more of the time - */ - ROM_SYSTEM_BIOS( 4, "v700", "V 7.0.0" ) - ROMX_LOAD("mighty_one_v7.0.0.bin", 0x0000, 0x1cb52, CRC(aa2a5fcf) SHA1(934e642b0b2d007689249680bad03c9255ae016a), ROM_BIOS(5)) + /* Version 7.0.0 release: + - Major upgrade to Stepper Motor Smoothness (via Sailfish team) + - X3G format introduced + - Heaters default to leaving 'preheat' on more of the time + */ + ROM_SYSTEM_BIOS( 4, "v700", "V 7.0.0" ) + ROMX_LOAD("mighty_one_v7.0.0.bin", 0x0000, 0x1cb52, CRC(aa2a5fcf) SHA1(934e642b0b2d007689249680bad03c9255ae016a), ROM_BIOS(5)) - /* Version 7.2.0 release: - - Removes support for S3G files - - X3G is the recognized format - - Minor bug fixes - */ - ROM_SYSTEM_BIOS( 5, "v720", "V 7.2.0" ) - ROMX_LOAD("mighty_one_v7.2.0.bin", 0x0000, 0x1cb80, CRC(5e546706) SHA1(ed4aaf7522d5a5beea7eb69bf2c85d7a89f8f188), ROM_BIOS(6)) + /* Version 7.2.0 release: + - Removes support for S3G files + - X3G is the recognized format + - Minor bug fixes + */ + ROM_SYSTEM_BIOS( 5, "v720", "V 7.2.0" ) + ROMX_LOAD("mighty_one_v7.2.0.bin", 0x0000, 0x1cb80, CRC(5e546706) SHA1(ed4aaf7522d5a5beea7eb69bf2c85d7a89f8f188), ROM_BIOS(6)) - /* Version 7.3.0 release: - - Pause at Z Height - - Elapsed time displays during prints - - Minor bug fixes - */ - ROM_SYSTEM_BIOS( 6, "v730", "V 7.3.0" ) - ROMX_LOAD("mighty_one_v7.3.0.bin", 0x0000, 0x1d738, CRC(71811ff5) SHA1(6728ea600ab3ff4b589adca90b0d700d9b70bd18), ROM_BIOS(7)) + /* Version 7.3.0 release: + - Pause at Z Height + - Elapsed time displays during prints + - Minor bug fixes + */ + ROM_SYSTEM_BIOS( 6, "v730", "V 7.3.0" ) + ROMX_LOAD("mighty_one_v7.3.0.bin", 0x0000, 0x1d738, CRC(71811ff5) SHA1(6728ea600ab3ff4b589adca90b0d700d9b70bd18), ROM_BIOS(7)) - /* Version 7.4.0 (bugfix) release: - - Fixes issues with Z Pause and elapsed print time - */ - ROM_SYSTEM_BIOS( 7, "v740", "V 7.4.0" ) - ROMX_LOAD("mighty_one_v7.4.0.bin", 0x0000, 0x1b9e2, CRC(97b05a27) SHA1(76ca2c9c1db2e006e501c3177a8a1aa693dda0f9), ROM_BIOS(8)) + /* Version 7.4.0 (bugfix) release: + - Fixes issues with Z Pause and elapsed print time + */ + ROM_SYSTEM_BIOS( 7, "v740", "V 7.4.0" ) + ROMX_LOAD("mighty_one_v7.4.0.bin", 0x0000, 0x1b9e2, CRC(97b05a27) SHA1(76ca2c9c1db2e006e501c3177a8a1aa693dda0f9), ROM_BIOS(8)) - /* Version 7.5.0 (bugfix) release: - - Fixes issue with Heat Hold - */ - ROM_SYSTEM_BIOS( 8, "v750", "V 7.5.0" ) - ROMX_LOAD("mighty_one_v7.5.0.bin", 0x0000, 0x1b9c4, CRC(169d6709) SHA1(62b5aacd1bc46969042aea7a50531ec467a4ff1f), ROM_BIOS(9)) + /* Version 7.5.0 (bugfix) release: + - Fixes issue with Heat Hold + */ + ROM_SYSTEM_BIOS( 8, "v750", "V 7.5.0" ) + ROMX_LOAD("mighty_one_v7.5.0.bin", 0x0000, 0x1b9c4, CRC(169d6709) SHA1(62b5aacd1bc46969042aea7a50531ec467a4ff1f), ROM_BIOS(9)) - /* Sailfish firmware image - MetamĆ”quina experimental build v7.5.0 */ - ROM_SYSTEM_BIOS( 9, "v750mm", "V 7.5.0 - MetamĆ”quina" ) - ROMX_LOAD("mighty_one_v7.5.0.mm.bin", 0x0000, 0x1ef9a, CRC(0d36d9e7) SHA1(a53899775b4c4eea87b6903758ebb75f06710a69), ROM_BIOS(10)) + /* Sailfish firmware image - Metam??quina experimental build v7.5.0 */ + ROM_SYSTEM_BIOS( 9, "v750mm", "V 7.5.0 - Metam??quina" ) + ROMX_LOAD("mighty_one_v7.5.0.mm.bin", 0x0000, 0x1ef9a, CRC(0d36d9e7) SHA1(a53899775b4c4eea87b6903758ebb75f06710a69), ROM_BIOS(10)) - /*Arduino MEGA bootloader */ - ROM_LOAD( "atmegaboot_168_atmega1280.bin", 0x1f000, 0x0f16, CRC(c041f8db) SHA1(d995ebf360a264cccacec65f6dc0c2257a3a9224) ) + /*Arduino MEGA bootloader */ + ROM_LOAD( "atmegaboot_168_atmega1280.bin", 0x1f000, 0x0f16, CRC(c041f8db) SHA1(d995ebf360a264cccacec65f6dc0c2257a3a9224) ) - /* on-die 4kbyte eeprom */ - ROM_REGION( 0x1000, "eeprom", ROMREGION_ERASEFF ) + /* on-die 4kbyte eeprom */ + ROM_REGION( 0x1000, "eeprom", ROMREGION_ERASEFF ) ROM_END /* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME */ diff --git a/src/mess/drivers/spec128.c b/src/mess/drivers/spec128.c index 471ca40756f..4b36e8ddae0 100644 --- a/src/mess/drivers/spec128.c +++ b/src/mess/drivers/spec128.c @@ -222,7 +222,7 @@ static ADDRESS_MAP_START (spectrum_128_io, AS_IO, 8, spectrum_state ) AM_RANGE(0x001f, 0x001f) AM_READ(spectrum_port_1f_r) AM_MIRROR(0xff00) AM_RANGE(0x007f, 0x007f) AM_READ(spectrum_port_7f_r) AM_MIRROR(0xff00) AM_RANGE(0x00df, 0x00df) AM_READ(spectrum_port_df_r) AM_MIRROR(0xff00) - AM_RANGE(0x0000, 0x0000) AM_WRITE(spectrum_128_port_7ffd_w) AM_MIRROR(0x7ffd) // (A15 | A1) == 0, note: reading from this port does write to it by value from data bus + AM_RANGE(0x0000, 0x0000) AM_WRITE(spectrum_128_port_7ffd_w) AM_MIRROR(0x7ffd) // (A15 | A1) == 0, note: reading from this port does write to it by value from data bus AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("ay8912", ay8910_device, data_w) AM_MIRROR(0x3ffd) AM_RANGE(0xc000, 0xc000) AM_DEVREADWRITE("ay8912", ay8910_device, data_r, address_w) AM_MIRROR(0x3ffd) AM_RANGE(0x0001, 0x0001) AM_READ(spectrum_128_ula_r) AM_MIRROR(0xfffe) diff --git a/src/mess/drivers/tamag1.c b/src/mess/drivers/tamag1.c index 93bc01e1905..4488a63c2c5 100644 --- a/src/mess/drivers/tamag1.c +++ b/src/mess/drivers/tamag1.c @@ -52,7 +52,7 @@ static E0C6S46_PIXEL_UPDATE_CB(tama_pixel_update) 27,26,25,24,36,23,22,21, 20,19,18,17,16,37,38,39 }; - + int y = com, x = seg2x[seg]; if (cliprect.contains(x, y)) bitmap.pix16(y, x) = state; @@ -66,7 +66,7 @@ static E0C6S46_PIXEL_UPDATE_CB(tama_pixel_update) output_set_lamp_value(y, state); else if (x == 36 && y >= 12) output_set_lamp_value(y-8, state); - + // output for svg2lay char buf[0x10]; sprintf(buf, "%d.%d", y, x); diff --git a/src/mess/drivers/vt100.c b/src/mess/drivers/vt100.c index 7810423098d..a55f37f0fb8 100644 --- a/src/mess/drivers/vt100.c +++ b/src/mess/drivers/vt100.c @@ -630,7 +630,7 @@ ROM_START( vt132 ) // This is from anecdotal evidence and vt100.net, as the vt13 ROM_LOAD( "23-096e2-00.e52", 0x0800, 0x0800, NO_DUMP) ROM_LOAD( "23-097e2-00.e45", 0x1000, 0x0800, NO_DUMP) ROM_LOAD( "23-098e2-00.e40", 0x1800, 0x0800, NO_DUMP) - + // NEWER vt132 (and STP?) romset ROM_LOAD( "23-180e2-00.e56", 0x0000, 0x0800, NO_DUMP) ROM_LOAD( "23-181e2-00.e52", 0x0800, 0x0800, NO_DUMP) diff --git a/src/mess/drivers/vt240.c b/src/mess/drivers/vt240.c index 02e3345dfac..0d6589e272e 100644 --- a/src/mess/drivers/vt240.c +++ b/src/mess/drivers/vt240.c @@ -17,7 +17,7 @@ 0x0071: RAM fill to 0x00 0x1c8f: UPD7220 - // vt240: x2212 nvram at E56 + // vt240: x2212 nvram at E56 ****************************************************************************/ #include "emu.h" diff --git a/src/mess/includes/amstrad.h b/src/mess/includes/amstrad.h index ca2fbb3b9a1..61ded7b08a5 100644 --- a/src/mess/includes/amstrad.h +++ b/src/mess/includes/amstrad.h @@ -1,5 +1,5 @@ // license:GPL-2.0+ -// copyright-holders:Kevin Thacker, Barry Rodewald +// copyright-holders:Kevin Thacker, Barry Rodewald /***************************************************************************** * * includes/amstrad.h diff --git a/src/mess/includes/c65.h b/src/mess/includes/c65.h index ce796ce5dbf..e8771e83fc1 100644 --- a/src/mess/includes/c65.h +++ b/src/mess/includes/c65.h @@ -1,3 +1,2 @@ // license:LGPL-2.1+ // copyright-holders: Angelo Salese - diff --git a/src/mess/includes/x1.h b/src/mess/includes/x1.h index 63ff63321b9..ba48f6ff043 100644 --- a/src/mess/includes/x1.h +++ b/src/mess/includes/x1.h @@ -95,98 +95,98 @@ public: required_device m_crtc; required_device m_ctc; - UINT8 *m_tvram; /**< Pointer for Text Video RAM */ - UINT8 *m_avram; /**< Pointer for Attribute Video RAM */ - UINT8 *m_kvram; /**< Pointer for Extended Kanji Video RAM (X1 Turbo) */ - UINT8 *m_ipl_rom; /**< Pointer for IPL ROM */ - UINT8 *m_work_ram; /**< Pointer for base work RAM */ - UINT8 *m_emm_ram; /**< Pointer for EMM RAM */ - UINT8 *m_pcg_ram; /**< Pointer for PCG GFX RAM */ - UINT8 *m_cg_rom; /**< Pointer for GFX ROM */ - UINT8 *m_kanji_rom; /**< Pointer for Kanji ROMs */ - int m_xstart, /**< Start X offset for screen drawing. */ - m_ystart; /**< Start Y offset for screen drawing. */ - UINT8 m_hres_320; /**< Pixel clock divider setting: (1) 48 (0) 24 */ - UINT8 m_io_switch; /**< Enable access for special bitmap RMW phase in isolated i/o. */ - UINT8 m_io_sys; /**< Read-back for PPI port C */ - UINT8 m_vsync; /**< Screen V-Sync bit, active low */ - UINT8 m_vdisp; /**< Screen V-Disp bit, active high */ - UINT8 m_io_bank_mode; /**< Helper for special bitmap RMW phase. */ - UINT8 *m_gfx_bitmap_ram; /**< Pointer for bitmap layer RAM. */ - UINT8 m_pcg_reset; /**< @todo Unused variable. */ - UINT8 m_sub_obf; /**< MCU side: OBF flag active low, indicates that there are parameters in comm buffer. */ - UINT8 m_ctc_irq_flag; /**< @todo Unused variable. */ - scrn_reg_t m_scrn_reg; /**< Base Video Registers. */ - turbo_reg_t m_turbo_reg; /**< Turbo Z Video Registers. */ - x1_rtc_t m_rtc; /**< Struct for RTC related variables */ - emu_timer *m_rtc_timer; /**< Pointer for RTC timer. */ - UINT8 m_pcg_write_addr; /**< @todo Unused variable. */ - UINT8 m_sub_cmd; /**< MCU side: current command issued from Main to Sub. */ - UINT8 m_sub_cmd_length; /**< MCU side: number of parameters, in bytes. */ - UINT8 m_sub_val[8]; /**< MCU side: parameters buffer. */ - int m_sub_val_ptr; /**< MCU side: index for parameter read-back */ - int m_key_i; /**< MCU side: index for keyboard read-back during OBF phase. */ - UINT8 m_irq_vector; /**< @todo Unused variable. */ - UINT8 m_cmt_current_cmd; /**< MCU side: CMT command issued. */ - UINT8 m_cmt_test; /**< MCU side: Tape BREAK status bit. */ - UINT8 m_rom_index[3]; /**< Current ROM address. */ - UINT32 m_kanji_offset; /**< @todo Unused variable. */ - UINT8 m_bios_offset; /**< @todo Unused variable. */ - UINT8 m_x_b; /**< Palette Register for Blue Gun */ - UINT8 m_x_g; /**< Palette Register for Green Gun */ - UINT8 m_x_r; /**< Palette Register for Red Gun */ - UINT16 m_kanji_addr_latch; /**< Internal Kanji ROM address. */ - UINT32 m_kanji_addr; /**< Latched Kanji ROM address. */ - UINT8 m_kanji_eksel; /**< Kanji ROM register bit for latch phase. */ - UINT8 m_pcg_reset_occurred; /**< @todo Unused variable. */ - UINT32 m_old_key1; /**< Keyboard read buffer for i/o port "key1" */ - UINT32 m_old_key2; /**< Keyboard read buffer for i/o port "key2" */ - UINT32 m_old_key3; /**< Keyboard read buffer for i/o port "key3" */ - UINT32 m_old_key4; /**< Keyboard read buffer for i/o port "tenkey" */ - UINT32 m_old_fkey; /**< Keyboard read buffer for i/o port "f_keys" */ - UINT8 m_key_irq_flag; /**< Keyboard IRQ pending. */ - UINT8 m_key_irq_vector; /**< Keyboard IRQ vector. */ - UINT32 m_emm_addr; /**< EMM RAM current address */ - UINT8 *m_pal_4096; /**< X1 Turbo Z: pointer for 4096 palette entries */ - UINT8 m_crtc_vreg[0x100], /**< CRTC register buffer. */ - m_crtc_index; /**< CRTC register index. */ - UINT8 m_is_turbo; /**< Machine type: (0) X1 Vanilla, (1) X1 Turbo */ - UINT8 m_ex_bank; /**< X1 Turbo Z: RAM bank register */ - UINT8 m_ram_bank; /**< Regular RAM bank for 0x0000-0x7fff memory window: (0) ROM/IPL (1) RAM */ + UINT8 *m_tvram; /**< Pointer for Text Video RAM */ + UINT8 *m_avram; /**< Pointer for Attribute Video RAM */ + UINT8 *m_kvram; /**< Pointer for Extended Kanji Video RAM (X1 Turbo) */ + UINT8 *m_ipl_rom; /**< Pointer for IPL ROM */ + UINT8 *m_work_ram; /**< Pointer for base work RAM */ + UINT8 *m_emm_ram; /**< Pointer for EMM RAM */ + UINT8 *m_pcg_ram; /**< Pointer for PCG GFX RAM */ + UINT8 *m_cg_rom; /**< Pointer for GFX ROM */ + UINT8 *m_kanji_rom; /**< Pointer for Kanji ROMs */ + int m_xstart, /**< Start X offset for screen drawing. */ + m_ystart; /**< Start Y offset for screen drawing. */ + UINT8 m_hres_320; /**< Pixel clock divider setting: (1) 48 (0) 24 */ + UINT8 m_io_switch; /**< Enable access for special bitmap RMW phase in isolated i/o. */ + UINT8 m_io_sys; /**< Read-back for PPI port C */ + UINT8 m_vsync; /**< Screen V-Sync bit, active low */ + UINT8 m_vdisp; /**< Screen V-Disp bit, active high */ + UINT8 m_io_bank_mode; /**< Helper for special bitmap RMW phase. */ + UINT8 *m_gfx_bitmap_ram; /**< Pointer for bitmap layer RAM. */ + UINT8 m_pcg_reset; /**< @todo Unused variable. */ + UINT8 m_sub_obf; /**< MCU side: OBF flag active low, indicates that there are parameters in comm buffer. */ + UINT8 m_ctc_irq_flag; /**< @todo Unused variable. */ + scrn_reg_t m_scrn_reg; /**< Base Video Registers. */ + turbo_reg_t m_turbo_reg; /**< Turbo Z Video Registers. */ + x1_rtc_t m_rtc; /**< Struct for RTC related variables */ + emu_timer *m_rtc_timer; /**< Pointer for RTC timer. */ + UINT8 m_pcg_write_addr; /**< @todo Unused variable. */ + UINT8 m_sub_cmd; /**< MCU side: current command issued from Main to Sub. */ + UINT8 m_sub_cmd_length; /**< MCU side: number of parameters, in bytes. */ + UINT8 m_sub_val[8]; /**< MCU side: parameters buffer. */ + int m_sub_val_ptr; /**< MCU side: index for parameter read-back */ + int m_key_i; /**< MCU side: index for keyboard read-back during OBF phase. */ + UINT8 m_irq_vector; /**< @todo Unused variable. */ + UINT8 m_cmt_current_cmd; /**< MCU side: CMT command issued. */ + UINT8 m_cmt_test; /**< MCU side: Tape BREAK status bit. */ + UINT8 m_rom_index[3]; /**< Current ROM address. */ + UINT32 m_kanji_offset; /**< @todo Unused variable. */ + UINT8 m_bios_offset; /**< @todo Unused variable. */ + UINT8 m_x_b; /**< Palette Register for Blue Gun */ + UINT8 m_x_g; /**< Palette Register for Green Gun */ + UINT8 m_x_r; /**< Palette Register for Red Gun */ + UINT16 m_kanji_addr_latch; /**< Internal Kanji ROM address. */ + UINT32 m_kanji_addr; /**< Latched Kanji ROM address. */ + UINT8 m_kanji_eksel; /**< Kanji ROM register bit for latch phase. */ + UINT8 m_pcg_reset_occurred; /**< @todo Unused variable. */ + UINT32 m_old_key1; /**< Keyboard read buffer for i/o port "key1" */ + UINT32 m_old_key2; /**< Keyboard read buffer for i/o port "key2" */ + UINT32 m_old_key3; /**< Keyboard read buffer for i/o port "key3" */ + UINT32 m_old_key4; /**< Keyboard read buffer for i/o port "tenkey" */ + UINT32 m_old_fkey; /**< Keyboard read buffer for i/o port "f_keys" */ + UINT8 m_key_irq_flag; /**< Keyboard IRQ pending. */ + UINT8 m_key_irq_vector; /**< Keyboard IRQ vector. */ + UINT32 m_emm_addr; /**< EMM RAM current address */ + UINT8 *m_pal_4096; /**< X1 Turbo Z: pointer for 4096 palette entries */ + UINT8 m_crtc_vreg[0x100], /**< CRTC register buffer. */ + m_crtc_index; /**< CRTC register index. */ + UINT8 m_is_turbo; /**< Machine type: (0) X1 Vanilla, (1) X1 Turbo */ + UINT8 m_ex_bank; /**< X1 Turbo Z: RAM bank register */ + UINT8 m_ram_bank; /**< Regular RAM bank for 0x0000-0x7fff memory window: (0) ROM/IPL (1) RAM */ /** @brief Refresh current bitmap palette. */ void set_current_palette(); /** @brief Retrieves the current PCG address. - + @param width Number of currently setted up CRTC characters - @param y_char_size Number of scanlines per character. + @param y_char_size Number of scanlines per character. @return Destination PCG address. */ UINT16 get_pcg_addr(UINT16 width, UINT8 y_char_size); /** @brief X1 Turbo: Retrieves the current CHR ROM address in Hi-Speed Mode. - + @return Destination CHR address. */ UINT16 check_chr_addr(); /** @brief X1 Turbo: Retrieves the current PCG ROM address in Hi-Speed Mode. - + @return Destination CHR address. */ UINT16 check_pcg_addr(); /** @brief MCU side: retrieve keycode to game key conversion. - + @param port Address to convert. @return The converted game key buffer */ UINT8 get_game_key(UINT8 port); /** @brief MCU side: retrieve keyboard special key register. - + @return x--- ---- TEN: Numpad, Function key, special input key -x-- ---- KIN: Valid key @@ -200,7 +200,7 @@ public: UINT8 check_keyboard_shift(); /** @brief convert MAME input to raw scancode for keyboard. - + @return the converted scancode @todo Unoptimized. */ diff --git a/src/mess/layout/rainbow.lay b/src/mess/layout/rainbow.lay index fd0842cd6cd..bb72bbf21ec 100644 --- a/src/mess/layout/rainbow.lay +++ b/src/mess/layout/rainbow.lay @@ -111,7 +111,7 @@ - + @@ -211,7 +211,7 @@ - + diff --git a/src/mess/machine/amstrad.c b/src/mess/machine/amstrad.c index 032babb486f..9f490d13b43 100644 --- a/src/mess/machine/amstrad.c +++ b/src/mess/machine/amstrad.c @@ -1,5 +1,5 @@ // license:GPL-2.0+ -// copyright-holders:Kevin Thacker, Barry Rodewald +// copyright-holders:Kevin Thacker, Barry Rodewald /*************************************************************************** machine.c @@ -1665,7 +1665,7 @@ Bit 4 controls the interrupt generation. It can be used to delay interrupts.*/ else m_exp->romen_w(1); } - + amstrad_setLowerRom(); amstrad_setUpperRom(); @@ -2387,7 +2387,7 @@ void amstrad_state::amstrad_rethinkMemory() } } } - + /* mappings for other expansion devices */ if (m_exp) m_exp->set_mapping(); diff --git a/src/mess/machine/dec_lk201.c b/src/mess/machine/dec_lk201.c index a82908dd536..b110b45cfe3 100644 --- a/src/mess/machine/dec_lk201.c +++ b/src/mess/machine/dec_lk201.c @@ -232,14 +232,14 @@ const rom_entry *lk201_device::device_rom_region() const DEC omitted terms like 'Interrupt', 'Break' and 'Data / Talk' on some keyboards, so Fn numbers are definitely important for end users. - + === CURRENT SPECIAL KEYS === - [PC-AT] ......=> [DEC] - LEFT CONTROL..=> Control - LEFT ALT .....=> Compose - - RIGHT ALT ....=> Help - RIGHT CONTROL => Do + [PC-AT] ......=> [DEC] + LEFT CONTROL..=> Control + LEFT ALT .....=> Compose + + RIGHT ALT ....=> Help + RIGHT CONTROL => Do ============================================================================================== === (PC - AT ) keys above cursor block === * KEYCODE_INSERT * KEYCODE_HOME * KEYCODE_PGUP @@ -251,9 +251,9 @@ const rom_entry *lk201_device::device_rom_region() const ============================================================================================== === CURRENT NUM PAD ASSIGNMENTS === [PF1] to [PF4] are mapped to NUM LOCK, SLASH etc. (=> 4 keys on top on num pad). - Num pad '+' gives ',' on the DEC. + Num pad '+' gives ',' on the DEC. ',' translates to '.' (=> more or less the layout of model 'LK-201-AG') - + Switch between 'full' and 'partial keyboard emulation' with Scroll Lock. */ @@ -278,7 +278,7 @@ INPUT_PORTS_START( lk201 ) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Compose") PORT_CODE(KEYCODE_LALT) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) - PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_START("KBD2") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) @@ -365,14 +365,14 @@ INPUT_PORTS_START( lk201 ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("L") PORT_CODE(KEYCODE_L) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("9") PORT_CODE(KEYCODE_9) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("LF (F13)") PORT_CODE(KEYCODE_F13) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("LF (F13)") PORT_CODE(KEYCODE_F13) PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("BS (F12)") PORT_CODE(KEYCODE_F12) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_START("KBD11") - PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("/") PORT_CODE(KEYCODE_SLASH) - PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(";") PORT_CODE(KEYCODE_COLON) + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("/") PORT_CODE(KEYCODE_SLASH) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(";") PORT_CODE(KEYCODE_COLON) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED ) // FIXME - duplicate "Return" PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("0") PORT_CODE(KEYCODE_0) @@ -396,7 +396,7 @@ INPUT_PORTS_START( lk201 ) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("'") PORT_CODE(KEYCODE_QUOTE) PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("[") PORT_CODE(KEYCODE_OPENBRACE) PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Previous [^]") PORT_CODE(KEYCODE_END) - PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Do (F16) [Ausfuehren]") PORT_CODE(KEYCODE_RCONTROL) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Do (F16) [Ausfuehren]") PORT_CODE(KEYCODE_RCONTROL) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Insert Here") PORT_CODE(KEYCODE_HOME) @@ -435,7 +435,7 @@ INPUT_PORTS_START( lk201 ) PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Num ,") PORT_CODE(KEYCODE_PLUS_PAD) PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) // PORT_NAME("Num -") = duplicate...see KBD13 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("PF4") PORT_CODE(KEYCODE_MINUS_PAD) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F20") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F20") PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F19") PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) @@ -636,7 +636,7 @@ void lk201_device::send_port(address_space &space, UINT8 offset, UINT8 data) output_set_value("led_lock" , (led_data & 0x8) == 0); } #endif - + break; } } @@ -758,4 +758,3 @@ WRITE8_MEMBER( lk201_device::spi_w ) // printf("SPI %02x to %x (PC=%x)\n", data, offset, m_maincpu->pc()); } - diff --git a/src/mess/machine/wangpckb.h b/src/mess/machine/wangpckb.h index 3eb15fd04ad..27c87b071fc 100644 --- a/src/mess/machine/wangpckb.h +++ b/src/mess/machine/wangpckb.h @@ -2,7 +2,7 @@ // copyright-holders:Curt Coder /********************************************************************** - Wang PC keyboard emulation + Wang PC keyboard emulation *********************************************************************/ diff --git a/src/mess/video/gba.c b/src/mess/video/gba.c index 4745141e504..0699f047c98 100644 --- a/src/mess/video/gba.c +++ b/src/mess/video/gba.c @@ -2,11 +2,11 @@ // copyright-holders:R. Belmont,Ryan Holtz /*************************************************************************** - gba.c + gba.c - File to handle emulation of the video hardware of the Game Boy Advance + File to handle emulation of the video hardware of the Game Boy Advance - By R. Belmont, MooglyGuy + By R. Belmont, MooglyGuy ***************************************************************************/ diff --git a/src/mess/video/vtvideo.c b/src/mess/video/vtvideo.c index 6c838e45cd7..5170143d749 100644 --- a/src/mess/video/vtvideo.c +++ b/src/mess/video/vtvideo.c @@ -20,27 +20,27 @@ FIXME: work out the differences and identify common code between VT and Rainbow. - REQUIRED TODOS / TESTS : * do line and character attributes (plus combinations) match real hardware? * how does the AVO fit in? - + - SCROLLING REGIONS / SPLIT SCREEN SCROLLING UNTESTED (if you open > 1 file with the VAX editor EDT) See VT100 Technical Manual: 4.7.4 Address Shuffling to 4.7.9 Split Screen Smooth Scrolling. More on scrolling regions: Rainbow 100 B technical documentation (QV069-GZ) April 1985 page 22 - + - NEW - INTERLACED MODE (Rainbow only): Vertical resolution increases from 240 to 480, while the refresh rate halves (flickers on CRTs). To accomplish this, the display controller repeats even lines in odd scans. VTVIDEO activates line doubling in 24 line, interlaced mode only. - + Although the DC12 has the ability to display 48 lines, most units are low on screen RAM and - won't even show 80 x 48. -> REASON: (83 x 48 = 3984 Byte) > (screen RAM) minus 'scratch area' + won't even show 80 x 48. -> REASON: (83 x 48 = 3984 Byte) > (screen RAM) minus 'scratch area' On a VT-180, BIOS scratch requires up to 700 bytes used for SETUP, flags, SILO, keyboard. - + - POSSIBLE IMPROVEMENTS: - + * exact colors for different VR201 monitors (for white, green and amber) * ACCURATE VIDEO DELAYS: - Position of the first visible scanline (relative to the vertical reset) depends on - content of fill bytes at the beginning of screen RAM. + Position of the first visible scanline (relative to the vertical reset) depends on + content of fill bytes at the beginning of screen RAM. Six invisible, linked lines are initially provided (at location $EE000+ on a Rainbow). Real-world DC hardware parses the (circular) chain until interrupted by blanking. @@ -184,10 +184,10 @@ void rainbow_video_device::device_reset() m_basic_attribute = 0; m_columns = 80; - - m_frequency = 60; - m_interlaced = 1; + m_frequency = 60; + + m_interlaced = 1; m_fill_lines = 2; // for 60Hz (not in use any longer -> detected) recompute_parameters(); } @@ -209,8 +209,8 @@ void vt100_video_device::recompute_parameters() int vert_pix_total = ((m_linedoubler == false) ? m_height : m_height_MAX) * 10; - if (m_columns == 132) - horiz_pix_total = m_columns * 9; // display 1 less filler pixel in 132 char. mode + if (m_columns == 132) + horiz_pix_total = m_columns * 9; // display 1 less filler pixel in 132 char. mode else horiz_pix_total = m_columns * 10; // normal 80 character mode. @@ -238,7 +238,7 @@ READ8_MEMBER(vt100_video_device::lba7_r) // Also used by Rainbow-100 ************ WRITE8_MEMBER(vt100_video_device::dc012_w) { - // Writes to [10C] and [0C] are treated differently + // Writes to [10C] and [0C] are treated differently // - see 3.1.3.9.5 DC012 Programming Information (PC-100 spec) // MHFU is disabled by writing 00 to port 010C. @@ -248,7 +248,7 @@ WRITE8_MEMBER(vt100_video_device::dc012_w) { UINT8 *rom = machine().root_device().memregion("maincpu")->base(); if (rom != NULL) - { + { UINT32 PC = space.device().safe_pc(); if ((rom[ PC - 1] == 0xe6) && (rom[ PC ] == 0x0c) @@ -264,7 +264,7 @@ WRITE8_MEMBER(vt100_video_device::dc012_w) //printf("\n PC %05x - MHFU MAGIC -2 %02x\n", PC, magic2); //if (VERBOSE) - //if(1 ) + //if(1 ) if ((rom[PC - 2] == 0x0C) && (rom[PC - 1] == 0x01) ) @@ -272,14 +272,14 @@ WRITE8_MEMBER(vt100_video_device::dc012_w) if (MHFU_FLAG == true) printf("MHFU *** DISABLED *** %05x \n", PC); - MHFU_FLAG = false; + MHFU_FLAG = false; MHFU_counter = 0; } } - + } // DATA == 0 ONLY .... - } + } else { //if (VERBOSE) @@ -368,9 +368,9 @@ WRITE8_MEMBER(vt100_video_device::dc012_w) // Writing to DC011 resets internal counters (& disturbs display) on real hardware. WRITE8_MEMBER(vt100_video_device::dc011_w) { - if (!BIT(data, 5)) + if (!BIT(data, 5)) { - m_interlaced = 1; + m_interlaced = 1; if (!BIT(data, 4)) m_columns = 80; @@ -384,16 +384,16 @@ WRITE8_MEMBER(vt100_video_device::dc011_w) if (!BIT(data, 4)) { m_frequency = 60; - m_fill_lines = 2; + m_fill_lines = 2; } else { m_frequency = 50; - m_fill_lines = 5; + m_fill_lines = 5; } } - recompute_parameters(); + recompute_parameters(); } WRITE8_MEMBER(vt100_video_device::brightness_w) @@ -559,7 +559,7 @@ void rainbow_video_device::display_char(bitmap_ind16 &bitmap, UINT8 code, int x, UINT16 y_preset; - UINT16 CHARPOS_y_preset = y << 3; // CHARPOS_y_preset = y * 10; + UINT16 CHARPOS_y_preset = y << 3; // CHARPOS_y_preset = y * 10; CHARPOS_y_preset += y; CHARPOS_y_preset += y; @@ -571,10 +571,10 @@ void rainbow_video_device::display_char(bitmap_ind16 &bitmap, UINT8 code, int x, int back_intensity, back_default_intensity; int invert = (display_type & 8) ? 1 : 0; // REVERSE - int bold = (display_type & 16) ? 0 : 1; // BIT 4 + int bold = (display_type & 16) ? 0 : 1; // BIT 4 int blink = (display_type & 32) ? 0 : 1; // BIT 5 - int underline = (display_type & 64) ? 0 : 1; // BIT 6 - bool blank = (display_type & 128) ? true : false; // BIT 7 + int underline = (display_type & 64) ? 0 : 1; // BIT 6 + bool blank = (display_type & 128) ? true : false; // BIT 7 display_type = display_type & 3; @@ -755,7 +755,7 @@ void rainbow_video_device::video_update(bitmap_ind16 &bitmap, const rectangle &c // Skip fill (0xFF) lines and put result in ADDR. for (int xp = 1; xp <= 6; xp += 1) // beware of circular references { - // Fetch LINE ATTRIBUTE before it is gone + // Fetch LINE ATTRIBUTE before it is gone attr_addr = 0x1000 | ((addr + 1) & 0x0fff); temp = m_read_ram(addr + 2) * 256 + m_read_ram(addr + 1); @@ -903,8 +903,8 @@ int rainbow_video_device::MHFU(int ASK) MHFU_FLAG = true; return -100; - - case -200: // -200 : RESET and DISABLE MHFU + + case -200: // -200 : RESET and DISABLE MHFU MHFU_counter = 0; if(1) //if (VERBOSE) @@ -915,7 +915,7 @@ int rainbow_video_device::MHFU(int ASK) MHFU_FLAG = false; return -200; - + default: assert(1); return -255; diff --git a/src/osd/modules/render/d3d/d3dhlsl.c b/src/osd/modules/render/d3d/d3dhlsl.c index f2f4c701a5d..f6468144803 100644 --- a/src/osd/modules/render/d3d/d3dhlsl.c +++ b/src/osd/modules/render/d3d/d3dhlsl.c @@ -1022,12 +1022,12 @@ int shaders::create_resources(bool reset) phosphor_effect->add_uniform("ScreenDims", uniform::UT_VEC2, uniform::CU_SCREEN_DIMS); phosphor_effect->add_uniform("Phosphor", uniform::UT_VEC3, uniform::CU_PHOSPHOR_LIFE); - phosphor_effect->add_uniform("Passthrough", uniform::UT_FLOAT, uniform::CU_PHOSPHOR_IGNORE); - + phosphor_effect->add_uniform("Passthrough", uniform::UT_FLOAT, uniform::CU_PHOSPHOR_IGNORE); + downsample_effect->add_uniform("ScreenDims", uniform::UT_VEC2, uniform::CU_SCREEN_DIMS); - + bloom_effect->add_uniform("ScreenDims", uniform::UT_VEC2, uniform::CU_SCREEN_DIMS); - + simple_effect->add_uniform("ScreenDims", uniform::UT_VEC2, uniform::CU_SCREEN_DIMS); post_effect->add_uniform("SourceDims", uniform::UT_VEC2, uniform::CU_SOURCE_DIMS); @@ -1052,9 +1052,9 @@ int shaders::create_resources(bool reset) post_effect->add_uniform("ScanlineBrightOffset", uniform::UT_FLOAT, uniform::CU_POST_SCANLINE_BRIGHT_OFFSET); post_effect->add_uniform("Power", uniform::UT_VEC3, uniform::CU_POST_POWER); post_effect->add_uniform("Floor", uniform::UT_VEC3, uniform::CU_POST_FLOOR); - + vector_effect->add_uniform("ScreenDims", uniform::UT_VEC2, uniform::CU_SCREEN_DIMS); - + default_effect->add_uniform("ScreenDims", uniform::UT_VEC2, uniform::CU_SCREEN_DIMS); initialized = true; @@ -1458,7 +1458,7 @@ void shaders::phosphor_pass(render_target *rt, cache_target *ct, vec2f &texsize, UINT num_passes = 0; phosphor_passthrough = false; - + curr_effect = phosphor_effect; curr_effect->update_uniforms(); @@ -1516,7 +1516,7 @@ void shaders::post_pass(render_target *rt, vec2f &texsize, vec2f &delta, vec2f & float prescale[2] = { (float)hlsl_prescale_x, (float)hlsl_prescale_y }; bool orientation_swap_xy = (d3d->window().machine().system().flags & ORIENTATION_SWAP_XY) == ORIENTATION_SWAP_XY; - bool rotation_swap_xy = + bool rotation_swap_xy = (d3d->window().target()->orientation() & ROT90) == ROT90 || (d3d->window().target()->orientation() & ROT270) == ROT270; @@ -1525,8 +1525,8 @@ void shaders::post_pass(render_target *rt, vec2f &texsize, vec2f &delta, vec2f & curr_effect->set_texture("ShadowTexture", shadow_texture == NULL ? NULL : shadow_texture->get_finaltex()); curr_effect->set_texture("DiffuseTexture", rt->render_texture[0]); curr_effect->set_vector("Prescale", 2, prescale); - curr_effect->set_bool("OrientationSwapXY", orientation_swap_xy); - curr_effect->set_bool("RotationSwapXY", rotation_swap_xy); + curr_effect->set_bool("OrientationSwapXY", orientation_swap_xy); + curr_effect->set_bool("RotationSwapXY", rotation_swap_xy); curr_effect->set_bool("PrepareBloom", prepare_bloom); d3d->set_wrap(D3DTADDRESS_MIRROR); @@ -1655,8 +1655,8 @@ void shaders::bloom_pass(render_target *rt, vec2f &texsize, vec2f &delta, poly_i void shaders::screen_pass(render_target *rt, vec2f &texsize, vec2f &delta, poly_info *poly, int vertnum) { - UINT num_passes = 0; - + UINT num_passes = 0; + curr_effect = simple_effect; curr_effect->update_uniforms(); curr_effect->set_texture("DiffuseTexture", rt->render_texture[1]); @@ -1800,13 +1800,13 @@ void shaders::render_quad(poly_info *poly, int vertnum) } curr_effect->end(); - + result = (*d3dintf->device.set_render_target)(d3d->get_device(), 0, backbuffer); if (result != D3D_OK) osd_printf_verbose("Direct3D: Error %08X during device set_render_target call\n", (int)result); curr_effect = default_effect; curr_effect->update_uniforms(); - + curr_effect->set_float("FixedAlpha", 1.0f); } else if (PRIMFLAG_GET_VECTORBUF(poly->get_flags()) && vector_enable) @@ -1912,10 +1912,10 @@ void shaders::render_quad(poly_info *poly, int vertnum) /* Phosphor, todo: merge with phosphor_pass() */ phosphor_passthrough = false; - + curr_effect = phosphor_effect; curr_effect->update_uniforms(); - + float target_dims[2] = { d3d->get_width(), d3d->get_height() }; curr_effect->set_vector("TargetDims", 2, target_dims); curr_effect->set_texture("Diffuse", rt->render_texture[1]); @@ -1955,7 +1955,7 @@ void shaders::render_quad(poly_info *poly, int vertnum) { curr_effect = default_effect; curr_effect->update_uniforms(); - + curr_effect->set_float("PostPass", 0.0f); curr_effect->begin(&num_passes, 0); diff --git a/src/osd/modules/render/drawd3d.c b/src/osd/modules/render/drawd3d.c index 93c316c347f..0b1caaeee2a 100644 --- a/src/osd/modules/render/drawd3d.c +++ b/src/osd/modules/render/drawd3d.c @@ -2132,7 +2132,7 @@ void texture_info::compute_size_subroutine(int texwidth, int texheight, int* p_w { finalheight *= 2; } - + *p_width = finalwidth; *p_height = finalheight; } @@ -2148,7 +2148,7 @@ void texture_info::compute_size(int texwidth, int texheight) m_xborderpix = 0; m_yborderpix = 0; - + // if we're not wrapping, add a 1-2 pixel border on all sides if (ENABLE_BORDER_PIX && !(m_flags & PRIMFLAG_TEXWRAP_MASK)) { @@ -2160,7 +2160,7 @@ void texture_info::compute_size(int texwidth, int texheight) // compute final texture size finalwidth += 2 * m_xborderpix; finalheight += 2 * m_yborderpix; - + compute_size_subroutine(finalwidth, finalheight, &finalwidth, &finalheight); // if we added pixels for the border, and that just barely pushed us over, take it back @@ -2171,7 +2171,7 @@ void texture_info::compute_size(int texwidth, int texheight) m_xborderpix = 0; m_yborderpix = 0; - + compute_size_subroutine(finalwidth, finalheight, &finalwidth, &finalheight); } diff --git a/src/tools/nltool.c b/src/tools/nltool.c index 69398458d27..555131defce 100644 --- a/src/tools/nltool.c +++ b/src/tools/nltool.c @@ -28,7 +28,7 @@ #include "nl_parser.h" #include "devices/net_lib.h" -#define osd_ticks_t clock_t +#define osd_ticks_t clock_t inline osd_ticks_t osd_ticks_per_second() { return CLOCKS_PER_SEC; } @@ -102,17 +102,17 @@ class tool_options_t : public poptions public: tool_options_t() : poptions(), - opt_ttr ("t", "time_to_run", 1.0, "time to run the emulation (seconds)", this), + opt_ttr ("t", "time_to_run", 1.0, "time to run the emulation (seconds)", this), opt_logs("l", "logs", "", "colon separated list of terminals to log", this), opt_file("f", "file", "-", "file to process (default is stdin)", this), - opt_cmd ("c", "cmd", "run", "run|convert|listdevices", this), + opt_cmd ("c", "cmd", "run", "run|convert|listdevices", this), opt_verb("v", "verbose", "be verbose - this produces lots of output", this), opt_help("h", "help", "display help", this) {} poption_double opt_ttr; poption_str opt_logs; - poption_str opt_file; + poption_str opt_file; poption_str opt_cmd; poption_bool opt_verb; poption_bool opt_help; @@ -639,21 +639,21 @@ private: }; convert_t::sp_unit convert_t::m_sp_units[] = { - {"T", "", 1.0e12 }, - {"G", "", 1.0e9 }, - {"MEG", "RES_M(%g)", 1.0e6 }, - {"K", "RES_K(%g)", 1.0e3 }, - {"", "%g", 1.0e0 }, - {"M", "CAP_M(%g)", 1.0e-3 }, - {"U", "CAP_U(%g)", 1.0e-6 }, - {"µ", "CAP_U(%g)", 1.0e-6 }, - {"N", "CAP_N(%g)", 1.0e-9 }, + {"T", "", 1.0e12 }, + {"G", "", 1.0e9 }, + {"MEG", "RES_M(%g)", 1.0e6 }, + {"K", "RES_K(%g)", 1.0e3 }, + {"", "%g", 1.0e0 }, + {"M", "CAP_M(%g)", 1.0e-3 }, + {"U", "CAP_U(%g)", 1.0e-6 }, + {"??", "CAP_U(%g)", 1.0e-6 }, + {"N", "CAP_N(%g)", 1.0e-9 }, {"P", "CAP_P(%g)", 1.0e-12}, - {"F", "%ge-15", 1.0e-15}, + {"F", "%ge-15", 1.0e-15}, {"MIL", "%e", 25.4e-6}, - {"-", "%g", 1.0 } + {"-", "%g", 1.0 } }; @@ -665,7 +665,6 @@ convert_t::sp_unit convert_t::m_sp_units[] = { int main(int argc, char *argv[]) { - track_memory(true); { tool_options_t opts; diff --git a/src/tools/romcmp.c b/src/tools/romcmp.c index c916c41a505..97cdfa47ab3 100644 --- a/src/tools/romcmp.c +++ b/src/tools/romcmp.c @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Aaron Giles,Nicola Salmoria +// copyright-holders:Aaron Giles,Nicola Salmoria /*************************************************************************** romcmp.c diff --git a/src/version.c b/src/version.c index 5a6d9acefbc..ac911975594 100644 --- a/src/version.c +++ b/src/version.c @@ -8,7 +8,7 @@ ***************************************************************************/ -#define BARE_BUILD_VERSION "0.161" +#define BARE_BUILD_VERSION "0.162" extern const char bare_build_version[]; extern const char build_version[];