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Converted 7486 to macro module

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This commit is contained in:
couriersud 2016-05-05 23:33:01 +02:00
parent cbfff96f1c
commit 658f6b432a
7 changed files with 68 additions and 194 deletions
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2
scripts/src/netlist.lua
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@ -94,8 +94,6 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/devices/nld_7474.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7483.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7483.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7486.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7486.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7490.cpp",
MAME_DIR .. "src/lib/netlist/devices/nld_7490.h",
MAME_DIR .. "src/lib/netlist/devices/nld_7493.cpp",

2
src/lib/netlist/devices/net_lib.cpp
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@ -99,7 +99,6 @@ void initialize_factory(factory_list_t &factory)
ENTRY(nicRSFF, NETDEV_RSFF, "+S,R")
ENTRY(nicDelay, NETDEV_DELAY, "-")
ENTRY(7450, TTL_7450_ANDORINVERT, "+A,B,C,D")
ENTRY(7486, TTL_7486_XOR, "+A,B")
ENTRY(7448, TTL_7448, "+A,B,C,D,LTQ,BIQ,RBIQ")
ENTRY(7474, TTL_7474, "+CLK,D,CLRQ,PREQ")
ENTRY(7483, TTL_7483, "+A1,A2,A3,A4,B1,B2,B3,B4,C0")
@ -130,7 +129,6 @@ void initialize_factory(factory_list_t &factory)
ENTRY(7450_dip, TTL_7450_DIP, "-")
ENTRY(7474_dip, TTL_7474_DIP, "-")
ENTRY(7483_dip, TTL_7483_DIP, "-")
ENTRY(7486_dip, TTL_7486_DIP, "-")
ENTRY(7490_dip, TTL_7490_DIP, "-")
ENTRY(7493_dip, TTL_7493_DIP, "-")
ENTRY(74107_dip, TTL_74107_DIP, "-")

1
src/lib/netlist/devices/net_lib.h
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@ -20,7 +20,6 @@
#include "nld_7450.h"
#include "nld_7474.h"
#include "nld_7483.h"
#include "nld_7486.h"
#include "nld_7490.h"
#include "nld_7493.h"
#include "nld_74107.h"

117
src/lib/netlist/devices/nld_7486.cpp
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@ -1,117 +0,0 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_7486.c
*
*/
#include "nld_7486.h"
NETLIB_NAMESPACE_DEVICES_START()
#if (USE_TRUTHTABLE)
nld_7486::truthtable_t nld_7486::m_ttbl;
const char *nld_7486::m_desc[] = {
"A , B | Q ",
"0,0|0|15",
"0,1|1|22",
"1,0|1|22",
"1,1|0|15",
""
};
#else
NETLIB_START(7486)
{
register_input("A", m_I[0]);
register_input("B", m_I[1]);
register_output("Q", m_Q[0]);
save(NLNAME(m_active));
}
NETLIB_RESET(7486)
{
m_active = 1;
}
NETLIB_UPDATE(7486)
{
const netlist_time delay[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) };
UINT8 t = INPLOGIC(m_I[0]) ^ INPLOGIC(m_I[1]);
OUTLOGIC(m_Q[0], t, delay[t]);
}
ATTR_HOT void NETLIB_NAME(7486)::inc_active()
{
const netlist_time delay[2] = { NLTIME_FROM_NS(15), NLTIME_FROM_NS(22) };
nl_assert(netlist().use_deactivate());
if (++m_active == 1)
{
m_I[0].activate();
m_I[1].activate();
netlist_time mt = this->m_I[0].net().time();
if (this->m_I[1].net().time() > mt)
mt = this->m_I[1].net().time();
UINT8 t = INPLOGIC(m_I[0]) ^ INPLOGIC(m_I[1]);
m_Q[0].net().set_Q_time(t, mt + delay[t]);
}
}
ATTR_HOT void NETLIB_NAME(7486)::dec_active()
{
#if 1
nl_assert(netlist().use_deactivate());
if (--m_active == 0)
{
m_I[0].inactivate();
m_I[1].inactivate();
}
#endif
}
#endif
NETLIB_START(7486_dip)
{
register_sub("1", m_1);
register_sub("2", m_2);
register_sub("3", m_3);
register_sub("4", m_4);
register_subalias("1", m_1->m_I[0]);
register_subalias("2", m_1->m_I[1]);
register_subalias("3", m_1->m_Q[0]);
register_subalias("4", m_2->m_I[0]);
register_subalias("5", m_2->m_I[1]);
register_subalias("6", m_2->m_Q[0]);
register_subalias("9", m_3->m_I[0]);
register_subalias("10", m_3->m_I[1]);
register_subalias("8", m_3->m_Q[0]);
register_subalias("12", m_4->m_I[0]);
register_subalias("13", m_4->m_I[1]);
register_subalias("11", m_4->m_Q[0]);
}
NETLIB_UPDATE(7486_dip)
{
/* only called during startup */
m_1->update_dev();
m_2->update_dev();
m_3->update_dev();
m_4->update_dev();
}
NETLIB_RESET(7486_dip)
{
m_1->do_reset();
m_2->do_reset();
m_3->do_reset();
m_4->do_reset();
}
NETLIB_NAMESPACE_DEVICES_END()

72
src/lib/netlist/devices/nld_7486.h
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@ -1,72 +0,0 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_7486.h
*
* DM7486: Quad 2-Input Quad 2-Input Exclusive-OR Gates
*
* +--------------+
* A1 |1 ++ 14| VCC
* B1 |2 13| B4
* Y1 |3 12| A4
* A2 |4 7486 11| Y4
* B2 |5 10| B3
* Y2 |6 9| A3
* GND |7 8| Y3
* +--------------+
*
* Y = A+B
* +---+---++---+
* | A | B || Y |
* +===+===++===+
* | 0 | 0 || 0 |
* | 0 | 1 || 1 |
* | 1 | 0 || 1 |
* | 1 | 1 || 0 |
* +---+---++---+
*
* Naming conventions follow National Semiconductor datasheet
*
*/
#ifndef NLD_7486_H_
#define NLD_7486_H_
#include "nld_truthtable.h"
#define TTL_7486_XOR(_name, _A, _B) \
NET_REGISTER_DEV(TTL_7486_XOR, _name) \
NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B)
#define TTL_7486_DIP(_name) \
NET_REGISTER_DEV(TTL_7486_DIP, _name)
NETLIB_NAMESPACE_DEVICES_START()
#if (USE_TRUTHTABLE)
NETLIB_TRUTHTABLE(7486, 2, 1, 0);
#else
NETLIB_DEVICE(7486,
public:
logic_input_t m_I[2];
logic_output_t m_Q[1];
ATTR_HOT void inc_active() override;
ATTR_HOT void dec_active() override;
int m_active;
);
#endif
NETLIB_DEVICE(7486_dip,
NETLIB_SUB(7486) m_1;
NETLIB_SUB(7486) m_2;
NETLIB_SUB(7486) m_3;
NETLIB_SUB(7486) m_4;
);
NETLIB_NAMESPACE_DEVICES_END()
#endif /* NLD_7486_H_ */

56
src/lib/netlist/macro/nlm_ttl74xx.cpp
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@ -502,6 +502,43 @@ NETLIST_START(TTL_7437_DIP)
)
NETLIST_END()
/*
* DM7486: Quad 2-Input Exclusive-OR Gates
*
* Y = A+B
* +---+---++---+
* | A | B || Y |
* +===+===++===+
* | 0 | 0 || 0 |
* | 0 | 1 || 1 |
* | 1 | 0 || 1 |
* | 1 | 1 || 0 |
* +---+---++---+
*
* Naming conventions follow National Semiconductor datasheet
*
*/
NETLIST_START(TTL_7486_DIP)
TTL_7486_GATE(s1)
TTL_7486_GATE(s2)
TTL_7486_GATE(s3)
TTL_7486_GATE(s4)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.B, /* B1 |2 13| B4 */ s4.B,
s1.Q, /* Y1 |3 12| A4 */ s4.A,
s2.A, /* A2 |4 7400 11| Y4 */ s4.Q,
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
)
NETLIST_END()
NETLIST_START(TTL74XX_lib)
@ -733,6 +770,24 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7486_GATE, 2, 1, 0, "")
TT_HEAD("A,B|Q ")
TT_LINE("0,0|0|15")
TT_LINE("0,1|1|22")
TT_LINE("1,0|1|22")
TT_LINE("1,1|0|15")
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_7486_XOR, 2, 1, 0, "A,B")
TT_HEAD("A,B|Q ")
TT_LINE("0,0|0|15")
TT_LINE("0,1|1|22")
TT_LINE("1,0|1|22")
TT_LINE("1,1|0|15")
TT_FAMILY("74XX")
TRUTHTABLE_END()
LOCAL_LIB_ENTRY(TTL_7400_DIP)
LOCAL_LIB_ENTRY(TTL_7402_DIP)
LOCAL_LIB_ENTRY(TTL_7404_DIP)
@ -746,4 +801,5 @@ NETLIST_START(TTL74XX_lib)
LOCAL_LIB_ENTRY(TTL_7430_DIP)
LOCAL_LIB_ENTRY(TTL_7432_DIP)
LOCAL_LIB_ENTRY(TTL_7437_DIP)
LOCAL_LIB_ENTRY(TTL_7486_DIP)
NETLIST_END()

12
src/lib/netlist/macro/nlm_ttl74xx.h
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@ -173,6 +173,18 @@
#define TTL_7437_DIP(_name) \
NET_REGISTER_DEV(TTL_7437_DIP, _name)
#define TTL_7486_GATE(_name) \
NET_REGISTER_DEV(TTL_7486_GATE, _name)
#define TTL_7486_XOR(_name, _A, _B) \
NET_REGISTER_DEV(TTL_7486_XOR, _name) \
NET_CONNECT(_name, A, _A) \
NET_CONNECT(_name, B, _B)
#define TTL_7486_DIP(_name) \
NET_REGISTER_DEV(TTL_7486_DIP, _name)
/* ----------------------------------------------------------------------------
* External declarations
* ---------------------------------------------------------------------------*/