bus: tidy and formatting (nw)

This commit is contained in:
Patrick Mackinlay 2017-10-23 18:42:03 +07:00
parent fa45a71bce
commit 65e84a2ea1
4 changed files with 45 additions and 77 deletions

View File

@ -9,7 +9,7 @@
* - DP8510V BITBLT unit
* - custom Bresenham line drawing ASIC
* - support GT+, GTII, GTII+
*
* - reset behaviour
*/
#include "emu.h"
@ -59,34 +59,31 @@ DEFINE_DEVICE_TYPE(MPCBA79, mpcba79_device, "mpcba79", "2000 Graphics f/2 1Mp Mo
*/
MACHINE_CONFIG_MEMBER(mpcb963_device::device_add_mconfig)
MCFG_SCREEN_ADD("screen0", RASTER)
MCFG_SCREEN_RAW_PARAMS(80'000'000, XRES, 0, XRES, YRES, 0, YRES)
MCFG_SCREEN_RAW_PARAMS(80'000'000, GT_XRES, 0, GT_XRES, GT_YRES, 0, GT_YRES)
MCFG_SCREEN_UPDATE_DEVICE("", mpcb963_device, screen_update0)
MCFG_DEVICE_ADD("ramdac0", BT459, 0)
MACHINE_CONFIG_END
MACHINE_CONFIG_MEMBER(mpcba79_device::device_add_mconfig)
MCFG_SCREEN_ADD("screen0", RASTER)
MCFG_SCREEN_RAW_PARAMS(80'000'000, XRES, 0, XRES, YRES, 0, YRES)
MCFG_SCREEN_RAW_PARAMS(80'000'000, GT_XRES, 0, GT_XRES, GT_YRES, 0, GT_YRES)
MCFG_SCREEN_UPDATE_DEVICE("", mpcba79_device, screen_update0)
MCFG_DEVICE_ADD("ramdac0", BT459, 0)
MCFG_SCREEN_ADD("screen1", RASTER)
MCFG_SCREEN_RAW_PARAMS(80'000'000, XRES, 0, XRES, YRES, 0, YRES)
MCFG_SCREEN_RAW_PARAMS(80'000'000, GT_XRES, 0, GT_XRES, GT_YRES, 0, GT_YRES)
MCFG_SCREEN_UPDATE_DEVICE("", mpcba79_device, screen_update1)
MCFG_DEVICE_ADD("ramdac1", BT459, 0)
MACHINE_CONFIG_END
gt_device_base::gt_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
sr_card_device_base(mconfig, type, tag, owner, clock)
gt_device_base::gt_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: sr_card_device_base(mconfig, type, tag, owner, clock)
{
}
mpcb963_device::mpcb963_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
gt_device_base(mconfig, MPCB963, tag, owner, clock),
m_screen
{
{ { *this, "ramdac0" }, {}, true }
}
mpcb963_device::mpcb963_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: gt_device_base(mconfig, MPCB963, tag, owner, clock)
, m_screen{ { { *this, "ramdac0" }, {}, true } }
{
}
@ -99,10 +96,11 @@ void mpcb963_device::device_start()
{
gt_device_base::device_start();
m_screen[0].vram.reset(new u8[VRAM_SIZE]);
// allocate double-buffered vram
m_screen[0].vram.reset(new u8[GT_VRAM * 2]);
save_item(NAME(m_control));
save_pointer(NAME(m_screen[0].vram.get()), VRAM_SIZE);
save_pointer(NAME(m_screen[0].vram.get()), GT_VRAM * 2);
}
@ -129,18 +127,14 @@ u32 mpcb963_device::screen_update0(screen_device &screen, bitmap_rgb32 &bitmap,
{
gt_screen_t &gt_screen = m_screen[0];
gt_screen.ramdac->screen_update(screen, bitmap, cliprect, &gt_screen.vram[gt_screen.primary ? 0x000000 : 0x100000]);
gt_screen.ramdac->screen_update(screen, bitmap, cliprect, &gt_screen.vram[gt_screen.primary ? 0x000000 : GT_VRAM]);
return 0;
}
mpcba79_device::mpcba79_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
gt_device_base(mconfig, MPCBA79, tag, owner, clock),
m_screen
{
{ { *this, "ramdac0" },{}, true },
{ { *this, "ramdac1" },{}, true }
}
mpcba79_device::mpcba79_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: gt_device_base(mconfig, MPCBA79, tag, owner, clock)
, m_screen { { { *this, "ramdac0" }, {}, true }, { { *this, "ramdac1" }, {}, true } }
{
}
@ -184,7 +178,7 @@ u32 mpcba79_device::screen_update0(screen_device &screen, bitmap_rgb32 &bitmap,
{
gt_screen_t &gt_screen = m_screen[0];
gt_screen.ramdac->screen_update(screen, bitmap, cliprect, &gt_screen.vram[gt_screen.primary ? 0x000000 : 0x100000]);
gt_screen.ramdac->screen_update(screen, bitmap, cliprect, &gt_screen.vram[gt_screen.primary ? 0x000000 : GT_VRAM]);
return 0;
}
@ -193,7 +187,7 @@ u32 mpcba79_device::screen_update1(screen_device &screen, bitmap_rgb32 &bitmap,
{
gt_screen_t &gt_screen = m_screen[1];
gt_screen.ramdac->screen_update(screen, bitmap, cliprect, &gt_screen.vram[gt_screen.primary ? 0x000000 : 0x100000]);
gt_screen.ramdac->screen_update(screen, bitmap, cliprect, &gt_screen.vram[gt_screen.primary ? 0x000000 : GT_VRAM]);
return 0;
}

View File

@ -14,9 +14,9 @@ protected:
gt_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
public:
const int XRES = 1184;
const int YRES = 884;
const int VRAM_SIZE = 0x200000; // 1 megabyte double buffered
const int GT_XRES = 1184;
const int GT_YRES = 884;
const int GT_VRAM = 0x100000; // 1 megabyte
enum control_mask
{
@ -35,14 +35,8 @@ public:
virtual DECLARE_READ16_MEMBER(control_r) const = 0;
virtual DECLARE_WRITE16_MEMBER(control_w) = 0;
//virtual DECLARE_READ8_MEMBER(dac_r) const = 0;
//virtual DECLARE_WRITE8_MEMBER(dac_w) = 0;
virtual DECLARE_READ32_MEMBER(vram_r) const = 0;
virtual DECLARE_WRITE32_MEMBER(vram_w) = 0;
// BSGA XLeft 0x104 (write)
// BSGA XLeft 0x10c (read)
};
class mpcb963_device : public gt_device_base
@ -55,9 +49,6 @@ public:
virtual DECLARE_READ16_MEMBER(control_r) const override { return m_control; }
virtual DECLARE_WRITE16_MEMBER(control_w) override;
//virtual DECLARE_READ8_MEMBER(dac_r) const override { return m_screen[0].ramdac->read(space, offset, mem_mask); }
//virtual DECLARE_WRITE8_MEMBER(dac_w) override { m_screen[0].ramdac->write(space, offset, data, mem_mask); }
virtual DECLARE_READ32_MEMBER(vram_r) const override;
virtual DECLARE_WRITE32_MEMBER(vram_w) override;
@ -84,9 +75,6 @@ public:
virtual DECLARE_READ16_MEMBER(control_r) const override { return m_control; }
virtual DECLARE_WRITE16_MEMBER(control_w) override;
//virtual DECLARE_READ8_MEMBER(dac_r) const override { return m_screen[offset >> 2].ramdac->read(space, offset & 0x3, mem_mask); }
//virtual DECLARE_WRITE8_MEMBER(dac_w) override { m_screen[offset >> 2].ramdac->write(space, offset & 0x3, data, mem_mask); }
virtual DECLARE_READ32_MEMBER(vram_r) const override;
virtual DECLARE_WRITE32_MEMBER(vram_w) override;

View File

@ -252,20 +252,17 @@
* c06 25Mhz GTII Graphics f/2 1Mp Monitors
* C41 GTII 60/76Hz Graphics f/1 2Mp Monitor
* C42 GTII 60/76Hz Graphics f/2 2Mp Monitor
*
* TODO
* - general refactoring and rework to improve implementation
*/
#include "emu.h"
#include "sr.h"
#define VERBOSE 1
#define VERBOSE 0
#include "logmacro.h"
DEFINE_DEVICE_TYPE(SR_SLOT, sr_slot_device, "sr_slot", "InterPro SR bus slot")
sr_slot_device::sr_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
sr_slot_device::sr_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, SR_SLOT, tag, owner, clock)
, device_slot_interface(mconfig, *this)
, m_sr_tag(nullptr)
@ -291,13 +288,13 @@ void sr_slot_device::device_start()
DEFINE_DEVICE_TYPE(SR, sr_device, "sr", "InterPro SR bus")
sr_device::sr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, SR, tag, owner, clock),
m_data_space(nullptr),
m_io_space(nullptr),
m_out_irq0_cb(*this),
m_out_irq1_cb(*this),
m_out_irq2_cb(*this)
sr_device::sr_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, SR, tag, owner, clock)
, m_data_space(nullptr)
, m_io_space(nullptr)
, m_out_irq0_cb(*this)
, m_out_irq1_cb(*this)
, m_out_irq2_cb(*this)
{
}
@ -316,7 +313,7 @@ void sr_device::device_start()
// empty the slots
m_slot_count = 0;
for (auto &slot : m_slot)
for (device_sr_card_interface *slot : m_slot)
slot = nullptr;
}
@ -324,19 +321,6 @@ void sr_device::device_reset()
{
}
void sr_device::install_idprom(device_t *dev, const char *tag, const char *region)
{
// compute slot base address
offs_t base = 0x87000000;
// map the idprom
m_data_space->install_read_bank(base, base + 0x7f, 0, tag);
m_data_space->unmap_write(base, base + 0x7f);
// assign the region
machine().root_device().membank(m_data_space->device().siblingtag(tag).c_str())->set_base(machine().root_device().memregion(dev->subtag(region).c_str())->base());
}
device_sr_card_interface::device_sr_card_interface(const machine_config &mconfig, device_t &device)
: device_slot_card_interface(mconfig, device)
, m_sr(nullptr)
@ -366,7 +350,7 @@ void device_sr_card_interface::set_sr_device()
m_sr->install_card(*this, &device_sr_card_interface::map);
}
sr_card_device_base::sr_card_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const char *idprom_region)
sr_card_device_base::sr_card_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const char *idprom_region)
: device_t(mconfig, type, tag, owner, clock)
, device_sr_card_interface(mconfig, *this)
, m_idprom_region(idprom_region)

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@ -27,12 +27,12 @@ class sr_slot_device : public device_t, public device_slot_interface
{
public:
// construction/destruction
sr_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sr_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// inline configuration
static void static_set_sr_slot(device_t &device, const char *tag, const char *slottag);
protected:
sr_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
sr_slot_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-level overrides
virtual void device_start() override;
@ -47,26 +47,30 @@ class sr_device : public device_t
{
public:
// construction/destruction
sr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
sr_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// inline configuration
template <class Object> static devcb_base &set_out_irq0_callback(device_t &device, Object &&cb) { return downcast<sr_device &>(device).m_out_irq0_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_out_irq1_callback(device_t &device, Object &&cb) { return downcast<sr_device &>(device).m_out_irq1_cb.set_callback(std::forward<Object>(cb)); }
template <class Object> static devcb_base &set_out_irq2_callback(device_t &device, Object &&cb) { return downcast<sr_device &>(device).m_out_irq2_cb.set_callback(std::forward<Object>(cb)); }
static const u32 SR_BASE = 0x87000000;
static const u32 SR_SIZE = 0x08000000;
static const int SR_COUNT = 16;
DECLARE_WRITE_LINE_MEMBER(irq0_w) { m_out_irq0_cb(state); }
DECLARE_WRITE_LINE_MEMBER(irq1_w) { m_out_irq1_cb(state); }
DECLARE_WRITE_LINE_MEMBER(irq2_w) { m_out_irq2_cb(state); }
// helper functions for card devices
// installation function for card devices
template <typename T> void install_card(T &device, void (T::*map)(address_map &map))
{
// record the device in the next free slot
m_slot[m_slot_count] = &device;
// compute slot base address
offs_t start = 0x87000000 + m_slot_count * 0x8000000;
offs_t end = start + 0x7ffffff;
offs_t start = SR_BASE + m_slot_count * SR_SIZE;
offs_t end = start + (SR_SIZE - 1);
// install the device address map
m_data_space->install_device(start, end, device, map, 32);
@ -75,10 +79,8 @@ public:
m_slot_count++;
}
void install_idprom(device_t *dev, const char *tag, const char *region);
protected:
sr_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
sr_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-level overrides
virtual void device_start() override;
@ -93,7 +95,7 @@ protected:
devcb_write_line m_out_irq2_cb;
private:
device_sr_card_interface *m_slot[16];
device_sr_card_interface *m_slot[SR_COUNT];
int m_slot_count;
};
@ -120,7 +122,7 @@ protected:
class sr_card_device_base : public device_t, public device_sr_card_interface
{
protected:
sr_card_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const char *idprom_region = "idprom");
sr_card_device_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const char *idprom_region = "idprom");
public:
READ32_MEMBER(idprom_r) { return device().memregion(m_idprom_region)->as_u32(offset); }