diff --git a/src/emu/cpu/sh4/sh4comn.c b/src/emu/cpu/sh4/sh4comn.c
index a1447684a12..75e0b0fae8f 100644
--- a/src/emu/cpu/sh4/sh4comn.c
+++ b/src/emu/cpu/sh4/sh4comn.c
@@ -641,6 +641,12 @@ WRITE32_HANDLER( sh4_internal_w )
 
 	switch( offset )
 	{
+	case MMUCR: // MMU Control
+		if (data & 1)
+			fatalerror("SH4: MMUCR write enables MMU\n");
+	
+		break;
+	
 		// Memory refresh
 	case RTCSR:
 		sh4->m[RTCSR] &= 255;