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https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
mos6551: Misc. fixes
- Suppress receiver full and transmitter empty IRQs when disabled by command write - Add address map for future use - Correct pin label on diagram concept: Suppress spurious DCD IRQ by setting grounded modem control lines in machine_start
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@ -69,6 +69,14 @@ void mos6551_device::device_add_mconfig(machine_config &config)
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m_internal_clock->signal_handler().set(FUNC(mos6551_device::internal_clock));
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}
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void mos6551_device::map(address_map &map)
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{
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map(0, 0).rw(FUNC(mos6551_device::read_rdr), FUNC(mos6551_device::write_tdr));
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map(1, 1).rw(FUNC(mos6551_device::read_status), FUNC(mos6551_device::write_reset));
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map(2, 2).rw(FUNC(mos6551_device::read_command), FUNC(mos6551_device::write_command));
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map(3, 3).rw(FUNC(mos6551_device::read_control), FUNC(mos6551_device::write_control));
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}
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void mos6551_device::device_start()
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{
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@ -344,12 +352,22 @@ void mos6551_device::write_command(uint8_t data)
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// bit 1
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m_rx_irq_enable = !((m_command >> 1) & 1) && !m_dtr;
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if (!m_rx_irq_enable && (m_irq_state & IRQ_RDRF))
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{
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m_irq_state &= ~IRQ_RDRF;
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update_irq();
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}
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// bits 2-3
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int transmitter_control = (m_command >> 2) & 3;
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m_tx_irq_enable = transmitter_controls[transmitter_control][0] && !m_dtr;
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m_tx_enable = transmitter_controls[transmitter_control][1];
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m_brk = transmitter_controls[transmitter_control][2];
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if (!m_tx_irq_enable && (m_irq_state & IRQ_TDRE))
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{
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m_irq_state &= ~IRQ_TDRE;
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update_irq();
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}
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// bit 4
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m_echo_mode = (m_command >> 4) & 1;
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@ -477,7 +495,7 @@ void mos6551_device::write_cts(int state)
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{
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m_cts = state;
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if (m_cts)
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if (m_cts && started())
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{
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if (m_tx_output == OUTPUT_TXD)
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{
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@ -17,7 +17,7 @@
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_CTS 9 | | 20 DB2
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TxD 10 | | 19 DB1
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_DTR 11 | | 18 DB0
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RxD 12 | | 17 _DBR
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RxD 12 | | 17 _DSR
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RS0 13 | | 16 _DCD
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RS1 14 |_____________| 15 Vcc
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@ -41,6 +41,8 @@ public:
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auto rts_handler() { return m_rts_handler.bind(); }
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auto dtr_handler() { return m_dtr_handler.bind(); }
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void map(address_map &map);
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uint8_t read(offs_t offset);
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void write(offs_t offset, uint8_t data);
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@ -40,6 +40,17 @@ enum
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void concept_state::machine_start()
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{
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// OS will not boot if TDRE is clear on ACIA 0; this fixes that
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m_acia0->write_cts(0);
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m_acia0->write_dcd(0);
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m_acia0->write_dsr(0);
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m_acia1->write_cts(0);
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m_acia1->write_dcd(0);
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m_acia1->write_dsr(0);
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m_kbdacia->write_cts(0);
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m_kbdacia->write_dcd(0);
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m_kbdacia->write_dsr(0);
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/* initialize clock interface */
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m_clock_enable = false /*true*/;
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@ -50,13 +61,6 @@ void concept_state::machine_start()
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void concept_state::machine_reset()
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{
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// OS will not boot if TDRE is clear on ACIA 0; this fixes that
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m_acia0->write_cts(0);
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m_acia0->write_dcd(0);
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m_acia1->write_cts(0);
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m_acia1->write_dcd(0);
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m_kbdacia->write_cts(0);
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m_kbdacia->write_dcd(0);
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}
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void concept_state::video_start()
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