mos6551: Misc. fixes

- Suppress receiver full and transmitter empty IRQs when disabled by command write
- Add address map for future use
- Correct pin label on diagram

concept: Suppress spurious DCD IRQ by setting grounded modem control lines in machine_start
This commit is contained in:
AJR 2024-09-12 16:22:40 -04:00
parent 000cf3b50e
commit 666278ae60
3 changed files with 33 additions and 9 deletions

View File

@ -69,6 +69,14 @@ void mos6551_device::device_add_mconfig(machine_config &config)
m_internal_clock->signal_handler().set(FUNC(mos6551_device::internal_clock));
}
void mos6551_device::map(address_map &map)
{
map(0, 0).rw(FUNC(mos6551_device::read_rdr), FUNC(mos6551_device::write_tdr));
map(1, 1).rw(FUNC(mos6551_device::read_status), FUNC(mos6551_device::write_reset));
map(2, 2).rw(FUNC(mos6551_device::read_command), FUNC(mos6551_device::write_command));
map(3, 3).rw(FUNC(mos6551_device::read_control), FUNC(mos6551_device::write_control));
}
void mos6551_device::device_start()
{
@ -344,12 +352,22 @@ void mos6551_device::write_command(uint8_t data)
// bit 1
m_rx_irq_enable = !((m_command >> 1) & 1) && !m_dtr;
if (!m_rx_irq_enable && (m_irq_state & IRQ_RDRF))
{
m_irq_state &= ~IRQ_RDRF;
update_irq();
}
// bits 2-3
int transmitter_control = (m_command >> 2) & 3;
m_tx_irq_enable = transmitter_controls[transmitter_control][0] && !m_dtr;
m_tx_enable = transmitter_controls[transmitter_control][1];
m_brk = transmitter_controls[transmitter_control][2];
if (!m_tx_irq_enable && (m_irq_state & IRQ_TDRE))
{
m_irq_state &= ~IRQ_TDRE;
update_irq();
}
// bit 4
m_echo_mode = (m_command >> 4) & 1;
@ -477,7 +495,7 @@ void mos6551_device::write_cts(int state)
{
m_cts = state;
if (m_cts)
if (m_cts && started())
{
if (m_tx_output == OUTPUT_TXD)
{

View File

@ -17,7 +17,7 @@
_CTS 9 | | 20 DB2
TxD 10 | | 19 DB1
_DTR 11 | | 18 DB0
RxD 12 | | 17 _DBR
RxD 12 | | 17 _DSR
RS0 13 | | 16 _DCD
RS1 14 |_____________| 15 Vcc
@ -41,6 +41,8 @@ public:
auto rts_handler() { return m_rts_handler.bind(); }
auto dtr_handler() { return m_dtr_handler.bind(); }
void map(address_map &map);
uint8_t read(offs_t offset);
void write(offs_t offset, uint8_t data);

View File

@ -40,6 +40,17 @@ enum
void concept_state::machine_start()
{
// OS will not boot if TDRE is clear on ACIA 0; this fixes that
m_acia0->write_cts(0);
m_acia0->write_dcd(0);
m_acia0->write_dsr(0);
m_acia1->write_cts(0);
m_acia1->write_dcd(0);
m_acia1->write_dsr(0);
m_kbdacia->write_cts(0);
m_kbdacia->write_dcd(0);
m_kbdacia->write_dsr(0);
/* initialize clock interface */
m_clock_enable = false /*true*/;
@ -50,13 +61,6 @@ void concept_state::machine_start()
void concept_state::machine_reset()
{
// OS will not boot if TDRE is clear on ACIA 0; this fixes that
m_acia0->write_cts(0);
m_acia0->write_dcd(0);
m_acia1->write_cts(0);
m_acia1->write_dcd(0);
m_kbdacia->write_cts(0);
m_kbdacia->write_dcd(0);
}
void concept_state::video_start()