mirror of
https://github.com/holub/mame
synced 2025-05-17 19:24:59 +03:00
(MESS) NES IRQ clean up part 2: Konami IRQs are now implemented based on the docs
and not kludged (in particular, now they are cycle based too). nw. + a minor fix for NT restore...
This commit is contained in:
Fabio Priuli
parent
715f05b28d
commit
66ae0c6ab9
@ -62,28 +62,28 @@ nes_konami_vrc2_device::nes_konami_vrc2_device(const machine_config &mconfig, co
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{
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}
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nes_konami_vrc3_device::nes_konami_vrc3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
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: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
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{
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}
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nes_konami_vrc3_device::nes_konami_vrc3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: nes_nrom_device(mconfig, NES_VRC3, "NES Cart Konami VRC-3 PCB", tag, owner, clock, "nes_vrc3", __FILE__)
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{
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}
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nes_konami_vrc4_device::nes_konami_vrc4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
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: nes_nrom_device(mconfig, type, name, tag, owner, clock, shortname, source)
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{
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}
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nes_konami_vrc4_device::nes_konami_vrc4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: nes_konami_vrc3_device(mconfig, NES_VRC4, "NES Cart Konami VRC-4 PCB", tag, owner, clock, "nes_vrc4", __FILE__)
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: nes_nrom_device(mconfig, NES_VRC4, "NES Cart Konami VRC-4 PCB", tag, owner, clock, "nes_vrc4", __FILE__)
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{
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}
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nes_konami_vrc6_device::nes_konami_vrc6_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: nes_konami_vrc3_device(mconfig, NES_VRC6, "NES Cart Konami VRC-6 PCB", tag, owner, clock, "nes_vrc6", __FILE__)
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: nes_konami_vrc4_device(mconfig, NES_VRC6, "NES Cart Konami VRC-6 PCB", tag, owner, clock, "nes_vrc6", __FILE__)
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{
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}
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nes_konami_vrc7_device::nes_konami_vrc7_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: nes_konami_vrc3_device(mconfig, NES_VRC7, "NES Cart Konami VRC-7 PCB", tag, owner, clock, "nes_vrc7", __FILE__)
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: nes_konami_vrc4_device(mconfig, NES_VRC7, "NES Cart Konami VRC-7 PCB", tag, owner, clock, "nes_vrc7", __FILE__)
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{
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}
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@ -126,6 +126,10 @@ void nes_konami_vrc2_device::pcb_reset()
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void nes_konami_vrc3_device::device_start()
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{
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common_start();
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irq_timer = timer_alloc(TIMER_IRQ);
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irq_timer->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(1));
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save_item(NAME(m_irq_mode));
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save_item(NAME(m_irq_enable));
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save_item(NAME(m_irq_enable_latch));
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save_item(NAME(m_irq_count));
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@ -139,6 +143,7 @@ void nes_konami_vrc3_device::pcb_reset()
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prg16_cdef(m_prg_chunks - 1);
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chr8(0, m_chr_source);
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m_irq_mode = 0;
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m_irq_enable = 0;
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m_irq_enable_latch = 0;
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m_irq_count = 0;
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@ -149,7 +154,11 @@ void nes_konami_vrc3_device::pcb_reset()
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void nes_konami_vrc4_device::device_start()
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{
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common_start();
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irq_timer = timer_alloc(TIMER_IRQ);
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irq_timer->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(1));
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save_item(NAME(m_irq_mode));
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save_item(NAME(m_irq_prescale));
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save_item(NAME(m_irq_enable));
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save_item(NAME(m_irq_enable_latch));
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save_item(NAME(m_irq_count));
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@ -167,6 +176,7 @@ void nes_konami_vrc4_device::pcb_reset()
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chr8(0, m_chr_source);
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m_irq_mode = 0;
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m_irq_prescale = 341;
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m_irq_enable = 0;
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m_irq_enable_latch = 0;
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m_irq_count = 0;
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@ -182,6 +192,11 @@ void nes_konami_vrc7_device::device_start()
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m_ym2413 = device().subdevice("ym");
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common_start();
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irq_timer = timer_alloc(TIMER_IRQ);
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irq_timer->adjust(attotime::zero, 0, machine().device<cpu_device>("maincpu")->cycles_to_attotime(1));
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save_item(NAME(m_irq_mode));
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save_item(NAME(m_irq_prescale));
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save_item(NAME(m_irq_enable));
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save_item(NAME(m_irq_enable_latch));
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save_item(NAME(m_irq_count));
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@ -197,6 +212,8 @@ void nes_konami_vrc7_device::pcb_reset()
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prg8_ef(0xff);
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chr8(0, m_chr_source);
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m_irq_mode = 0;
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m_irq_prescale = 341;
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m_irq_enable = 0;
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m_irq_enable_latch = 0;
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m_irq_count = 0;
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@ -333,18 +350,37 @@ WRITE8_MEMBER(nes_konami_vrc2_device::write_h)
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iNES: mapper 73
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In MESS: Supported. It also uses konami_irq.
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In MESS: Supported.
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-------------------------------------------------*/
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void nes_konami_vrc3_device::hblank_irq(int scanline, int vblank, int blanked)
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void nes_konami_vrc3_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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/* Increment & check the IRQ scanline counter */
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if (m_irq_enable && (++m_irq_count == 0x100))
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if (id == TIMER_IRQ)
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{
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m_irq_count = m_irq_count_latch;
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m_irq_enable = m_irq_enable_latch;
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machine().device("maincpu")->execute().set_input_line(M6502_IRQ_LINE, HOLD_LINE);
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if (m_irq_enable)
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{
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if (m_irq_mode) // 8bits mode
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{
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if ((m_irq_count & 0x00ff) == 0xff)
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{
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machine().device("maincpu")->execute().set_input_line(M6502_IRQ_LINE, HOLD_LINE);
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m_irq_count = m_irq_count_latch;
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}
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else
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m_irq_count = (m_irq_count & 0xff00) | ((m_irq_count & 0x00ff) + 1);
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}
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else // 16bits mode
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{
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if (m_irq_count == 0xffff)
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{
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machine().device("maincpu")->execute().set_input_line(M6502_IRQ_LINE, HOLD_LINE);
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m_irq_count = m_irq_count_latch;
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}
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else
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m_irq_count++;
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}
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}
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}
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}
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@ -355,21 +391,26 @@ WRITE8_MEMBER(nes_konami_vrc3_device::write_h)
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switch (offset & 0x7000)
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{
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case 0x0000:
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m_irq_count_latch = (m_irq_count_latch & 0xfff0) | ((data & 0x0f) << 0);
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break;
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case 0x1000:
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/* dunno which address controls these */
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m_irq_count_latch = data;
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m_irq_enable_latch = data;
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m_irq_count_latch = (m_irq_count_latch & 0xff0f) | ((data & 0x0f) << 4);
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break;
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case 0x2000:
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m_irq_enable = data;
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m_irq_count_latch = (m_irq_count_latch & 0xf0ff) | ((data & 0x0f) << 8);
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break;
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case 0x3000:
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m_irq_count &= ~0x0f;
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m_irq_count |= data & 0x0f;
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m_irq_count_latch = (m_irq_count_latch & 0x0fff) | ((data & 0x0f) << 12);
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break;
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case 0x4000:
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m_irq_count &= ~0xf0;
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m_irq_count |= (data & 0x0f) << 4;
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m_irq_mode = data & 0x04;
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m_irq_enable = data & 0x02;
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m_irq_enable_latch = data & 0x01;
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if (data & 0x02)
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m_irq_count = m_irq_count_latch;
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break;
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case 0x5000:
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m_irq_enable = m_irq_enable_latch;
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break;
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case 0x7000:
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prg16_89ab(data);
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@ -388,6 +429,42 @@ WRITE8_MEMBER(nes_konami_vrc3_device::write_h)
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-------------------------------------------------*/
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void nes_konami_vrc4_device::irq_tick()
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{
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if (m_irq_count == 0xff)
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{
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m_irq_count = m_irq_count_latch;
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machine().device("maincpu")->execute().set_input_line(M6502_IRQ_LINE, HOLD_LINE);
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}
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else
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m_irq_count++;
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}
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void nes_konami_vrc4_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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if (id == TIMER_IRQ)
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{
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if (m_irq_enable)
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{
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if (m_irq_mode) // cycle mode
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irq_tick();
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else // scanline mode
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{
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// A prescaler divides the passing CPU cycles by 114, 114, then 113 (and repeats that order).
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// This approximates 113+2/3 CPU cycles, which is one NTSC scanline.
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// Since this is a CPU-based IRQ, though, it is triggered also during non visible scanlines...
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if (m_irq_prescale < 3)
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{
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m_irq_prescale += 341;
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irq_tick();
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}
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m_irq_prescale -= 3;
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}
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}
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}
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}
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void nes_konami_vrc4_device::set_prg()
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{
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if (m_latch & 0x02)
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@ -51,47 +51,60 @@ class nes_konami_vrc3_device : public nes_nrom_device
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{
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public:
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// construction/destruction
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nes_konami_vrc3_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
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nes_konami_vrc3_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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// device-level overrides
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virtual void device_start();
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virtual DECLARE_WRITE8_MEMBER(write_h);
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virtual void hblank_irq(int scanline, int vblank, int blanked);
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virtual void pcb_reset();
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protected:
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UINT16 m_irq_count, m_irq_count_latch;
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int m_irq_enable, m_irq_enable_latch;
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int m_irq_mode; // used by VRC-4, VRC-6 & VRC-7. currently not implemented: 0 = prescaler mode / 1 = CPU mode
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};
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// ======================> nes_konami_vrc4_device
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class nes_konami_vrc4_device : public nes_konami_vrc3_device
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{
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public:
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// construction/destruction
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nes_konami_vrc4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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// device-level overrides
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virtual void device_start();
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
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virtual DECLARE_WRITE8_MEMBER(write_h);
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virtual void pcb_reset();
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private:
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UINT16 m_irq_count, m_irq_count_latch;
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int m_irq_enable, m_irq_enable_latch;
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int m_irq_mode;
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static const device_timer_id TIMER_IRQ = 0;
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emu_timer *irq_timer;
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};
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// ======================> nes_konami_vrc4_device
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class nes_konami_vrc4_device : public nes_nrom_device
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{
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public:
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// construction/destruction
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nes_konami_vrc4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
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nes_konami_vrc4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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// device-level overrides
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virtual void device_start();
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
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virtual DECLARE_WRITE8_MEMBER(write_h);
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virtual void pcb_reset();
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protected:
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void set_prg();
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UINT8 m_mmc_vrom_bank[8];
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UINT8 m_latch, m_mmc_prg_bank;
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void irq_tick();
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UINT16 m_irq_count, m_irq_count_latch;
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int m_irq_enable, m_irq_enable_latch;
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int m_irq_mode;
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int m_irq_prescale;
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static const device_timer_id TIMER_IRQ = 0;
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emu_timer *irq_timer;
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};
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// ======================> nes_konami_vrc6_device
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class nes_konami_vrc6_device : public nes_konami_vrc3_device
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class nes_konami_vrc6_device : public nes_konami_vrc4_device
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{
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public:
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// construction/destruction
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@ -106,7 +119,7 @@ public:
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// ======================> nes_konami_vrc7_device
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class nes_konami_vrc7_device : public nes_konami_vrc3_device
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class nes_konami_vrc7_device : public nes_konami_vrc4_device
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{
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public:
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// construction/destruction
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@ -734,7 +734,7 @@ void device_nes_cart_interface::nes_banks_restore()
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chr1_x(i, m_chr_orig[i] / 0x400, m_chr_src[i]);
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for (int i = 0; i < 4; i++)
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set_nt_page(i, m_nt_src[i], m_nt_orig[i], m_nt_writable[i]);
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set_nt_page(i, m_nt_src[i], m_nt_orig[i] / 0x400, m_nt_writable[i]);
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set_nt_mirroring(m_mirroring);
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}
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@ -314,12 +314,12 @@ WRITE8_MEMBER(nes_sunsoft_3_device::write_h)
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break;
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case 0x6800:
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switch (data & 3)
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{
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case 0x00: set_nt_mirroring(PPU_MIRROR_VERT); break;
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case 0x01: set_nt_mirroring(PPU_MIRROR_HORZ); break;
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case 0x02: set_nt_mirroring(PPU_MIRROR_LOW); break;
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case 0x03: set_nt_mirroring(PPU_MIRROR_HIGH); break;
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}
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{
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case 0x00: set_nt_mirroring(PPU_MIRROR_VERT); break;
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case 0x01: set_nt_mirroring(PPU_MIRROR_HORZ); break;
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case 0x02: set_nt_mirroring(PPU_MIRROR_LOW); break;
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case 0x03: set_nt_mirroring(PPU_MIRROR_HIGH); break;
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}
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break;
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case 0x7800:
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prg16_89ab(data);
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