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leapfrog_iquest.cpp: IQuest (8032-based SoC) speculative notes etc. (#7483)
Identified banking registers and likely screen buffer ram locations on leapfrog IQuest.
This commit is contained in:
David Haywood
GitHub
parent
572be478e0
commit
66c3d08daa
@ -14,6 +14,7 @@
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#include "bus/generic/slot.h"
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#include "bus/generic/carts.h"
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#include "machine/bankdev.h"
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#include "screen.h"
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#include "softlist.h"
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@ -28,6 +29,7 @@ public:
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, m_maincpu(*this, "maincpu")
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, m_cart(*this, "cartslot")
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, m_screen(*this, "screen")
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, m_rombank(*this, "rombank")
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, m_cart_region(nullptr)
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{ }
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@ -47,7 +49,78 @@ private:
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required_device<mcs51_cpu_device> m_maincpu;
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required_device<generic_slot_device> m_cart;
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required_device<screen_device> m_screen;
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void rom_map(address_map &map);
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required_device<address_map_bank_device> m_rombank;
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memory_region *m_cart_region;
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uint8_t m_lowerbank[2];
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uint8_t m_upperbank[2];
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uint8_t lowerbank_r(offs_t offset);
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uint8_t upperbank_r(offs_t offset);
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void lowerbank_w(offs_t offset, uint8_t data);
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void upperbank_w(offs_t offset, uint8_t data);
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uint8_t m_iobank[2];
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uint8_t iobank_r(offs_t offset);
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void iobank_w(offs_t offset, uint8_t data);
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uint8_t lowerwindow_r(offs_t offset);
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uint8_t upperwindow_r(offs_t offset);
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uint8_t iowindow_r(offs_t offset);
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void iowindow_w(offs_t offset, uint8_t data);
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uint8_t unk_ff80_r();
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void unk_ff80_w(uint8_t data);
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uint8_t m_ff80;
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uint8_t unk_fc00_r();
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uint8_t unk_fc01_r(offs_t offset);
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uint8_t unk_fc2f_r();
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uint8_t unk_fc3f_r();
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void unk_fc3f_w(uint8_t data);
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void unk_fc22_w(uint8_t data);
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uint8_t unk_fce5_r();
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void unk_fce5_w(uint8_t data);
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uint8_t m_fce5;
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uint8_t unk_ff00_01_r(offs_t offset);
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void unk_ff81_84_w(offs_t offset, uint8_t data);
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uint8_t m_ff81_84[4];
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uint8_t unk_ff91_93_r(offs_t offset);
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void unk_ff91_93_w(offs_t offset, uint8_t data);
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uint8_t m_ff91_93[3];
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uint8_t unk_ffa8_r();
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void unk_ffa8_w(uint8_t data);
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uint8_t m_ffa8;
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void unk_ffa9_w(uint8_t data);
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void tx(uint8_t data);
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uint8_t rx();
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DECLARE_WRITE_LINE_MEMBER(rx_line_hack);
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uint8_t port0_r();
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void port0_w(u8 data);
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uint8_t port1_r();
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void port1_w(u8 data);
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uint8_t port2_r();
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void port2_w(u8 data);
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uint8_t port3_r();
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void port3_w(u8 data);
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};
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@ -63,15 +136,311 @@ void leapfrog_iquest_state::machine_start()
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void leapfrog_iquest_state::machine_reset()
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{
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m_lowerbank[0] = m_lowerbank[1] = 0x00;
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m_upperbank[0] = m_upperbank[1] = 0x00;
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m_iobank[0] = m_iobank[1] = 0x00;
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m_rombank->set_bank(0);
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m_ff80 = 0x00;
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m_fce5 = 0x00;
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m_ff91_93[0] = m_ff91_93[1] = m_ff91_93[2] = 0x00;
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}
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uint8_t leapfrog_iquest_state::lowerbank_r(offs_t offset)
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{
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return m_lowerbank[offset];
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}
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uint8_t leapfrog_iquest_state::upperbank_r(offs_t offset)
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{
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return m_upperbank[offset];
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}
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void leapfrog_iquest_state::lowerbank_w(offs_t offset, uint8_t data)
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{
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m_lowerbank[offset] = data;
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}
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void leapfrog_iquest_state::upperbank_w(offs_t offset, uint8_t data)
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{
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m_upperbank[offset] = data;
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}
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uint8_t leapfrog_iquest_state::iobank_r(offs_t offset)
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{
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return m_iobank[offset];
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}
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void leapfrog_iquest_state::iobank_w(offs_t offset, uint8_t data)
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{
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//printf("iobank_w %d, %02x\n", offset, data);
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m_iobank[offset] = data;
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}
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void leapfrog_iquest_state::rom_map(address_map &map)
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{
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map(0x00000000, 0x003fffff).rom().region("maincpu", 0);
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map(0x00400000, 0x007fffff).ram();
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}
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uint8_t leapfrog_iquest_state::lowerwindow_r(offs_t offset)
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{
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uint32_t bank = ((m_lowerbank[0] << 8) | (m_lowerbank[1])) * 0x8000;
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return m_rombank->read8(bank + offset);
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}
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uint8_t leapfrog_iquest_state::upperwindow_r(offs_t offset)
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{
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uint32_t bank = ((m_upperbank[0] << 8) | (m_upperbank[1])) * 0x8000;
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return m_rombank->read8(bank + offset);
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}
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uint8_t leapfrog_iquest_state::iowindow_r(offs_t offset)
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{
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uint32_t bank = ((m_iobank[0] << 8) | (m_iobank[1])) * 0x8000;
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return m_rombank->read8(bank + offset);
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}
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void leapfrog_iquest_state::iowindow_w(offs_t offset, uint8_t data)
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{
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uint32_t bank = ((m_iobank[0] << 8) | (m_iobank[1])) * 0x8000;
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m_rombank->write8(bank + offset, data);
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}
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void leapfrog_iquest_state::prog_map(address_map &map)
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{
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map(0x0000, 0xffff).rom().region("maincpu", 0x10000); // TODO: banking
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map(0x0000, 0x7fff).r(FUNC(leapfrog_iquest_state::lowerwindow_r));
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map(0x8000, 0xffff).r(FUNC(leapfrog_iquest_state::upperwindow_r));
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}
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uint8_t leapfrog_iquest_state::unk_ff80_r()
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{
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logerror("%s: unk_ff80_r\n", machine().describe_context());
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return m_ff80;
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}
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void leapfrog_iquest_state::unk_ff80_w(uint8_t data)
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{
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// must return what is written for some startup tests
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logerror("%s: m_ff80 %02x\n", machine().describe_context(), data);
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m_ff80 = data;
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}
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uint8_t leapfrog_iquest_state::unk_fc00_r()
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{
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logerror("%s: unk_fc00_r\n", machine().describe_context());
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return 0x00;// machine().rand();
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}
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uint8_t leapfrog_iquest_state::unk_fc01_r(offs_t offset)
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{
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logerror("%s: unk_fc01_r %d\n", machine().describe_context(), offset);
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return 0xff;// machine().rand();
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}
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uint8_t leapfrog_iquest_state::unk_fc2f_r()
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{
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logerror("%s: unk_fc2f_r\n", machine().describe_context());
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return 0x00;// machine().rand();
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}
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uint8_t leapfrog_iquest_state::unk_fc3f_r()
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{
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logerror("%s: unk_fc3f_r\n", machine().describe_context());
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return 0x00;// machine().rand();
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}
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void leapfrog_iquest_state::unk_fc3f_w(uint8_t data)
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{
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logerror("%s: unk_fc3f_w %02x\n", machine().describe_context(), data);
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}
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void leapfrog_iquest_state::unk_fc22_w(uint8_t data)
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{
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logerror("%s: unk_fc22_w %02x\n", machine().describe_context(), data);
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}
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uint8_t leapfrog_iquest_state::unk_ff00_01_r(offs_t offset)
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{
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// read around the time of fc22 writes
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logerror("%s: unk_ff00_01_r %d\n", machine().describe_context(), offset);
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return 0x00;
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}
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uint8_t leapfrog_iquest_state::unk_fce5_r()
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{
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logerror("%s: unk_fce5_r\n", machine().describe_context());
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return 0x00;// m_fce5;// machine().rand();
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}
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void leapfrog_iquest_state::unk_fce5_w(uint8_t data)
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{
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// repeated read/write pattern on this address
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logerror("%s: unk_fce5_w %02x\n", machine().describe_context(), data);
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m_fce5 = data;
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}
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/*
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in all cases ff91-ff93 writes appear to be an address in the current main space
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which is 0x10000-0x17fff, 0x10000-0x17fff in ROM at the time of writing
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or for the later writes 0x10000-0x17fff, 0x20000-0x27fff (the b448 is from 0x23448 for example)
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each of the blocks pointed to is preceded by a 0x00 byte? (maybe 0x00 is a terminator for previous block?)
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the blocks being pointed at during startup are debug text, c style strings for 'printf' functions, complete with
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formatting characters while the ff81 to ff84 area contains the parameters.
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it seems likely this is just a RAM area and these are temporary storage for the debug print function,
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either for futher processing and output to an actual debug console, or shared with another device (ff80, which is
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possibly the start of this RAM area, is written after putting these pointers in RAM)
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*/
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uint8_t leapfrog_iquest_state::unk_ff91_93_r(offs_t offset)
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{
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logerror("%s: unk_ff91_93_r %d\n", machine().describe_context(), offset);
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return 0x00;// m_ff91_93[offset];
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}
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void leapfrog_iquest_state::unk_ff91_93_w(offs_t offset, uint8_t data)
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{
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// these 3 values are written together
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m_ff91_93[offset] = data;
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// form is ff then 2 other values, these are pointers into the main space it seems
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if (offset == 2)
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{
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logerror("%s: write to ff91 to ff93 region %02x %02x %02x (current banks are %08x %08x %08x)\n", machine().describe_context(), m_ff91_93[0], m_ff91_93[1], m_ff91_93[2], ((m_lowerbank[0] << 8) | (m_lowerbank[1])) * 0x8000, ((m_upperbank[0] << 8) | (m_upperbank[1])) * 0x8000, ((m_iobank[0] << 8) | (m_iobank[1])) * 0x8000);
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uint16_t pointer = (m_ff91_93[1] << 8) | (m_ff91_93[2]);
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address_space& spc = m_maincpu->space(AS_PROGRAM);
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char readdat = 0x00;
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std::string textout;
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do
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{
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readdat = spc.read_byte(pointer++);
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textout.append(1, readdat);
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} while (readdat != 0x00);
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logerror("%s: DEBUG MESSAGE: %s", machine().describe_context(), textout);
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logerror("\n");
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}
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}
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void leapfrog_iquest_state::unk_ff81_84_w(offs_t offset, uint8_t data)
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{
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// these 4 values are written together, with FFA8 before and FFA9 after
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// form is usually 00 00 then 2 used values, maybe coordinates?
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// used in conjunction with unk_ff91_93_w writes above
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m_ff81_84[offset] = data;
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if (offset == 3)
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{
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logerror("%s: write to ff81 to ff84 region %02x %02x %02x %02x\n", machine().describe_context(), m_ff81_84[0], m_ff81_84[1], m_ff81_84[2], m_ff81_84[3]);
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uint16_t pointer = (m_ff81_84[2] << 8) | (m_ff81_84[3]);
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if (pointer != 0x00)
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{
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address_space& spc = m_maincpu->space(AS_PROGRAM);
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char readdat = 0x00;
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std::string textout;
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do
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{
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readdat = spc.read_byte(pointer++);
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textout.append(1, readdat);
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} while (readdat != 0x00);
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//logerror("%s: %s", machine().describe_context(), textout);
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//logerror("\n");
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}
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}
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}
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uint8_t leapfrog_iquest_state::unk_ffa8_r()
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{
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logerror("%s: read from ffa8 ----------- POSSIBLE END OF DEBUG TEXT OPERATION?\n", machine().describe_context());
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return 0x00;
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}
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void leapfrog_iquest_state::unk_ffa8_w(uint8_t data)
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{
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logerror("%s: write to ffa8 %02x ----------- POSSIBLE START OF DEBUG TEXT OPERATION?\n", machine().describe_context(), data);
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m_ffa8 = data;
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}
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void leapfrog_iquest_state::unk_ffa9_w(uint8_t data)
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{
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logerror("%s: write to ffa9 %02x ----------- POSSIBLE TRIGGER DEBUG TEXT OPERATION?? (current banks are %08x %08x %08x)\n", machine().describe_context(), data, ((m_lowerbank[0] << 8) | (m_lowerbank[1])) * 0x8000, ((m_upperbank[0] << 8) | (m_upperbank[1])) * 0x8000, ((m_iobank[0] << 8) | (m_iobank[1])) * 0x8000);
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}
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void leapfrog_iquest_state::ext_map(address_map &map)
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{
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map(0x0000, 0x7fff).rw(FUNC(leapfrog_iquest_state::iowindow_r), FUNC(leapfrog_iquest_state::iowindow_w)); // assume this accesses the same space, with different bank register
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map(0xc260, 0xc52f).ram(); // = clears 0x2d0 bytes (90*64 / 8) display buffer?
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map(0xc530, 0xc7ff).ram(); // = clears 0x2d0 bytes (90*64 / 8) display buffer?
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//map(0xf001, 0xf056).ram(); // written as a block
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map(0xf000, 0xf5ff).ram(); // ? 0xf400 - 0xf427 written as a block, other areas uncertain, might be more registers in here as there are reads too
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map(0xfc00, 0xfc00).r(FUNC(leapfrog_iquest_state::unk_fc00_r));
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map(0xfc01, 0xfc04).r(FUNC(leapfrog_iquest_state::unk_fc01_r));
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map(0xfc06, 0xfc07).rw(FUNC(leapfrog_iquest_state::lowerbank_r), FUNC(leapfrog_iquest_state::lowerbank_w)); // ROM / RAM window in main space at 0000-7fff
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map(0xfc08, 0xfc09).rw(FUNC(leapfrog_iquest_state::upperbank_r), FUNC(leapfrog_iquest_state::upperbank_w)); // ROM / RAM window in main space at 8000-ffff
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map(0xfc0a, 0xfc0b).rw(FUNC(leapfrog_iquest_state::iobank_r), FUNC(leapfrog_iquest_state::iobank_w)); // ROM / RAM window in ext space at 0000-7fff
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map(0xfc22, 0xfc22).w(FUNC(leapfrog_iquest_state::unk_fc22_w));
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map(0xfc2f, 0xfc2f).r(FUNC(leapfrog_iquest_state::unk_fc2f_r));
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map(0xfc3f, 0xfc3f).rw(FUNC(leapfrog_iquest_state::unk_fc3f_r), FUNC(leapfrog_iquest_state::unk_fc3f_w));
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map(0xfce5, 0xfce5).rw(FUNC(leapfrog_iquest_state::unk_fce5_r), FUNC(leapfrog_iquest_state::unk_fce5_w));
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map(0xff00, 0xff01).r(FUNC(leapfrog_iquest_state::unk_ff00_01_r));
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// it seems more likely that this is just RAM, as that after setting pointers in RAM, they're used to construct
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// strings to transmit over the serial.
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// however, mapping this area as RAM instead results in the program stalling much earlier, waiting for $24.3 to
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// be cleared.
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// 017658: 20 23 fd jb $24.3,$17658
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//
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//The only realistic place for this to be cleared is deep in the interrupt handler for
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// Serial Receive/Transmit
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// 010023: 02 76 9e ljmp $769E
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// (which eventually can reach)
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// 016991: c2 23 clr $24.3
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// however I'm uncertain how to get the driver to trigger this at all.
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if (0)
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{
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map(0xff80, 0xffff).ram();
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}
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else
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{
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map(0xff80, 0xff80).rw(FUNC(leapfrog_iquest_state::unk_ff80_r), FUNC(leapfrog_iquest_state::unk_ff80_w));
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map(0xff81, 0xff84).w(FUNC(leapfrog_iquest_state::unk_ff81_84_w));
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map(0xff91, 0xff93).rw(FUNC(leapfrog_iquest_state::unk_ff91_93_r), FUNC(leapfrog_iquest_state::unk_ff91_93_w));
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map(0xffa8, 0xffa8).rw(FUNC(leapfrog_iquest_state::unk_ffa8_r), FUNC(leapfrog_iquest_state::unk_ffa8_w));
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map(0xffa9, 0xffa9).w(FUNC(leapfrog_iquest_state::unk_ffa9_w));
|
||||
}
|
||||
}
|
||||
|
||||
DEVICE_IMAGE_LOAD_MEMBER(leapfrog_iquest_state::cart_load)
|
||||
@ -92,12 +461,101 @@ uint32_t leapfrog_iquest_state::screen_update(screen_device &screen, bitmap_rgb3
|
||||
return 0;
|
||||
}
|
||||
|
||||
// never triggered?
|
||||
void leapfrog_iquest_state::tx(uint8_t data)
|
||||
{
|
||||
logerror("%s: transmitting %02x\n", machine().describe_context().c_str(), data);
|
||||
}
|
||||
|
||||
// never triggered?
|
||||
uint8_t leapfrog_iquest_state::rx()
|
||||
{
|
||||
logerror("%s: receiving\n", machine().describe_context().c_str());
|
||||
return machine().rand();
|
||||
}
|
||||
|
||||
|
||||
// doesn't help?
|
||||
WRITE_LINE_MEMBER(leapfrog_iquest_state::rx_line_hack)
|
||||
{
|
||||
/*
|
||||
m_maincpu->set_input_line(MCS51_RX_LINE, ASSERT_LINE);
|
||||
m_maincpu->set_input_line(MCS51_RX_LINE, CLEAR_LINE);
|
||||
*/
|
||||
|
||||
if (0)
|
||||
{
|
||||
// HACK: force past the wait loop if we're treating ff80 - ffff as RAM
|
||||
address_space& spc = m_maincpu->space(AS_DATA);
|
||||
uint8_t readdat = spc.read_byte(0x24);
|
||||
readdat &= ~0x08;
|
||||
spc.write_byte(0x24, readdat);
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t leapfrog_iquest_state::port0_r()
|
||||
{
|
||||
logerror("%s: port0_r\n", machine().describe_context());
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
uint8_t leapfrog_iquest_state::port1_r()
|
||||
{
|
||||
logerror("%s: port1_r\n", machine().describe_context());
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
uint8_t leapfrog_iquest_state::port2_r()
|
||||
{
|
||||
logerror("%s: port2_r\n", machine().describe_context());
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
uint8_t leapfrog_iquest_state::port3_r()
|
||||
{
|
||||
logerror("%s: port3_r\n", machine().describe_context());
|
||||
return 0x00;
|
||||
}
|
||||
|
||||
void leapfrog_iquest_state::port0_w(u8 data)
|
||||
{
|
||||
logerror("%s: port0_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
void leapfrog_iquest_state::port1_w(u8 data)
|
||||
{
|
||||
logerror("%s: port1_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
void leapfrog_iquest_state::port2_w(u8 data)
|
||||
{
|
||||
logerror("%s: port2_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
void leapfrog_iquest_state::port3_w(u8 data)
|
||||
{
|
||||
logerror("%s: port3_w %02x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
|
||||
|
||||
void leapfrog_iquest_state::leapfrog_iquest(machine_config &config)
|
||||
{
|
||||
// seems to have an IRQ vector at 002b, which would suggest it's an 8052 or similar, rather than plain 8031?
|
||||
//I8052(config, m_maincpu, 96000000/10); // unknown clock
|
||||
I8032(config, m_maincpu, 96000000/10); // unknown clock
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &leapfrog_iquest_state::prog_map);
|
||||
m_maincpu->set_addrmap(AS_IO, &leapfrog_iquest_state::ext_map);
|
||||
m_maincpu->serial_tx_cb().set(FUNC(leapfrog_iquest_state::tx));
|
||||
m_maincpu->serial_rx_cb().set(FUNC(leapfrog_iquest_state::rx));
|
||||
m_maincpu->port_in_cb<0>().set(FUNC(leapfrog_iquest_state::port0_r));
|
||||
m_maincpu->port_out_cb<0>().set(FUNC(leapfrog_iquest_state::port0_w));
|
||||
m_maincpu->port_in_cb<1>().set(FUNC(leapfrog_iquest_state::port1_r));
|
||||
m_maincpu->port_out_cb<1>().set(FUNC(leapfrog_iquest_state::port1_w));
|
||||
m_maincpu->port_in_cb<2>().set(FUNC(leapfrog_iquest_state::port2_r));
|
||||
m_maincpu->port_out_cb<2>().set(FUNC(leapfrog_iquest_state::port2_w));
|
||||
m_maincpu->port_in_cb<3>().set(FUNC(leapfrog_iquest_state::port3_r));
|
||||
m_maincpu->port_out_cb<3>().set(FUNC(leapfrog_iquest_state::port3_w));
|
||||
|
||||
SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
|
||||
m_screen->set_refresh_hz(60);
|
||||
@ -105,12 +563,14 @@ void leapfrog_iquest_state::leapfrog_iquest(machine_config &config)
|
||||
m_screen->set_size(90, 64);
|
||||
m_screen->set_visarea(0, 90-1, 0, 64-1);
|
||||
m_screen->set_screen_update(FUNC(leapfrog_iquest_state::screen_update));
|
||||
//m_screen->screen_vblank().set(FUNC(leapfrog_iquest_state::screen_vblank));
|
||||
m_screen->screen_vblank().set(FUNC(leapfrog_iquest_state::rx_line_hack));
|
||||
|
||||
GENERIC_CARTSLOT(config, m_cart, generic_plain_slot, "leapfrog_iquest_cart");
|
||||
m_cart->set_width(GENERIC_ROM16_WIDTH);
|
||||
m_cart->set_device_load(FUNC(leapfrog_iquest_state::cart_load));
|
||||
|
||||
ADDRESS_MAP_BANK(config, "rombank").set_map(&leapfrog_iquest_state::rom_map).set_options(ENDIANNESS_LITTLE, 8, 31, 0x80000000);
|
||||
|
||||
SOFTWARE_LIST(config, "cart_list").set_original("leapfrog_iquest_cart");
|
||||
}
|
||||
|
||||
@ -121,4 +581,4 @@ ROM_END
|
||||
|
||||
// year, name, parent, compat, machine, input, class, init, company, fullname, flags
|
||||
// it is unknown if the versions of IQuest without 4.0 on the case have different system ROM
|
||||
CONS( 200?, iquest, 0, 0, leapfrog_iquest, leapfrog_iquest, leapfrog_iquest_state, empty_init, "LeapFrog", "IQuest 4.0 (US)", MACHINE_IS_SKELETON )
|
||||
CONS( 2004, iquest, 0, 0, leapfrog_iquest, leapfrog_iquest, leapfrog_iquest_state, empty_init, "LeapFrog", "IQuest 4.0 (US)", MACHINE_IS_SKELETON )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user