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https://github.com/holub/mame
synced 2025-04-26 18:23:08 +03:00
Fixed regression with csplayh5.c
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6265fb0c81
commit
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@ -13,8 +13,15 @@
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const device_type TMP68301 = &device_creator<tmp68301_device>;
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static ADDRESS_MAP_START( tmp68301_regs, AS_0, 16, tmp68301_device )
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// AM_RANGE(0x000,0x3ff) AM_RAM
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ADDRESS_MAP_END
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tmp68301_device::tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__)
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: device_t(mconfig, TMP68301, "TMP68301", tag, owner, clock, "tmp68301", __FILE__),
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device_memory_interface(mconfig, *this),
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m_space_config("regs", ENDIANNESS_LITTLE, 16, 10, 0, NULL, *ADDRESS_MAP_NAME(tmp68301_regs))
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{
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}
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@ -53,6 +60,37 @@ void tmp68301_device::device_reset()
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machine().firstcpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(tmp68301_device::irq_callback),this));
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}
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//-------------------------------------------------
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// memory_space_config - return a description of
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// any address spaces owned by this device
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//-------------------------------------------------
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const address_space_config *tmp68301_device::memory_space_config(address_spacenum spacenum) const
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{
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return (spacenum == AS_0) ? &m_space_config : NULL;
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}
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//**************************************************************************
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// INLINE HELPERS
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//**************************************************************************
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//-------------------------------------------------
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// read_byte - read a byte at the given address
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//-------------------------------------------------
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inline UINT16 tmp68301_device::read_word(offs_t address)
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{
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return space(AS_0).read_word(address << 1);
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}
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//-------------------------------------------------
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// write_byte - write a byte at the given address
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//-------------------------------------------------
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inline void tmp68301_device::write_word(offs_t address, UINT16 data)
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{
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space(AS_0).write_word(address << 1, data);
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}
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IRQ_CALLBACK_MEMBER(tmp68301_device::irq_callback)
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{
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@ -181,6 +219,8 @@ WRITE16_MEMBER( tmp68301_device::regs_w )
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{
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COMBINE_DATA(&m_regs[offset]);
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write_word(offset,m_regs[offset]);
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if (!ACCESSING_BITS_0_7) return;
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// logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space.device().safe_pc(),offset*2,data,mem_mask^0xffff);
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@ -1,7 +1,8 @@
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#ifndef TMP68301_H
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#define TMP68301_H
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class tmp68301_device : public device_t
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class tmp68301_device : public device_t,
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public device_memory_interface
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{
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public:
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tmp68301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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@ -21,6 +22,7 @@ protected:
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virtual void device_config_complete();
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virtual void device_start();
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virtual void device_reset();
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
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private:
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// internal state
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@ -29,12 +31,16 @@ private:
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UINT8 m_IE[3]; // 3 External Interrupt Lines
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emu_timer *m_tmp68301_timer[3]; // 3 Timers
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int m_irq_vector[8];
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UINT16 m_irq_vector[8];
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TIMER_CALLBACK_MEMBER( timer_callback );
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void update_timer( int i );
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IRQ_CALLBACK_MEMBER(irq_callback);
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void update_irq_state();
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inline UINT16 read_word(offs_t address);
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inline void write_word(offs_t address, UINT16 data);
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const address_space_config m_space_config;
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};
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extern const device_type TMP68301;
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@ -217,7 +217,7 @@ Palette functions
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/*
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About the colour burst registers:
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The color burst registers will only have effect on the composite video outputfrom
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The color burst registers will only have effect on the composite video output from
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the V9938. but the output is only NTSC (Never The Same Color ,so the
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effects are already present) . this system is not used in europe
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the european machines use a separate PAL (Phase Alternating Line) encoder
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@ -1470,14 +1470,6 @@ void v99x8_device::mode_graphic7(const pen_t *pens, _PixelType *ln, int line)
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int colour[4];
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int ind;
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/*
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pixel0 = (*data) & 8 ? pal_ind16[(*data) >> 4] : s_pal_indYJK[ind | (*data >> 3) & 30];
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pixel1 = *(data+1) & 8 ? pal_ind16[*(data+1) >> 4] : s_pal_indYJK[ind | *(data+1) >> 3) & 30];
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pixel2 = *(data+2) & 8 ? pal_ind16[*(data+2) >> 4] : s_pal_indYJK[ind | *(data+2) >> 3) & 30];
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pixel3 = *(data+3) & 8 ? pal_ind16[*(data+3) >> 4] : s_pal_indYJK[ind | *(data+3) >> 3) & 30];
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*/
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colour[0] = m_vram_space->read_byte(((nametbl_addr&1) << 16) | (nametbl_addr>>1));
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nametbl_addr++;
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colour[1] = m_vram_space->read_byte(((nametbl_addr&1) << 16) | (nametbl_addr>>1));
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@ -1653,20 +1645,22 @@ void v99x8_device::graphic7_draw_sprite(const pen_t *pens, _PixelType *ln, UINT8
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else
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ln += m_offset_x;
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for (i=0;i<256;i++)
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{
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if (col[i] & 0x80)
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for (i=0;i<256;i++)
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{
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*ln++ = pens[g7_ind16[col[i]&0x0f]];
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if (_Width > 512)
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if (col[i] & 0x80)
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{
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*ln++ = pens[g7_ind16[col[i]&0x0f]];
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}
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else
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{
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if (_Width > 512)
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ln += 2;
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if (_Width > 512)
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*ln++ = pens[g7_ind16[col[i]&0x0f]];
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}
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else
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ln++;
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{
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if (_Width > 512)
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ln += 2;
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else
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ln++;
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}
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}
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}
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}
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@ -146,9 +146,9 @@ static ADDRESS_MAP_START( csplayh5_map, AS_PROGRAM, 16, csplayh5_state )
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AM_RANGE(0x800000, 0xbfffff) AM_ROM AM_REGION("blit_gfx",0) // GFX ROM routes here
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AM_RANGE(0xc00000, 0xc7ffff) AM_RAM AM_SHARE("nvram") AM_MIRROR(0x380000) // work RAM
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AM_RANGE(0xfffc00, 0xffffff) AM_DEVREADWRITE("tmp68301", tmp68301_device, regs_r, regs_w) // TMP68301 Registers
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AM_RANGE(0xc00000, 0xc7ffff) AM_RAM AM_SHARE("nvram") AM_MIRROR(0x380000) // work RAM
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ADDRESS_MAP_END
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#if USE_H8
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@ -611,7 +611,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(csplayh5_state::csplayh5_irq)
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int scanline = param;
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if(scanline == 212*2)
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m_maincpu->set_input_line_and_vector(1, HOLD_LINE,0x100/4);
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m_tmp68301->external_interrupt_0();
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if((scanline % 2) == 0)
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{
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