mirror of
https://github.com/holub/mame
synced 2025-10-07 01:16:22 +03:00
m6805: clean up bih/bil handling
This commit is contained in:
parent
a4b3eafc7a
commit
678bed7007
@ -19,8 +19,6 @@ HNZC
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#define OP_HANDLER_BRA(name) template <bool C> void m6805_base_device::name()
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#define OP_HANDLER_BRA(name) template <bool C> void m6805_base_device::name()
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#define OP_HANDLER_MODE(name) template <m6805_base_device::addr_mode M> void m6805_base_device::name()
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#define OP_HANDLER_MODE(name) template <m6805_base_device::addr_mode M> void m6805_base_device::name()
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#define DERIVED_OP_HANDLER(arch, name) void arch##_device::name()
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OP_HANDLER( illegal )
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OP_HANDLER( illegal )
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{
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{
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@ -92,30 +90,8 @@ OP_HANDLER_BRA( bpl ) { BRANCH( !(CC & NFLAG) ); }
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OP_HANDLER_BRA( bmc ) { BRANCH( !(CC & IFLAG) ); }
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OP_HANDLER_BRA( bmc ) { BRANCH( !(CC & IFLAG) ); }
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// $2e BIL relative ----
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// $2e BIL relative ----
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OP_HANDLER( bil )
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{
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bool const C = true;
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BRANCH( m_irq_state[M6805_IRQ_LINE] != CLEAR_LINE );
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}
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DERIVED_OP_HANDLER( hd63705, bil )
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{
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bool const C = true;
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BRANCH( m_nmi_state != CLEAR_LINE );
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}
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// $2f BIH relative ----
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// $2f BIH relative ----
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OP_HANDLER( bih )
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OP_HANDLER_BRA( bil ) { BRANCH( test_il() ); }
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{
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bool const C = false;
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BRANCH( m_irq_state[M6805_IRQ_LINE] != CLEAR_LINE );
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}
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DERIVED_OP_HANDLER( hd63705, bih )
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{
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bool const C = false;
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BRANCH( m_nmi_state != CLEAR_LINE );
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}
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// $30 NEG direct -***
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// $30 NEG direct -***
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// $60 NEG indexed, 1 byte offset -***
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// $60 NEG indexed, 1 byte offset -***
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@ -58,7 +58,7 @@ const m6805_base_device::op_handler_table m6805_base_device::s_hmos_ops =
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/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
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/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
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OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
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OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
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/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
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/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
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OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP(bil), OP(bih),
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OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP_T(bil), OP_F(bil),
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/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
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/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
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OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
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OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
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/* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
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/* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
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@ -95,7 +95,7 @@ const m6805_base_device::op_handler_table m6805_base_device::s_cmos_ops =
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/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
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/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
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OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
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OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
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/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
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/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
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OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP(bil), OP(bih),
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OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP_T(bil), OP_F(bil),
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/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
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/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
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OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
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OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
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/* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
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/* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
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@ -132,7 +132,7 @@ const m6805_base_device::op_handler_table m6805_base_device::s_hc_ops =
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/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
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/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
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OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
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OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
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/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
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/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
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OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP(bil), OP(bih),
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OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP_T(bil), OP_F(bil),
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/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
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/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
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OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
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OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
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/* 4 */ OP(nega), OP(illegal), OP(mul), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
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/* 4 */ OP(nega), OP(illegal), OP(mul), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
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@ -294,7 +294,7 @@ void m6805_base_device::device_start()
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save_item(NAME(m_irq_state));
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save_item(NAME(m_irq_state));
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save_item(NAME(m_nmi_state));
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save_item(NAME(m_nmi_state));
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std::fill(std::begin(m_irq_state), std::end(m_irq_state), 0);
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std::fill(std::begin(m_irq_state), std::end(m_irq_state), CLEAR_LINE);
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}
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}
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void m6805_base_device::device_reset()
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void m6805_base_device::device_reset()
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@ -358,6 +358,11 @@ void m6805_base_device::state_string_export(const device_state_entry &entry, std
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}
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}
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bool m6805_base_device::test_il()
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{
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return CLEAR_LINE != m_irq_state[M6805_IRQ_LINE];
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}
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void m6805_base_device::interrupt_vector()
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void m6805_base_device::interrupt_vector()
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{
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{
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rm16(0xfffa, m_pc);
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rm16(0xfffa, m_pc);
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@ -370,7 +375,7 @@ void m6805_base_device::interrupt()
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/* pending_interrupts until the interrupt is taken, no matter what the */
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/* pending_interrupts until the interrupt is taken, no matter what the */
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/* external IRQ pin does. */
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/* external IRQ pin does. */
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if ((m_pending_interrupts & (1 << HD63705_INT_NMI)) != 0)
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if (BIT(m_pending_interrupts, HD63705_INT_NMI))
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{
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{
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pushword(m_pc);
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pushword(m_pc);
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pushbyte(m_x);
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pushbyte(m_x);
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@ -529,19 +534,16 @@ void m6805_base_device::execute_run()
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while (m_icount > 0);
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while (m_icount > 0);
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}
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}
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void m6805_base_device::execute_set_input(int inputnum, int state)
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void m6805_device::execute_set_input(int inputnum, int state)
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{
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{
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/* Basic 6805 only has one IRQ line */
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// Basic 6805 only has one IRQ line
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/* See HD63705 specific version */
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// See HD63705 specific version
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if (m_irq_state[0] != state)
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if (m_irq_state[inputnum] != state)
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{
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{
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m_irq_state[0] = state;
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m_irq_state[inputnum] = (ASSERT_LINE == state) ? ASSERT_LINE : CLEAR_LINE;
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if (state != CLEAR_LINE)
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if (CLEAR_LINE != state)
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{
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m_pending_interrupts |= (1 << inputnum);
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m_pending_interrupts |= 1 << M6805_IRQ_LINE;
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}
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}
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}
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}
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}
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@ -584,32 +586,19 @@ void m68hc05eg_device::device_reset()
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rm16(0x1ffe, m_pc);
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rm16(0x1ffe, m_pc);
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}
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}
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void m68hc05eg_device::execute_set_input(int inputnum, int state)
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{
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if (m_irq_state[inputnum] != state)
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{
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m_irq_state[inputnum] = state;
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if (state != CLEAR_LINE)
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{
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m_pending_interrupts |= 1 << inputnum;
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}
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}
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}
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void m68hc05eg_device::interrupt_vector()
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void m68hc05eg_device::interrupt_vector()
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{
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{
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if ((m_pending_interrupts & (1 << M68HC05EG_INT_IRQ)) != 0)
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if (BIT(m_pending_interrupts, M68HC05EG_INT_IRQ))
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{
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{
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m_pending_interrupts &= ~(1 << M68HC05EG_INT_IRQ);
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m_pending_interrupts &= ~(1 << M68HC05EG_INT_IRQ);
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rm16(0x1ffa, m_pc);
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rm16(0x1ffa, m_pc);
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}
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}
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else if((m_pending_interrupts & (1 << M68HC05EG_INT_TIMER)) != 0)
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else if (BIT(m_pending_interrupts, M68HC05EG_INT_TIMER))
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{
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{
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m_pending_interrupts &= ~(1 << M68HC05EG_INT_TIMER);
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m_pending_interrupts &= ~(1 << M68HC05EG_INT_TIMER);
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rm16(0x1ff8, m_pc);
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rm16(0x1ff8, m_pc);
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}
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}
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else if((m_pending_interrupts & (1 << M68HC05EG_INT_CPI)) != 0)
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else if (BIT(m_pending_interrupts, M68HC05EG_INT_CPI))
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{
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{
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m_pending_interrupts &= ~(1 << M68HC05EG_INT_CPI);
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m_pending_interrupts &= ~(1 << M68HC05EG_INT_CPI);
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rm16(0x1ff6, m_pc);
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rm16(0x1ff6, m_pc);
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@ -117,7 +117,7 @@ protected:
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virtual uint32_t execute_max_cycles() const override;
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virtual uint32_t execute_max_cycles() const override;
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virtual uint32_t execute_input_lines() const override;
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virtual uint32_t execute_input_lines() const override;
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virtual void execute_run() override;
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override = 0;
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virtual void execute_set_input(int inputnum, int state) override;
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virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override;
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virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override;
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virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override;
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virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override;
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@ -181,8 +181,7 @@ protected:
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template <bool C> void bhcc();
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template <bool C> void bhcc();
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template <bool C> void bpl();
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template <bool C> void bpl();
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template <bool C> void bmc();
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template <bool C> void bmc();
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virtual void bil();
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template <bool C> void bil();
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virtual void bih();
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void bsr();
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void bsr();
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template <addr_mode M> void neg();
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template <addr_mode M> void neg();
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@ -260,6 +259,7 @@ protected:
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virtual void interrupt();
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virtual void interrupt();
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virtual void interrupt_vector();
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virtual void interrupt_vector();
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virtual bool test_il();
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configuration_params const m_params;
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configuration_params const m_params;
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@ -296,9 +296,6 @@ class m6805_device : public m6805_base_device
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public:
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public:
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// construction/destruction
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// construction/destruction
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m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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protected:
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virtual void execute_set_input(int inputnum, int state) override;
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};
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};
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@ -314,8 +311,6 @@ protected:
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// device-level overrides
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// device-level overrides
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virtual void device_reset() override;
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virtual void device_reset() override;
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virtual void execute_set_input(int inputnum, int state) override;
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virtual void interrupt_vector() override;
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virtual void interrupt_vector() override;
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};
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};
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@ -334,10 +329,7 @@ protected:
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virtual void execute_set_input(int inputnum, int state) override;
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virtual void execute_set_input(int inputnum, int state) override;
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virtual void interrupt_vector() override;
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virtual void interrupt_vector() override;
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virtual bool test_il() override { return m_nmi_state != CLEAR_LINE; }
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// opcodes
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virtual void bil() override;
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virtual void bih() override;
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};
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};
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#define M6805_IRQ_LINE 0
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#define M6805_IRQ_LINE 0
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@ -591,6 +591,11 @@ void m68hc05_device::interrupt()
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}
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}
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}
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}
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bool m68hc05_device::test_il()
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{
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return m_irq_line_state;
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}
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void m68hc05_device::burn_cycles(unsigned count)
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void m68hc05_device::burn_cycles(unsigned count)
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{
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{
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// calculate new timer values (fixed prescaler of four)
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// calculate new timer values (fixed prescaler of four)
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@ -149,6 +149,7 @@ protected:
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u32 options) override;
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u32 options) override;
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virtual void interrupt() override;
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virtual void interrupt() override;
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virtual bool test_il() override;
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virtual void burn_cycles(unsigned count) override;
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virtual void burn_cycles(unsigned count) override;
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void add_port_state(std::array<bool, PORT_COUNT> const &ddr);
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void add_port_state(std::array<bool, PORT_COUNT> const &ddr);
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