m6805: clean up bih/bil handling

This commit is contained in:
Vas Crabb 2017-02-10 11:18:04 +11:00
parent a4b3eafc7a
commit 678bed7007
5 changed files with 31 additions and 68 deletions

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@ -19,8 +19,6 @@ HNZC
#define OP_HANDLER_BRA(name) template <bool C> void m6805_base_device::name() #define OP_HANDLER_BRA(name) template <bool C> void m6805_base_device::name()
#define OP_HANDLER_MODE(name) template <m6805_base_device::addr_mode M> void m6805_base_device::name() #define OP_HANDLER_MODE(name) template <m6805_base_device::addr_mode M> void m6805_base_device::name()
#define DERIVED_OP_HANDLER(arch, name) void arch##_device::name()
OP_HANDLER( illegal ) OP_HANDLER( illegal )
{ {
@ -92,30 +90,8 @@ OP_HANDLER_BRA( bpl ) { BRANCH( !(CC & NFLAG) ); }
OP_HANDLER_BRA( bmc ) { BRANCH( !(CC & IFLAG) ); } OP_HANDLER_BRA( bmc ) { BRANCH( !(CC & IFLAG) ); }
// $2e BIL relative ---- // $2e BIL relative ----
OP_HANDLER( bil )
{
bool const C = true;
BRANCH( m_irq_state[M6805_IRQ_LINE] != CLEAR_LINE );
}
DERIVED_OP_HANDLER( hd63705, bil )
{
bool const C = true;
BRANCH( m_nmi_state != CLEAR_LINE );
}
// $2f BIH relative ---- // $2f BIH relative ----
OP_HANDLER( bih ) OP_HANDLER_BRA( bil ) { BRANCH( test_il() ); }
{
bool const C = false;
BRANCH( m_irq_state[M6805_IRQ_LINE] != CLEAR_LINE );
}
DERIVED_OP_HANDLER( hd63705, bih )
{
bool const C = false;
BRANCH( m_nmi_state != CLEAR_LINE );
}
// $30 NEG direct -*** // $30 NEG direct -***
// $60 NEG indexed, 1 byte offset -*** // $60 NEG indexed, 1 byte offset -***

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@ -58,7 +58,7 @@ const m6805_base_device::op_handler_table m6805_base_device::s_hmos_ops =
/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>), /* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>), OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne), /* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP(bil), OP(bih), OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP_T(bil), OP_F(bil),
/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr), /* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr), OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
/* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra), /* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
@ -95,7 +95,7 @@ const m6805_base_device::op_handler_table m6805_base_device::s_cmos_ops =
/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>), /* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>), OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne), /* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP(bil), OP(bih), OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP_T(bil), OP_F(bil),
/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr), /* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr), OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
/* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra), /* 4 */ OP(nega), OP(illegal), OP(illegal), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
@ -132,7 +132,7 @@ const m6805_base_device::op_handler_table m6805_base_device::s_hc_ops =
/* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>), /* 1 */ OP(bset<0>), OP(bclr<0>), OP(bset<1>), OP(bclr<1>), OP(bset<2>), OP(bclr<2>), OP(bset<3>), OP(bclr<3>),
OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>), OP(bset<4>), OP(bclr<4>), OP(bset<5>), OP(bclr<5>), OP(bset<6>), OP(bclr<6>), OP(bset<7>), OP(bclr<7>),
/* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne), /* 2 */ OP_T(bra), OP_F(bra), OP_T(bhi), OP_F(bhi), OP_T(bcc), OP_F(bcc), OP_T(bne), OP_F(bne),
OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP(bil), OP(bih), OP_T(bhcc), OP_F(bhcc), OP_T(bpl), OP_F(bpl), OP_T(bmc), OP_F(bmc), OP_T(bil), OP_F(bil),
/* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr), /* 3 */ OP_DI(neg), OP(illegal), OP(illegal), OP_DI(com), OP_DI(lsr), OP(illegal), OP_DI(ror), OP_DI(asr),
OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr), OP_DI(lsl), OP_DI(rol), OP_DI(dec), OP(illegal), OP_DI(inc), OP_DI(tst), OP(illegal), OP_DI(clr),
/* 4 */ OP(nega), OP(illegal), OP(mul), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra), /* 4 */ OP(nega), OP(illegal), OP(mul), OP(coma), OP(lsra), OP(illegal), OP(rora), OP(asra),
@ -294,7 +294,7 @@ void m6805_base_device::device_start()
save_item(NAME(m_irq_state)); save_item(NAME(m_irq_state));
save_item(NAME(m_nmi_state)); save_item(NAME(m_nmi_state));
std::fill(std::begin(m_irq_state), std::end(m_irq_state), 0); std::fill(std::begin(m_irq_state), std::end(m_irq_state), CLEAR_LINE);
} }
void m6805_base_device::device_reset() void m6805_base_device::device_reset()
@ -358,6 +358,11 @@ void m6805_base_device::state_string_export(const device_state_entry &entry, std
} }
bool m6805_base_device::test_il()
{
return CLEAR_LINE != m_irq_state[M6805_IRQ_LINE];
}
void m6805_base_device::interrupt_vector() void m6805_base_device::interrupt_vector()
{ {
rm16(0xfffa, m_pc); rm16(0xfffa, m_pc);
@ -370,7 +375,7 @@ void m6805_base_device::interrupt()
/* pending_interrupts until the interrupt is taken, no matter what the */ /* pending_interrupts until the interrupt is taken, no matter what the */
/* external IRQ pin does. */ /* external IRQ pin does. */
if ((m_pending_interrupts & (1 << HD63705_INT_NMI)) != 0) if (BIT(m_pending_interrupts, HD63705_INT_NMI))
{ {
pushword(m_pc); pushword(m_pc);
pushbyte(m_x); pushbyte(m_x);
@ -529,19 +534,16 @@ void m6805_base_device::execute_run()
while (m_icount > 0); while (m_icount > 0);
} }
void m6805_base_device::execute_set_input(int inputnum, int state)
void m6805_device::execute_set_input(int inputnum, int state)
{ {
/* Basic 6805 only has one IRQ line */ // Basic 6805 only has one IRQ line
/* See HD63705 specific version */ // See HD63705 specific version
if (m_irq_state[0] != state) if (m_irq_state[inputnum] != state)
{ {
m_irq_state[0] = state; m_irq_state[inputnum] = (ASSERT_LINE == state) ? ASSERT_LINE : CLEAR_LINE;
if (state != CLEAR_LINE) if (CLEAR_LINE != state)
{ m_pending_interrupts |= (1 << inputnum);
m_pending_interrupts |= 1 << M6805_IRQ_LINE;
}
} }
} }
@ -584,32 +586,19 @@ void m68hc05eg_device::device_reset()
rm16(0x1ffe, m_pc); rm16(0x1ffe, m_pc);
} }
void m68hc05eg_device::execute_set_input(int inputnum, int state)
{
if (m_irq_state[inputnum] != state)
{
m_irq_state[inputnum] = state;
if (state != CLEAR_LINE)
{
m_pending_interrupts |= 1 << inputnum;
}
}
}
void m68hc05eg_device::interrupt_vector() void m68hc05eg_device::interrupt_vector()
{ {
if ((m_pending_interrupts & (1 << M68HC05EG_INT_IRQ)) != 0) if (BIT(m_pending_interrupts, M68HC05EG_INT_IRQ))
{ {
m_pending_interrupts &= ~(1 << M68HC05EG_INT_IRQ); m_pending_interrupts &= ~(1 << M68HC05EG_INT_IRQ);
rm16(0x1ffa, m_pc); rm16(0x1ffa, m_pc);
} }
else if((m_pending_interrupts & (1 << M68HC05EG_INT_TIMER)) != 0) else if (BIT(m_pending_interrupts, M68HC05EG_INT_TIMER))
{ {
m_pending_interrupts &= ~(1 << M68HC05EG_INT_TIMER); m_pending_interrupts &= ~(1 << M68HC05EG_INT_TIMER);
rm16(0x1ff8, m_pc); rm16(0x1ff8, m_pc);
} }
else if((m_pending_interrupts & (1 << M68HC05EG_INT_CPI)) != 0) else if (BIT(m_pending_interrupts, M68HC05EG_INT_CPI))
{ {
m_pending_interrupts &= ~(1 << M68HC05EG_INT_CPI); m_pending_interrupts &= ~(1 << M68HC05EG_INT_CPI);
rm16(0x1ff6, m_pc); rm16(0x1ff6, m_pc);

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@ -117,7 +117,7 @@ protected:
virtual uint32_t execute_max_cycles() const override; virtual uint32_t execute_max_cycles() const override;
virtual uint32_t execute_input_lines() const override; virtual uint32_t execute_input_lines() const override;
virtual void execute_run() override; virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override = 0; virtual void execute_set_input(int inputnum, int state) override;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override; virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const override;
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override; virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const override;
@ -181,8 +181,7 @@ protected:
template <bool C> void bhcc(); template <bool C> void bhcc();
template <bool C> void bpl(); template <bool C> void bpl();
template <bool C> void bmc(); template <bool C> void bmc();
virtual void bil(); template <bool C> void bil();
virtual void bih();
void bsr(); void bsr();
template <addr_mode M> void neg(); template <addr_mode M> void neg();
@ -260,6 +259,7 @@ protected:
virtual void interrupt(); virtual void interrupt();
virtual void interrupt_vector(); virtual void interrupt_vector();
virtual bool test_il();
configuration_params const m_params; configuration_params const m_params;
@ -296,9 +296,6 @@ class m6805_device : public m6805_base_device
public: public:
// construction/destruction // construction/destruction
m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
virtual void execute_set_input(int inputnum, int state) override;
}; };
@ -314,8 +311,6 @@ protected:
// device-level overrides // device-level overrides
virtual void device_reset() override; virtual void device_reset() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual void interrupt_vector() override; virtual void interrupt_vector() override;
}; };
@ -334,10 +329,7 @@ protected:
virtual void execute_set_input(int inputnum, int state) override; virtual void execute_set_input(int inputnum, int state) override;
virtual void interrupt_vector() override; virtual void interrupt_vector() override;
virtual bool test_il() override { return m_nmi_state != CLEAR_LINE; }
// opcodes
virtual void bil() override;
virtual void bih() override;
}; };
#define M6805_IRQ_LINE 0 #define M6805_IRQ_LINE 0

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@ -591,6 +591,11 @@ void m68hc05_device::interrupt()
} }
} }
bool m68hc05_device::test_il()
{
return m_irq_line_state;
}
void m68hc05_device::burn_cycles(unsigned count) void m68hc05_device::burn_cycles(unsigned count)
{ {
// calculate new timer values (fixed prescaler of four) // calculate new timer values (fixed prescaler of four)

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@ -149,6 +149,7 @@ protected:
u32 options) override; u32 options) override;
virtual void interrupt() override; virtual void interrupt() override;
virtual bool test_il() override;
virtual void burn_cycles(unsigned count) override; virtual void burn_cycles(unsigned count) override;
void add_port_state(std::array<bool, PORT_COUNT> const &ddr); void add_port_state(std::array<bool, PORT_COUNT> const &ddr);