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https://github.com/holub/mame
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(MESS) trs80.c: Reduce tagmap lookups (nw)
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c3f9ddba8a
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@ -33,7 +33,8 @@ public:
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m_fdc(*this, "wd179x"),
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m_speaker(*this, SPEAKER_TAG),
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m_cass(*this, CASSETTE_TAG),
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m_p_videoram(*this, "p_videoram")
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m_p_videoram(*this, "p_videoram"),
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m_region_maincpu(*this, "maincpu")
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{ }
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required_device<cpu_device> m_maincpu;
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@ -126,6 +127,11 @@ public:
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INTERRUPT_GEN_MEMBER(trs80_fdc_interrupt);
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TIMER_CALLBACK_MEMBER(cassette_data_callback);
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DECLARE_WRITE_LINE_MEMBER(trs80_fdc_intrq_w);
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protected:
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required_memory_region m_region_maincpu;
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void trs80_fdc_interrupt_internal();
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};
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@ -37,7 +37,7 @@ TIMER_CALLBACK_MEMBER(trs80_state::cassette_data_callback)
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{
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m_cassette_data = 0;
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m_irq |= CASS_FALL;
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machine().device("maincpu")->execute().set_input_line(0, HOLD_LINE);
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m_maincpu->set_input_line(0, HOLD_LINE);
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}
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}
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else
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@ -47,7 +47,7 @@ TIMER_CALLBACK_MEMBER(trs80_state::cassette_data_callback)
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{
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m_cassette_data = 1;
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m_irq |= CASS_RISE;
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machine().device("maincpu")->execute().set_input_line(0, HOLD_LINE);
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m_maincpu->set_input_line(0, HOLD_LINE);
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}
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}
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@ -78,7 +78,7 @@ READ8_MEMBER( trs80_state::trs80m4_e0_r )
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d1 Cass 1500 baud Falling
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d0 Cass 1500 baud Rising */
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machine().device("maincpu")->execute().set_input_line(0, CLEAR_LINE);
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m_maincpu->set_input_line(0, CLEAR_LINE);
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return ~(m_mask & m_irq);
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}
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@ -94,7 +94,7 @@ READ8_MEMBER( trs80_state::trs80m4_e4_r )
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d6 status of Motor Timeout (0=true)
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d5 status of Reset signal (0=true - this will reboot the computer) */
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machine().device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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return ~(m_nmi_mask & m_nmi_data);
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}
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@ -216,7 +216,7 @@ WRITE8_MEMBER( trs80_state::trs80m4_84_w )
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/* get address space instead of io space */
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address_space &mem = m_maincpu->space(AS_PROGRAM);
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UINT8 *base = memregion("maincpu")->base();
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UINT8 *base = m_region_maincpu->base();
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m_mode = (m_mode & 0x73) | (data & 0x8c);
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@ -361,10 +361,10 @@ WRITE8_MEMBER( trs80_state::trs80m4p_9c_w ) /* model 4P only - swaps the ROM
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switch (m_model4 & 8)
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{
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case 0: /* Read-only RAM replaces rom */
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membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x10000);
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membank("bank1")->set_base(m_region_maincpu->base() + 0x10000);
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break;
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case 8: /* Normal setup - rom enabled */
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membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
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membank("bank1")->set_base(m_region_maincpu->base());
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break;
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}
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}
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@ -572,7 +572,7 @@ WRITE8_MEMBER( trs80_state::lnw80_fe_w )
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{
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mem.unmap_readwrite (0x0000, 0x3fff);
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mem.install_read_bank (0x0000, 0x2fff, "bank1");
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membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base());
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membank("bank1")->set_base(m_region_maincpu->base());
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mem.install_readwrite_handler (0x37e0, 0x37e3, read8_delegate(FUNC(trs80_state::trs80_irq_status_r), this), write8_delegate(FUNC(trs80_state::trs80_motor_w), this));
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mem.install_readwrite_handler (0x37e8, 0x37eb, read8_delegate(FUNC(trs80_state::trs80_printer_r), this), write8_delegate(FUNC(trs80_state::trs80_printer_w), this));
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mem.install_read_handler (0x37ec, 0x37ec, read8_delegate(FUNC(trs80_state::trs80_wd179x_r), this));
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@ -643,34 +643,33 @@ INTERRUPT_GEN_MEMBER(trs80_state::trs80_rtc_interrupt)
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}
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}
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static void trs80_fdc_interrupt_internal(running_machine &machine)
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void trs80_state::trs80_fdc_interrupt_internal()
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{
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trs80_state *state = machine.driver_data<trs80_state>();
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if (state->m_model4)
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if (m_model4)
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{
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if (state->m_nmi_mask & 0x80) // Model 4 does a NMI
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if (m_nmi_mask & 0x80) // Model 4 does a NMI
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{
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state->m_nmi_data = 0x80;
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machine.device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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m_nmi_data = 0x80;
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m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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}
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}
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else // Model 1 does a IRQ
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{
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state->m_irq |= IRQ_M1_FDC;
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machine.device("maincpu")->execute().set_input_line(0, HOLD_LINE);
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m_irq |= IRQ_M1_FDC;
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m_maincpu->set_input_line(0, HOLD_LINE);
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}
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}
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INTERRUPT_GEN_MEMBER(trs80_state::trs80_fdc_interrupt)/* not used - should it be? */
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{
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trs80_fdc_interrupt_internal(machine());
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trs80_fdc_interrupt_internal();
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}
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WRITE_LINE_MEMBER(trs80_state::trs80_fdc_intrq_w)
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{
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if (state)
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{
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trs80_fdc_interrupt_internal(machine());
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trs80_fdc_interrupt_internal();
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}
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else
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{
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@ -748,7 +747,7 @@ READ8_MEMBER( trs80_state::trs80_irq_status_r )
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which is dealt with by the DOS. We take the opportunity to reset the cpu INT line. */
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int result = m_irq;
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machine().device("maincpu")->execute().set_input_line(0, CLEAR_LINE);
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m_maincpu->set_input_line(0, CLEAR_LINE);
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m_irq = 0;
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return result;
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}
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