mirror of
https://github.com/holub/mame
synced 2025-04-20 15:32:45 +03:00
chihiro.c: lets' start playing with usb. Also added two new chihiro debug commands dump_timer and dump_dpc to show the contents of the _KTIMER and _KDPC kernel structures. (nw)
Usb is disabled by default (to allow loading the game), uncomment the USB_ENABLED define to enable it.
This commit is contained in:
yz70s
parent
bc445d85bf
commit
67f292241d
@ -376,6 +376,7 @@ Thanks to Alex, Mr Mudkips, and Philip Burke for this info.
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#define LOG_PCI
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//#define LOG_OHCI
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//#define LOG_BASEBOARD
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//#define USB_ENABLED
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class chihiro_state : public driver_device
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{
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@ -410,6 +411,10 @@ public:
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int smbus_pic16lc(int command, int rw, int data);
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int smbus_cx25871(int command, int rw, int data);
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int smbus_eeprom(int command, int rw, int data);
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void usb_ohci_interrupts();
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void usb_ohci_read_endpoint_descriptor(UINT32 address);
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void usb_ohci_read_transfer_descriptor(UINT32 address);
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void usb_ohci_read_isochronous_transfer_descriptor(UINT32 address);
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void baseboard_ide_event(int type, UINT8 *read, UINT8 *write);
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UINT8 *baseboard_ide_dimmboard(UINT32 lba);
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void dword_write_le(UINT8 *addr, UINT32 d);
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@ -426,6 +431,7 @@ public:
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DECLARE_WRITE_LINE_MEMBER(chihiro_pit8254_out2_changed);
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IRQ_CALLBACK_MEMBER(irq_callback);
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TIMER_CALLBACK_MEMBER(audio_apu_timer);
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TIMER_CALLBACK_MEMBER(usb_ohci_timer);
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struct chihiro_devices {
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pic8259_device *pic8259_1;
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@ -468,6 +474,49 @@ public:
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UINT32 mixer_regs[0x80 / 4];
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UINT32 controller_regs[0x38 / 4];
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} ac97st;
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struct ohci_state {
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UINT32 hc_regs[255];
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int ports[4 + 1];
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emu_timer *timer;
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int state;
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UINT32 framenumber;
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address_space *space;
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struct {
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int mps; // MaximumPacketSize
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int f; // Format
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int k; // sKip
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int s; // Speed
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int d; // Direction
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int en; // EndpointNumber
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int fa; // FunctionAddress
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UINT32 tailp; // TDQueueTailPointer
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UINT32 headp; // TDQueueHeadPointer
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UINT32 nexted; // NextED
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int c; // toggleCarry
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int h; // Halted
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} endpoint_descriptor;
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struct {
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int cc; // ConditionCode
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int ec; // ErrorCount
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int t; // DataToggle
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int di; // DelayInterrupt
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int dp; // Direction/PID
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int r; // bufferRounding
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UINT32 cbp; // CurrentBufferPointer
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UINT32 nexttd; // NextTD
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UINT32 be; // BufferEnd
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} transfer_descriptor;
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struct {
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int cc; // ConditionCode
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int fc; // FrameCount
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int di; // DelayInterrupt
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int sf; // StartingFrame
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UINT32 bp0; // BufferPage0
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UINT32 nexttd; // NextTD
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UINT32 be; // BufferEnd
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UINT32 offset[8]; // Offset/PacketStatusWord
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} isochronous_transfer_descriptor;
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} ohcist;
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UINT8 pic16lc_buffer[0xff];
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nv2a_renderer *nvidia_nv2a;
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bool debug_irq_active;
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@ -477,6 +526,50 @@ public:
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int usbhack_index;
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int usbhack_counter;
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required_device<cpu_device> m_maincpu;
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enum OHCIRegisters {
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HcRevision=0,
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HcControl,
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HcCommandStatus,
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HcInterruptStatus,
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HcInterruptEnable,
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HcInterruptDisable,
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HcHCCA,
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HcPeriodCurrentED,
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HcControlHeadED,
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HcControlCurrentED,
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HcBulkHeadED,
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HcBulkCurrentED,
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HcDoneHead,
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HcFmInterval,
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HcFmRemaining,
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HcFmNumber,
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HcPeriodicStart,
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HcLSThreshold,
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HcRhDescriptorA,
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HcRhDescriptorB,
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HcRhStatus,
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HcRhPortStatus0
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};
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enum OHCIHostControllerFunctionalState {
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UsbReset=0,
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UsbResume,
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UsbOperational,
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UsbSuspend
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};
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enum OHCIInterrupt {
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SchedulingOverrun=1,
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WritebackDoneHead=2,
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StartofFrame=4,
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ResumeDetected=8,
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UnrecoverableError=16,
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FrameNumberOverflow=32,
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RootHubStatusChange=64,
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OwnershipChange=0x40000000,
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MasterInterruptEnable=0x80000000
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};
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};
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/* jamtable instructions for Chihiro (different from console)
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@ -721,6 +814,62 @@ static void dump_list_command(running_machine &machine, int ref, int params, con
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}
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}
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static void dump_dpc_command(running_machine &machine, int ref, int params, const char **param)
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{
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chihiro_state *state = machine.driver_data<chihiro_state>();
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address_space &space = state->m_maincpu->space();
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UINT64 addr;
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offs_t address;
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if (params < 1)
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return;
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if (!debug_command_parameter_number(machine, param[0], &addr))
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return;
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address = (offs_t)addr;
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if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
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{
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debug_console_printf(machine, "Address is unmapped.\n");
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return;
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}
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debug_console_printf(machine, "Type %d word\n", space.read_word_unaligned(address));
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debug_console_printf(machine, "Inserted %d byte\n", space.read_byte(address + 2));
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debug_console_printf(machine, "Padding %d byte\n", space.read_byte(address + 3));
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debug_console_printf(machine, "DpcListEntry {%08X,%08X} _LIST_ENTRY\n", space.read_dword_unaligned(address + 4), space.read_dword_unaligned(address + 8));
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debug_console_printf(machine, "DeferredRoutine %08X dword\n", space.read_dword_unaligned(address + 12));
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debug_console_printf(machine, "DeferredContext %08X dword\n", space.read_dword_unaligned(address + 16));
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debug_console_printf(machine, "SystemArgument1 %08X dword\n", space.read_dword_unaligned(address + 20));
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debug_console_printf(machine, "SystemArgument2 %08X dword\n", space.read_dword_unaligned(address + 24));
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}
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static void dump_timer_command(running_machine &machine, int ref, int params, const char **param)
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{
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chihiro_state *state = machine.driver_data<chihiro_state>();
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address_space &space = state->m_maincpu->space();
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UINT64 addr;
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offs_t address;
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if (params < 1)
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return;
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if (!debug_command_parameter_number(machine, param[0], &addr))
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return;
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address = (offs_t)addr;
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if (!debug_cpu_translate(space, TRANSLATE_READ_DEBUG, &address))
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{
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debug_console_printf(machine, "Address is unmapped.\n");
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return;
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}
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debug_console_printf(machine, "Header.Type %d byte\n", space.read_byte(address));
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debug_console_printf(machine, "Header.Absolute %d byte\n", space.read_byte(address + 1));
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debug_console_printf(machine, "Header.Size %d byte\n", space.read_byte(address + 2));
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debug_console_printf(machine, "Header.Inserted %d byte\n", space.read_byte(address + 3));
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debug_console_printf(machine, "Header.SignalState %08X dword\n", space.read_dword_unaligned(address + 4));
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debug_console_printf(machine, "Header.WaitListEntry {%08X,%08X} _LIST_ENTRY\n", space.read_dword_unaligned(address + 8), space.read_dword_unaligned(address + 12));
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debug_console_printf(machine, "DueTime %I64d qword\n", (INT64)space.read_qword_unaligned(address + 16));
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debug_console_printf(machine, "TimerListEntry {%08X,%08X} _LIST_ENTRY\n", space.read_dword_unaligned(address + 24), space.read_dword_unaligned(address + 28));
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debug_console_printf(machine, "Dpc %08X dword\n", space.read_dword_unaligned(address + 32));
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debug_console_printf(machine, "Period %d dword\n", space.read_dword_unaligned(address + 36));
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}
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static void curthread_command(running_machine &machine, int ref, int params, const char **param)
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{
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chihiro_state *state = machine.driver_data<chihiro_state>();
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@ -878,6 +1027,8 @@ static void help_command(running_machine &machine, int ref, int params, const ch
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debug_console_printf(machine, " chihiro dump_string,<address> -- Dump _STRING object at <address>\n");
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debug_console_printf(machine, " chihiro dump_process,<address> -- Dump _PROCESS object at <address>\n");
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debug_console_printf(machine, " chihiro dump_list,<address>[,<offset>] -- Dump _LIST_ENTRY chain starting at <address>\n");
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debug_console_printf(machine, " chihiro dump_dpc,<address> -- Dump _KDPC object at <address>\n");
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debug_console_printf(machine, " chihiro dump_timer,<address> -- Dump _KTIMER object at <address>\n");
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debug_console_printf(machine, " chihiro curthread -- Print information about current thread\n");
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debug_console_printf(machine, " chihiro irq,<number> -- Generate interrupt with irq number 0-15\n");
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debug_console_printf(machine, " chihiro nv2a_combiners -- Toggle use of register combiners\n");
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@ -900,6 +1051,10 @@ static void chihiro_debug_commands(running_machine &machine, int ref, int params
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dump_process_command(machine, ref, params - 1, param + 1);
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else if (strcmp("dump_list", param[0]) == 0)
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dump_list_command(machine, ref, params - 1, param + 1);
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else if (strcmp("dump_dpc", param[0]) == 0)
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dump_dpc_command(machine, ref, params - 1, param + 1);
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else if (strcmp("dump_timer", param[0]) == 0)
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dump_timer_command(machine, ref, params - 1, param + 1);
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else if (strcmp("curthread", param[0]) == 0)
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curthread_command(machine, ref, params - 1, param + 1);
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else if (strcmp("irq", param[0]) == 0)
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@ -1022,7 +1177,7 @@ static void geforce_pci_w(device_t *busdevice, device_t *device, int function, i
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}
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/*
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* ohci usb controller placeholder
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* ohci usb controller (placeholder for now)
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*/
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#ifdef LOG_OHCI
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@ -1063,9 +1218,20 @@ static const struct {
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READ32_MEMBER(chihiro_state::usbctrl_r)
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{
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int a, p;
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UINT32 ret;
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#ifdef LOG_OHCI
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if (offset >= 0x54 / 4)
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logerror("usb controller 0 register HcRhPortStatus[%d] read\n", (offset - 0x54 / 4) + 1);
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else
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logerror("usb controller 0 register %s read\n", usbregnames[offset]);
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#endif
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ret=ohcist.hc_regs[offset];
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if (offset == 0) { /* hacks needed until usb (and jvs) is implemented */
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#ifdef USB_ENABLED
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#else
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int p;
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if (usbhack_counter == 0)
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p = 0;
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else if (usbhack_counter == 1) // after game loaded
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@ -1073,31 +1239,198 @@ READ32_MEMBER(chihiro_state::usbctrl_r)
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else
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p = -1;
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if (p >= 0) {
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for (a = 0; a < 16; a++) {
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for (int a = 0; a < 16; a++) {
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if (hacks[p].modify[a].address == 0)
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break;
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m_maincpu->space(0).write_byte(hacks[p].modify[a].address, hacks[p].modify[a].write_byte);
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}
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}
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usbhack_counter++;
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}
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#ifdef LOG_OHCI
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if (offset >= 0x54 / 4)
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logerror("usb controller 0 register HcRhPortStatus[%d] read\n", (offset - 0x54 / 4) + 1);
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else
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logerror("usb controller 0 register %s read\n", usbregnames[offset]);
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#endif
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return 0;
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}
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return ret;
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}
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WRITE32_MEMBER(chihiro_state::usbctrl_w)
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{
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#ifdef USB_ENABLED
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UINT32 old = ohcist.hc_regs[offset];
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#endif
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#ifdef LOG_OHCI
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if (offset >= 0x54 / 4)
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logerror("usb controller 0 register HcRhPortStatus[%d] write %08X\n", (offset - 0x54 / 4) + 1, data);
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else
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logerror("usb controller 0 register %s write %08X\n", usbregnames[offset], data);
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#endif
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#ifdef USB_ENABLED
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if (offset == HcRhStatus) {
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if (data & 0x80000000)
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ohcist.hc_regs[HcRhStatus] &= ~0x8000;
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if (data & 0x00020000)
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ohcist.hc_regs[HcRhStatus] &= ~0x0002;
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if (data & 0x00010000)
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ohcist.hc_regs[HcRhStatus] &= ~0x0001;
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return;
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}
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if (offset == HcControl) {
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int hcfs;
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hcfs = (data >> 6) & 3;
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if (hcfs == UsbOperational) {
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ohcist.timer->enable();
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ohcist.timer->adjust(attotime::from_msec(1), 0, attotime::from_msec(1));
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}
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else
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ohcist.timer->enable(false);
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ohcist.state = hcfs;
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}
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if (offset == HcCommandStatus) {
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if (data & 1)
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ohcist.hc_regs[HcControl] |= 3 << 6;
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}
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if (offset == HcInterruptStatus) {
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ohcist.hc_regs[HcInterruptStatus] &= ~data;
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usb_ohci_interrupts();
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return;
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}
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if (offset == HcInterruptEnable) {
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ohcist.hc_regs[HcInterruptEnable] |= data;
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usb_ohci_interrupts();
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return;
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}
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if (offset == HcInterruptDisable) {
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ohcist.hc_regs[HcInterruptEnable] &= ~data;
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usb_ohci_interrupts();
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return;
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}
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if (offset >= HcRhPortStatus0) {
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int port = offset - HcRhPortStatus0 + 1; // port 0 not used
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// bit 0 ClearPortEnable: 1 clears PortEnableStatus
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// bit 1 SetPortEnable: 1 sets PortEnableStatus
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// bit 2 SetPortSuspend: 1 sets PortSuspendStatus
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// bit 3 ClearSuspendStatus: 1 clears PortSuspendStatus
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// bit 4 SetPortReset: 1 sets PortResetStatus
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if (data & 0x10) {
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ohcist.hc_regs[offset] |= 0x10;
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// after 10ms set PortResetStatusChange and clear PortResetStatus and set PortEnableStatus
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ohcist.ports[port] = 10;
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}
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// bit 8 SetPortPower: 1 sets PortPowerStatus
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// bit 9 ClearPortPower: 1 clears PortPowerStatus
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// bit 16 1 clears ConnectStatusChange
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// bit 17 1 clears PortEnableStatusChange
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// bit 18 1 clears PortSuspendStatusChange
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// bit 19 1 clears PortOverCurrentIndicatorChange
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// bit 20 1 clears PortResetStatusChange
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if (ohcist.hc_regs[offset] != old)
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ohcist.hc_regs[HcInterruptStatus] |= RootHubStatusChange;
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usb_ohci_interrupts();
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return;
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}
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#endif
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ohcist.hc_regs[offset] = data;
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}
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TIMER_CALLBACK_MEMBER(chihiro_state::usb_ohci_timer)
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{
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UINT32 hcca;
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int changed = 0;
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if (ohcist.state == UsbOperational) {
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ohcist.framenumber=(ohcist.framenumber+1) & 0xffff;
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hcca = ohcist.hc_regs[HcHCCA];
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ohcist.space->write_dword(hcca + 0x80, ohcist.framenumber);
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ohcist.hc_regs[HcFmNumber] = ohcist.framenumber;
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}
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for (int p = 1; p <= 4; p++) {
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if (ohcist.ports[p] > 0) {
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ohcist.ports[p]--;
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if (ohcist.ports[p] == 0) {
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ohcist.hc_regs[HcRhPortStatus0 + p - 1] = (ohcist.hc_regs[HcRhPortStatus0 + p - 1] & ~(1 << 4)) | (1 << 20) | (1 << 1);
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changed = 1;
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}
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}
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}
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if (ohcist.state == UsbOperational) {
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if (ohcist.framenumber == 0)
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ohcist.hc_regs[HcInterruptStatus] |= FrameNumberOverflow;
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ohcist.hc_regs[HcInterruptStatus] |= StartofFrame;
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}
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if (changed != 0) {
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ohcist.hc_regs[HcInterruptStatus] |= RootHubStatusChange;
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}
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usb_ohci_interrupts();
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}
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void chihiro_state::usb_ohci_interrupts()
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{
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if (((ohcist.hc_regs[HcInterruptStatus] & ohcist.hc_regs[HcInterruptEnable]) != 0) && ((ohcist.hc_regs[HcInterruptEnable] & MasterInterruptEnable) != 0))
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chihiro_devs.pic8259_1->ir1_w(1);
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else
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chihiro_devs.pic8259_1->ir1_w(0);
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}
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void chihiro_state::usb_ohci_read_endpoint_descriptor(UINT32 address)
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{
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UINT32 w;
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w = ohcist.space->read_dword(address);
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ohcist.endpoint_descriptor.fa = w & 0x7f;
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ohcist.endpoint_descriptor.en = (w >> 7) & 15;
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ohcist.endpoint_descriptor.d = (w >> 11) & 3;
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ohcist.endpoint_descriptor.s = (w >> 13) & 1;
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ohcist.endpoint_descriptor.k = (w >> 14) & 1;
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ohcist.endpoint_descriptor.f = (w >> 15) & 1;
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ohcist.endpoint_descriptor.mps = (w >> 16) & 0x7ff;
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ohcist.endpoint_descriptor.tailp = ohcist.space->read_dword(address + 4);
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w = ohcist.space->read_dword(address + 8);
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ohcist.endpoint_descriptor.headp = w & 0xfffffffc;
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ohcist.endpoint_descriptor.h = w & 1;
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ohcist.endpoint_descriptor.c = (w >> 1) & 1;
|
||||
ohcist.endpoint_descriptor.nexted = ohcist.space->read_dword(address + 12);
|
||||
}
|
||||
|
||||
void chihiro_state::usb_ohci_read_transfer_descriptor(UINT32 address)
|
||||
{
|
||||
UINT32 w;
|
||||
|
||||
w = ohcist.space->read_dword(address);
|
||||
ohcist.transfer_descriptor.cc = (w >> 28) & 15;
|
||||
ohcist.transfer_descriptor.ec= (w >> 16) & 3;
|
||||
ohcist.transfer_descriptor.t= (w >> 24) & 3;
|
||||
ohcist.transfer_descriptor.di= (w >> 21) & 7;
|
||||
ohcist.transfer_descriptor.dp= (w >> 19) & 3;
|
||||
ohcist.transfer_descriptor.r = (w >> 18) & 1;
|
||||
ohcist.transfer_descriptor.cbp = ohcist.space->read_dword(address + 4);
|
||||
ohcist.transfer_descriptor.nexttd = ohcist.space->read_dword(address + 8);
|
||||
ohcist.transfer_descriptor.be = ohcist.space->read_dword(address + 12);
|
||||
}
|
||||
|
||||
void chihiro_state::usb_ohci_read_isochronous_transfer_descriptor(UINT32 address)
|
||||
{
|
||||
UINT32 w;
|
||||
|
||||
w = ohcist.space->read_dword(address);
|
||||
ohcist.isochronous_transfer_descriptor.cc = (w >> 28) & 15;
|
||||
ohcist.isochronous_transfer_descriptor.fc = (w >> 24) & 7;
|
||||
ohcist.isochronous_transfer_descriptor.di = (w >> 21) & 7;
|
||||
ohcist.isochronous_transfer_descriptor.sf = w & 0xffff;
|
||||
ohcist.isochronous_transfer_descriptor.bp0 = ohcist.space->read_dword(address + 4) & 0xfffff000;
|
||||
ohcist.isochronous_transfer_descriptor.nexttd = ohcist.space->read_dword(address + 8);
|
||||
ohcist.isochronous_transfer_descriptor.be = ohcist.space->read_dword(address + 12);
|
||||
w = ohcist.space->read_dword(address + 16);
|
||||
ohcist.isochronous_transfer_descriptor.offset[0] = w & 0xffff;
|
||||
ohcist.isochronous_transfer_descriptor.offset[1] = (w >> 16) & 0xffff;
|
||||
w = ohcist.space->read_dword(address + 20);
|
||||
ohcist.isochronous_transfer_descriptor.offset[2] = w & 0xffff;
|
||||
ohcist.isochronous_transfer_descriptor.offset[3] = (w >> 16) & 0xffff;
|
||||
w = ohcist.space->read_dword(address + 24);
|
||||
ohcist.isochronous_transfer_descriptor.offset[4] = w & 0xffff;
|
||||
ohcist.isochronous_transfer_descriptor.offset[5] = (w >> 16) & 0xffff;
|
||||
w = ohcist.space->read_dword(address + 28);
|
||||
ohcist.isochronous_transfer_descriptor.offset[6] = w & 0xffff;
|
||||
ohcist.isochronous_transfer_descriptor.offset[7] = (w >> 16) & 0xffff;
|
||||
}
|
||||
|
||||
/*
|
||||
@ -1792,6 +2125,17 @@ void chihiro_state::machine_start()
|
||||
apust.timer->enable(false);
|
||||
if (machine().debug_flags & DEBUG_FLAG_ENABLED)
|
||||
debug_console_register_command(machine(), "chihiro", CMDFLAG_NONE, 0, 1, 4, chihiro_debug_commands);
|
||||
memset(&ohcist, 0, sizeof(ohcist));
|
||||
#ifdef USB_ENABLED
|
||||
ohcist.hc_regs[HcRevision] = 0x10;
|
||||
ohcist.hc_regs[HcFmInterval] = 0x2edf;
|
||||
ohcist.hc_regs[HcLSThreshold] = 0x628;
|
||||
ohcist.hc_regs[HcRhDescriptorA] = 4;
|
||||
ohcist.hc_regs[HcRhPortStatus0] = 1; // test connect
|
||||
ohcist.space = &m_maincpu->space();
|
||||
ohcist.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(chihiro_state::usb_ohci_timer), this), (void *)"USB OHCI Timer");
|
||||
ohcist.timer->enable(false);
|
||||
#endif
|
||||
usbhack_index = -1;
|
||||
for (int a = 1; a < 2; a++)
|
||||
if (strcmp(machine().basename(), hacks[a].game_name) == 0) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user