Merge pull request #538 from fulivi/hp9845_dev

A few improvements to hp9845b driver
This commit is contained in:
R. Belmont 2016-01-01 07:49:41 -05:00
commit 68161616d3
3 changed files with 128 additions and 119 deletions

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@ -1016,12 +1016,12 @@ void hp_hybrid_cpu_device::check_for_interrupts(void)
m_pa_changed_func((UINT8)CURRENT_PA);
// Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence
// lasts for 32 cycles (6 are already accounted for in get_ea for one indirection)
m_icount -= 26;
// lasts for 32 cycles
m_icount -= 32;
// Do a double-indirect JSM IV,I instruction
WM(AEC_CASE_C , ++m_reg_R , m_reg_P);
m_reg_P = RM(get_ea(0xc008));
m_reg_P = RM(AEC_CASE_I , RM(HP_REG_IV_ADDR));
m_reg_I = fetch();
}
@ -1485,12 +1485,20 @@ UINT32 hp_5061_3001_cpu_device::add_mae(aec_cases_t aec_case , UINT16 addr)
bsc_reg = HP_REG_R37_ADDR;
break;
default:
logerror("hphybrid: aec_case=%d\n" , aec_case);
return 0;
}
case AEC_CASE_I:
// Behaviour of AEC during interrupt vector fetch is undocumented but it can be guessed from 9845B firmware.
// Basically in this case the integrated AEC seems to do what the discrete implementation in 9845A does:
// top half of memory is mapped to block 0 (fixed) and bottom half is mapped according to content of R35
// (see pg 334 of patent).
bsc_reg = top_half ? 0 : HP_REG_R35_ADDR;
break;
UINT16 aec_reg = m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK;
default:
logerror("hphybrid: aec_case=%d\n" , aec_case);
return 0;
}
UINT16 aec_reg = (bsc_reg != 0) ? (m_reg_aec[ bsc_reg - HP_REG_R32_ADDR ] & BSC_REG_MASK) : 0;
if (m_forced_bsc_25) {
aec_reg = (aec_reg & 0xf) | 0x20;

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@ -90,82 +90,83 @@ public:
template<class _Object> static devcb_base &set_pa_changed_func(device_t &device, _Object object) { return downcast<hp_hybrid_cpu_device &>(device).m_pa_changed_func.set_callback(object); }
protected:
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname , UINT8 addrwidth);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const override { return 6; }
virtual UINT32 execute_input_lines() const override { return 2; }
virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const override { return 6; }
virtual UINT32 execute_input_lines() const override { return 2; }
virtual UINT32 execute_default_irq_vector() const override { return 0xffff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
UINT16 execute_one(UINT16 opcode);
UINT16 execute_one_sub(UINT16 opcode);
// Execute an instruction that doesn't belong to either BPC or IOC
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
UINT16 execute_one(UINT16 opcode);
UINT16 execute_one_sub(UINT16 opcode);
// Execute an instruction that doesn't belong to either BPC or IOC
virtual UINT16 execute_no_bpc_ioc(UINT16 opcode) = 0;
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, std::string &str) override;
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, std::string &str) override;
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const override { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const override { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) override;
// Different cases of memory access
// See patent @ pg 361
typedef enum {
AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
AEC_CASE_D // DMA accesses
} aec_cases_t;
// Different cases of memory access
// See patent @ pg 361
typedef enum {
AEC_CASE_A, // Instr. fetches, non-base page fetches of link pointers, BPC direct non-base page accesses
AEC_CASE_B, // Base page fetches of link pointers, BPC direct base page accesses
AEC_CASE_C, // IOC, EMC & BPC indirect final destination accesses
AEC_CASE_D, // DMA accesses
AEC_CASE_I // Interrupt vector fetches
} aec_cases_t;
// do memory address extension
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
// do memory address extension
virtual UINT32 add_mae(aec_cases_t aec_case , UINT16 addr) = 0;
UINT16 remove_mae(UINT32 addr);
UINT16 remove_mae(UINT32 addr);
UINT16 RM(aec_cases_t aec_case , UINT16 addr);
UINT16 RM(UINT32 addr);
virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
UINT16 RM(aec_cases_t aec_case , UINT16 addr);
UINT16 RM(UINT32 addr);
virtual UINT16 read_non_common_reg(UINT16 addr) = 0;
void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
void WM(UINT32 addr , UINT16 v);
virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
void WM(aec_cases_t aec_case , UINT16 addr , UINT16 v);
void WM(UINT32 addr , UINT16 v);
virtual void write_non_common_reg(UINT16 addr , UINT16 v) = 0;
UINT16 fetch(void);
UINT16 fetch(void);
UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
devcb_write8 m_pa_changed_func;
devcb_write8 m_pa_changed_func;
int m_icount;
bool m_forced_bsc_25;
int m_icount;
bool m_forced_bsc_25;
// State of processor
UINT16 m_reg_A; // Register A
UINT16 m_reg_B; // Register B
UINT16 m_reg_P; // Register P
UINT16 m_reg_R; // Register R
UINT16 m_reg_C; // Register C
UINT16 m_reg_D; // Register D
UINT16 m_reg_IV; // Register IV
UINT16 m_reg_W; // Register W
UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
UINT16 m_flags; // Flags
UINT8 m_dmapa; // DMA peripheral address (4 bits)
UINT16 m_dmama; // DMA address
UINT16 m_dmac; // DMA counter
UINT16 m_reg_I; // Instruction register
UINT32 m_genpc; // Full PC
// State of processor
UINT16 m_reg_A; // Register A
UINT16 m_reg_B; // Register B
UINT16 m_reg_P; // Register P
UINT16 m_reg_R; // Register R
UINT16 m_reg_C; // Register C
UINT16 m_reg_D; // Register D
UINT16 m_reg_IV; // Register IV
UINT16 m_reg_W; // Register W
UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
UINT16 m_flags; // Flags
UINT8 m_dmapa; // DMA peripheral address (4 bits)
UINT16 m_dmama; // DMA address
UINT16 m_dmac; // DMA counter
UINT16 m_reg_I; // Instruction register
UINT32 m_genpc; // Full PC
private:
address_space_config m_program_config;

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@ -152,11 +152,11 @@ static INPUT_PORTS_START(hp9845b)
// row = [0..7]
PORT_START("KEY0")
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // Print All
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP +
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP ,
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP .
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 0
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Print All") // Print All
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP+") // KP +
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP,") // KP ,
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP.") // KP .
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP0") // KP 0
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F12) PORT_NAME("Execute") // Execute
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F11) PORT_NAME("Cont") // Cont
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // Right
@ -168,11 +168,11 @@ static INPUT_PORTS_START(hp9845b)
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') // X
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1) // Shift
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // Auto Start
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP -
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 3
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 2
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 1
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Auto start") // Auto Start
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP-") // KP -
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP3") // KP 3
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP2") // KP 2
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP1") // KP 1
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) // Left
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_UNUSED) // Repeat
@ -187,11 +187,11 @@ static INPUT_PORTS_START(hp9845b)
PORT_START("KEY1")
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_INSERT) PORT_NAME("INSCHAR") // Ins Char
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP *
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 6
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 5
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 4
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP =
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP*") // KP *
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP6") // KP 6
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP5") // KP 5
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP4") // KP 4
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP=") // KP =
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F10) PORT_NAME("Pause") // Pause
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // Up
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) // Store
@ -202,12 +202,12 @@ static INPUT_PORTS_START(hp9845b)
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') // S
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // Ins Ln
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP /
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 9
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 8
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP 7
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // Result
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("INSLN") // Ins Ln
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP/") // KP /
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP9") // KP 9
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP8") // KP 8
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP7") // KP 7
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Result") // Result
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F9) PORT_NAME("Run") // Run
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
@ -220,12 +220,12 @@ static INPUT_PORTS_START(hp9845b)
PORT_START("KEY2")
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // N/U
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // Del Ln
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP ^
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP )
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP (
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // KP E
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // Clear Line
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("DELLN") // Del Ln
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP^") // KP ^
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP)") // KP )
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KP(") // KP (
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("KPE") // KP E
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Clear line") // Clear Line
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F8) PORT_NAME("Stop") // Stop
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') // |
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') // ]
@ -235,13 +235,13 @@ static INPUT_PORTS_START(hp9845b)
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') // R
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') // W
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) // Control
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // Typwtr
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Typwtr") // Typwtr
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_NAME("DELCHAR") // Del Char
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGDN) PORT_NAME("ROLLDOWN") // Roll down
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_PGUP) PORT_NAME("ROLLUP") // Roll up
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_HOME) PORT_NAME("HOME") // Home
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_UNUSED) // Clr to end
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_UNUSED) // Clear
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Clr to end") // Clr to end
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Clear") // Clear
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~') // ~
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) // BS
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+') // +
@ -253,29 +253,29 @@ static INPUT_PORTS_START(hp9845b)
PORT_BIT(BIT_MASK(31) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') // Q
PORT_START("KEY3")
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_UNUSED) // Tab set
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_UNUSED) // Recall
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_UNUSED) // K15
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_UNUSED) // K14
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_UNUSED) // K13
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_UNUSED) // K12
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_UNUSED) // K11
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_UNUSED) // K10
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_UNUSED) // K9
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_UNUSED) // K8
PORT_BIT(BIT_MASK(0) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Tab set") // Tab set
PORT_BIT(BIT_MASK(1) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Recall") // Recall
PORT_BIT(BIT_MASK(2) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K15") // K15
PORT_BIT(BIT_MASK(3) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K14") // K14
PORT_BIT(BIT_MASK(4) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K13") // K13
PORT_BIT(BIT_MASK(5) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K12") // K12
PORT_BIT(BIT_MASK(6) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K11") // K11
PORT_BIT(BIT_MASK(7) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K10") // K10
PORT_BIT(BIT_MASK(8) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K9") // K9
PORT_BIT(BIT_MASK(9) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("K8") // K8
PORT_BIT(BIT_MASK(10) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') // 0
PORT_BIT(BIT_MASK(11) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') // 8
PORT_BIT(BIT_MASK(12) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') // 6
PORT_BIT(BIT_MASK(13) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') // 4
PORT_BIT(BIT_MASK(14) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') // 2
PORT_BIT(BIT_MASK(15) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') // Tab
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_UNUSED) // Tab clr
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_UNUSED) // Step
PORT_BIT(BIT_MASK(16) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Tab clr") // Tab clr
PORT_BIT(BIT_MASK(17) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_NAME("Step") // Step
PORT_BIT(BIT_MASK(18) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F7) PORT_NAME("K7") // K7
PORT_BIT(BIT_MASK(19) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F6) PORT_NAME("K6") // K6
PORT_BIT(BIT_MASK(20) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F5) PORT_NAME("K5") // K5
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
PORT_BIT(BIT_MASK(21) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F4) PORT_NAME("K4") // K4
PORT_BIT(BIT_MASK(22) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F3) PORT_NAME("K3") // K3
PORT_BIT(BIT_MASK(23) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F2) PORT_NAME("K2") // K2
PORT_BIT(BIT_MASK(24) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_F1) PORT_NAME("K1") // K1
PORT_BIT(BIT_MASK(25) , IP_ACTIVE_HIGH , IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_NAME("K0") // K0
@ -621,13 +621,13 @@ static MACHINE_CONFIG_START( hp9835a, hp9845_state )
MACHINE_CONFIG_END
static ADDRESS_MAP_START(global_mem_map , AS_PROGRAM , 16 , hp9845b_state)
ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
ADDRESS_MAP_UNMAP_LOW
AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
//AM_RANGE(0x250000 , 0x251fff) AM_ROM AM_REGION("test_rom" , 0)
ADDRESS_MAP_GLOBAL_MASK(0x3f7fff)
ADDRESS_MAP_UNMAP_LOW
AM_RANGE(0x000000 , 0x007fff) AM_RAM AM_SHARE("lpu_ram")
AM_RANGE(0x014000 , 0x017fff) AM_RAM AM_SHARE("ppu_ram")
AM_RANGE(0x030000 , 0x037fff) AM_ROM AM_REGION("lpu" , 0)
AM_RANGE(0x050000 , 0x057fff) AM_ROM AM_REGION("ppu" , 0)
//AM_RANGE(0x250000 , 0x251fff) AM_ROM AM_REGION("test_rom" , 0)
ADDRESS_MAP_END
static ADDRESS_MAP_START(ppu_io_map , AS_IO , 16 , hp9845b_state)