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The abs16/abs32 variants of the bit operations seem to have been introduced in the h8s2000

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This commit is contained in:
Olivier Galibert 2024-03-07 19:17:37 +01:00
parent 27b4e60287
commit 687cdb134c
3 changed files with 65 additions and 50 deletions
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72
src/devices/cpu/h8/h8.lst
View File

@ -1870,67 +1870,67 @@ macro jsr32 %opc %spreg
r8_w(m_IR[0], m_TMP1);
prefetch_done();
6a106300 ffffff0f 1 btst r8h abs16 h
6a106300 ffffff0f 1 btst r8h abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
btst r8_r(m_IR[2] >> 4)
prefetch
6a107300 ffffff8f 1 btst imm3 abs16 h
6a107300 ffffff8f 1 btst imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
btst m_IR[2] >> 4
prefetch
6a107400 ffffff8f 1 bor imm3 abs16 h
6a107400 ffffff8f 1 bor imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bor m_IR[2] >> 4
prefetch
6a107480 ffffff8f 1 bior imm3 abs16 h
6a107480 ffffff8f 1 bior imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bior m_IR[2] >> 4
prefetch
6a107500 ffffff8f 1 bxor imm3 abs16 h
6a107500 ffffff8f 1 bxor imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bxor m_IR[2] >> 4
prefetch
6a107580 ffffff8f 1 bixor imm3 abs16 h
6a107580 ffffff8f 1 bixor imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bixor m_IR[2] >> 4
prefetch
6a107600 ffffff8f 1 band imm3 abs16 h
6a107600 ffffff8f 1 band imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
band m_IR[2] >> 4
prefetch
6a107680 ffffff8f 1 biand imm3 abs16 h
6a107680 ffffff8f 1 biand imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
biand m_IR[2] >> 4
prefetch
6a107700 ffffff8f 1 bld imm3 abs16 h
6a107700 ffffff8f 1 bld imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bld m_IR[2] >> 4
prefetch
6a107780 ffffff8f 1 bild imm3 abs16 h
6a107780 ffffff8f 1 bild imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bild m_IR[2] >> 4
prefetch
6a186000 ffffff0f 1 bset r8h abs16 h
6a186000 ffffff0f 1 bset r8h abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -1938,7 +1938,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a186100 ffffff0f 1 bnot r8h abs16 h
6a186100 ffffff0f 1 bnot r8h abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -1946,7 +1946,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a186200 ffffff0f 1 bclr r8h abs16 h
6a186200 ffffff0f 1 bclr r8h abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -1954,7 +1954,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a186700 ffffff8f 1 bst imm3 abs16 h
6a186700 ffffff8f 1 bst imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -1962,7 +1962,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a186780 ffffff8f 1 bist imm3 abs16 h
6a186780 ffffff8f 1 bist imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -1970,7 +1970,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a187000 ffffff8f 1 bset imm3 abs16 h
6a187000 ffffff8f 1 bset imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -1978,7 +1978,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a187100 ffffff8f 1 bnot imm3 abs16 h
6a187100 ffffff8f 1 bnot imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -1986,7 +1986,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a187200 ffffff8f 1 bclr imm3 abs16 h
6a187200 ffffff8f 1 bclr imm3 abs16 s20
m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2001,67 +2001,67 @@ macro jsr32 %opc %spreg
r8_w(m_IR[0], m_TMP1);
prefetch_done();
6a306300 ffffff0f 2 btst r8h abs32 h
6a306300 ffffff0f 2 btst r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
btst r8_r(m_IR[3] >> 4)
prefetch
6a307300 ffffff8f 2 btst imm3 abs32 h
6a307300 ffffff8f 2 btst imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
btst m_IR[3] >> 4
prefetch
6a307400 ffffff8f 2 bor imm3 abs32 h
6a307400 ffffff8f 2 bor imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bor m_IR[3] >> 4
prefetch
6a307480 ffffff8f 2 bior imm3 abs32 h
6a307480 ffffff8f 2 bior imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bior m_IR[3] >> 4
prefetch
6a307500 ffffff8f 2 bxor imm3 abs32 h
6a307500 ffffff8f 2 bxor imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bxor m_IR[3] >> 4
prefetch
6a307580 ffffff8f 2 bixor imm3 abs32 h
6a307580 ffffff8f 2 bixor imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bixor m_IR[3] >> 4
prefetch
6a307600 ffffff8f 2 band imm3 abs32 h
6a307600 ffffff8f 2 band imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
band m_IR[3] >> 4
prefetch
6a307680 ffffff8f 2 biand imm3 abs32 h
6a307680 ffffff8f 2 biand imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
biand m_IR[3] >> 4
prefetch
6a307700 ffffff8f 2 bld imm3 abs32 h
6a307700 ffffff8f 2 bld imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bld m_IR[3] >> 4
prefetch
6a307780 ffffff8f 2 bild imm3 abs32 h
6a307780 ffffff8f 2 bild imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bild m_IR[3] >> 4
prefetch
6a386000 ffffff0f 2 bset r8h abs32 h
6a386000 ffffff0f 2 bset r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2069,7 +2069,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a386100 ffffff0f 2 bnot r8h abs32 h
6a386100 ffffff0f 2 bnot r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2077,7 +2077,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a386200 ffffff0f 2 bclr r8h abs32 h
6a386200 ffffff0f 2 bclr r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2085,7 +2085,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a386700 ffffff8f 2 bst imm3 abs32 h
6a386700 ffffff8f 2 bst imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2093,7 +2093,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a386780 ffffff8f 2 bist imm3 abs32 h
6a386780 ffffff8f 2 bist imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2101,7 +2101,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a387000 ffffff8f 2 bset imm3 abs32 h
6a387000 ffffff8f 2 bset imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2109,7 +2109,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a387100 ffffff8f 2 bnot imm3 abs32 h
6a387100 ffffff8f 2 bnot imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@ -2117,7 +2117,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
6a387200 ffffff8f 2 bclr imm3 abs32 h
6a387200 ffffff8f 2 bclr imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start

28
src/devices/cpu/h8/h8h.h
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@ -38,37 +38,37 @@ protected:
O(add_w_imm16_r16l); O(add_l_r32h_r32l); O(add_l_imm32_r32l);
O(adds_l_four_r32l); O(adds_l_one_r32l); O(adds_l_two_r32l);
O(and_w_imm16_r16l); O(and_l_r32h_r32l); O(and_l_imm32_r32l); O(and_w_r16h_r16l);
O(band_imm3_abs16); O(band_imm3_abs32); O(band_imm3_r32ihh);
O(band_imm3_r32ihh);
O(bcc_rel16);
O(bclr_imm3_abs16); O(bclr_r8h_abs16); O(bclr_imm3_abs32); O(bclr_imm3_r32ihh); O(bclr_r8h_abs32); O(bclr_r8h_r32ihh);
O(bclr_imm3_r32ihh); O(bclr_r8h_r32ihh);
O(bcs_rel16);
O(beq_rel16);
O(bf_rel16);
O(bge_rel16);
O(bgt_rel16);
O(bhi_rel16);
O(biand_imm3_abs16); O(biand_imm3_abs32); O(biand_imm3_r32ihh);
O(bild_imm3_abs16); O(bild_imm3_abs32); O(bild_imm3_r32ihh);
O(bior_imm3_abs16); O(bior_imm3_abs32); O(bior_imm3_r32ihh);
O(bist_imm3_abs16); O(bist_imm3_abs32); O(bist_imm3_r32ihh);
O(bixor_imm3_abs16); O(bixor_imm3_abs32); O(bixor_imm3_r32ihh);
O(bld_imm3_abs16); O(bld_imm3_abs32); O(bld_imm3_r32ihh);
O(biand_imm3_r32ihh);
O(bild_imm3_r32ihh);
O(bior_imm3_r32ihh);
O(bist_imm3_r32ihh);
O(bixor_imm3_r32ihh);
O(bld_imm3_r32ihh);
O(ble_rel16);
O(bls_rel16);
O(blt_rel16);
O(bmi_rel16);
O(bne_rel16);
O(bnot_imm3_abs16); O(bnot_r8h_abs16); O(bnot_imm3_abs32); O(bnot_imm3_r32ihh); O(bnot_r8h_abs32); O(bnot_r8h_r32ihh);
O(bor_imm3_abs16); O(bor_imm3_abs32); O(bor_imm3_r32ihh);
O(bnot_imm3_r32ihh); O(bnot_r8h_r32ihh);
O(bor_imm3_r32ihh);
O(bpl_rel16);
O(bset_imm3_abs16); O(bset_r8h_abs16); O(bset_imm3_abs32); O(bset_imm3_r32ihh); O(bset_r8h_abs32); O(bset_r8h_r32ihh);
O(bset_imm3_r32ihh); O(bset_r8h_r32ihh);
O(bsr_rel16); O(bsr_rel8);
O(bst_imm3_abs16); O(bst_imm3_abs32); O(bst_imm3_r32ihh);
O(bst_imm3_r32ihh);
O(bt_rel16);
O(btst_imm3_abs16); O(btst_r8h_abs16); O(btst_imm3_abs32); O(btst_imm3_r32ihh); O(btst_r8h_abs32); O(btst_r8h_r32ihh);
O(btst_imm3_r32ihh); O(btst_r8h_r32ihh);
O(bvc_rel16);
O(bvs_rel16);
O(bxor_imm3_abs16); O(bxor_imm3_abs32); O(bxor_imm3_r32ihh);
O(bxor_imm3_r32ihh);
O(cmp_w_imm16_r16l); O(cmp_l_r32h_r32l); O(cmp_l_imm32_r32l);
O(dec_w_one_r16l); O(dec_w_two_r16l); O(dec_l_one_r32l); O(dec_l_two_r32l);
O(divxs_b_r8h_r16l); O(divxs_w_r16h_r32l);

15
src/devices/cpu/h8/h8s2000.h
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@ -33,7 +33,22 @@ protected:
virtual void do_exec_partial() override;
#define O(o) void o ## _full(); void o ## _partial()
O(andc_imm8_exr);
O(band_imm3_abs16); O(band_imm3_abs32);
O(bclr_imm3_abs16); O(bclr_r8h_abs16); O(bclr_imm3_abs32); O(bclr_r8h_abs32);
O(biand_imm3_abs16); O(biand_imm3_abs32);
O(bild_imm3_abs16); O(bild_imm3_abs32);
O(bior_imm3_abs16); O(bior_imm3_abs32);
O(bist_imm3_abs16); O(bist_imm3_abs32);
O(bixor_imm3_abs16); O(bixor_imm3_abs32);
O(bld_imm3_abs16); O(bld_imm3_abs32);
O(bnot_imm3_abs16); O(bnot_r8h_abs16); O(bnot_imm3_abs32); O(bnot_r8h_abs32);
O(bor_imm3_abs16); O(bor_imm3_abs32);
O(bset_imm3_abs16); O(bset_r8h_abs16); O(bset_imm3_abs32); O(bset_r8h_abs32);
O(bst_imm3_abs16); O(bst_imm3_abs32);
O(btst_imm3_abs16); O(btst_r8h_abs16); O(btst_imm3_abs32); O(btst_r8h_abs32);
O(bxor_imm3_abs16); O(bxor_imm3_abs32);
O(ldc_imm8_exr); O(ldc_r8l_exr); O(ldc_w_abs16_exr); O(ldc_w_abs32_exr); O(ldc_w_r32d16h_exr); O(ldc_w_r32d32hh_exr); O(ldc_w_r32ih_exr); O(ldc_w_r32ph_exr);
O(ldm_l_spp_r32n2l); O(ldm_l_spp_r32n3l); O(ldm_l_spp_r32n4l);
O(orc_imm8_exr);