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00942: topspeed: Engine sounds only play when driving in tunnels or under bridges, and turbo sounds never play [Phil Bennett]
topspeed.c - Various updates: [Phil Bennett, Andy Welburn] - Fixed MSM5205 hookups and implemented engine sound - Added Z80 CTC - Added volume controls - Corrected 68000 clocks and VSYNC frequency - Changed interrupt handling to match hardware - Added motor control notes - Fixed sprite list parsing (no more mysterious red dot on the far left) - Corrected b14-67-1/b14-68-1 ROM locations
This commit is contained in:
Phil Bennett
parent
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commit
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@ -1,4 +1,4 @@
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/***************************************************************************
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/***************+************************************************************
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Top Speed / Full Throttle (c) Taito 1987
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-------------------------
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@ -46,31 +46,11 @@ Sound: YM2151, YM3012(DAC), 2 * OKI M5205
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Taito: 2 * PC080SN, PC060HA, TC0040IOC, 2 * TC0060DCA, PC050CM
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Dumper's info (topspedu)
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-------------
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Main CPUs: Dual 68000
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Sound: YM2151, OKI M5205
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Some of the custom Taito chips look like Rastan Hardware
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Comments: Note b14-06, and b14-07, are duplicated twice on this board
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for some type of hardware graphics reasons.
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There is a weird chip that is probably a Microcontroller made by Sharp.
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Part number: b14-31 - Sharp LH763J-70
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TODO Lists
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==========
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Want to verify 68000 clocks - 8MHz causes slowdowns
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Understand how the MSM5202's are hooked up exactly, and also
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implement volume adjusts ($dxxx). The 2nd chip is disabled
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for now.
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Where is the Z80 CTC mapped to?
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Replace TC0140SYT with PC060HA
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Minor black glitches on the road: these are all on the right
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hand edge of the tilemap making up the "left" half: this is
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@ -79,109 +59,11 @@ the upper of the two road tilemaps so any gunk will be visible.
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'Tearing' effect between the two road tilemaps is visible when
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single-stepping. A sync issue?
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*Loads* of complaints from the Taito sound system in the log.
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CPUA (on all variants) could have a spin_until_int at $63a.
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Motor CPU: appears to be identical to one in ChaseHQ.
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Raster line color control
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-------------------------
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Used to make the road move. Each word controls one pixel row.
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0x800000 - 0x1ff raster color control for one road tilemap
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0x800200 - 0x3ff raster color control for the other
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Road tile colors are (all?) in the range 0x100-103. Top road section
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(tilemap at 0xa08000) uses 0x100 and 0x101. Bottom section
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(tilemap at 0xb00000) uses 0x102 and 0x103. This would allow colors
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on left and right side of road to be different. In practice it seems
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Taito didn't take advantage of this.
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Each tilemap is usually all one color value. Every now and then (10s
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or so) the value alternates. This seems to be determined by whether
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the current section of road has white lines in the middle. (0x101/3
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gives white lines.)
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The raster line color control area has groups of four values which
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cascade down through it so the road colors cascade down the screen.
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There are three known groups (start is arbitrary; the cycles repeat ad
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infinitum or until a different cycle starts; values given are from bottom
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to top of screen):
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(i) White lines in center of road
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12 %10010
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1f %11111
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00 %00000
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0d %01101
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(ii) No lines in center of road
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08 %01000
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0c %01100
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1a %11010
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1e %11110
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(iii) Under bridge or in tunnel [note almost identical to (i)]
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ffe0 %00000
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ffed %01101
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fff2 %10010
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ffef %01111
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(iv) Unknown 4th group for tunnels in later parts of the game that have
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no white lines, analogous to (ii) ?
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Correlating with screenshots suggests that these bits refer to:
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x.... road body ?
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.x... lines in road center and inner edge
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..x.. lines at road outer edge
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...x. outside road ?
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....x ???
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Actual gfx tiles used for the road only use colors 1-5. Palette offsets:
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(0 = transparency)
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1 = lines in road center
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2 = road edge (inner)
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3 = road edge (outer)
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4 = road body
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5 = outside road
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Each palette block contains three possible sets of 5 colors. Entries 1-5
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(standard), 6-10 (alternate), 11-15 (tunnels).
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In tunnels only 11-15 are used. Outside tunnels there is a choice between
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the standard colors and the alternate colors. The road body could in theory
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take a standard color while 'outside the road' took on an alternate. But
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in practice the game is using a very limited choice of raster control words,
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so we don't know.
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Need to test whether sections of the road with unknown raster control words
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(tunnels late in the game without central white lines) are correct against
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a real machine.
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Also are the 'prelines' shortly before white road lines appear correct?
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CHECK screen inits at $1692
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These suggest that rowscroll areas are all 0x1000 long and there are TWO
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for each tilemap layer.
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256 rows => 256 words => 0x200 bytes. So probably the inits are far too long.
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Maybe the second area for each layer contains colscroll ?
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Stephh's notes (based on the game M68000 code and some tests) :
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1) 'topspeed' and 'topspedu'
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@ -271,93 +153,39 @@ From JP manual
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***************************************************************************/
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#include "emu.h"
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#include "cpu/z80/z80.h"
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#include "includes/taitoipt.h"
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#include "cpu/m68000/m68000.h"
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#include "cpu/z80/z80.h"
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#include "machine/z80ctc.h"
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#include "machine/taitoio.h"
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#include "audio/taitosnd.h"
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#include "sound/2151intf.h"
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#include "sound/msm5205.h"
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#include "sound/flt_vol.h"
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#include "includes/taitoipt.h"
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#include "includes/topspeed.h"
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#include "topspeed.lh"
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READ16_MEMBER(topspeed_state::sharedram_r)
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{
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return m_sharedram[offset];
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}
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WRITE16_MEMBER(topspeed_state::sharedram_w)
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{
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COMBINE_DATA(&m_sharedram[offset]);
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}
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void topspeed_state::parse_control( ) /* assumes Z80 sandwiched between 68Ks */
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{
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/* bit 0 enables cpu B */
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/* however this fails when recovering from a save state
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if cpu B is disabled !! */
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m_subcpu->set_input_line(INPUT_LINE_RESET, (m_cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
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}
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/**********************************************************
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CPU CONTROL
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**********************************************************/
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WRITE16_MEMBER(topspeed_state::cpua_ctrl_w)
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{
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if ((data & 0xff00) && ((data & 0xff) == 0))
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data = data >> 8; /* for Wgp */
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// Written only twice; once on startup at 0x00 then 0xc3 after init
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m_cpua_ctrl = data;
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parse_control();
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logerror("CPU #0 PC %06x: write %04x to cpu control\n", space.device().safe_pc(), data);
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}
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/***********************************************************
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INTERRUPTS
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***********************************************************/
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void topspeed_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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switch (id)
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{
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/* 68000 A */
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case TIMER_TOPSPEED_INTERRUPT6:
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m_maincpu->set_input_line(6, HOLD_LINE);
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break;
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/* 68000 B */
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case TIMER_TOPSPEED_CPUB_INTERRUPT6:
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m_subcpu->set_input_line(6, HOLD_LINE); /* assumes Z80 sandwiched between the 68Ks */
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break;
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default:
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assert_always(FALSE, "Unknown id in topspeed_state::device_timer");
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}
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}
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INTERRUPT_GEN_MEMBER(topspeed_state::topspeed_interrupt)
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{
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/* Unsure how many int6's per frame */
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timer_set(downcast<cpu_device *>(&device)->cycles_to_attotime(200000 - 500), TIMER_TOPSPEED_INTERRUPT6);
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device.execute().set_input_line(5, HOLD_LINE);
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}
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INTERRUPT_GEN_MEMBER(topspeed_state::topspeed_cpub_interrupt)
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{
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/* Unsure how many int6's per frame */
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timer_set(downcast<cpu_device *>(&device)->cycles_to_attotime(200000 - 500), TIMER_TOPSPEED_CPUB_INTERRUPT6);
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device.execute().set_input_line(5, HOLD_LINE);
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}
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/**********************************************************
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GAME INPUTS
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**********************************************************/
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READ8_MEMBER(topspeed_state::topspeed_input_bypass_r)
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READ8_MEMBER(topspeed_state::input_bypass_r)
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{
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UINT8 port = m_tc0220ioc->port_r(space, 0); /* read port number */
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// Read port number
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UINT8 port = m_tc0220ioc->port_r(space, 0);
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UINT16 steer = 0xff80 + ioport("STEER")->read_safe(0);
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switch (port)
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@ -373,22 +201,34 @@ READ8_MEMBER(topspeed_state::topspeed_input_bypass_r)
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}
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}
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CUSTOM_INPUT_MEMBER(topspeed_state::topspeed_pedal_r)
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CUSTOM_INPUT_MEMBER(topspeed_state::pedal_r)
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{
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static const UINT8 retval[8] = { 0,1,3,2,6,7,5,4 };
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const char *tag = (const char *)param;
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return retval[ioport(tag)->read_safe(0) & 7];
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}
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READ16_MEMBER(topspeed_state::topspeed_motor_r)
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READ16_MEMBER(topspeed_state::motor_r)
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{
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switch (offset)
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{
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case 0x0:
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return (machine().rand() & 0xff); /* motor status ?? */
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case 0x0: // Motor status?
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return (machine().rand() & 0xff);
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case 0x101:
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return 0x55; /* motor cpu status ? */
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case 0x101: // Motor CPU status?
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return 0x55;
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case 0x141: // Left limit data
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case 0x142: // Right limit data
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case 0x143: // Horizontal center data
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case 0x144: // Upper limit data
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case 0x145: // Lower limit data
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case 0x146: // Vertical center data
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case 0x147: // Horizontal motor position
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case 0x148: // Vertical motor position
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return 0;
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default:
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logerror("CPU #0 PC %06x: warning - read from motor cpu %03x\n", space.device().safe_pc(), offset);
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@ -396,9 +236,9 @@ READ16_MEMBER(topspeed_state::topspeed_motor_r)
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}
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}
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WRITE16_MEMBER(topspeed_state::topspeed_motor_w)
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WRITE16_MEMBER(topspeed_state::motor_w)
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{
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/* Writes $900000-25 and $900200-219 */
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// Writes $900000-25 and $900200-219
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logerror("CPU #0 PC %06x: warning - write %04x to motor cpu %03x\n", space.device().safe_pc(), data, offset);
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}
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@ -407,100 +247,133 @@ WRITE16_MEMBER(topspeed_state::topspeed_motor_w)
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SOUND
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*****************************************************/
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void topspeed_state::reset_sound_region( )
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WRITE8_MEMBER(topspeed_state::sound_bankswitch_w)
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{
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membank("bank10")->set_entry(m_banknum);
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membank("sndbank")->set_entry(data & 3);
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}
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WRITE8_MEMBER(topspeed_state::sound_bankswitch_w)/* assumes Z80 sandwiched between 68Ks */
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void topspeed_state::msm5205_update(int chip)
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{
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m_banknum = data & 7;
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reset_sound_region();
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}
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if (m_msm_reset[chip])
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return;
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void topspeed_state::topspeed_msm5205_clock( int chip )
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{
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UINT8 data = m_msm_rom[chip][m_msm_pos[chip]];
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msm5205_device *msm = chip ? m_msm2 : m_msm1;
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msm->data_w(m_msm_sel[chip] ? data & 0xf : data >> 4 & 0xf);
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m_msm_pos[chip] += m_msm_sel[chip];
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m_msm_sel[chip] ^= 1;
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msm->data_w((m_msm_nibble[chip] ? data : data >> 4) & 0xf);
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if ((m_msm_pos[chip]) == m_msm_loop[chip])
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m_msm_pos[chip] = m_msm_start[chip];
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if (m_msm_nibble[chip])
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++m_msm_pos[chip];
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m_msm_nibble[chip] ^= 1;
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}
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WRITE_LINE_MEMBER(topspeed_state::topspeed_msm5205_vck_1)
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WRITE_LINE_MEMBER(topspeed_state::msm5205_1_vck)
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{
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topspeed_msm5205_clock(0);
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msm5205_update(0);
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}
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WRITE_LINE_MEMBER(topspeed_state::topspeed_msm5205_vck_2)
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WRITE8_MEMBER(topspeed_state::msm5205_command_w)
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{
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topspeed_msm5205_clock(1);
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}
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WRITE8_MEMBER(topspeed_state::topspeed_msm5205_command_w)
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{
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int chip = offset >> 12 & 1;
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int chip = (offset >> 12) & 1;
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msm5205_device *msm = chip ? m_msm2 : m_msm1;
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// disable 2nd chip for now... it doesn't work yet
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if (chip == 1) return;
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switch (offset >> 8 & 0x2e)
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{
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// $b000 / $c000: start
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// $b000 / $c000: Start address
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case 0x00:
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m_msm_start[chip] = data << 8;
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m_msm_pos[chip] = m_msm_start[chip];
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m_msm_sel[chip] = 0;
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m_msm_pos[chip] = data << 8;
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break;
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// $b400 / $c400: Run
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case 0x04:
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m_msm_reset[chip] = 0;
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msm->reset_w(0);
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break;
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// $b400 / $c400: apply volume now
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// or start?
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case 0x04:
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break;
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// $b800 / $c800: stop?
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// $b800 / $c800: Stop
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case 0x08:
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m_msm_reset[chip] = 1;
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m_msm_nibble[chip] = 0;
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msm->reset_w(1);
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break;
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// $bc00 / $cc00: set loop?
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// $cc00: ? Chip 2 only
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case 0x0c:
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m_msm_loop[chip] = data << 8;
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break;
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// $d000 / $d200: set volume latch
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case 0x20:
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break;
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case 0x22:
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break;
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default:
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logerror("Unhandled MSM5205 control write to %x with %x (PC:%.4x)\n", 0xb000 + offset, data, space.device().safe_pc());
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break;
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}
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}
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WRITE8_MEMBER(topspeed_state::volume_w)
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{
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// The volume is controlled by two Taito TC0060DCA hybrid volume modules
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filter_volume_device *filter = NULL;
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switch (offset)
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{
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case 0x000: filter = m_filter2; break; // MSM5205 1
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case 0x200: filter = m_filter3; break; // MSM5205 2
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case 0x400: filter = m_filter1l; break; // YM-2151 L
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case 0x600: filter = m_filter1r; break; // YM-2151 R
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}
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filter->flt_volume_set_volume(data / 255.0f);
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}
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WRITE_LINE_MEMBER(topspeed_state::z80ctc_to0)
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{
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if (m_msm2_vck2 && !state)
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{
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// CTC output is divided by 2
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if (m_msm2_vck)
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{
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m_msm2->vclk_w(1);
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}
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else
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{
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// Update on falling edge of /VCK
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UINT16 oldpos = m_msm_pos[1];
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msm5205_update(1);
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// Handle looping
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if ((oldpos >> 8) == 0x0f && ((m_msm_pos[1] >> 8) == 0x10))
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{
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m_msm_pos[1] = 0;
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m_msm2->reset_w(1);
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m_msm2->vclk_w(0);
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m_msm2->reset_w(0);
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}
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else
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{
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m_msm2->vclk_w(0);
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}
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}
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m_msm2_vck ^= 1;
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}
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m_msm2_vck2 = state;
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}
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/***********************************************************
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MEMORY STRUCTURES
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***********************************************************/
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|
||||
|
||||
static ADDRESS_MAP_START( topspeed_map, AS_PROGRAM, 16, topspeed_state )
|
||||
static ADDRESS_MAP_START( cpua_map, AS_PROGRAM, 16, topspeed_state )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(sharedram_r, sharedram_w) AM_SHARE("sharedram")
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM AM_SHARE("sharedram")
|
||||
AM_RANGE(0x500000, 0x503fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x600002, 0x600003) AM_WRITE(cpua_ctrl_w)
|
||||
AM_RANGE(0x7e0000, 0x7e0001) AM_READNOP AM_DEVWRITE8("tc0140syt", tc0140syt_device, tc0140syt_port_w, 0x00ff)
|
||||
AM_RANGE(0x7e0002, 0x7e0003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff)
|
||||
AM_RANGE(0x800000, 0x8003ff) AM_RAM AM_SHARE("raster_ctrl")
|
||||
AM_RANGE(0x800400, 0x80ffff) AM_RAM
|
||||
AM_RANGE(0x880000, 0x880007) AM_WRITENOP // Lamps/outputs?
|
||||
AM_RANGE(0xa00000, 0xa0ffff) AM_DEVREADWRITE("pc080sn_1", pc080sn_device, word_r, word_w)
|
||||
AM_RANGE(0xa20000, 0xa20003) AM_DEVWRITE("pc080sn_1", pc080sn_device, yscroll_word_w)
|
||||
AM_RANGE(0xa40000, 0xa40003) AM_DEVWRITE("pc080sn_1", pc080sn_device, xscroll_word_w)
|
||||
@ -513,27 +386,31 @@ static ADDRESS_MAP_START( topspeed_map, AS_PROGRAM, 16, topspeed_state )
|
||||
AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_SHARE("spritemap")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( topspeed_cpub_map, AS_PROGRAM, 16, topspeed_state )
|
||||
static ADDRESS_MAP_START( cpub_map, AS_PROGRAM, 16, topspeed_state )
|
||||
AM_RANGE(0x000000, 0x01ffff) AM_ROM
|
||||
AM_RANGE(0x400000, 0X40ffff) AM_READWRITE(sharedram_r, sharedram_w) AM_SHARE("sharedram")
|
||||
AM_RANGE(0x880000, 0x880001) AM_READ8(topspeed_input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0220ioc", tc0220ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x400000, 0X40ffff) AM_RAM AM_SHARE("sharedram")
|
||||
AM_RANGE(0x880000, 0x880001) AM_READ8(input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0220ioc", tc0220ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x880002, 0x880003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
|
||||
AM_RANGE(0x900000, 0x9003ff) AM_READWRITE(topspeed_motor_r, topspeed_motor_w) /* motor CPU */
|
||||
AM_RANGE(0x900000, 0x9003ff) AM_READWRITE(motor_r, motor_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
static ADDRESS_MAP_START( z80_map, AS_PROGRAM, 8, topspeed_state )
|
||||
static ADDRESS_MAP_START( z80_prg, AS_PROGRAM, 8, topspeed_state )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_ROM
|
||||
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank10")
|
||||
AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("sndbank")
|
||||
AM_RANGE(0x8000, 0x8fff) AM_RAM
|
||||
AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
|
||||
AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("tc0140syt", tc0140syt_device, tc0140syt_slave_port_w)
|
||||
AM_RANGE(0xa001, 0xa001) AM_DEVREADWRITE("tc0140syt", tc0140syt_device, tc0140syt_slave_comm_r, tc0140syt_slave_comm_w)
|
||||
AM_RANGE(0xb000, 0xd3ff) AM_WRITE(topspeed_msm5205_command_w)
|
||||
AM_RANGE(0xd400, 0xd400) AM_WRITENOP // ym2151 volume
|
||||
AM_RANGE(0xd600, 0xd600) AM_WRITENOP // ym2151 volume
|
||||
AM_RANGE(0xb000, 0xcfff) AM_WRITE(msm5205_command_w)
|
||||
AM_RANGE(0xd000, 0xdfff) AM_WRITE(volume_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( z80_io, AS_IO, 8, topspeed_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_DEVREADWRITE("ctc", z80ctc_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -542,7 +419,7 @@ ADDRESS_MAP_END
|
||||
***********************************************************/
|
||||
|
||||
static INPUT_PORTS_START( topspeed )
|
||||
/* 0x880000 (port 0) -> 0x400852 (-$77ae,A5) (shared RAM) */
|
||||
// 0x880000 (port 0) -> 0x400852 (-$77ae,A5) (shared RAM)
|
||||
PORT_START("DSWA")
|
||||
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:1,2")
|
||||
PORT_DIPSETTING( 0x03, "Deluxe" ) // analog pedals, racing wheel, motor (tilt disabled)
|
||||
@ -552,7 +429,7 @@ static INPUT_PORTS_START( topspeed )
|
||||
TAITO_DSWA_BITS_2_TO_3_LOC(SWA)
|
||||
TAITO_COINAGE_WORLD_LOC(SWA)
|
||||
|
||||
/* 0x880000 (port 1) -> 0x400850 (-$77b0,A5) (shared RAM) */
|
||||
// 0x880000 (port 1) -> 0x400850 (-$77b0,A5) (shared RAM)
|
||||
PORT_START("DSWB")
|
||||
TAITO_DIFFICULTY_LOC(SWB)
|
||||
PORT_DIPNAME( 0x0c, 0x0c, "Initial Time" ) PORT_DIPLOCATION("SWB:3,4")
|
||||
@ -578,7 +455,7 @@ static INPUT_PORTS_START( topspeed )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN1 )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
|
||||
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, topspeed_state, topspeed_pedal_r, "BRAKE") PORT_CONDITION("DSWA", 0x03, NOTEQUALS, 0x02)
|
||||
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, topspeed_state, pedal_r, "BRAKE") PORT_CONDITION("DSWA", 0x03, NOTEQUALS, 0x02)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Brake Switch") PORT_CONDITION("DSWA", 0x03, EQUALS, 0x02)
|
||||
|
||||
PORT_START("IN1")
|
||||
@ -587,10 +464,10 @@ static INPUT_PORTS_START( topspeed )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Calibrate") // ?
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Shifter") PORT_TOGGLE
|
||||
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, topspeed_state, topspeed_pedal_r, "GAS") PORT_CONDITION("DSWA", 0x03, NOTEQUALS, 0x02)
|
||||
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, topspeed_state, pedal_r, "GAS") PORT_CONDITION("DSWA", 0x03, NOTEQUALS, 0x02)
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Gas Switch") PORT_CONDITION("DSWA", 0x03, EQUALS, 0x02)
|
||||
|
||||
PORT_START("IN2") /* unused */
|
||||
PORT_START("IN2") // Unused
|
||||
|
||||
PORT_START("STEER")
|
||||
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_NAME("Steering Wheel") PORT_CONDITION("DSWA", 0x03, NOTEQUALS, 0x02) // racing wheel (absolute)
|
||||
@ -617,47 +494,80 @@ INPUT_PORTS_END
|
||||
|
||||
static const gfx_layout tile16x8_layout =
|
||||
{
|
||||
16,8, /* 16*8 sprites */
|
||||
16,8, // 16*8 sprites
|
||||
RGN_FRAC(1,1),
|
||||
4, /* 4 bits per pixel */
|
||||
4, // 4 bits per pixel
|
||||
{ 0, 8, 16, 24 },
|
||||
{ 32, 33, 34, 35, 36, 37, 38, 39, 0, 1, 2, 3, 4, 5, 6, 7 },
|
||||
{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64 },
|
||||
64*8 /* every sprite takes 64 consecutive bytes */
|
||||
64*8 // every sprite takes 64 consecutive bytes
|
||||
};
|
||||
|
||||
static const gfx_layout charlayout =
|
||||
{
|
||||
8,8, /* 8*8 characters */
|
||||
8,8, // 8*8 characters
|
||||
RGN_FRAC(1,1),
|
||||
4, /* 4 bits per pixel */
|
||||
4, // 4 bits per pixel
|
||||
{ 0, 1, 2, 3 },
|
||||
{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 },
|
||||
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
|
||||
32*8 /* every sprite takes 32 consecutive bytes */
|
||||
32*8 // every sprite takes 32 consecutive bytes
|
||||
};
|
||||
|
||||
static GFXDECODE_START( topspeed )
|
||||
GFXDECODE_ENTRY( "gfx2", 0x0, tile16x8_layout, 0, 256 ) /* sprite parts */
|
||||
GFXDECODE_ENTRY( "gfx1", 0x0, charlayout, 0, 256 ) /* sprites & playfield */
|
||||
GFXDECODE_ENTRY( "gfx2", 0x0, tile16x8_layout, 0, 256 ) // Sprite parts
|
||||
GFXDECODE_ENTRY( "gfx1", 0x0, charlayout, 0, 256 ) // Sprites & playfield
|
||||
// Road Lines gfxdecodable ?
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
/**************************************************************
|
||||
YM2151 (SOUND)
|
||||
MSM5205 (SOUND)
|
||||
**************************************************************/
|
||||
|
||||
static const msm5205_interface msm5205_config_1 =
|
||||
{
|
||||
DEVCB_DRIVER_LINE_MEMBER(topspeed_state,topspeed_msm5205_vck_1), /* VCK function */
|
||||
MSM5205_S48_4B /* 8 kHz */
|
||||
DEVCB_DRIVER_LINE_MEMBER(topspeed_state, msm5205_1_vck), // VCK function
|
||||
MSM5205_S48_4B // 8 kHz, 4-bit
|
||||
};
|
||||
|
||||
static const msm5205_interface msm5205_config_2 =
|
||||
{
|
||||
DEVCB_DRIVER_LINE_MEMBER(topspeed_state,topspeed_msm5205_vck_2), /* VCK function */
|
||||
MSM5205_S48_4B /* 8 kHz */
|
||||
DEVCB_NULL, // VCK function
|
||||
MSM5205_SEX_4B // Slave mode, 4-bit
|
||||
};
|
||||
|
||||
|
||||
/***********************************************************
|
||||
DEVICES
|
||||
***********************************************************/
|
||||
|
||||
static const pc080sn_interface pc080sn_intf =
|
||||
{
|
||||
1, // gfxnum
|
||||
0, 8, 0, 0 // x_offset, y_offset, y_invert, dblwidth
|
||||
};
|
||||
|
||||
static const tc0220ioc_interface io_intf =
|
||||
{
|
||||
DEVCB_INPUT_PORT("DSWA"),
|
||||
DEVCB_INPUT_PORT("DSWB"),
|
||||
DEVCB_INPUT_PORT("IN0"),
|
||||
DEVCB_INPUT_PORT("IN1"),
|
||||
DEVCB_INPUT_PORT("IN2")
|
||||
};
|
||||
|
||||
static const tc0140syt_interface tc0140syt_intf =
|
||||
{
|
||||
"maincpu", "audiocpu"
|
||||
};
|
||||
|
||||
static Z80CTC_INTERFACE( ctc_intf )
|
||||
{
|
||||
DEVCB_NULL, // Interrupt handler
|
||||
DEVCB_DRIVER_LINE_MEMBER(topspeed_state, z80ctc_to0), // ZC/TO0 callback
|
||||
DEVCB_NULL, // ZC/TO1 callback
|
||||
DEVCB_NULL // ZC/TO2 callback
|
||||
};
|
||||
|
||||
|
||||
@ -665,74 +575,60 @@ static const msm5205_interface msm5205_config_2 =
|
||||
MACHINE DRIVERS
|
||||
***********************************************************/
|
||||
|
||||
void topspeed_state::topspeed_postload()
|
||||
{
|
||||
parse_control();
|
||||
reset_sound_region();
|
||||
}
|
||||
|
||||
void topspeed_state::machine_start()
|
||||
{
|
||||
membank("bank10")->configure_entries(0, 4, memregion("audiocpu")->base() + 0xc000, 0x4000);
|
||||
membank("sndbank")->configure_entries(0, 4, memregion("audiocpu")->base() + 0xc000, 0x4000);
|
||||
|
||||
m_msm_rom[0] = memregion("adpcm")->base();
|
||||
m_msm_rom[1] = memregion("adpcm")->base() + 0x10000;
|
||||
|
||||
save_item(NAME(m_cpua_ctrl));
|
||||
save_item(NAME(m_ioc220_port));
|
||||
save_item(NAME(m_banknum));
|
||||
machine().save().register_postload(save_prepost_delegate(FUNC(topspeed_state::topspeed_postload), this));
|
||||
save_item(NAME(m_msm_pos));
|
||||
save_item(NAME(m_msm_reset));
|
||||
save_item(NAME(m_msm_nibble));
|
||||
save_item(NAME(m_msm2_vck));
|
||||
save_item(NAME(m_msm2_vck2));
|
||||
}
|
||||
|
||||
void topspeed_state::machine_reset()
|
||||
{
|
||||
m_cpua_ctrl = 0xff;
|
||||
m_cpua_ctrl = 0;
|
||||
m_ioc220_port = 0;
|
||||
m_banknum = -1;
|
||||
|
||||
m_msm_reset[0] = 0;
|
||||
m_msm_reset[1] = 0;
|
||||
m_msm1->reset_w(1);
|
||||
m_msm2->reset_w(1);
|
||||
m_msm_loop[0] = 0;
|
||||
m_msm_loop[1] = 0;
|
||||
m_msm2_vck = 0;
|
||||
m_msm2_vck2 = 0;
|
||||
}
|
||||
|
||||
static const pc080sn_interface topspeed_pc080sn_intf =
|
||||
{
|
||||
1, /* gfxnum */
|
||||
0, 8, 0, 0 /* x_offset, y_offset, y_invert, dblwidth */
|
||||
};
|
||||
|
||||
static const tc0220ioc_interface topspeed_io_intf =
|
||||
{
|
||||
DEVCB_INPUT_PORT("DSWA"), DEVCB_INPUT_PORT("DSWB"),
|
||||
DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_INPUT_PORT("IN2") /* port read handlers */
|
||||
};
|
||||
|
||||
static const tc0140syt_interface topspeed_tc0140syt_intf =
|
||||
{
|
||||
"maincpu", "audiocpu"
|
||||
};
|
||||
|
||||
static MACHINE_CONFIG_START( topspeed, topspeed_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", M68000, 12000000) /* 12 MHz ??? */
|
||||
MCFG_CPU_PROGRAM_MAP(topspeed_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", topspeed_state, topspeed_interrupt)
|
||||
// basic machine hardware
|
||||
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz / 2)
|
||||
MCFG_CPU_PROGRAM_MAP(cpua_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", topspeed_state, irq6_line_hold)
|
||||
|
||||
MCFG_CPU_ADD("subcpu", M68000, XTAL_16MHz / 2)
|
||||
MCFG_CPU_PROGRAM_MAP(cpub_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", topspeed_state, irq5_line_hold)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", Z80, XTAL_16MHz / 4)
|
||||
MCFG_CPU_PROGRAM_MAP(z80_map)
|
||||
MCFG_CPU_PROGRAM_MAP(z80_prg)
|
||||
MCFG_CPU_IO_MAP(z80_io)
|
||||
|
||||
MCFG_CPU_ADD("subcpu", M68000, 12000000) /* 12 MHz ??? */
|
||||
MCFG_CPU_PROGRAM_MAP(topspeed_cpub_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", topspeed_state, topspeed_cpub_interrupt)
|
||||
MCFG_Z80CTC_ADD("ctc", XTAL_16MHz / 4, ctc_intf)
|
||||
MCFG_PC080SN_ADD("pc080sn_1", pc080sn_intf)
|
||||
MCFG_PC080SN_ADD("pc080sn_2", pc080sn_intf)
|
||||
MCFG_TC0140SYT_ADD("tc0140syt", tc0140syt_intf)
|
||||
MCFG_TC0220IOC_ADD("tc0220ioc", io_intf)
|
||||
|
||||
|
||||
MCFG_TC0220IOC_ADD("tc0220ioc", topspeed_io_intf)
|
||||
|
||||
/* video hardware */
|
||||
// video hardware
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
MCFG_SCREEN_REFRESH_RATE(60.0532) // Measured on real hardware
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
|
||||
MCFG_SCREEN_SIZE(40*8, 32*8)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 2*8, 32*8-1)
|
||||
@ -741,29 +637,35 @@ static MACHINE_CONFIG_START( topspeed, topspeed_state )
|
||||
MCFG_GFXDECODE(topspeed)
|
||||
MCFG_PALETTE_LENGTH(8192)
|
||||
|
||||
MCFG_PC080SN_ADD("pc080sn_1", topspeed_pc080sn_intf)
|
||||
MCFG_PC080SN_ADD("pc080sn_2", topspeed_pc080sn_intf)
|
||||
|
||||
/* sound hardware */
|
||||
// sound hardware
|
||||
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
|
||||
|
||||
MCFG_YM2151_ADD("ymsnd", XTAL_16MHz / 4)
|
||||
MCFG_YM2151_IRQ_HANDLER(INPUTLINE("audiocpu", 0))
|
||||
MCFG_YM2151_PORT_WRITE_HANDLER(WRITE8(topspeed_state,sound_bankswitch_w))
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 0.30)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 0.30)
|
||||
MCFG_YM2151_PORT_WRITE_HANDLER(WRITE8(topspeed_state, sound_bankswitch_w))
|
||||
MCFG_SOUND_ROUTE(0, "filter1l", 1.0)
|
||||
MCFG_SOUND_ROUTE(1, "filter1r", 1.0)
|
||||
|
||||
MCFG_SOUND_ADD("msm1", MSM5205, XTAL_384kHz)
|
||||
MCFG_SOUND_CONFIG(msm5205_config_1)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "filter2", 1.0)
|
||||
|
||||
MCFG_SOUND_ADD("msm2", MSM5205, XTAL_384kHz)
|
||||
MCFG_SOUND_CONFIG(msm5205_config_2)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "filter3", 1.0)
|
||||
|
||||
MCFG_TC0140SYT_ADD("tc0140syt", topspeed_tc0140syt_intf)
|
||||
MCFG_FILTER_VOLUME_ADD("filter1l", 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
MCFG_FILTER_VOLUME_ADD("filter1r", 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
|
||||
MCFG_FILTER_VOLUME_ADD("filter2", 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
|
||||
MCFG_FILTER_VOLUME_ADD("filter3", 0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
@ -775,130 +677,129 @@ Note: driver does NOT make use of the zoom sprite tables rom.
|
||||
***************************************************************************/
|
||||
|
||||
ROM_START( topspeed )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* 128K for 68000 code (CPU A) */
|
||||
ROM_LOAD16_BYTE( "b14-67-1.11", 0x00000, 0x10000, CRC(23f17616) SHA1(653ab6537f2e5898a77060c82b776852ab1f2b51) )
|
||||
ROM_LOAD16_BYTE( "b14-68-1.9", 0x00001, 0x10000, CRC(835659d9) SHA1(e99967f795c3c6e14bad7a66315640ca5db43c72) )
|
||||
ROM_LOAD16_BYTE( "b14-54.24", 0x80000, 0x20000, CRC(172924d5) SHA1(4a963f2e816f4b1c5acc6d38e99a68d3baeee8c6) ) /* 4 data roms */
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) // 128K for 68000 code (CPU A)
|
||||
ROM_LOAD16_BYTE( "b14-67-1.9", 0x00000, 0x10000, CRC(23f17616) SHA1(653ab6537f2e5898a77060c82b776852ab1f2b51) )
|
||||
ROM_LOAD16_BYTE( "b14-68-1.11", 0x00001, 0x10000, CRC(835659d9) SHA1(e99967f795c3c6e14bad7a66315640ca5db43c72) )
|
||||
ROM_LOAD16_BYTE( "b14-54.24", 0x80000, 0x20000, CRC(172924d5) SHA1(4a963f2e816f4b1c5acc6d38e99a68d3baeee8c6) ) // 4 data ROMs
|
||||
ROM_LOAD16_BYTE( "b14-52.26", 0x80001, 0x20000, CRC(e1b5b2a1) SHA1(8e2b992dcd5dc2317594c0187a22767aa626edee) )
|
||||
ROM_LOAD16_BYTE( "b14-55.23", 0xc0000, 0x20000, CRC(a1f15499) SHA1(72f99108713773782fc72aae5a3f6e9e2a1e347c) )
|
||||
ROM_LOAD16_BYTE( "b14-53.25", 0xc0001, 0x20000, CRC(04a04f5f) SHA1(09c15c33967bb141cc504b70d01c154bedb7fa33) )
|
||||
|
||||
ROM_REGION( 0x20000, "subcpu", 0 ) /* 128K for 68000 code (CPU B) */
|
||||
ROM_REGION( 0x20000, "subcpu", 0 ) // 128K for 68000 code (CPU B)
|
||||
ROM_LOAD16_BYTE( "b14-69.80", 0x00000, 0x10000, CRC(d652e300) SHA1(b559bdb564d96da4c656dc7b2c88dae84c4861ae) )
|
||||
ROM_LOAD16_BYTE( "b14-70.81", 0x00001, 0x10000, CRC(b720592b) SHA1(13298b498a198dcc1a56e533d106545dd77e1bbc) )
|
||||
|
||||
ROM_REGION( 0x1c000, "audiocpu", 0 ) /* Z80 sound cpu */
|
||||
ROM_REGION( 0x1c000, "audiocpu", 0 ) // Z80 sound CPU
|
||||
ROM_LOAD( "b14-25.67", 0x00000, 0x04000, CRC(9eab28ef) SHA1(9a90f2c1881f4664d6d6241f3bc57faeaf150ffc) )
|
||||
ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
|
||||
ROM_CONTINUE( 0x10000, 0x0c000 ) // Banked stuff
|
||||
|
||||
ROM_REGION( 0x40000, "gfx1", 0 )
|
||||
ROM_LOAD16_BYTE( "b14-07.54", 0x00000, 0x20000, CRC(c6025fff) SHA1(439ed85b0160bfd6c06fd42990124a292b2e3c14) ) /* SCR tiles */
|
||||
ROM_REGION( 0x40000, "gfx1", 0 ) // SCR tiles
|
||||
ROM_LOAD16_BYTE( "b14-07.54", 0x00000, 0x20000, CRC(c6025fff) SHA1(439ed85b0160bfd6c06fd42990124a292b2e3c14) )
|
||||
ROM_LOAD16_BYTE( "b14-06.52", 0x00001, 0x20000, CRC(b4e2536e) SHA1(c1960ee25b37b1444ec99082521c4858edcf3484) )
|
||||
|
||||
ROM_REGION( 0x200000, "gfx2", 0 )
|
||||
ROMX_LOAD( "b14-48.16", 0x000003, 0x20000, CRC(30c7f265) SHA1(3e52e2aabf2c456d0b57d9414f99bd942bafc887) , ROM_SKIP(7) ) /* OBJ, bitplane 3 */
|
||||
ROMX_LOAD( "b14-48.16", 0x000003, 0x20000, CRC(30c7f265) SHA1(3e52e2aabf2c456d0b57d9414f99bd942bafc887) , ROM_SKIP(7) ) // OBJ, bitplane 3
|
||||
ROMX_LOAD( "b14-49.12", 0x100003, 0x20000, CRC(32ba4265) SHA1(f468243d923726b7eff78d9bc55a3a092f211a24) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-50.8", 0x000007, 0x20000, CRC(ec1ef311) SHA1(4cfa06aec9535f2044b763b071f73d23ca8ba354) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-51.4", 0x100007, 0x20000, CRC(35041c5f) SHA1(71602267736396516366a8abf535db82acaa1c23) , ROM_SKIP(7) )
|
||||
|
||||
ROMX_LOAD( "b14-44.15", 0x000002, 0x20000, CRC(9f6c030e) SHA1(bb278fdcc29530685aa2e76da0712195f6ab0f5f) , ROM_SKIP(7) ) /* OBJ, bitplane 2 */
|
||||
ROMX_LOAD( "b14-44.15", 0x000002, 0x20000, CRC(9f6c030e) SHA1(bb278fdcc29530685aa2e76da0712195f6ab0f5f) , ROM_SKIP(7) ) // OBJ, bitplane 2
|
||||
ROMX_LOAD( "b14-45.11", 0x100002, 0x20000, CRC(63e4ce03) SHA1(92e3f45754676dd15691e48c0d37490c1a3ec328) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-46.7", 0x000006, 0x20000, CRC(d489adf2) SHA1(9f77916594d5ed05b79d7e8d8f534eb39f65edae) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-47.3", 0x100006, 0x20000, CRC(b3a1f75b) SHA1(050dd3313b5392d131c5a62c544260b83af0b8ab) , ROM_SKIP(7) )
|
||||
|
||||
ROMX_LOAD( "b14-40.14", 0x000001, 0x20000, CRC(fa2a3cb3) SHA1(1e102ae6e916fda046a154b89056a18b724d51a3) , ROM_SKIP(7) ) /* OBJ, bitplane 1 */
|
||||
ROMX_LOAD( "b14-40.14", 0x000001, 0x20000, CRC(fa2a3cb3) SHA1(1e102ae6e916fda046a154b89056a18b724d51a3) , ROM_SKIP(7) ) // OBJ, bitplane 1
|
||||
ROMX_LOAD( "b14-41.10", 0x100001, 0x20000, CRC(09455a14) SHA1(dc703e1f9c4f16e330796e9945799e1038ce503b) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-42.6", 0x000005, 0x20000, CRC(ab51f53c) SHA1(0ed9a2e607b0bd2b43b47e3ed29b00a8d8a09f25) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-43.2", 0x100005, 0x20000, CRC(1e6d2b38) SHA1(453cd818a6cd8b238c72cc880c811227609767b8) , ROM_SKIP(7) )
|
||||
|
||||
ROMX_LOAD( "b14-36.13", 0x000000, 0x20000, CRC(20a7c1b8) SHA1(053c6b733a5c33b9259dfc754ce30a880905bb11) , ROM_SKIP(7) ) /* OBJ, bitplane 0 */
|
||||
ROMX_LOAD( "b14-36.13", 0x000000, 0x20000, CRC(20a7c1b8) SHA1(053c6b733a5c33b9259dfc754ce30a880905bb11) , ROM_SKIP(7) ) // OBJ, bitplane 0
|
||||
ROMX_LOAD( "b14-37.9", 0x100000, 0x20000, CRC(801b703b) SHA1(dfbe276bd484815a7e69589eb56d54bc6e12e301) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-38.5", 0x000004, 0x20000, CRC(de0c213e) SHA1(1313b2051e906d22edb55f4d45d3a424b31ca2a2) , ROM_SKIP(7) )
|
||||
ROMX_LOAD( "b14-39.1", 0x100004, 0x20000, CRC(798c28c5) SHA1(d2a8b9f84b3760f3800c5760ecee7ddcbafa6d6e) , ROM_SKIP(7) )
|
||||
|
||||
ROM_REGION( 0x10000, "user1", 0 )
|
||||
ROM_LOAD( "b14-30.88", 0x00000, 0x10000, CRC(dccb0c7f) SHA1(42f0af72f559133b74912a4478e1323062be4b77) ) /* zoom tables for zoom sprite h/w */
|
||||
ROM_REGION( 0x10000, "user1", 0 ) // Zoom tables for zoom sprite h/w
|
||||
ROM_LOAD( "b14-30.88", 0x00000, 0x10000, CRC(dccb0c7f) SHA1(42f0af72f559133b74912a4478e1323062be4b77) )
|
||||
|
||||
// One dump has this 0x10000 long, but just contains the same stuff repeated 8 times //
|
||||
ROM_REGION( 0x2000, "user2", 0 )
|
||||
ROM_LOAD( "b14-31.90", 0x0000, 0x2000, CRC(5c6b013d) SHA1(6d02d4560076213b6fb6fe856143bb533090603e) ) /* microcontroller */
|
||||
ROM_REGION( 0x2000, "user2", 0 ) // Unknown (Sharp LH763J-70 64kx8 OTP ROM)
|
||||
ROM_LOAD( "b14-31.90", 0x0000, 0x2000, CRC(5c6b013d) SHA1(6d02d4560076213b6fb6fe856143bb533090603e) )
|
||||
|
||||
ROM_REGION( 0x20000, "adpcm", 0 ) /* ADPCM samples */
|
||||
ROM_REGION( 0x20000, "adpcm", 0 ) // ADPCM samples
|
||||
ROM_LOAD( "b14-28.103", 0x00000, 0x10000, CRC(df11d0ae) SHA1(259e1e6cc7ab100bfdb60e3d7a6bb46acb6fe2ea) )
|
||||
ROM_LOAD( "b14-29.109", 0x10000, 0x10000, CRC(7ad983e7) SHA1(a3515caf93d6dab86de06ee52d6a13a456507dbe) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( topspeedu )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* 128K for 68000 code (CPU A) */
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) // 128K for 68000 code (CPU A)
|
||||
ROM_LOAD16_BYTE ( "b14-23", 0x00000, 0x10000, CRC(dd0307fd) SHA1(63218a707c78b3c785d1741dabdc511a76f12af1) )
|
||||
ROM_LOAD16_BYTE ( "b14-24", 0x00001, 0x10000, CRC(acdf08d4) SHA1(506d48d27fc26684a3f884919665cf65a1b3062f) )
|
||||
ROM_LOAD16_WORD_SWAP( "b14-05", 0x80000, 0x80000, CRC(6557e9d8) SHA1(ff528b27fcaef5c181f5f3a56d6a41b935cf07e1) ) /* data rom */
|
||||
ROM_LOAD16_WORD_SWAP( "b14-05", 0x80000, 0x80000, CRC(6557e9d8) SHA1(ff528b27fcaef5c181f5f3a56d6a41b935cf07e1) ) // Data ROM
|
||||
|
||||
ROM_REGION( 0x20000, "subcpu", 0 ) /* 128K for 68000 code (CPU B) */
|
||||
ROM_REGION( 0x20000, "subcpu", 0 ) // 128K for 68000 code (CPU B)
|
||||
ROM_LOAD16_BYTE( "b14-26", 0x00000, 0x10000, CRC(659dc872) SHA1(0a168122fe6324510c830e21a56eace9c8a2c189) )
|
||||
ROM_LOAD16_BYTE( "b14-56", 0x00001, 0x10000, CRC(d165cf1b) SHA1(bfbb8699c5671d3841d4057678ef4085c1927684) )
|
||||
|
||||
ROM_REGION( 0x1c000, "audiocpu", 0 ) /* Z80 sound cpu */
|
||||
ROM_REGION( 0x1c000, "audiocpu", 0 ) // Z80 sound CPU
|
||||
ROM_LOAD( "b14-25.67", 0x00000, 0x04000, CRC(9eab28ef) SHA1(9a90f2c1881f4664d6d6241f3bc57faeaf150ffc) )
|
||||
ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
|
||||
ROM_CONTINUE( 0x10000, 0x0c000 ) // Banked stuff
|
||||
|
||||
ROM_REGION( 0x40000, "gfx1", 0 )
|
||||
ROM_LOAD16_BYTE( "b14-07.54", 0x00000, 0x20000, CRC(c6025fff) SHA1(439ed85b0160bfd6c06fd42990124a292b2e3c14) ) /* SCR tiles */
|
||||
ROM_REGION( 0x40000, "gfx1", 0 ) // SCR tiles
|
||||
ROM_LOAD16_BYTE( "b14-07.54", 0x00000, 0x20000, CRC(c6025fff) SHA1(439ed85b0160bfd6c06fd42990124a292b2e3c14) )
|
||||
ROM_LOAD16_BYTE( "b14-06.52", 0x00001, 0x20000, CRC(b4e2536e) SHA1(c1960ee25b37b1444ec99082521c4858edcf3484) )
|
||||
|
||||
ROM_REGION( 0x200000, "gfx2", 0 )
|
||||
ROM_LOAD32_BYTE( "b14-01", 0x00000, 0x80000, CRC(84a56f37) SHA1(926bcae5bd75a4172de2a2078718b2940c5c1966) ) /* OBJ: each rom has 1 bitplane, forming 16x8 tiles */
|
||||
ROM_REGION( 0x200000, "gfx2", 0 ) // OBJ: each rom has 1 bitplane, forming 16x8 tiles
|
||||
ROM_LOAD32_BYTE( "b14-01", 0x00000, 0x80000, CRC(84a56f37) SHA1(926bcae5bd75a4172de2a2078718b2940c5c1966) )
|
||||
ROM_LOAD32_BYTE( "b14-02", 0x00001, 0x80000, CRC(6889186b) SHA1(3c38e281e8bf416a401c76ebb2d8ca95d09974b6) )
|
||||
ROM_LOAD32_BYTE( "b14-03", 0x00002, 0x80000, CRC(d1ed9e71) SHA1(26a6b2ca5bf6d70ad87f5c40c8e94ec542a2ec04) )
|
||||
ROM_LOAD32_BYTE( "b14-04", 0x00003, 0x80000, CRC(b63f0519) SHA1(e9a6b49effba0cae1ae3536a8584d3efa34ca8c3) )
|
||||
|
||||
ROM_REGION( 0x10000, "user1", 0 )
|
||||
ROM_LOAD( "b14-30.88", 0x00000, 0x10000, CRC(dccb0c7f) SHA1(42f0af72f559133b74912a4478e1323062be4b77) ) /* zoom tables for zoom sprite h/w */
|
||||
ROM_REGION( 0x10000, "user1", 0 ) // Zoom tables for zoom sprite h/w
|
||||
ROM_LOAD( "b14-30.88", 0x00000, 0x10000, CRC(dccb0c7f) SHA1(42f0af72f559133b74912a4478e1323062be4b77) )
|
||||
|
||||
ROM_REGION( 0x2000, "user2", 0 )
|
||||
ROM_LOAD( "b14-31.90", 0x0000, 0x2000, CRC(5c6b013d) SHA1(6d02d4560076213b6fb6fe856143bb533090603e) ) /* microcontroller */
|
||||
ROM_REGION( 0x2000, "user2", 0 ) // Unknown (Sharp LH763J-70 64kx8 OTP ROM)
|
||||
ROM_LOAD( "b14-31.90", 0x0000, 0x2000, CRC(5c6b013d) SHA1(6d02d4560076213b6fb6fe856143bb533090603e) )
|
||||
|
||||
ROM_REGION( 0x20000, "adpcm", 0 ) /* ADPCM samples */
|
||||
ROM_REGION( 0x20000, "adpcm", 0 ) // ADPCM samples
|
||||
ROM_LOAD( "b14-28.103", 0x00000, 0x10000, CRC(df11d0ae) SHA1(259e1e6cc7ab100bfdb60e3d7a6bb46acb6fe2ea) )
|
||||
ROM_LOAD( "b14-29.109", 0x10000, 0x10000, CRC(7ad983e7) SHA1(a3515caf93d6dab86de06ee52d6a13a456507dbe) )
|
||||
ROM_END
|
||||
|
||||
ROM_START( fullthrl )
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) /* 128K for 68000 code (CPU A) */
|
||||
ROM_LOAD16_BYTE ( "b14-67", 0x00000, 0x10000, CRC(284c943f) SHA1(e4720b138052d9cbf1290aeca8f9dd7fe2cffcc5) ) // Later rev?
|
||||
ROM_REGION( 0x100000, "maincpu", 0 ) // 128K for 68000 code (CPU A) - Later revision?
|
||||
ROM_LOAD16_BYTE ( "b14-67", 0x00000, 0x10000, CRC(284c943f) SHA1(e4720b138052d9cbf1290aeca8f9dd7fe2cffcc5) )
|
||||
ROM_LOAD16_BYTE ( "b14-68", 0x00001, 0x10000, CRC(54cf6196) SHA1(0e86a7bf7d43526222160f4cd09f8d29fa9abdc4) )
|
||||
ROM_LOAD16_WORD_SWAP( "b14-05", 0x80000, 0x80000, CRC(6557e9d8) SHA1(ff528b27fcaef5c181f5f3a56d6a41b935cf07e1) ) /* data rom */
|
||||
ROM_LOAD16_WORD_SWAP( "b14-05", 0x80000, 0x80000, CRC(6557e9d8) SHA1(ff528b27fcaef5c181f5f3a56d6a41b935cf07e1) ) // Data ROM
|
||||
|
||||
ROM_REGION( 0x20000, "subcpu", 0 ) /* 128K for 68000 code (CPU B) */
|
||||
ROM_REGION( 0x20000, "subcpu", 0 ) // 128K for 68000 code (CPU B)
|
||||
ROM_LOAD16_BYTE( "b14-69.80", 0x00000, 0x10000, CRC(d652e300) SHA1(b559bdb564d96da4c656dc7b2c88dae84c4861ae) )
|
||||
ROM_LOAD16_BYTE( "b14-71", 0x00001, 0x10000, CRC(f7081727) SHA1(f0ab6ce9975dd7a1fadd439fd3dfd2f1bf88796c) )
|
||||
|
||||
ROM_REGION( 0x1c000, "audiocpu", 0 ) /* Z80 sound cpu */
|
||||
ROM_REGION( 0x1c000, "audiocpu", 0 ) // Z80 sound CPU
|
||||
ROM_LOAD( "b14-25.67", 0x00000, 0x04000, CRC(9eab28ef) SHA1(9a90f2c1881f4664d6d6241f3bc57faeaf150ffc) )
|
||||
ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
|
||||
ROM_CONTINUE( 0x10000, 0x0c000 ) // Banked stuff
|
||||
|
||||
ROM_REGION( 0x40000, "gfx1", 0 )
|
||||
ROM_LOAD16_BYTE( "b14-07.54", 0x00000, 0x20000, CRC(c6025fff) SHA1(439ed85b0160bfd6c06fd42990124a292b2e3c14) ) /* SCR tiles */
|
||||
ROM_REGION( 0x40000, "gfx1", 0 ) // SCR tiles
|
||||
ROM_LOAD16_BYTE( "b14-07.54", 0x00000, 0x20000, CRC(c6025fff) SHA1(439ed85b0160bfd6c06fd42990124a292b2e3c14) )
|
||||
ROM_LOAD16_BYTE( "b14-06.52", 0x00001, 0x20000, CRC(b4e2536e) SHA1(c1960ee25b37b1444ec99082521c4858edcf3484) )
|
||||
|
||||
ROM_REGION( 0x200000, "gfx2", 0 )
|
||||
ROM_LOAD32_BYTE( "b14-01", 0x00000, 0x80000, CRC(84a56f37) SHA1(926bcae5bd75a4172de2a2078718b2940c5c1966) ) /* OBJ: each rom has 1 bitplane, forming 16x8 tiles */
|
||||
ROM_REGION( 0x200000, "gfx2", 0 ) // OBJ: each rom has 1 bitplane, forming 16x8 tiles
|
||||
ROM_LOAD32_BYTE( "b14-01", 0x00000, 0x80000, CRC(84a56f37) SHA1(926bcae5bd75a4172de2a2078718b2940c5c1966) )
|
||||
ROM_LOAD32_BYTE( "b14-02", 0x00001, 0x80000, CRC(6889186b) SHA1(3c38e281e8bf416a401c76ebb2d8ca95d09974b6) )
|
||||
ROM_LOAD32_BYTE( "b14-03", 0x00002, 0x80000, CRC(d1ed9e71) SHA1(26a6b2ca5bf6d70ad87f5c40c8e94ec542a2ec04) )
|
||||
ROM_LOAD32_BYTE( "b14-04", 0x00003, 0x80000, CRC(b63f0519) SHA1(e9a6b49effba0cae1ae3536a8584d3efa34ca8c3) )
|
||||
|
||||
ROM_REGION( 0x10000, "user1", 0 )
|
||||
ROM_LOAD( "b14-30.88", 0x00000, 0x10000, CRC(dccb0c7f) SHA1(42f0af72f559133b74912a4478e1323062be4b77) ) /* zoom tables for zoom sprite h/w */
|
||||
ROM_REGION( 0x10000, "user1", 0 ) // Zoom tables for zoom sprite h/w
|
||||
ROM_LOAD( "b14-30.88", 0x00000, 0x10000, CRC(dccb0c7f) SHA1(42f0af72f559133b74912a4478e1323062be4b77) )
|
||||
|
||||
ROM_REGION( 0x2000, "user2", 0 )
|
||||
ROM_LOAD( "b14-31.90", 0x0000, 0x2000, CRC(5c6b013d) SHA1(6d02d4560076213b6fb6fe856143bb533090603e) ) /* microcontroller */
|
||||
ROM_REGION( 0x2000, "user2", 0 ) // Unknown (Sharp LH763J-70 64kx8 OTP ROM)
|
||||
ROM_LOAD( "b14-31.90", 0x0000, 0x2000, CRC(5c6b013d) SHA1(6d02d4560076213b6fb6fe856143bb533090603e) )
|
||||
|
||||
ROM_REGION( 0x20000, "adpcm", 0 ) /* ADPCM samples */
|
||||
ROM_REGION( 0x20000, "adpcm", 0 ) // ADPCM samples
|
||||
ROM_LOAD( "b14-28.103", 0x00000, 0x10000, CRC(df11d0ae) SHA1(259e1e6cc7ab100bfdb60e3d7a6bb46acb6fe2ea) )
|
||||
ROM_LOAD( "b14-29.109", 0x10000, 0x10000, CRC(7ad983e7) SHA1(a3515caf93d6dab86de06ee52d6a13a456507dbe) )
|
||||
ROM_END
|
||||
|
||||
|
||||
GAMEL( 1987, topspeed, 0, topspeed, topspeed, driver_device, 0, ROT0, "Taito Corporation Japan", "Top Speed (World)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_topspeed )
|
||||
GAMEL( 1987, topspeedu,topspeed, topspeed, fullthrl, driver_device, 0, ROT0, "Taito America Corporation (Romstar license)", "Top Speed (US)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_topspeed )
|
||||
GAMEL( 1987, fullthrl, topspeed, topspeed, fullthrl, driver_device, 0, ROT0, "Taito Corporation", "Full Throttle (Japan)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE, layout_topspeed )
|
||||
GAMEL( 1987, topspeed, 0, topspeed, topspeed, driver_device, 0, ROT0, "Taito Corporation Japan", "Top Speed (World)", GAME_SUPPORTS_SAVE, layout_topspeed )
|
||||
GAMEL( 1987, topspeedu,topspeed, topspeed, fullthrl, driver_device, 0, ROT0, "Taito America Corporation (Romstar license)", "Top Speed (US)", GAME_SUPPORTS_SAVE, layout_topspeed )
|
||||
GAMEL( 1987, fullthrl, topspeed, topspeed, fullthrl, driver_device, 0, ROT0, "Taito Corporation", "Full Throttle (Japan)", GAME_SUPPORTS_SAVE, layout_topspeed )
|
||||
|
||||
@ -5,18 +5,13 @@
|
||||
*************************************************************************/
|
||||
|
||||
#include "sound/msm5205.h"
|
||||
#include "sound/flt_vol.h"
|
||||
#include "machine/taitoio.h"
|
||||
#include "video/pc080sn.h"
|
||||
|
||||
class topspeed_state : public driver_device
|
||||
{
|
||||
public:
|
||||
enum
|
||||
{
|
||||
TIMER_TOPSPEED_INTERRUPT6,
|
||||
TIMER_TOPSPEED_CPUB_INTERRUPT6
|
||||
};
|
||||
|
||||
topspeed_state(const machine_config &mconfig, device_type type, const char *tag)
|
||||
: driver_device(mconfig, type, tag),
|
||||
m_spritemap(*this, "spritemap"),
|
||||
@ -30,27 +25,17 @@ public:
|
||||
m_msm2(*this, "msm2"),
|
||||
m_pc080sn_1(*this, "pc080sn_1"),
|
||||
m_pc080sn_2(*this, "pc080sn_2"),
|
||||
m_tc0220ioc(*this, "tc0220ioc") { }
|
||||
m_tc0220ioc(*this, "tc0220ioc"),
|
||||
m_filter1l(*this, "filter1l"),
|
||||
m_filter1r(*this, "filter1r"),
|
||||
m_filter2(*this, "filter2"),
|
||||
m_filter3(*this, "filter3") { }
|
||||
|
||||
/* memory pointers */
|
||||
required_shared_ptr<UINT16> m_spritemap;
|
||||
required_shared_ptr<UINT16> m_raster_ctrl;
|
||||
required_shared_ptr<UINT16> m_spriteram;
|
||||
required_shared_ptr<UINT16> m_sharedram;
|
||||
|
||||
/* adpcm */
|
||||
UINT8 *m_msm_rom[2];
|
||||
UINT16 m_msm_start[2];
|
||||
UINT16 m_msm_loop[2];
|
||||
UINT16 m_msm_pos[2];
|
||||
UINT8 m_msm_sel[2];
|
||||
|
||||
/* misc */
|
||||
UINT16 m_cpua_ctrl;
|
||||
INT32 m_ioc220_port;
|
||||
INT32 m_banknum;
|
||||
|
||||
/* devices */
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
required_device<cpu_device> m_subcpu;
|
||||
@ -59,30 +44,46 @@ public:
|
||||
required_device<pc080sn_device> m_pc080sn_1;
|
||||
required_device<pc080sn_device> m_pc080sn_2;
|
||||
required_device<tc0220ioc_device> m_tc0220ioc;
|
||||
required_device<filter_volume_device> m_filter1l;
|
||||
required_device<filter_volume_device> m_filter1r;
|
||||
required_device<filter_volume_device> m_filter2;
|
||||
required_device<filter_volume_device> m_filter3;
|
||||
|
||||
UINT8 m_dislayer[5];
|
||||
DECLARE_READ16_MEMBER(sharedram_r);
|
||||
DECLARE_WRITE16_MEMBER(sharedram_w);
|
||||
DECLARE_WRITE16_MEMBER(cpua_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(topspeed_input_bypass_r);
|
||||
DECLARE_READ16_MEMBER(topspeed_motor_r);
|
||||
DECLARE_WRITE16_MEMBER(topspeed_motor_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(topspeed_msm5205_command_w);
|
||||
DECLARE_CUSTOM_INPUT_MEMBER(topspeed_pedal_r);
|
||||
// Misc
|
||||
UINT16 m_cpua_ctrl;
|
||||
INT32 m_ioc220_port;
|
||||
|
||||
// ADPCM
|
||||
UINT8 *m_msm_rom[2];
|
||||
UINT16 m_msm_pos[2];
|
||||
UINT8 m_msm_reset[2];
|
||||
UINT8 m_msm_nibble[2];
|
||||
UINT8 m_msm2_vck;
|
||||
UINT8 m_msm2_vck2;
|
||||
|
||||
#ifdef MAME_DEBUG
|
||||
UINT8 m_dislayer[5];
|
||||
#endif
|
||||
|
||||
// drivers/topspeed.c
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
UINT32 screen_update_topspeed(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
INTERRUPT_GEN_MEMBER(topspeed_interrupt);
|
||||
INTERRUPT_GEN_MEMBER(topspeed_cpub_interrupt);
|
||||
void topspeed_postload();
|
||||
void draw_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect );
|
||||
void parse_control( ) /* assumes Z80 sandwiched between 68Ks */;
|
||||
void reset_sound_region( );
|
||||
void topspeed_msm5205_clock(int chip);
|
||||
DECLARE_WRITE_LINE_MEMBER(topspeed_msm5205_vck_1);
|
||||
DECLARE_WRITE_LINE_MEMBER(topspeed_msm5205_vck_2);
|
||||
|
||||
protected:
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
void msm5205_update(int chip);
|
||||
|
||||
DECLARE_WRITE16_MEMBER(cpua_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(input_bypass_r);
|
||||
DECLARE_READ16_MEMBER(motor_r);
|
||||
DECLARE_WRITE16_MEMBER(motor_w);
|
||||
DECLARE_CUSTOM_INPUT_MEMBER(pedal_r);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(msm5205_command_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(msm5205_1_vck);
|
||||
DECLARE_WRITE_LINE_MEMBER(z80ctc_to0);
|
||||
DECLARE_WRITE8_MEMBER(volume_w);
|
||||
|
||||
// video/topspeed.c
|
||||
void draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
UINT32 screen_update_topspeed(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
};
|
||||
|
||||
@ -2,6 +2,108 @@
|
||||
#include "includes/topspeed.h"
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
NOTES
|
||||
|
||||
Raster line color control
|
||||
-------------------------
|
||||
|
||||
Used to make the road move. Each word controls one pixel row.
|
||||
|
||||
0x800000 - 0x1ff raster color control for one road tilemap
|
||||
0x800200 - 0x3ff raster color control for the other
|
||||
|
||||
Road tile colors are (all?) in the range 0x100-103. Top road section
|
||||
(tilemap at 0xa08000) uses 0x100 and 0x101. Bottom section
|
||||
(tilemap at 0xb00000) uses 0x102 and 0x103. This would allow colors
|
||||
on left and right side of road to be different. In practice it seems
|
||||
Taito didn't take advantage of this.
|
||||
|
||||
Each tilemap is usually all one color value. Every now and then (10s
|
||||
or so) the value alternates. This seems to be determined by whether
|
||||
the current section of road has white lines in the middle. (0x101/3
|
||||
gives white lines.)
|
||||
|
||||
The raster line color control area has groups of four values which
|
||||
cascade down through it so the road colors cascade down the screen.
|
||||
|
||||
There are three known groups (start is arbitrary; the cycles repeat ad
|
||||
infinitum or until a different cycle starts; values given are from bottom
|
||||
to top of screen):
|
||||
|
||||
(i) White lines in center of road
|
||||
|
||||
12 %10010
|
||||
1f %11111
|
||||
00 %00000
|
||||
0d %01101
|
||||
|
||||
(ii) No lines in center of road
|
||||
|
||||
08 %01000
|
||||
0c %01100
|
||||
1a %11010
|
||||
1e %11110
|
||||
|
||||
(iii) Under bridge or in tunnel [note almost identical to (i)]
|
||||
|
||||
ffe0 %00000
|
||||
ffed %01101
|
||||
fff2 %10010
|
||||
ffef %01111
|
||||
|
||||
(iv) Unknown 4th group for tunnels in later parts of the game that have
|
||||
no white lines, analogous to (ii) ?
|
||||
|
||||
|
||||
Correlating with screenshots suggests that these bits refer to:
|
||||
|
||||
x.... road body ?
|
||||
.x... lines in road center and inner edge
|
||||
..x.. lines at road outer edge
|
||||
...x. outside road ?
|
||||
....x ???
|
||||
|
||||
|
||||
Actual gfx tiles used for the road only use colors 1-5. Palette offsets:
|
||||
|
||||
(0 = transparency)
|
||||
1 = lines in road center
|
||||
2 = road edge (inner)
|
||||
3 = road edge (outer)
|
||||
4 = road body
|
||||
5 = outside road
|
||||
|
||||
Each palette block contains three possible sets of 5 colors. Entries 1-5
|
||||
(standard), 6-10 (alternate), 11-15 (tunnels).
|
||||
|
||||
In tunnels only 11-15 are used. Outside tunnels there is a choice between
|
||||
the standard colors and the alternate colors. The road body could in theory
|
||||
take a standard color while 'outside the road' took on an alternate. But
|
||||
in practice the game is using a very limited choice of raster control words,
|
||||
so we don't know.
|
||||
|
||||
Need to test whether sections of the road with unknown raster control words
|
||||
(tunnels late in the game without central white lines) are correct against
|
||||
a real machine.
|
||||
|
||||
Also are the 'prelines' shortly before white road lines appear correct?
|
||||
|
||||
|
||||
|
||||
CHECK screen inits at $1692
|
||||
|
||||
These suggest that rowscroll areas are all 0x1000 long and there are TWO
|
||||
for each tilemap layer.
|
||||
|
||||
256 rows => 256 words => 0x200 bytes. So probably the inits are far too long.
|
||||
|
||||
Maybe the second area for each layer contains colscroll ?
|
||||
|
||||
****************************************************************************/
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
|
||||
SPRITES
|
||||
@ -36,7 +138,7 @@ void topspeed_state::draw_sprites( screen_device &screen, bitmap_ind16 &bitmap,
|
||||
static const int primasks[2] = { 0xff00, 0xfffc }; /* Sprites are over bottom layer or under top layer */
|
||||
|
||||
/* Most of spriteram is not used by the 68000: rest is scratch space for the h/w perhaps ? */
|
||||
for (offs = 0; offs < (0x2c0 / 2); offs += 4)
|
||||
for (offs = 0; offs < m_spriteram.bytes() / 2; offs += 4)
|
||||
{
|
||||
data = spriteram[offs + 2];
|
||||
|
||||
@ -51,8 +153,9 @@ void topspeed_state::draw_sprites( screen_device &screen, bitmap_ind16 &bitmap,
|
||||
priority = (data & 0x8000) >> 15;
|
||||
// unknown = (data & 0x2000) >> 13;
|
||||
|
||||
/* End of sprite list */
|
||||
if (y == 0x180)
|
||||
continue; /* dead sprite */
|
||||
break;
|
||||
|
||||
map_offset = tilenum << 7;
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user